Dell M4040 DV14 AMD Schematics

5

4

3

2

1

Enrico 14

D D

Muxless Discrete/UMA Schematics Document

AMD Ontario CPU FT1
AMD GPU Seymour XT

FCH HUDSON M1

C C

PCB :10265

2010-04-21

REV : A00

B B

DY :None Installed
UMA:UMA and Muxless platform installed
DIS_PX:DIS and Muxless platform installed
PSL:10mW internal schematic
10mW: 10mW schematic installed

A A

Surge: Surege schematic installed
GIGA: GIGA schematic installed
10/100: 10/100 schematic installed
ROB: ROBOSON GPU installed

5

<Variant Name>

<Variant Name>

<Variant Name>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Cover Page

Cover Page

Cover Page

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

4

www.bblianmeng.com

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

1 109Friday, April 22, 2011

1 109Friday, April 22, 2011

1 109Friday, April 22, 2011

1

A00

A00

A00

5

4

3

2

1

CHARGER

BQ24707

Project code : 91.4IU01.001
PCB P/N :

AMD Brazos UMA/Discrete Block Diagram

Revision : 10265-1

D D

DDR III 1333

AMD APU-Ontario

CRT

50

RGB CRT

(FT1 BGA 413-Ball)

PCIe GPPs (4 parts)
DP0 (DP/HDMI/DVI/LVDS)
DP1 (DP/HDMI/DVI) DP0

DDRIII
1066MHZ

DDRIII
1066MHZ

LVDS

AMD dGPU

VRAM

gDDR3

Seymour-XT

83,84,85,86,87

64M*16b*4(512MB)/128M*16b*4(1024MB)

PCIe x 4 Gen 2(Muxless)

4,5,6,7,8

DP1

x4 UMI(Gen 1)

HDMI

DIMM1

14,15

DIMM2

14,15

49

51

INPUTS

AD+

BT+

SYSTEM DC/DC

TPS51125A

INPUTS

DCBATOUT

APU Core/NB Power

ISL6265CHRTZ-T

INPUTS

DCBATOUT

DDRIII SUS

TPS51216RUKR

OUTPUTS

DCBATOUT

OUTPUTS

3D3V_AUX_S5
5V_AUX_S5
5V_S5
3D3V_S5

OUTPUTS

APU_VDD
APU_VDDNB

INPUTS OUTPUTS

C C

SD/MMC/MS

74

Internal Analog MIC

MIC IN

HP OUT

B B

CardReader

Realtek
RTS5138

Azalia
CODEC

&
OP AMP

IDT 92HD87B1

USB2.0

PCIE x 1

FCH

32

AZALIA

29

Hudson-M1

USB 2.0 (14 parts)
USB 1.1 (2 parts)
SATA III(6 parts), 6Gb/s
INT CLK GEN
HW MONITOR
ACPI 1.1

USB 2.0

LPC Bus

PCIE x 1
USB 2.0 x 1

USB 2.0 x 3

USB 2.0 x 1

10/100

Realtek
RTL8105

Mini-Card/Bluetooth

802.11a/b/g

Right Side:
USB x3

61

31

65

RJ45
CONN

CAMERA
(Option)

59

2CH SPEAKER

17,18,19,20,21,22

DCBATOUT

1D5V_S3

DDRIII VTT

TPS51216RGER

INPUTS

DCBATOUT

OUTPUTS

0D75V_S0

APU VDDR/VDDP

TPS51218

OUTPUTSINPUTS

DCBATOUT

1D1V_S5

AMD APU/FCH CORE Power

TPS51218

INPUTS

DCBATOUT

49

AMD GPU CORE

OUTPUTS

1V_S0

RT8208BGQW

INPUTS

DCBATOUT

OUTPUTS

VGA_CORE

AMD GPU CORE

RT8015B

INPUTS

3D3V_S5

OUTPUTS

1D8V_S0

28,29

30

27

42, 43

31

33

26

26

40

41

44

44

46

46

92

47

KBC

SPI

SATA II

A A

HDD

56 56

5

4

SATA II

ODD

www.bblianmeng.com

Flash ROM

2MB

3

60 69 25

NUVOTON

NPCE795P

Touch
PAD

69

KB

27

<Core Design>

<Core Design>

<Core Design>

ThermalInt.

P2800

Fan

P2793

28

Title

Title

Title

Block Diagram

Block Diagram

Block Diagram

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

A3

A3

58

2

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

PCB LAYER

L1: Top
L2: VCC
L3: Signal
L4: Signal
L5: GND
L6: Bottom

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

2 109Friday, April 22, 2011

2 109Friday, April 22, 2011

2 109Friday, April 22, 2011

1

28

28

A00

A00

A00

5

4

3

2

1

REQUIRED SYSTEM STRAPS

D D

PULL
HIGH

PULL
LOW

AZ_SDOUT

LOW POWER
MODE

PERFORMANCE
MODE

DEFAULT

PCI_CLK1

Allow
PCIE GEN2

DEFAULT

Force
PCIE GEN1

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

PCI_CLK4CLK_PCI_LPC

non_Fusion
CLOCK mode

Fusion
CLOCK mode

DEFAULT

LPC_CLK0

ENABLE EC

DISABLE EC

DEFAULT

LPC_CLK1

CLKGEN
ENABLED

(Use Internal)

DEFAULT

CLKGEN
DISABLED

(Use External)

LPC_CLK2

Enable
boot timer
function

Disable boot
fail timer
function

DEFAULT

TYPE
ENABLED

Reserved

LPC ROM

SPI ROM

2.2-kohm 5% pull-down

Not connected.

2.2-kohm 5% pull-down Not connected.

EC_PWM3EC_PWM2

2.2-kohm 5% pull-down

2.2-kohm 5% pull-down

Reserved

Not connected.Not connected.

Note: EC_PWM2, EC_PWM3 default have internal 10kohm PU.

C C

USB Table PCIe Routing

Pair

0
1
2
3
4
5
6

B B

7
8
9
10
11
12
13

USB

Device
USB 2.0 EXT.Port1
Mini Card1 (WLAN)
USB 2.0 EXT.Port1
NC
NC
NC
USB 2.0 EXT.Port1
CCD Camera
NEWCARD
Card Reader
NC
NC
NC
NC

LANE0
LANE1
LANE2
LANE3 CardReader

APU

LAN

WWAN

WLAN

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Table of Content

Table of Content

Table of Content

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

3 109Friday, April 22, 2011

3 109Friday, April 22, 2011

3 109Friday, April 22, 2011

1

A00

A00

A00

5

4

3

2

1

SSID = CPU

D D

1 OF 5

APU1A

APU1A

PEG_RXP083
PEG_RXN083

PEG_RXP183
PEG_RXN183

PEG_RXP283
PEG_RXN283

PEG_RXP383
PEG_RXN383

R401

R401

1V_S0

UMI_FCH_APU_RX0P17

C C

UMI_FCH_APU_RX0N17
UMI_FCH_APU_RX1P17

UMI_FCH_APU_RX1N17
UMI_FCH_APU_RX2P17

UMI_FCH_APU_RX2N17
UMI_FCH_APU_RX3P17

UMI_FCH_APU_RX3N17

1 2

2KR2F-3-GP

2KR2F-3-GP

AA6

AB4
AC4

AA1
AA2

Y14

AA12

Y12

AA10

Y10

AB10
AC10

AC7
AB7

Y6

Y4
Y3

P_GPP_RXP0
P_GPP_RXN0

P_GPP_RXP1
P_GPP_RXN1

P_GPP_RXP2
P_GPP_RXN2

P_GPP_RXP3
P_GPP_RXN3

P_ZVDD_10

P_UMI_RXP0
P_UMI_RXN0

P_UMI_RXP1
P_UMI_RXN1

P_UMI_RXP2
P_UMI_RXN2

P_UMI_RXP3
P_UMI_RXN3

ONTARIO-FT1-GP

ONTARIO-FT1-GP

ONTARIO_FT1

ONTARIO_FT1

UMI I/F

UMI I/F

PCIE I/F

PCIE I/F

1 OF 5

P_GPP_TXP0
P_GPP_TXN0

P_GPP_TXP1
P_GPP_TXN1

P_GPP_TXP2
P_GPP_TXN2

P_GPP_TXP3
P_GPP_TXN3

P_ZVSS

P_UMI_TXP0
P_UMI_TXN0

P_UMI_TXP1
P_UMI_TXN1

P_UMI_TXP2
P_UMI_TXN2

P_UMI_TXP3
P_UMI_TXN3

AB6
AC6

AB3
AC3

Y1
Y2

V3
V4

AA14

AB12
AC12

AC11
AB11

AA8
Y8

AB8
AC8

PEG_C_TXP0

C401 SCD1U10V2KX-5GP

C401 SCD1U10V2KX-5GP

PEG_C_TXN0

C402 SCD1U10V2KX-5GP

C402 SCD1U10V2KX-5GP

PEG_C_TXP1

C403 SCD1U10V2KX-5GP

C403 SCD1U10V2KX-5GP

PEG_C_TXN1

C404 SCD1U10V2KX-5GP

C404 SCD1U10V2KX-5GP

PEG_C_TXP2

C405 SCD1U10V2KX-5GP

C405 SCD1U10V2KX-5GP

PEG_C_TXN2

C406 SCD1U10V2KX-5GP

C406 SCD1U10V2KX-5GP

PEG_C_TXP3

C407 SCD1U10V2KX-5GP

C407 SCD1U10V2KX-5GP

PEG_C_TXN3

C408 SCD1U10V2KX-5GP

C408 SCD1U10V2KX-5GP

P_ZVSSP_ZVDDP

R402

R402

1 2

1K27R2F-L-GP

1K27R2F-L-GP

UMI_TX0P_C
UMI_TX0N_C

UMI_TX1P_C
UMI_TX1N_C

UMI_TX2P_C
UMI_TX2N_C

UMI_TX3P_C
UMI_TX3N_C

C409 SCD1U10V2KX-5GPC409 SCD1U10V2KX-5GP
C410 SCD1U10V2KX-5GPC410 SCD1U10V2KX-5GP

C411 SCD1U10V2KX-5GPC411 SCD1U10V2KX-5GP
C412 SCD1U10V2KX-5GPC412 SCD1U10V2KX-5GP

C413 SCD1U10V2KX-5GPC413 SCD1U10V2KX-5GP
C414 SCD1U10V2KX-5GPC414 SCD1U10V2KX-5GP

C415 SCD1U10V2KX-5GPC415 SCD1U10V2KX-5GP
C416 SCD1U10V2KX-5GPC416 SCD1U10V2KX-5GP

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

DIS_PX

DIS_PX

1 2

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

PEG_TXP0 83
PEG_TXN0 83

PEG_TXP1 83
PEG_TXN1 83

PEG_TXP2 83
PEG_TXN2 83

PEG_TXP3 83
PEG_TXN3 83

UMI_APU_FCH_TX0P 17
UMI_APU_FCH_TX0N 17

UMI_APU_FCH_TX1P 17
UMI_APU_FCH_TX1N 17

UMI_APU_FCH_TX2P 17
UMI_APU_FCH_TX2N 17

UMI_APU_FCH_TX3P 17
UMI_APU_FCH_TX3N 17

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

APU_PCIE(1/5)

APU_PCIE(1/5)

APU_PCIE(1/5)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

4 109Friday, April 22, 2011

4 109Friday, April 22, 2011

4 109Friday, April 22, 2011

1

A00

A00

A00

5

SSID = CPU

D D

C C

M_DIM0_CLK_DDR014
M_DIM0_CLK_DDR#014
M_DIM0_CLK_DDR114
M_DIM0_CLK_DDR#114
M_DIM0_CLK_DDR215
M_DIM0_CLK_DDR#215
M_DIM0_CLK_DDR315
M_DIM0_CLK_DDR#315

B B

APU_VREF

4

APU1E

APU1E

R17

M_ADD0

M_A114,15
M_A214,15
M_A314,15
M_A414,15
M_A514,15
M_A614,15
M_A714,15
M_A814,15
M_A914,15
M_A1014,15
M_A1114,15
M_A1214,15
M_A1314,15
M_A1414,15
M_A1514,15

M_BS014,15
M_BS114,15
M_BS214,15

M_DM014,15
M_DM114,15
M_DM214,15
M_DM314,15
M_DM414,15
M_DM514,15
M_DM614,15
M_DM714,15

M_DQS014,15
M_DQS#014,15
M_DQS114,15
M_DQS#114,15
M_DQS214,15
M_DQS#214,15
M_DQS314,15
M_DQS#314,15
M_DQS414,15
M_DQS#414,15
M_DQS514,15
M_DQS#514,15
M_DQS614,15
M_DQS#614,15
M_DQS714,15
M_DQS#714,15

M_RST#14,15

M_DIM0_CKE014,15
M_DIM0_CKE114,15

M_A_DIM0_ODT014
M_A_DIM0_ODT114
M_B_DIM0_ODT015
M_B_DIM0_ODT115

M_A_DIM0_CS#014
M_A_DIM0_CS#114
M_B_DIM0_CS#015
M_B_DIM0_CS#115

M_RAS#14,15
M_CAS#14,15
M_WE#14,15

M_EVENT#

H19
H18

H17
G17
H15
G18

W17

G15
R18

D15
D21

H22

AB20
AA16

R22

W22

AC20
AC21
AB16
AC16

M17
M16
M19
M18

W19

W15

W16

F19
E19
T19
F17
E18

E16

T18
F16

B19

P23
V23

A16
B16
B20
A20
E23
E22

P22
V22

N18
N19
L18
L17

L23
N17

F15
E15

V15
U19

T17
U17

V16
U18

V19
V17

J17

J22
J23

M_ADD1
M_ADD2
M_ADD3
M_ADD4
M_ADD5
M_ADD6
M_ADD7
M_ADD8
M_ADD9
M_ADD10
M_ADD11
M_ADD12
M_ADD13
M_ADD14
M_ADD15

M_BANK0
M_BANK1
M_BANK2

M_DM0
M_DM1
M_DM2
M_DM3
M_DM4
M_DM5
M_DM6
M_DM7

M_DQS_H0
M_DQS_L0
M_DQS_H1
M_DQS_L1
M_DQS_H2
M_DQS_L2
M_DQS_H3
M_DQS_L3
M_DQS_H4
M_DQS_L4
M_DQS_H5
M_DQS_L5
M_DQS_H6
M_DQS_L6
M_DQS_H7
M_DQS_L7

M_CLK_H0
M_CLK_L0
M_CLK_H1
M_CLK_L1
M_CLK_H2
M_CLK_L2
M_CLK_H3
M_CLK_L3

M_RESET#
M_EVENT#

M_CKE0
M_CKE1

M0_ODT0
M0_ODT1
M1_ODT0
M1_ODT1

M0_CS#0
M0_CS#1
M1_CS#0
M1_CS#1

M_RAS#
M_CAS#
M_WE#

ONTARIO-FT1-GP

ONTARIO-FT1-GP

3

ONTARIO_FT1

ONTARIO_FT1

MEMORY

I/F

MEMORY

I/F

5 OF 5

5 OF 5

M_DATA0
M_DATA1
M_DATA2
M_DATA3
M_DATA4
M_DATA5
M_DATA6
M_DATA7

M_DATA8

M_DATA9
M_DATA10
M_DATA11
M_DATA12
M_DATA13
M_DATA14
M_DATA15

M_DATA16
M_DATA17
M_DATA18
M_DATA19
M_DATA20
M_DATA21
M_DATA22
M_DATA23

M_DATA24
M_DATA25
M_DATA26
M_DATA27
M_DATA28
M_DATA29
M_DATA30
M_DATA31

M_DATA32
M_DATA33
M_DATA34
M_DATA35
M_DATA36
M_DATA37
M_DATA38
M_DATA39

M_DATA40
M_DATA41
M_DATA42
M_DATA43
M_DATA44
M_DATA45
M_DATA46
M_DATA47

M_DATA48
M_DATA49
M_DATA50
M_DATA51
M_DATA52
M_DATA53
M_DATA54
M_DATA55

M_DATA56
M_DATA57
M_DATA58
M_DATA59
M_DATA60
M_DATA61
M_DATA62
M_DATA63

M_VREF

M_ZVDDIO_MEM_S

B14
A15
A17
D18
A14
C14
C16
D16

C18
A19
B21
D20
A18
B18
A21
C20

C23
D23
F23
F22
C22
D22
F20
F21

H21
H23
K22
K21
G23
H20
K20
K23

N23
P21
T20
T23
M20
P20
R23
T22

V20
V21
Y23
Y22
T21
U23
W23
Y21

Y20
AB22
AC19
AA18
AA23
AA20
AB19
Y18

AC17
Y16
AB14
AC14
AC18
AB18
AB15
AC15

M23

M22

M_VREF_APU

M_ZVDDIO_MEM_S

R502

R502
39R2F-GP

39R2F-GP

M_DQ0 14,15M_A014,15
M_DQ1 14,15
M_DQ2 14,15
M_DQ3 14,15
M_DQ4 14,15
M_DQ5 14,15
M_DQ6 14,15
M_DQ7 14,15

M_DQ8 14,15
M_DQ9 14,15
M_DQ10 14,15
M_DQ11 14,15
M_DQ12 14,15
M_DQ13 14,15
M_DQ14 14,15
M_DQ15 14,15

M_DQ16 14,15
M_DQ17 14,15
M_DQ18 14,15
M_DQ19 14,15
M_DQ20 14,15
M_DQ21 14,15
M_DQ22 14,15
M_DQ23 14,15

M_DQ24 14,15
M_DQ25 14,15
M_DQ26 14,15
M_DQ27 14,15
M_DQ28 14,15
M_DQ29 14,15
M_DQ30 14,15
M_DQ31 14,15

M_DQ32 14,15
M_DQ33 14,15
M_DQ34 14,15
M_DQ35 14,15
M_DQ36 14,15
M_DQ37 14,15
M_DQ38 14,15
M_DQ39 14,15

M_DQ40 14,15
M_DQ41 14,15
M_DQ42 14,15
M_DQ43 14,15
M_DQ44 14,15
M_DQ45 14,15
M_DQ46 14,15
M_DQ47 14,15

M_DQ48 14,15
M_DQ49 14,15
M_DQ50 14,15
M_DQ51 14,15
M_DQ52 14,15
M_DQ53 14,15
M_DQ54 14,15
M_DQ55 14,15

M_DQ56 14,15
M_DQ57 14,15
M_DQ58 14,15
M_DQ59 14,15
M_DQ60 14,15
M_DQ61 14,15
M_DQ62 14,15
M_DQ63 14,15

12

2

1

1D5V_S3

DDR_VREF_S3

R501 0R0402-PADR501 0R0402-PAD

1 2

C502

SCD1U10V2KX-5GP

A A

SCD1U10V2KX-5GP

C502

12

M_VREF_APU

12

C501

C501
SC1KP50V2KX-1GP

SC1KP50V2KX-1GP

LAYOUT: place them close to APU

5

1D5V_S3

R503

R503
1KR2J-1-GP

1KR2J-1-GP

12

M_EVENT#

AMD Confirm: PU Needed even if not used

4

www.bblianmeng.com

3

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

APU_DDR(2/5)

APU_DDR(2/5)

APU_DDR(2/5)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

5 109Friday, April 22, 2011

5 109Friday, April 22, 2011

5 109Friday, April 22, 2011

1

A00

A00

A00

5

SSID = CPU

SVC SVD

D D

C C

1D8V_S0

1D8V_S0

B B

3D3V_S0

1D8V_S0

A A

3D3V_S0

Boot Voltage

0

0
1

0
1 0

1

1

RN605

RN605

1

4

23

SRN300J-3-GP

SRN300J-3-GP

0809 Change to 1k

RN607

RN607

1

4

2 3

SRN1KJ-7-GP

SRN1KJ-7-GP

RN608

RN608

8
7
6

SRN1KJ-4-GP

SRN1KJ-4-GP

RN601

RN601

8
7
6

SRN1KJ-4-GP

SRN1KJ-4-GP

R640

R640

1 2

300R2J-4-G P

300R2J-4-G P

R641

R641

1 2

1KR2J-1-GP

1KR2J-1-GP

(VCC/GND)

1
2
3
45

1
2
3
45

Boot Voltage

1.1

1.0

0.9

0.8

(open)

1.1

1.2

1.1

0.9

APU_RST_L_BUF71
APU_RST#17,83

H_CPUPW RGD17,36 ,42,71

APU_PROCHOT#_VDDIO17

X01

H_CPUPW RGD

APU_RST#

APU_SVD_ R
APU_SVC_ R

APU_SID
APU_ALERT#
APU_THERMTRIP#_VDDIO
APU_SIC

APU_TRST#
APU_TMS
APU_TCK
APU_TDI

APU_DBREQ#

0802 Change to H_PROCHOT#

H_PROCHOT#

5

HDMI

LVDS
Panel

H_PROCHOT#27,40

0819

APU_RST#
H_CPUPW RGD

APU_HDMI_DATA251
APU_HDMI_DATA2#51

APU_HDMI_DATA151
APU_HDMI_DATA1#51

APU_HDMI_DATA051
APU_HDMI_DATA0#51

APU_HDMI_CLK51
APU_HDMI_CLK#51

100MHz

100MHz

R601

R601
0R2J-2-GP

0R2J-2-GP

1 2

DY

DY

APU_TRST#71
APU_DBRDY71
APU_DBREQ#71

APU_VDDNB _RUN_FB_H42
APU_VDD_RUN_FB_H42

APU_VDD_RUN_FB_L42
APU_VDDNB _RUN_FB_L42

C631 SC10P50V2JN-4GP

C631 SC10P50V2JN-4GP

1 2

DY

DY

C632 SC10P50V2JN-4GP

C632 SC10P50V2JN-4GP

1 2

DY

DY

LVDSA_DA TA249
LVDSA_DA TA2#49

LVDSA_DA TA149
LVDSA_DA TA1#49

LVDSA_DA TA049
LVDSA_DA TA0#49

LVDSA_CL K49
LVDSA_CL K#49

APU_CLKP17
APU_CLKN17

DISP_CLKP17
DISP_CLKN17

APU_SVC_ R42
APU_SVD_ R42

SCLK318
SDATA318

1 2

APU_TDI71
APU_TDO71
APU_TCK71
APU_TMS71

X01

X01

H_CPUPW RGD

2ND = 84.03904.P11

2ND = 84.03904.P11

3rd = 84.03904.L06

3rd = 84.03904.L06

APU_THERMTRIP#_VDDIO

APU_SID
APU_SIC

1 2
1 2

1 2
1 2

1 2
1 2

1 2
1 2

0721

R6280R040 2-PAD R6 280R0402-PAD

1 2
1 2

84.T3904.C11

84.T3904.C11

MMBT3904-4-G P

MMBT3904-4-G P

4

C610 SCD1U16V2KX-3GPC610 SCD1U16V2KX-3GP
C607 SCD1U16V2KX-3GPC607 SCD1U16V2KX-3GP

C606 SCD1U16V2KX-3GPC606 SCD1U16V2KX-3GP
C601 SCD1U16V2KX-3GPC601 SCD1U16V2KX-3GP

C604 SCD1U16V2KX-3GPC604 SCD1U16V2KX-3GP
C605 SCD1U16V2KX-3GPC605 SCD1U16V2KX-3GP

C608 SCD1U16V2KX-3GPC608 SCD1U16V2KX-3GP
C609 SCD1U16V2KX-3GPC609 SCD1U16V2KX-3GP

RN602 SRN0J-6-GP

RN602 SRN0J-6-GP

1

4

2 3

DY

DY

1 2
1 2

TP614TPAD14 TP614TPAD14

R6300R040 2-PAD R6 300R0402-PAD
R6310R040 2-PAD R6 310R0402-PAD

3D3V_S0

12

R635

R635
10KR2J-3-G P

10KR2J-3-G P

APU_THERMTRIP#_VDDIO_Q

CBE

Q601

Q601

RN

1
2 3

4

APU1B

APU1B

GTXP2

A8

GTXN2
GTXP1

GTXN1
GTXP0

GTXN0
GTXP3

GTXN3

APU_SIC
APU_SID

APU_RST#_R

R6250R040 2-PAD R6 250R0402-PAD

APU_PW RGD_R

R6260R040 2-PAD R6 260R0402-PAD

APU_THERMTRIP#_VDDIO
APU_ALERT#

APU_VDDIO _SUS_FB_H

1

APU_RUN_FB _L

3D3V_S5

Thripthrip# add integrated PU 10K

12

R646

R646

DY

DY

10KR2J-3-G P

10KR2J-3-G P

TDP1_TXP0

B8

TDP1_TXN0

B9

TDP1_TXP1

A9

TDP1_TXN1

D10

TDP1_TXP2

C10

TDP1_TXN2

A10

TDP1_TXP3

B10

TDP1_TXN3

B5

LTDP0_TXP0

A5

LTDP0_TXN0

D6

LTDP0_TXP1

C6

LTDP0_TXN1

A6

LTDP0_TXP2

B6

LTDP0_TXN2

D8

LTDP0_TXP3

C8

LTDP0_TXN3

V2

CLKIN_H

V1

CLKIN_L

D2

DISP_CLKIN_H

D1

DISP_CLKIN_L

J1

SVC

J2

SVD

P3

SIC

P4

SID

T3

RESET#

T4

PWROK

U1

PROCHOT#

U2

THERMTRIP#

T2

ALERT#

N2

TDI

N1

TDO

P1

TCK

P2

TMS

M4

TRST#

M3

DBRDY

M1

DBREQ#

F4

VDDCR_NB_S ENSE

G1

VDDCR_CPU_SENSE

F3

VDDIO_MEM_ S_SENSE

F1

VSS_SENSE

B4

RSVD#B4

W11

RSVD#W11

V5

RSVD#V5

ONTARIO-FT1-GP

ONTARIO-FT1-GP

H_THERMTRIP# 18,36

CPU exceeds to 125℃

0R4P2R-PA DRN635RN0R4P2R-PA DRN635

4

SML1_DATA 27,85
SML1_CLK 27,85

3

Brazos:
DP1 --> HDMI

2 OF 5

VGA

VGA

TEST

TEST

DAC

DAC

2 OF 5

DP_ZVSS
DP_BLON

DP_DIGON

DP_VARY_B L

TDP1_AUXP
TDP1_AUXN

TDP1_HPD

LTDP0_AUXP
LTDP0_AUXN

LTDP0_HPD

DAC_RED

DAC_RED#

DAC_GREEN

DAC_GREEN#

DAC_BLUE

DAC_BLUE#

DAC_HSYNC
DAC_VSYNC

DAC_SCL
DAC_SDA

DAC_ZVSS

TEST4
TEST5

TEST6
TEST14
TEST15
TEST16
TEST17
TEST18
TEST19

TEST25_H
TEST25_L
TEST28_H
TEST28_L

TEST31

TEST33_H
TEST33_L
TEST34_H
TEST34_L

TEST35
TEST36
TEST37

TEST38

DMAACTIVE#

DP_ZVSS

H3

L_BKLT_EN_R

G2

LVDS_VDD_EN_R

H2

L_BKLT_CTRL_R

H1

B2
C2

DP1_HPD

C1
A3

B3

DP2_HPD

D3
C12

D13
A12
B12
A13
B13

E1
E2

F2
D4

D12

APU_THERMDA

R1

APU_THERMDC

R2

APU_TEST6_DIRECRACKMO N

R6

APU_BP0_TSTCLK_USCL K0

T5

APU_BP0_TSTCLK_USCL K1

E4

APU_TEST16_ BP2

K4

APU_TEST17_ BP3

L1

APU_TEST18_ PLLTEST1

L2

APU_TEST19_ PLLTEST0

M2

APU_TEST25_ H_BYPASS CLK_H

K1

APU_TEST25_ L_BYPASSCLK_L

K2

APU_TEST28_ H_PLLCHA RZ

L5

APU_TEST28_ L_PLLCHARZ

M5

APU_TEST31_ MEM_TEST

M21

APU_TEST33_ H_M_CLKTST_H

J18

APU_TEST33_ L_M_CLK TST_L

J19

APU_TEST34_ H_TSTCLKIN_H

U15

APU_TEST34_ L_TSTCLKIN_ L

T15

APU_TEST35

H4

APU_TEST36_ GIO_TSTDTM0_S ERIALCLK

N5

APU_TEST37_ GIO_TSTDTM0_CLKINIT

R5

APU_TEST38

K3
T1

DAC_ZVSS

R609 150R2F-1-G PR609 150R2F-1-G P

1 2

R610 0R0402-PADR610 0R0402-PAD
R607 0R0402-PADR607 0R0402-PAD
R608 0R0402-PADR608 0R0402-PAD

R622 499R2F-2-G PR622 499R2F-2-G P

1 2
1 2
1 2

DP1_HPD 51

X02

12

ANALOG/DISPLAY/MISC

ANALOG/DISPLAY/MISC

DISPLAYPORT

1

DISPLAYPORT

1

DISPLAYPORT

0

DISPLAYPORT

0

CLK

CLK

SER

SER

JTAG CTRL

JTAG CTRL

ONTARIO_FT1

ONTARIO_FT1

DP MISC

DP MISC

0811 Remove level shifter

APU_ALERT#

www.bblianmeng.com

3

0R0402-PAD

0R0402-PAD

1 2

Sabine:
DP0 --> LVDS
DP1 --> CRT
DP2 --> HDMI

R612 150R2F-1-G PR612 1 50R2F-1-GP

1 2

R615 150R2F-1-G PR615 1 50R2F-1-GP

1 2

R617 150R2F-1-G PR617 1 50R2F-1-GP

1 2

R643

R643

TP602 TPAD14TP602 TPAD1 4

1

TP603 TPAD14TP603 TPAD14

1

TP604 TPAD14TP604 TPAD1 4

1

TP616 TPAD14TP616 TPAD1 4

1

TP605 TPAD14TP605 TPAD1 4

1

TP606 TPAD14TP606 TPAD1 4

1

TP607 TPAD14TP607 TPAD1 4

1

TP608 TPAD14TP608 TPAD1 4

1

TP609 TPAD14TP609 TPAD1 4

1

TP610 TPAD14TP610 TPAD14

1

TP611 TPAD14TP611 TPAD1 4

1

TP612 TPAD14TP612 TPAD14

1

TP613 TPAD14TP613 TPAD1 4

1

TP615 TPAD14TP615 TPAD1 4

1

APU_ALERT#_FCH 19

2

2

L_BKLT_EN 27
LVDS_VDD_EN 4 9
L_BKLT_CTRL 49

PCH_HDMI_CL K_R 51
PCH_HDMI_DA TA_R 51

LVDS_DDC_ CLK 49
LVDS_DDC_ DATA 49

CRT_RED 50
CRT_GREEN 50
CRT_BLUE 5 0

CRT_HSYNC 50
CRT_VSYNC 50

DDCCLK 50
DDCDATA 50

APU_TEST18_ PLLTEST1 71
APU_TEST19_ PLLTEST0 71

ALLOW _STOP 17

1

APU_TEST33_ H_M_CLKTST_H
APU_TEST33_ L_M_CLK TST_L

APU_TEST25_ H_BYPASS CLK_H
APU_TEST18_ PLLTEST1
APU_TEST19_ PLLTEST0

C602SCD1U10V2K X-5GP C602SCD1U10V2KX-5GP

1 2

C603SCD1U10V2KX-5GP C603SCD1U10V2KX-5GP

1 2

R604 510R2F-L-G PR604 510R2F-L-G P

1 2

R605 1KR2J-1-GPR60 5 1KR2J-1-GP
R606 1KR2J-1-GPR60 6 1KR2J-1-GP

1 2
1 2

HDMI

LVDS

APU_TEST36_ GIO_TSTDTM0_S ERIALCLK
APU_TEST37_ GIO_TSTDTM0_CLKINIT
APU_BP0_TSTCLK_USCL K1

APU_TEST25_ L_BYPASSCLK_L

ALLOW _STOP

R611 510R2F-L-G PR611 510R2F-L-G P

1 2

R613 1KR2J-1-GPR61 3 1KR2J-1-GP

1 2

R619 1KR2J-1-GPR61 9 1KR2J-1-GP

1 2

R620 1KR2J-1-GP

R620 1KR2J-1-GP

1 2

DY

DY

R621 1KR2J-1-GP

R621 1KR2J-1-GP

1 2

DY

DY

R623 1KR2J-1-GP

R623 1KR2J-1-GP

1 2

DY

DY

R624 1KR2J-1-GP

R624 1KR2J-1-GP

1 2

DY

DY

1 2

X01

100KR2J-1 -GP

100KR2J-1 -GP

DP2_HPD

100KR2J-1 -GP

100KR2J-1 -GP

0811 AMD Nick change

APU_TEST35

SRN1KJ-7-GP

SRN1KJ-7-GP

LVDS_DDC_ DATA49

LVDS_DDC_ CLK49

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

APU_COntrol&Debug(3/5)

APU_COntrol&Debug(3/5)

APU_COntrol&Debug(3/5)

Size Document Nu mber Rev

Size Document Nu mber Rev

Size Document Nu mber Rev
Custom

Custom

Custom

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

6 109Friday, April 22, 2011

6 109Friday, April 22, 2011

6 109Friday, April 22, 2011

1

R602 51R2F-2-GPR60 2 51R2F-2-GP
R603 51R2F-2-GPR60 3 51R2F-2-GP

12
12

1D8V_S0

1D8V_S0

1D8V_S0

R627

R627
1KR2J-1-GP

1KR2J-1-GP

5V_S0

12

R664

R664

12

R647

R647

DY

DY

1D8V_S0

R629

R629
1KR2J-1-GP

1KR2J-1-GP

1 2

R632

R632
1KR2J-1-GP

1KR2J-1-GP

DY

DY

1 2

3D3V_S0

X01

1

RN634

RN634

4

23

A00

A00

A00

A A

B B

C C

D D

SSID = CPU

VDDIO_MEN_S:

10uF X 2 1uF X 4

0.1uF X 3 180pF X 2

5

C733

C733

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

C763

C763

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

4

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

DY

DY

C769

C769

C770

C770

C765

C765

C766

C766

C767

C767

C768

C768

12

12

12

12

12

12

12

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C756

C756

DY

DY

C757

C757

DY

DY

C760

C760

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C761

C761

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C762

C762

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

W18

U16

R19

ONTARIO-FT1-GP

ONTARIO-FT1-GP

VDDIO_MEM_S

VDDIO_MEM_S

VDDIO_MEM_S

VDDIO_MEM_S

12

12

12

12

12

R16

N16

L19

VDDIO_MEM_S

VDDIO_MEM_S

VDDIO_MEM_S

2A for 9W

L16

J16

VDDIO_MEM_S

VDDIO_MEM_S

1D5V_S3

2A for 18W

SC180P50V2JN-1GP

SC180P50V2JN-1GP

G19

G16

E17

VDDIO_MEM_S

VDDIO_MEM_S

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

VDDCR_NB

12

C734

C734

DY

DY

12

C735

C735

12

C701

C701

DY

DY

12

C737

C737

12

C738

C738

12

C739

C739

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

12

C740

C740

DY

DY

12

C741

C741

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

M13

M12

N14

N12

N10

P13

P11

VDDCR_NB

VDDCR_NB

VDDCR_NB

VDDCR_NB

VDDCR_NB

VDDCR_NB

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

M11

L14

L12

L10

VDDCR_NB

VDDCR_NB

VDDCR_NB

VDDCR_NB

VDDCR_NB

K13

K11

VDDCR_NB

VDDCR_NB

VDDCR_NB:

10uF X 5 1uF X 5

0.1uF X 4 180pF X 2

APU_VDD

VDDCR_CPU:

10uF X 7 1uF X 4

0.1uF X 5 180pF X 2

C713

SC4D7U6D3V5KX-3GP

11A for 18W

4.5A for 9W

E5

APU1C

APU1C

SC4D7U6D3V5KX-3GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C716

C716

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

APU_VDDNB

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C729

C729

12

C730

C730

DY

DY

12

C731

C731

12

G13

G11

H12

VDDCR_NBH9VDDCR_NB

E13

E11

F12

VDDCR_NB

VDDCR_NB

VDDCR_NBF9VDDCR_NB

VDDCR_NB

VDDCR_NBE8VDDCR_CPUR8VDDCR_CPUN7VDDCR_CPUM8VDDCR_CPUM6VDDCR_CPUL7VDDCR_CPUJ8VDDCR_CPUJ6VDDCR_CPUH7VDDCR_CPUH5VDDCR_CPUG8VDDCR_CPUG6VDDCR_CPUF7VDDCR_CPUF5VDDCR_CPUE6VDDCR_CPU

10A for 18W

8A for 9W

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SC180P50V2JN-1GP

12

C717

C717

DY

DY

12

C711

C711

DY

DY

12

C718

C718

12

C712

C712

DY

DY

12

C719

C719

DY

DY

12

C713

C705

C705

C714

C714

C706

C706

DY

DY

C715

C715

DY

DY

C708

C708

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

C709

C709

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

DY

12

12

12

12

12

12

12

5

4

ONTARIO_FT1

C720

C720

DY

DY

C724

C724

DY

DY

C721

C721

C723

C723

C725

C725

C726

C726

10uF X 1 1uF X 4

ONTARIO_FT1

3

3 OF 5

3 OF 5

U8

2A for 18W

2A for 9W

12

12

12

12

12

1D8V_S0

12

2

VDD_18:

POWER

3

VDD_33

A4

0.5A for 18W

0.5A for 9W

SC180P50V2JN-1GP

SC180P50V2JN-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

2

C771

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Date: Sheet of

Date: Sheet of

Date: Sheet of

Title

Size Document Number Rev

Title

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

APU_Power(4/5)

Enrico 14 AMD

APU_Power(4/5)

Enrico 14 AMD

APU_Power(4/5)

Title

Size Document Number Rev

<Core Design>

<Core Design>

<Core Design>

C771

C772

C772

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

0.1uF X 1

12

12

1uF X 1

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

3D3V_S0

VDD_33:

VDD_10

C749

C749

C750

C750

DY

DY

C751

C751

C752

C752

DY

DY

C753

C753

C754

C754

DY

DY

C755

C755

VDD_10

VDD_10

VDD_10

T12

V12

W13

U13

SC180P50V2JN-1GP

SC180P50V2JN-1GP

12

12

12

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

12

12

10uF X 2 1uF X 2

0.1uF X 2 180pF X 1

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

POWER

C745

C745

C746

C746

DY

DY

C747

C747

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C748

C748

1V_S0

VDD_10:

5.5A for 18W

5.5A for 9W

VDDPL_10

U11

SC180P50V2JN-1GP

SC180P50V2JN-1GP

12

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

12

1 2

PBY160808T-221Y-N-GP

PBY160808T-221Y-N-GP

220 ohm 2A

L701

L701

VDDPL_10:

10uF X 1 1uF X 1

0.1uF X 1 180pF X 1

0.2A for 9W

VDD_18_DAC

VDD_18V7VDD_18T7VDD_18W6VDD_18U9VDD_18U6VDD_18W8VDD_18

W9

0.15A for 18W

0.15A for 9W

C742

C742

12

C743

C743

12

C744

C744

DY

DY

12

VDD_18_DAC:

10uF X 1 1uF X 1

180pF X 1

1V_S0VDDPL_10

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1D8V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

0.1uF X 1 180pF X 1

0.2A for 18W

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

Taipei Hsien 221, Taiwan, R.O.C.

1

7 109Friday, April 22, 2011

7 109Friday, April 22, 2011

7 109Friday, April 22, 2011

A00

A00

A00

1

www.bblianmeng.com

5

4

3

2

1

SSID = CPU

D D

4 OF 5

APU1D

APU1D

A7

B7
B11
B17
B22

C4
D5
D7

D9
D11
D14
B15
D17
D19

E7

E9
E12
E20

F8

F11

C C

B B

F13

G4
G5
G7

G9
G12
G20
G22

H6
H11
H13

J4
J5
J7

J20
K10
K14

L4
L6

L8
L11
L13
L20
L22

M7

N4

N6

N8

N11

ONTARIO-FT1-GP

ONTARIO-FT1-GP

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

ONTARIO_FT1

ONTARIO_FT1

GROUND

GROUND

4 OF 5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSBG_DAC

N13
N20
N22
P10
P14
R4
R7
R20
T6
T9
T11
T13
U4
U5
U7
U12
U20
U22
V8
V9
V11
V13
W1
W2
W4
W5
W7
W12
W20
Y5
Y7
Y9
Y11
Y13
Y15
Y17
Y19
AA4
AA22
AB2
AB5
AB9
AB13
AB17
AB21
AC5
AC9
AC13
A11

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

APU_VSS(5/5)

APU_VSS(5/5)

APU_VSS(5/5)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

8 109Friday, April 22, 2011

8 109Friday, April 22, 2011

8 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

TRAVIS

TRAVIS

TRAVIS

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

9 109Friday, April 22, 2011

9 109Friday, April 22, 2011

9 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

10 109Friday, April 22, 2011

10 109Friday, April 22, 2011

10 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

11 109Friday, April 22, 2011

11 109Friday, April 22, 2011

11 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

12 109Friday, April 22, 2011

12 109Friday, April 22, 2011

12 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

13 109Friday, April 22, 2011

13 109Friday, April 22, 2011

13 109Friday, April 22, 2011

1

A00

A00

A00

SSID = MEMORY

5

4

3

2

1

D D

M_A05,15
M_A15,15
M_A25,15
M_A35,15
M_A45,15
M_A55,15
M_A65,15
M_A75,15
M_A85,15
M_A95,15
M_A105,15
M_A115,15
M_A125,15
M_A135,15
M_A145,15

DDR_VREF _S3

0D75V_S0

M_A155,15

M_DQ05,15
M_DQ15,15
M_DQ25,15
M_DQ35,15
M_DQ45,15
M_DQ55,15
M_DQ65,15
M_DQ75,15
M_DQ85,15
M_DQ95,15
M_DQ105,15
M_DQ115,15
M_DQ125,15
M_DQ135,15
M_DQ145,15
M_DQ155,15
M_DQ165,15
M_DQ175,15
M_DQ185,15
M_DQ195,15
M_DQ205,15
M_DQ215,15
M_DQ225,15
M_DQ235,15
M_DQ245,15
M_DQ255,15
M_DQ265,15
M_DQ275,15
M_DQ285,15
M_DQ295,15
M_DQ305,15
M_DQ315,15
M_DQ325,15
M_DQ335,15
M_DQ345,15
M_DQ355,15
M_DQ365,15
M_DQ375,15
M_DQ385,15
M_DQ395,15
M_DQ405,15
M_DQ415,15
M_DQ425,15
M_DQ435,15
M_DQ445,15
M_DQ455,15
M_DQ465,15
M_DQ475,15
M_DQ485,15
M_DQ495,15
M_DQ505,15
M_DQ515,15
M_DQ525,15
M_DQ535,15
M_DQ545,15
M_DQ555,15
M_DQ565,15
M_DQ575,15
M_DQ585,15
M_DQ595,15
M_DQ605,15
M_DQ615,15
M_DQ625,15
M_DQ635,15

M_DQS#05,15
M_DQS#15,15
M_DQS#25,15
M_DQS#35,15
M_DQS#45,15
M_DQS#55,15
M_DQS#65,15
M_DQS#75,15

M_DQS05,15
M_DQS15,15
M_DQS25,15
M_DQS35,15
M_DQS45,15
M_DQS55,15
M_DQS65,15
M_DQS75,15

4

M_BS25,15
M_BS05,15

M_BS15,15

DDR_VREF _S3

C C

SC1KP50V2KX-1G P

SC1KP50V2KX-1G P

B B

C1411

C1411

12

0D75V_S0

12

C1418

C1418

DY

DY

SC10U6D3V5KX- 1GP

SC10U6D3V5KX- 1GP

0D75V_S0

12

12

DY

DY

C1412

C1412

Place these caps
close to VTT1 and
VTT2.

12

C1419

C1419

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C1413

C1413
SC1KP50V2KX-1G P

SC1KP50V2KX-1G P

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

12

C1420

C1420

C1421

C1421

C1422

C1422

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_A_DIM0_ODT05
M_A_DIM0_ODT15

M_RST#5,15

0721: Reserve Cap

M_RST#

12

C1425

A A

C1425
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

DY

DY

5

98
97
96
95
92
91
90
86
89
85

107

84
83

119

80
78
79

109
108

5

7
15
17

4

6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70

129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194

10
27
45
62

135
152
169
186

12
29
47
64

137
154
171
188

116
120

126

1
30

203
204

DM1

DM1

A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2

BA0
BA1

DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63

DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#

DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7

ODT0
ODT1

VREF_CA
VREF_DQ

RESET#

VTT1
VTT2

DDR3-204P- 25-GP

DDR3-204P- 25-GP

62.10017.K11
H=5.2mm

NP1

NP1

NP2

NP2

110

RAS#

113

WE#

115

CAS#

114

CS0#

121

CS1#

73

CKE0

74

CKE1

101

CK0

103

CK0#

102

CK1

104

CK1#

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

EVENT#

199

VDDSPD

197

SA0

201

SA1

77

NC#1

122

NC#2

125

NC#/TEST

75

VDD1

76

VDD2

81

VDD3

82

VDD4

87

VDD5

88

VDD6

93

VDD7

94

VDD8

99

VDD9

100

VDD10

105

VDD11

106

VDD12

111

VDD13

112

VDD14

117

VDD15

118

VDD16

123

VDD17

124

VDD18

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

www.bblianmeng.com

SA0_DIM0
SA1_DIM0

M_RAS# 5,15
M_WE# 5,15
M_CAS# 5,15

M_A_DIM0_CS#0 5
M_A_DIM0_CS#1 5

M_DIM0_CKE0 5,15
M_DIM0_CKE1 5,15

M_DIM0_CLK_DDR 0 5
M_DIM0_CLK_DDR #0 5

M_DIM0_CLK_DDR 1 5
M_DIM0_CLK_DDR #1 5

M_DM0 5,15
M_DM1 5,15
M_DM2 5,15
M_DM3 5,15
M_DM4 5,15
M_DM5 5,15
M_DM6 5,15
M_DM7 5,15

PCH_SMBDAT A 15,65
PCH_SMBCLK 15,65

1D5V_S3

Intel HR DM tied to GND
AMD still following previous design

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

PCH_SMBDAT A
PCH_SMBCLK

PCH_SMBDAT A
PCH_SMBCLK

Layout Note:
Place these Caps near
SO-DIMMA.

3

C1401

C1401

3D3V_S0

12

12

C1402

C1402
SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

DY

DY

X01

1
2 3

C1423 SC10P50V2JN-4GPC1423 SC10P50V2JN-4GP
C1424 SC10P50V2JN-4GPC1424 SC10P50V2JN-4GP

1D5V_S3

X01

12

12

RN1401

RN1401

4

SRN22-3-GP

SRN22-3-GP

1 2
1 2

SODIMM A DECOUPLING

12

TC1401

TC1401

C1403

C1403

SE220U2VDM-8GP

SE220U2VDM-8GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

C1414

C1414

C1415

C1415

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SA0_DIM0

SMB_DATA 18
SMB_CLK 18

12

12

12

DY

DY

C1404

C1404

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

12

C1416

C1416

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C1406

C1406

C1407

C1405

C1405

C1417

C1417

C1407

DY

DY

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

2

12

12

C1410

C1408

C1408

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

C1410

C1409

C1409

DY

DY

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SA1_DIM0

R1402

R1402

R1401

R1401

0R0402-PAD

0R0402-PAD

0R0402-PAD

0R0402-PAD

1 2

1 2

<Core Desig n>

<Core Desig n>

<Core Desig n>

Title

Title

Title

DDR3-SODIMM1

DDR3-SODIMM1

DDR3-SODIMM1

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

1

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

14 109Friday, Apri l 22, 2011

14 109Friday, Apri l 22, 2011

14 109Friday, Apri l 22, 2011

A00

A00

A00

5

4

3

2

1

SSID = MEMORY

DM2

DM2

M_A05,14
M_A15,14
M_A25,14

D D

M_BS25,14
M_BS05,14

M_BS15,14

C C

DDR_VREF _S3

12

12

C1516

C1516

C1515

C1515

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

C1518

C1518

12

DY

DY

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Place these caps
close to VTT1 and
VTT2.

12

C1519

C1519

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

B B

A A

0D75V_S0

12

C1517

DY

DY

C1517
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

12

DY

DY

C1520

C1520

C1521

C1521

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

M_B_DIM0_ODT05
M_B_DIM0_ODT15

DDR_VREF _S3

M_RST#5,14

0D75V_S0

M_A35,14
M_A45,14
M_A55,14
M_A65,14
M_A75,14
M_A85,14
M_A95,14
M_A105,14
M_A115,14
M_A125,14
M_A135,14
M_A145,14
M_A155,14

M_DQ05,14
M_DQ15,14
M_DQ25,14
M_DQ35,14
M_DQ45,14
M_DQ55,14
M_DQ65,14
M_DQ75,14
M_DQ85,14
M_DQ95,14
M_DQ105,14
M_DQ115,14
M_DQ125,14
M_DQ135,14
M_DQ145,14
M_DQ155,14
M_DQ165,14
M_DQ175,14
M_DQ185,14
M_DQ195,14
M_DQ205,14
M_DQ215,14
M_DQ225,14
M_DQ235,14
M_DQ245,14
M_DQ255,14
M_DQ265,14
M_DQ275,14
M_DQ285,14
M_DQ295,14
M_DQ305,14
M_DQ315,14
M_DQ325,14
M_DQ335,14
M_DQ345,14
M_DQ355,14
M_DQ365,14
M_DQ375,14
M_DQ385,14
M_DQ395,14
M_DQ405,14
M_DQ415,14
M_DQ425,14
M_DQ435,14
M_DQ445,14
M_DQ455,14
M_DQ465,14
M_DQ475,14
M_DQ485,14
M_DQ495,14
M_DQ505,14
M_DQ515,14
M_DQ525,14
M_DQ535,14
M_DQ545,14
M_DQ555,14
M_DQ565,14
M_DQ575,14
M_DQ585,14
M_DQ595,14
M_DQ605,14
M_DQ615,14
M_DQ625,14
M_DQ635,14

M_DQS#05,14
M_DQS#15,14
M_DQS#25,14
M_DQS#35,14
M_DQS#45,14
M_DQS#55,14
M_DQS#65,14
M_DQS#75,14

M_DQS05,14
M_DQS15,14
M_DQS25,14
M_DQS35,14
M_DQS45,14
M_DQS55,14
M_DQS65,14
M_DQS75,14

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

DDR3-204P- 24-GP

DDR3-204P- 24-GP

62.10017.K01
H=9.2mm

EVENT#

VDDSPD

NC#/TEST

VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18

RAS#
CAS#
CS0#

CS1#
CKE0

CKE1

CK0#

CK1#

NC#1
NC#2

VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9

NP1

NP1

NP2

NP2

110
113

WE#

115
114

121
73

74
101

CK0

103
102

CK1

104
11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198
199
197

SA0

201

SA1

77
122
125

75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

SA0_DIM1
SA1_DIM1

M_RAS# 5,14
M_WE# 5,14
M_CAS# 5,14

M_B_DIM0_CS#0 5
M_B_DIM0_CS#1 5

M_DIM0_CKE0 5,14
M_DIM0_CKE1 5,14

M_DIM0_CLK_DDR 2 5
M_DIM0_CLK_DDR #2 5

M_DIM0_CLK_DDR 3 5
M_DIM0_CLK_DDR #3 5

M_DM0 5,14
M_DM1 5,14
M_DM2 5,14
M_DM3 5,14
M_DM4 5,14
M_DM5 5,14
M_DM6 5,14
M_DM7 5,14

PCH_SMBDAT A 14, 65
PCH_SMBCLK 14,65

1D5V_S3

X01

M_DIM0_CKE0
M_DIM0_CKE1

12

12

R1531

R1531

R1532

R1532
69D8R2F-GP

69D8R2F-GP

69D8R2F-GP

Intel HR DM tied to GND
AMD still following previous design

3D3V_S0

12

12

DY

DY

C1501

C1501

C1502

C1502

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

Layout Note:
Place these Caps near
SO-DIMMB.

SO-DIMMB is placed farther from
the Processor than SO-DIMMA

69D8R2F-GP

DY

DY

DY

DY

1D5V_S3

SODIMM B DECOUPLING

12

12

12

C1503

C1503

C1504

C1504

C1505

DY

DY

12

C1511

C1511

C1505

DY

DY

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

SC10U10V5ZY-1GP

12

12

C1512

C1512

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

3D3V_S0

12

R1501

R1501

0721 change 4k7 to 10k

10KR2J-3-GP

10KR2J-3-GP

SA0_DIM1
SA1_DIM1

R1502

R1502
0R0402-PAD

0R0402-PAD

1 2

Intel HR B channel address is 01
AMD B channel address is 10

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC10U10V5ZY-1GP

12

C1506

C1506

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

C1513

C1513

C1514

C1514

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SC10U10V5ZY-1GP

12

12

12

12

C1508

C1508

C1507

C1507

DY

DY

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

C1510

C1510

C1509

C1509

DY

DY

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Title

Title

Title

DDR3-SODIMM2

DDR3-SODIMM2

DDR3-SODIMM2

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

5

4

www.bblianmeng.com

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O. C.

1

A00

A00

15 109Friday, Apri l 22, 2011

15 109Friday, Apri l 22, 2011

15 109Friday, Apri l 22, 2011

A00

5

D D

C C

4

3

2

1

B B

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

16 109Friday, April 22, 2011

16 109Friday, April 22, 2011

16 109Friday, April 22, 2011

1

A00

A00

A00

5

SSID = FCH

12

C1702

C1702
SC150P50V2KX-GP

A_RST#27,36

LAN

WLAN

LAN

WLAN

100MHZ

100MHZ

WLAN

LAN

UMI_FCH_APU_R X0P4
UMI_FCH_APU_R X0N4
UMI_FCH_APU_R X1P4
UMI_FCH_APU_R X1N4
UMI_FCH_APU_R X2P4
UMI_FCH_APU_R X2N4
UMI_FCH_APU_R X3P4
UMI_FCH_APU_R X3N4

UMI_APU_FCH_T X0P4
UMI_APU_FCH_T X0N4
UMI_APU_FCH_T X1P4
UMI_APU_FCH_T X1N4
UMI_APU_FCH_T X2P4
UMI_APU_FCH_T X2N4
UMI_APU_FCH_T X3P4
UMI_APU_FCH_T X3N4

1D1V_PCIE_S0

PCIE_TXP031
PCIE_TXN031

PCIE_TXP265
PCIE_TXN265

PCIE_RXP031
PCIE_RXN031

PCIE_RXP265
PCIE_RXN265

DISP_CLKP6
DISP_CLKN6

APU_CLKP6
APU_CLKN6

CLK_PCIE_VGA83
CLK_PCIE_VGA#83

CLK_PCIE_WLA N65
CLK_PCIE_WLA N#65

CLK_PCIE_LAN31
CLK_PCIE_LAN#31

D D

0721 Change CAP 10V to 16V

C C

GPP CLK port

0
1
2
3

B B

4
5
6
7
8

Device

New Card

WLAN
WWAN
LAN

X
X
X
X
X

CLKREQ#

0
1
2
3

SC150P50V2KX-GP

C1703 SCD1U10V2KX-5GPC1703 SCD1U10V2KX-5GP

1 2

C1704 SCD1U10V2KX-5GPC1704 SCD1U10V2KX-5GP

1 2

C1705 SCD1U10V2KX-5GPC1705 SCD1U10V2KX-5GP

1 2

C1706 SCD1U10V2KX-5GPC1706 SCD1U10V2KX-5GP

1 2

C1707 SCD1U10V2KX-5GPC1707 SCD1U10V2KX-5GP

1 2

C1708 SCD1U10V2KX-5GPC1708 SCD1U10V2KX-5GP

1 2

C1709 SCD1U10V2KX-5GPC1709 SCD1U10V2KX-5GP

1 2

C1710 SCD1U10V2KX-5GPC1710 SCD1U10V2KX-5GP

1 2

R1710

R1710

1 2

2KR2F-3-GP

2KR2F-3-GP

C1701 SCD1U10V2KX-5GPC1701 SCD1U10V2KX-5GP

1 2

C1712 SCD1U10V2KX-5GPC1712 SCD1U10V2KX-5GP

1 2

C1713 SCD1U10V2KX-5GPC1713 SCD1U10V2KX-5GP

1 2

C1714 SCD1U10V2KX-5GPC1714 SCD1U10V2KX-5GP

1 2

RN1702

RN1702

2 3

0R4P2R-PAD

0R4P2R-PAD

1

TP1705TPAD14- GP TP 1705TPAD14-GP
TP1706TPAD14- GP TP 1706TPAD14-GP

X02

RN1703

RN1703

2 3

SRN22-3-GP

SRN22-3-GP

1

RN1701

RN1701

2 3

SRN22-3-GP

SRN22-3-GP

1

RN1704

RN1704

2 3

0R4P2R-PAD

0R4P2R-PAD

1

RN1705

RN1705

2 3

0R4P2R-PAD

0R4P2R-PAD

1

if LAN support Wake on S5,
do not use clock from FCH,
have use X'tal

CLK_PCH_48M32

Use 48Mhz CLK For 5138

SC10P50V2JN-4G P

SC10P50V2JN-4G P

33R2J-2-GPR1704 33R2J-2-GPR1704

1 2

R1709 590R2F-GPR1709 590R2F-GP

1 2

EXT clock_Gen

4

1

RN

RN

1

4

4

4

RN

RN

4

RN

RN

R1716

R1716

1 2

22R2J-2-GP

22R2J-2-GP

C1721

C1721

0811 EMI

4

PCIE_RST#_C
A_RST#_R

A_RX0P_C
A_RX0N_C
A_RX1P_C
A_RX1N_C
A_RX2P_C
A_RX2N_C
A_RX3P_C
A_RX3N_C

PCIE_CALRP_R
PCIE_CALRN_R

PCIE_TXP0_C
PCIE_TXN0_C

PCIE_TXP2_C
PCIE_TXN2_C

FCHDISP_CLKP _R
FCHDISP_CLKN _R

NB_HT_CLKP
NB_HT_CLKN

FCHAPU_C LKP_R
FCHAPU_C LKN_R

FCHGFX_C LKP_R
FCHGFX_C LKN_R

CLK_MINI1_R
CLK_MINI1#_R

LAN_CLK_R
LAN_CLK#_R

48M_OSC

12

DY

DY

25M_X1

25M_X2

FCH1A

FCH1A

HUDSON-1

HUDSON-1

P1

PCIE_RST#

L1

A_RST#

AD26

UMI_TX0P

AD27

UMI_TX0N

AC28

UMI_TX1P

AC29

UMI_TX1N

AB29

UMI_TX2P

AB28

UMI_TX2N

AB26

UMI_TX3P

AB27

UMI_TX3N

AE24

UMI_RX0P

AE23

UMI_RX0N

AD25

UMI_RX1P

AD24

UMI_RX1N

AC24

UMI_RX2P

AC25

UMI_RX2N

AB25

UMI_RX3P

AB24

UMI_RX3N

AD29

PCIE_CALRP

AD28

PCIE_CALRN

AA28

GPP_TX0P

AA29

GPP_TX0N

Y29

GPP_TX1P

Y28

GPP_TX1N

Y26

GPP_TX2P

Y27

GPP_TX2N

W28

GPP_TX3P

W29

GPP_TX3N

AA22

GPP_RX0P

Y21

GPP_RX0N

AA25

GPP_RX1P

AA24

GPP_RX1N

W23

GPP_RX2P

V24

GPP_RX2N

W24

GPP_RX3P

W25

GPP_RX3N

M23

PCIE_RCLKP_NB_LNK_CLKP

P23

PCIE_RCLKN_NB_LNK_CLKN

U29

NB_DISP_CLKP

U28

NB_DISP_CLKN

T26

NB_HT_CLKP

T27

NB_HT_CLKN

V21

CPU_HT_CLKP

T21

CPU_HT_CLKN

V23

SLT_GFX_CLKP

T23

SLT_GFX_CLKN

L29

GPP_CLK0P

L28

GPP_CLK0N

N29

GPP_CLK1P

N28

GPP_CLK1N

M29

GPP_CLK2P

M28

GPP_CLK2N

T25

GPP_CLK3P

V25

GPP_CLK3N

L24

GPP_CLK4P

L23

GPP_CLK4N

P25

GPP_CLK5P

M25

GPP_CLK5N

P29

GPP_CLK6P

P28

GPP_CLK6N

N26

GPP_CLK7P

N27

GPP_CLK7N

T29

GPP_CLK8P

T28

GPP_CLK8N

L25

14M_25M_48M_OSC

L26

25M_X1

L27

25M_X2

HUDSON- M1-1-GP

HUDSON- M1-1-GP

PCI EXPRESS I/F

PCI EXPRESS I/F

CLOCK GENERATOR

CLOCK GENERATOR

1 OF 5

1 OF 5

PCICLK0
PCICLK1_GPO36
PCICLK2_GPO37
PCICLK3_GPO38

PCICLK4_14M_OSC_GPO39

PCI CLKS

PCI CLKS

PCIRST#

AD0_GPIO0
AD1_GPIO1
AD2_GPIO2
AD3_GPIO3
AD4_GPIO4
AD5_GPIO5
AD6_GPIO6
AD7_GPIO7
AD8_GPIO8

AD9_GPIO9
AD10_GPIO10
AD11_GPIO11
AD12_GPIO12
AD13_GPIO13
AD14_GPIO14
AD15_GPIO15
AD16_GPIO16
AD17_GPIO17
AD18_GPIO18
AD19_GPIO19
AD20_GPIO20
AD21_GPIO21
AD22_GPIO22
AD23_GPIO23
AD24_GPIO24
AD25_GPIO25
AD26_GPIO26
AD27_GPIO27
AD28_GPIO28
AD29_GPIO29
AD30_GPIO30
AD31_GPIO31

CBE0#
CBE1#

PCI I/F

PCI I/F

CBE2#
CBE3#

FRAME#

DEVSEL#

IRDY#

TRDY#
STOP#

PERR#
SERR#
REQ0#

REQ1#_GPIO40
REQ2#_CLK_REQ8#_GPIO41
REQ3#_CLK_REQ5#_GPIO42

GNT3#_CLK_REQ7#_GPIO46

LDRQ1#_CLK_REQ6#_GPIO49

ALLOW_LDTSTP_DMA_ACTIVE#

GNT1#_GPO44
GNT2#_GPO45

INTE#_GPIO32
INTF#_GPIO33

INTG#_GPIO34

INTH#_GPIO35

LPC

LPC

SERIRQ_GPIO48

PROCHOT#

LDT_STP#

CPU

CPU

LDT_RST#

RTC

RTC

INTRUDER_ALERT#

VDDBT_RTC_G

GNT0#

CLKRUN#

LOCK#

LPCCLK0
LPCCLK1

LAD0
LAD1
LAD2
LAD3

LFRAME#

LDRQ0#

LDT_PG

32K_X1
32K_X2

RTCCLK

3

PCI_CLK0_R

W2

PCI_CLK1_R

W1

PCI_CLK2_R

W3

PCI_CLK3_R

W4

PCI_CLK4_R

Y1

PCI_RST#

V2

AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5

dGPU_PRSN T#

AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5

PAR

AF5
AE6
AE4
AE11
AH5
AH4

GPIO42

AC12
AD12
AJ5
AH6

GPIO46

AB12
AB11
AD7

AJ6
AG6
AG4
AJ4

LPCCLK0_R

H24

LPCCLK1_R

H25

LPC_AD0_R

J27

LPC_AD1_R

J26

LPC_AD2_R

H29

LPC_AD3_R

H28
G28
J25
AA18

INT_SERIRQ

AB19

G21
H21
K19

APU_STOP#

G22
J24

32K_X1

C1

32K_X2

C2
D2

INTRUDER_ ALERT#

B2
B1

X01

R1705 0R0402-PADR1705 0R040 2-PAD

1 2

R1718 0R0402-PADR1718 0R040 2-PAD

1 2

R1706 0R0402-PADR1706 0R040 2-PAD

1 2

R1707 0R0402-PADR1707 0R040 2-PAD

1 2

3D3V_S0

R1711

R1711

DY

DY

PCI_AD23 21
PCI_AD24 21
PCI_AD25 21
PCI_AD26 21
PCI_AD27 21

X01

RTC_SENSE 60

TP1707 TPAD14TP1707 TPAD14

1

TP1708 TPAD14TP1708 TPAD14

1

SATA_ODD_D A# 56

0806

TP1701TPAD14TP1701TPAD14

1

12

C1718

C1718

SC1U6D3V2KX- GP

SC1U6D3V2KX- GP

1 2

10KR2J-3-GP

10KR2J-3-GP

Debug Strap

R1701 0R0402-P ADR1701 0R040 2-PAD

1 2

X01

3D3V_S0

R1712

R1712

DY

DY

1 2

R1719 22R2J-2-GPR1719 22R2J-2-GP

1 2

R1720 0R0402-PADR1720 0R0402-PAD

1 2

RN1706

RN1706

0R4P2R-PAD

0R4P2R-PAD

0819

RN1707

RN1707

0R4P2R-PAD

0R4P2R-PAD

TP1702TPAD14TP1702TPAD14

1

PCI_CLK1 21
PCI_CLK2 21
CLK_PCI_LPC 21,71
PCI_CLK4 21

TP1703TPAD14TP1703TPAD14

1

PE_GPIO0 83

1D5V_VGA_PW OK 83,86

Muxless support
PE_GPIO0 ->VGA_RESET

PE_GPIO1 ->VGA_PowerEnable

10KR2J-3-GP

10KR2J-3-GP

PE_GPIO1 92,93

PM_CLKRUN # 27

SC10P50V2JN-4G P

SC10P50V2JN-4G P
C1716

C1716

1 2

RN

RN

1

4

2 3

RN

RN

1

4

2 3

INT_SERIRQ 27

ALLOW_STO P 6

APU_PROCH OT#_VDDIO 6

H_CPUPW RGD 6,36,42,71
APU_RST# 6,83

PCH_SUSCL K_KBC 27

RTC_AUX_S5

0712

PM_CLKRUN#

2

33MHZ

LPC_CLK0 21,27
LPC_CLK1 21

LPC_AD0 27,71
LPC_AD1 27,71

LPC_AD2 27,71
LPC_AD3 27,71

LPC_FRAME# 27,71

checklist:No PU Res
Integrated Resistor PU10K

PCIE_RST#_C

1

3D3V_S0

R1702

R1702

UMA

UMA

10KR2J-3-GP

10KR2J-3-GP

1 2

dGPU_PRSN T#

R1703

R1703

DIS_PX

DIS_PX

10KR2J-3-GP

10KR2J-3-GP

1 2

0811 EMI

1 2

12

LDT_STP# connection is just
for chipset automation purpose.
It is an automatic test for
AMD validation team only

APU_STOP#

INT_SERIRQ

integrated PU

32K_X1

R1715

R1715

20MR3-GP

20MR3-GP

32K_X2

R1721

R1721
0R2J-2-GP

0R2J-2-GP

PCI_CLK3_R

1 2

DY

DY

SC10P50V2JN-4G P

SC10P50V2JN-4G P

33R2J-2-GPR1708 33R2J-2-GPR1708

PLT_RST# 31,65,71,83

C1711

C1711
SC150P50V2KX-GP

SC150P50V2KX-GP

folloiwng Intel HR netname

0709

R1713

R1713
1KR2J-1-GP

1KR2J-1-GP

1 2

DY

DY

R1714

R1714

12

DY

DY

10KR2J-3-GP

10KR2J-3-GP

X01

C1715 SC18P50V2JN-1- GPC 1715 SC18P50V2JN-1- GP

1 2

12

32

X1701

X1701
X-32D768KHZ- 67-GP

X-32D768KHZ- 67-GP

1 4

C1717 SC18P50V2J N-1-GPC1717 SC18P50V2J N-1-GP

1 2

C1722

C1722

DY

DY

1D8V_S0

3D3V_S0

12

KBC

R1717

R1717

1MR2J-1-GP

1MR2J-1-GP

X02

C1719

C1719

1 2

XTAL-25MHZ- 155-GP

XTAL-25MHZ- 155-GP

1 2

X01

X1702

X1702

41

2 3

5

A A

SC18P50V2JN-1- GP

SC18P50V2JN-1- GP

25M_X1

25M_X2

X01

12

R1766

R1766
1KR2J-1-GP

1KR2J-1-GP

X02

12

C1720

C1720
SC18P50V2JN-1- GP

SC18P50V2JN-1- GP

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Title

Title

Title

HUDSON-M1_ACPI/PCI/CLK(1/6)

HUDSON-M1_ACPI/PCI/CLK(1/6)

HUDSON-M1_ACPI/PCI/CLK(1/6)

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Size D ocument Numb er Rev

A2

A2

A2

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

4

www.bblianmeng.com

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O. C.

17 109Friday, April 22 , 2011

17 109Friday, April 22 , 2011

17 109Friday, April 22 , 2011

1

A00

A00

A00

5

0720 POP

3D3V_S5

RN1802

RN1802

SRN10KJ-5-G P

SRN10KJ-5-G P
RN1801

RN1801

SRN10KJ-5-G P

SRN10KJ-5-G P
RN1803

RN1803

DY

DY

SRN2K2J-2-G P

SRN2K2J-2-G P

USB_OC#2

4

USB_OC#1

SCLK1

4

SDATA1

FCH_TEST0

8

FCH_TEST1

7

FCH_TEST2

6

1
2 3

1
2 3

1

D D

2
3
4 5

SSID = FCH

Integrated PU is not
supported when the pin is
configured for USB over
current function.

0720: Change From 2.2K and POP

integrated PU

SMB_CLK

4

SMB_DATA

HDA_SDIN0
HDA_CODE C_BITCLK

HDA_CODE C_RST#

Rename 0712

RSMRST#_KBC

EC_SCI#
EC_SWI#

PM_PWRBT N#

EC_SMI#

H_A20GATE
H_RCIN#

Confirm with SW, RSMRST# from KBC is push-pull.
It can be drived high by SW.

RSMRST#_KBC27

R1810 0R0402-PADR1810 0R0402-PAD

R1803 10KR2J-3-GP

R1803 10KR2J-3-GP

1 2

DY

DY

R1805 10KR2J-3-GP

R1805 10KR2J-3-GP

1 2

DY

DY

R1806 10KR2J-3-GPR1806 10KR2J-3-GP

1 2

AMD recommand external PU

3D3V_S0

R1812 10KR2J-3-GP

R1812 10KR2J-3-GP

1 2

DY

DY

integrated PU

integrated PU

R1813 10KR2J-3-GP

R1813 10KR2J-3-GP

1 2

DY

DY

R1814 10KR2J-3-GP

R1814 10KR2J-3-GP

C C

B B

1 2

RN1805

RN1805

8
7
6

DY

DY

SRN10KJ-6-G P

SRN10KJ-6-G P

DY

DY

RN1804

RN1804

1
2 3

SRN2K2J-1-G P

SRN2K2J-1-G P

1
2
3
45

R1824

R1824
100KR2J-1-GP

100KR2J-1-GP

12

1 2

4

12

DY

DY

0817 Add

RSMRST#_R

PCIE_CLK_LAN_R Q1#31

C1801

C1801
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

0812

CLK_PCIE_WLA N_REQ#65

SC22P50V2JN-4G P

SC22P50V2JN-4G P

HDA_CODE C_BITCLK29
HDA_CODE C_SDOUT29

HDA_SDIN029

HDA_CODE C_SYNC29
HDA_CODE C_RST#29

PM_SLP_S3#27,36,44,46,47
PM_SLP_S5#27,44

PM_PWRBT N#27

FCH_PW RGD36

H_A20GATE27

PCH_WA KE#27
PCIE_WAKE#27,31

H_THERMT RIP#6,36

HDA_SPKR29

SMB_CLK14
SMB_DATA14

PEG_CLKREQ#85

ODD_DA_Q56

SATA_ODD_PR SNT#56

EC1801

EC1801

1 2

EC1802

EC1802

SC180P50V2JN-1 GP

SC180P50V2JN-1 GP

RN1807

RN1807

1
2 3

SRN10KJ-5-G P

SRN10KJ-5-G P

RN1808

RN1808

1
2 3

SRN10KJ-5-G P

SRN10KJ-5-G P

H_RCIN#27
EC_SCI#27
EC_SMI#27

EC_SWI#27

4

4

3D3V_S0

R1804 0R0402-PADR1804 0R0402-PAD

1 2

R1807 0R0402-PADR1807 0R0402-PAD

1 2

R1808 0R0402-PADR1808 0R0402-PAD

1 2

R1801 0R0402-PADR1801 0R0402-PAD

1 2

R1825 0R0402-PADR1825 0R0402-PAD

1 2

R1826 0R2J-2-GP

R1826 0R2J-2-GP

1 2

R1809 10KR2J- 3-GPR 1809 10KR2J-3- GP

R1815 0R0402-PADR1815 0R0402-PAD

1 2

R1816

R1816

1 2

R1817 0R0402-PADR1817 0R0402-PAD

1 2

A00

R1818 0R2J-2-GP

R1818 0R2J-2-GP

1 2

USB_OC#261
USB_OC#161

1 2
1 2

1 2
1 2

12

DY

DY

DY

DY

1 2

DY

DY

HDA_SDOU T21

3D3V_S5

TP1801TPAD14- GP TP 1801TPAD14-GP
TP1802TPAD14- GP TP 1802TPAD14-GP

PM_PWRBT N#_R

FCH_TEST0
FCH_TEST1
FCH_TEST2
EC_A20M#_R
EC_KB_RST#_R
EC_SCI#
EC_SMI#_R

PCIE_WAKE#_R

NB_PWR GD

HDA_SPKR_R

SCLK1
SDATA1

CLK_PCIE_WLA N_REQ#_R

0R0402-PAD

0R0402-PAD

CLKREQG#

USB_OC7#

1

EC_SWI#
USB_OC5#

1

SATA_ODD_PR SNT#_R

33R2J-2-GPR1819 33R2J-2-GPR1819
33R2J-2-GPR1820 33R2J-2-GPR1820

33R2J-2-GPR1821 33R2J-2-GPR1821
33R2J-2-GPR1822 33R2J-2-GPR1822

R1823

R1823
10KR2J-3-GP

10KR2J-3-GP

GBE_PHY_INTR
TP_DEBUG_D AT

TP1803TPAD14-GP TP1803TPAD14-G P

1

TP_DEBUG_C LK

TP1804TPAD14-GP TP1804TPAD14-G P

1

SPI_CS2#

TP1805TPAD14-GP TP1805TPAD14-G P

1

GPO160

TP1806TPAD14-GP TP1806TPAD14-G P

1

HDA_BITCLK
HDA_SDOU T
HDA_SDIN0

HDA_SYNC
HDA_RST#

GBE_COL
GBE_CRS

GBE_MDIO

12

GBE_RXERR

3

FCH1D

FCH1D

J2

PCI_PME#_GEVENT4#

K1

RI#_GEVENT22#

D3

SPI_CS3#_GBE_STAT1_GEVENT21#

F1

SLP_S3#

H1

SLP_S5#

F2

PWR_BTN#

H5

PWR_GOOD

G6

SUS_STAT#

B3

TEST0

C4

TEST1_TMS

F6

TEST2

AD21

GA20IN_GEVENT0#

AE21

KBRST#_GEVENT1#

K2

LPC_PME#_GEVENT3#

J29

LPC_SMI#_GEVENT23#

H2

GEVENT5#

J1

SYS_RESET#_GEVENT19#

H6

WAKE#_GEVENT8#

F3

IR_RX1_GEVENT20#

J6

THRMTRIP#_SMBALERT#_GEVENT2#

AC19

NB_PWRGD

G1

RSMRST#

AD19

CLK_REQ4#_SATA_IS0#_GPIO64

AA16

CLK_REQ3#_SATA_IS1#_GPIO63

AB21

SMARTVOLT1_SATA_IS2#_GPIO50

AC18

CLK_REQ0#_SATA_IS3#_GPIO60

AF20

SATA_IS4#_FANOUT3_GPIO55

AE19

SATA_IS5#_FANIN3_GPIO59

AF19

SPKR_GPIO66

AD22

SCL0_GPIO43

AE22

SDA0_GPIO47

F5

SCL1_GPIO227

F4

SDA1_GPIO228

AH21

CLK_REQ2#_FANIN4_GPIO62

AB18

CLK_REQ1#_FANOUT4_GPIO61

E1

IR_LED#_LLB#_GPIO184

AJ21

SMARTVOLT2_SHUTDOWN#_GPIO51

H4

DDR3_RST#_GEVENT7#

D5

GBE_LED0_GPIO183

D7

GBE_LED1_GEVENT9#

G5

GBE_LED2_GEVENT10#

K3

GBE_STAT0_GEVENT11#

AA20

CLK_REQG#_GPIO65_OSCIN

H3

BLINK_USB_OC7#_GEVENT18#

D1

USB_OC6#_IR_TX1_GEVENT6#

E4

USB_OC5#_IR_TX0_GEVENT17#

D4

USB_OC4#_IR_RX0_GEVENT16#

E8

USB_OC3#_AC_PRES_TDO_GEVENT15#

F7

USB_OC2#_TCK_GEVENT14#

E7

USB_OC1#_TDI_GEVENT13#

F8

USB_OC0#_TRST#_GEVENT12#

M3

AZ_BITCLK

N1

AZ_SDOUT

L2

AZ_SDIN0_GPIO167

M2

AZ_SDIN1_GPIO168

M1

AZ_SDIN2_GPIO169

M4

AZ_SDIN3_GPIO170

N2

AZ_SYNC

P2

AZ_RST#

T1

GBE_COL

T4

GBE_CRS

L6

GBE_MDCK

L5

GBE_MDIO

T9

GBE_RXCLK

U1

GBE_RXD3

U3

GBE_RXD2

T2

GBE_RXD1

U2

GBE_RXD0

T5

GBE_RXCTL_RXDV

V5

GBE_RXERR

P5

GBE_TXCLK

M5

GBE_TXD3

P9

GBE_TXD2

T7

GBE_TXD1

P7

GBE_TXD0

M7

GBE_TXCTL_TXEN

P4

GBE_PHY_PD

M9

GBE_PHY_RST#

V7

GBE_PHY_INTR

E23

PS2_DAT_SDA4_GPIO187

E24

PS2_CLK_SCL4_GPIO188

F21

SPI_CS2#_GBE_STAT2_GPIO166

G29

FC_RST#_GPO160

D27

PS2KB_DAT_GPIO189

F28

PS2KB_CLK_GPIO190

F29

PS2M_DAT_GPIO191

E27

PS2M_CLK_GPIO192

HUDSON- M1-1-GP

HUDSON- M1-1-GP

HUDSON-1

HUDSON-1

ACPI/WAKE UP EVENTS

ACPI/WAKE UP EVENTS

GPIO

GPIO

USB OC

USB OC

HD AUDIO

HD AUDIO

GBE LAN

GBE LAN

4 OF 5

4 OF 5

USBCLK_14M_25M_48M_OSC

USB_RCOMP

USB MISC

USB MISC

USB 1.1

USB 1.1

USB_FSD1P_GPIO186

USB_FSD1N

USB_FSD0P_GPIO185

USB_FSD0N

USB_HSD13P
USB_HSD13N

USB_HSD12P
USB_HSD12N

USB_HSD11P
USB_HSD11N

USB_HSD10P
USB_HSD10N

USB_HSD9P
USB_HSD9N

USB_HSD8P
USB_HSD8N

USB_HSD7P
USB_HSD7N

USB 2.0

USB 2.0

USB_HSD6P
USB_HSD6N

USB_HSD5P
USB_HSD5N

USB_HSD4P
USB_HSD4N

USB_HSD3P
USB_HSD3N

USB_HSD2P
USB_HSD2N

USB_HSD1P
USB_HSD1N

USB_HSD0P
USB_HSD0N

SCL2_GPIO193
SDA2_GPIO194

SCL3_LV_GPIO195

SDA3_LV_GPIO196
EC_PWM0_EC_TIMER0_GPIO197
EC_PWM1_EC_TIMER1_GPIO198
EC_PWM2_EC_TIMER2_GPIO199
EC_PWM3_EC_TIMER3_GPIO200

KSI_0_GPIO201
KSI_1_GPIO202
KSI_2_GPIO203
KSI_3_GPIO204
KSI_4_GPIO205
KSI_5_GPIO206
KSI_6_GPIO207
KSI_7_GPIO208

KSO_0_GPIO209
KSO_1_GPIO210
KSO_2_GPIO211
KSO_3_GPIO212
KSO_4_GPIO213
KSO_5_GPIO214
KSO_6_GPIO215
KSO_7_GPIO216
KSO_8_GPIO217

KSO_9_GPIO218
KSO_10_GPIO219
KSO_11_GPIO220
KSO_12_GPIO221
KSO_13_GPIO222
KSO_14_GPIO223
KSO_15_GPIO224
KSO_16_GPIO225
KSO_17_GPIO226

EMBEDDED CTRL

EMBEDDED CTRL

2

R1811

USB_RCOMP

R1811
11K8R2F-GP

11K8R2F-GP

USB_PP9 3 2
USB_PN9 32

USB_PP7 4 9
USB_PN7 49

USB_PP6 8 2
USB_PN6 82

USB_PP2 8 2
USB_PN2 82

USB_PP1 6 5

USB_PN1 65

USB_PP0 6 1
USB_PN0 61

SCLK3 6
SDATA3 6

EC_PWM2 21
EC_PWM3 21

12

Pair4USB

USB 2.0 EXT.Port1

0

Mini Card1 (WLAN)

1

USB 2.0 EXT.Port1

2

NC

3

NC
NC

5

USB 2.0 EXT.Port1

6

CCD Camera

7

NEWCARD

8

Card Reader

9

NC

10

NC

11

NC

12

NC

13

SCL2
SDAT2

if not used SMBUS or GPIO ,PD 10K

0719 AMD Confirm

SCLK3
SDATA3

A10
G19

J10
H11

H9
J8

B12
A12

F11
E11

E14
E12

J12
J14

A13
B13

D13
C13

G12
G14

G16
G18

D16
C16

B14
A14

E18
E16

J16
J18

B17
A17

A16
B16

SCL2

D25

SDAT2

F23

SCLK3

B26

SDATA3

E26
F25
E22
F22
E21

G24
G25
E28
E29
D29
D28
C29
C28

B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22

Device

RN1806

RN1806

1
2 3

SRN10KJ-5-G P

SRN10KJ-5-G P

1
2 3

1

4

RN1809

RN1809

SRN2K2J-1-G P

SRN2K2J-1-G P

3D3V_S5

4

A A

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Title

Title

Title

HUDSON-M2(2/6)

HUDSON-M2(2/6)

HUDSON-M2(2/6)

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

5

4

www.bblianmeng.com

3

2

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O. C.

1

A00

A00

18 109Friday, Apri l 22, 2011

18 109Friday, Apri l 22, 2011

18 109Friday, Apri l 22, 2011

A00

5

0721 Change CAP to 10n

C1901 SCD01U16V2KX-3GPC1901 SCD01U16V2KX-3GP

SATA_TXP056

SATA HDD

D D

C C

SATA ODD

SATA_TXN056

SATA_RXN0_C56
SATA_RXP0_C56

SATA_TXP156
SATA_TXN156

SATA_RXN1_C56
SATA_RXP1_C56

1D1V_SATA_S0

PLACE SATA AC DECOUPLING
CAPS CLOSE TO FCH

1 2

C1902 SCD01U16V2KX-3GPC1902 SCD01U16V2KX-3GP

1 2

C1903 SCD01U16V2KX-3GPC1903 SCD01U16V2KX-3GP

1 2

C1904 SCD01U16V2KX-3GPC1904 SCD01U16V2KX-3GP

1 2

1KR2F-3-GP

1KR2F-3-GP

R1902

R1902

1 2

R1903

R1903

1 2

931R2F-1-GP

931R2F-1-GP

SATA_LED#68

[checklist]:integrated Clock Mode=>Left unconnected

4

SATA_TXP0_C
SATA_TXN0_C

SATA_TXP1_C
SATA_TXN1_C

SATA_CALP
SATA_CALN

FCH1B

FCH1B

AH9

SATA_TX0P

AJ9

SATA_TX0N

AJ8

SATA_RX0N

AH8

SATA_RX0P

AH10

SATA_TX1P

AJ10

SATA_TX1N

AG10

SATA_RX1N

AF10

SATA_RX1P

AG12

SATA_TX2P

AF12

SATA_TX2N

AJ12

SATA_RX2N

AH12

SATA_RX2P

AH14

SATA_TX3P

AJ14

SATA_TX3N

AG14

SATA_RX3N

AF14

SATA_RX3P

AG17

SATA_TX4P

AF17

SATA_TX4N

AJ17

SATA_RX4N

AH17

SATA_RX4P

AJ18

SATA_TX5P

AH18

SATA_TX5N

AH19

SATA_RX5N

AJ19

SATA_RX5P

AB14

SATA_CALRP

AA14

SATA_CALRN

AD11

SATA_ACT#_GPIO67

AD16

SATA_X1

AC16

SATA_X2

HUDSON-1

HUDSON-1

SERIAL ATA

SERIAL ATA

3

FC_FBCLKOUT

FC_FBCLKIN

FC_OE#_GPIOD145

FC_AVD#_GPIOD146

FC_WE#_GPIOD148
FC_CE1#_GPIOD149
FC_CE2#_GPIOD150

FC_INT1_GPIOD144

FC_INT2_GPIOD147

GPIOD

GPIOD

FC_ADQ0_GPIOD128
FC_ADQ1_GPIOD129
FC_ADQ2_GPIOD130
FC_ADQ3_GPIOD131
FC_ADQ4_GPIOD132
FC_ADQ5_GPIOD133
FC_ADQ6_GPIOD134
FC_ADQ7_GPIOD135
FC_ADQ8_GPIOD136

FC_ADQ9_GPIOD137
FC_ADQ10_GPIOD138
FC_ADQ11_GPIOD139
FC_ADQ12_GPIOD140
FC_ADQ13_GPIOD141
FC_ADQ14_GPIOD142
FC_ADQ15_GPIOD143

FANOUT0_GPIO52
FANOUT1_GPIO53
FANOUT2_GPIO54

FANIN0_GPIO56
FANIN1_GPIO57
FANIN2_GPIO58

TEMPIN0_GPIO171
TEMPIN1_GPIO172
TEMPIN2_GPIO173

TEMPIN3_TALERT#_GPIO174

VIN6_GBE_STAT3_GPIO181

TEMP_COMM

HW MONITOR

HW MONITOR

VIN0_GPIO175
VIN1_GPIO176
VIN2_GPIO177
VIN3_GPIO178
VIN4_GPIO179
VIN5_GPIO180

VIN7_GBE_LED3_GPIO182

2 OF 5

2 OF 5

FC_CLK

AH28
AG28
AF26

AF28
AG29
AG26
AF27
AE29
AF29
AH27

AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26

W5
W6

FCH_PROCHOT#_C

Y9
W7

V9
W8

GPIO171

B6

FCH_USB3.0PORT_EN#

A6

MB_THRMDA_FCH

A5

APU_TALERT#

B5
C7

PSW_CLR#

A3

VRAM_SIZE1

B4

VRAM_SIZE2

A4

MEM_1V5

C5

MEM_1V35

A7

VIN_VDDIO

B7

VIN_VDDR

B8

GPIO182

A8

2

GPIOD[150:128] are open drain GPIO pins
where as GPO160 is an open drain GPO pin.
These pins are not programmed to GPIO mode by default.

If use as GPIO, need to pull up to 1.8V_RUN

SATA_ODD_PWRGT 56

1

TP1902TP1902

R1904 0R0402-PADR1904 0R0402-PAD

1 2

support ODD Zero power

APU_ALERT#_FCH 6

1

SSID = FCH

SPI ROM

FCH_SPI_DI

TP621TPAD14-GP TP621TPAD14-GP
TP620TPAD14-GP TP620TPAD14-GP
TP619TPAD14-GP TP619TPAD14-GP
TP618TPAD14-GP TP618TPAD14-GP
TP617TPAD14-GP TP617TPAD14-GP

XTAL

B B

1'nd 82.30020.851

FCH_SPI_SI

FCH_SPI_CLK

FCH_SPI_CS0#

FCH_SPI_W P#

J5

SPI_DI_GPIO164

E2

SPI_DO_GPIO163

K4

SPI_CLK_GPIO162

K9

SPI_CS1#_GPIO165

G2

ROM_RST#_GPIO161

HUDSON-M1-1-GP

HUDSON-M1-1-GP

2'nd 82.30020.791

RN1902

RN1902

1
2
3
4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

RN1901

RN1901

1
2
3
4 5

SRN10KJ-6-GP

SRN10KJ-6-GP

if not used HWM or GPIO ,PD 10K

A A

R1911

R1911

1 2

10KR2J-3-GP

10KR2J-3-GP

GPIO171

8

FCH_USB3.0PORT_EN#

7

MEM_1V5

6

MB_THRMDA_FCH

VIN_VDDR

8

GPIO182

7

VIN_VDDIO

6

MEM_1V35

PSW_CLR#

5

4

SPI ROM

www.bblianmeng.com

3

NC#G27

NC#Y2

G27
Y2

VDDIO

1.5V

1.35V

MEM_1V5 MEM_1V35

H Don't Care
L

3D3V_S5

12

R1908

R1908

1G

1G

10KR2J-3-GP

10KR2J-3-GP

VRAM_SIZE1

12

R1910

R1910

512M

512M

10KR2J-3-GP

10KR2J-3-GP

VRAM_SIZE2

12

R1909

R1909

10KR2J-3-GP

10KR2J-3-GP

H

[VRAM_SIZE1:VRAM_SIZE2]
LL=512M / HL=1G / LH=2G

<Core Design>

<Core Design>

<Core Design>

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

HUDSON-M1 SATA/HWM/SPI(3/6)

HUDSON-M1 SATA/HWM/SPI(3/6)

HUDSON-M1 SATA/HWM/SPI(3/6)

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

19 109Friday, April 22, 2011

19 109Friday, April 22, 2011

19 109Friday, April 22, 2011

1

A00

A00

A00

5

SSID = FCH

D D

1D1V_S0 1D1V_PCIE_S0

L2004

L2004
PBY160808T-330Y-N-G P

PBY160808T-330Y-N-G P

1 2

68.00206.141

68.00206.141

33 ohm 3A

C C

L2006

L2006
PBY160808T-330Y-N-G P

PBY160808T-330Y-N-G P

1 2

68.00206.141

68.00206.141

33 ohm 3A

L2008

L2008
HCB2012KF-221T 30-GP

HCB2012KF-221T 30-GP

1 2

68.00216.161

68.00216.161

2ND = 68.00206.121

2ND = 68.00206.121

220 ohm 3A

B B

3D3V_USB_S53D3V_S5

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

DY

DY

C2041

C2041

A00

3D3V_S0

220 ohm 300mA

X01

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2021

C2021

3D3V_S0

220 ohm 300mA

1D1V_SATA_S01D1V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2034

C2034

C2033

C2033

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

12

DY

DY

C2042

C2042

C2043

C2043

3D3V_S0 3D3V_FCH_VDD IO_S0

R2002 0R0402-PADR2002 0R0402-PAD

1D8V_S0

1 2

DY

DY

R2003

R2003
0R2J-2-GP

0R2J-2-GP

L2002

L2002
BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

1 2

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

68.00084.E21

68.00084.E21

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2022

C2022

1 2

68.00084.E21

68.00084.E21

12

DY

DY

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

C2044

C2044

C2012

C2012

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C2023

C2023

L2005

L2005
BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

C2029

C2029

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2035

C2035

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C2045

C2045

1D1V_S5

12

12

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2036

C2036

1 2

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

DY

DY

C2005

C2005

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2013

C2013

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2024

C2024

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2030

C2030

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

C2037

C2037

L2001

L2001
BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

1 2

68.00084.E21

68.00084.E21

12

DY

DY

220 ohm 300mA

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

C2006

C2006

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

DY

DY

C2025

C2025

VDDPL_3.3V_SAT A

12

4

SC4D7U6D3V5KX-3GP

SC4D7U6D3V5KX-3GP

12

C2002

C2002

12

VDDPL_3.3V_PC IE

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

C2048

C2048

3

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2003

C2003

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2007

C2007

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2049

C2049

12

C2004

C2004

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2008

C2008

VDDAN_1.1V_U SB

C2001

C2001

VDDIO_18_FC

R2030

R2030
0R0402-PAD-2- GP

0R0402-PAD-2- GP

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

3 OF 5

VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11
VDDCR_11

CORE S0

CORE S0

VDDCR_11

CLKGEN I/O

CLKGEN I/O

VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK

VDDRF_GBE_S

VDDIO_33_GBE_S

GBE LAN

GBE LAN

VDDCR_11_GBE_S
VDDCR_11_GBE_S

VDDIO_GBE_S
VDDIO_GBE_S

3.3V_S5 I/O

3.3V_S5 I/O

VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S

CORE S5

CORE S5

VDDCR_11_S
VDDCR_11_S

VDDIO_AZ_S

VDDCR_11_USB_S
VDDCR_11_USB_S

VDDPL_33_SYS

PLL

PLL

VDDPL_11_SYS_S

VDDPL_33_USB_S

VDDAN_33_HWM_S

VDDXL_33_S

3 OF 5

N13
R15
N17
U13
U17
V12
V18
W12
W18

K28
K29
J28
K26
J21
J20
K21
J22

V1
M10

L7
L9

M6
P8

A21
D21
B21
K10
L10
J9
T6
T8

F26
G26

M8
A11

B11

M21
L22
F19
D6
L20

510mA

TBD

VDDRF_GBE _S

TBD

2mA

63mA

145mA

32mA

113mA

TBD
197mA

47mA
62mA
17mA
5mA
TBD

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2009

C2009

1 2

VDDCR_11_S

VDDIO_AZ

VDDCR_11_U SB_S

3D3V_VPPL_SYS_S0

1D1V_VPPL_SYS_S5
3D3V_USB_S5
3D3V_VDDAN _HWM_S5

12

R2005

R2005

0R0402-PAD

0R0402-PAD

VDDXL_3.3V

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

12

DY

DY

C2014

C2014

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2026

C2026

SCD1U10V2KX-5GP

12

12

DY

DY

C2010

C2010

C2015

C2015

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C2016

C2016

C2017

C2017

3D3V_S5

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

12

12

C2027

C2027

C2028

C2028

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

C2031

C2031

C2032

C2032

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

12

C2038

C2038

71mA

43mA

600mA

93mA

567mA

658mA

TBD

131mA

AC21

AA19

AF22
AE25
AF24
AC22

AE28

AD14

AJ20
AF18
AH20
AG19

AE18

AD18

AE16

AH1

Y19

AE5
AA2

AB4
AC8
AA7
AA9

AF7

U26
V22
V26
V27
V28

V29
W22
W26

A18

A19

A20

B18

B19

B20

C18

C20

D18

D19

D20

E19

C11

D11

FCH1C

FCH1C

VDDIO_33_PCIGP

V6

VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP

VDDIO_18_FC
VDDIO_18_FC
VDDIO_18_FC
VDDIO_18_FC

VDDPL_33_PCIE

VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE

VDDPL_33_SATA
VDDAN_11_SATA

VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA

VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S

VDDAN_11_USB_S
VDDAN_11_USB_S

HUDSON- M1-1-GP

HUDSON- M1-1-GP

HUDSON-1

HUDSON-1

PCI/GPIO I/O

PCI/GPIO I/O

FLASH I/O

FLASH I/O

PCI EXPRESS

PCI EXPRESS

SERIAL ATA

SERIAL ATA

USB I/O

USB I/O

POWER

POWER

2

1D1V_VDDCR _S0 1D1V_S0

R2004 0R0603-PADR2004 0R0603-PA D

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

C2011

C2011

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2018

C2018

R2001 0R0402-PADR2001 0R0402-PAD

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

C2039

C2039

1D1V_CKVDD _S0 1D1V_S0

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

12

12

DY

DY

C2019

C2019

C2020

C2020

1D1V_S5

L2007

L2007
BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

12

C2040

C2040

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

12

DY

DY

C2047

C2047

C2046

C2046

X01

33 ohm 3A

L2003

L2003

1 2

PBY160808T-330Y-N-G P

PBY160808T-330Y-N-G P

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SC2D2U6D3V3KX-GP

SC2D2U6D3V3KX-GP

68.00206.141

68.00206.141

12

1D1V_S5

L2009

L2009
BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

1 2

68.00084.E21

68.00084.E21

12

220 ohm 300mA

If support USB 3.0 or LAN wake-up, pls tie to 3.3V_S5
otherwise, tie to 3.3V_S0

3D3V_S5

1

220 ohm 300mA

220 ohm 300mA

3D3V_S0 3D 3V_VPPL_SYS_S0

L2011

L2011

1 2

BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

68.00084.E21

68.00084.E21

A A

12

C2054

C2054
SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

5

12

C2055

C2055
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

3D3V_S5 3D3V_VDDAN_HW M_S5

L2010

L2010

1 2

BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

68.00084.E21

68.00084.E21

HW Montior Not implemented
or HW Montior balls not used GPIO
=> Decoupled cap not used

HW Montior Not implemented
or HW Montior balls used as GPIO
=> Bead not used

12

C2050

C2050
SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

12

4

C2051

C2051
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

220 ohm 300mA

1D1V_S5 1D1V_VPPL_SYS_S5

L2012

L2012

1 2

BLM15AG221SS1D-G P

BLM15AG221SS1D-G P

68.00084.E21

68.00084.E21

If support USB 3.0 or LAN wake-up, tie to 1.1V_S5
otherwise, tie to 1.1V_S0

12

C2052

C2052
SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

www.bblianmeng.com

12

C2053

C2053
SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

3

Codec power use3.3V,VDDIO_AZ have to tied to 3.3V
Codec power use1.5V,VDDIO_AZ have to tied to 1.5V
If use 1.5V_S5 power,have to add LDO for it extra

3D3V_S5 VDDIO_AZ

R2006 0R0402-PA DR2006 0R0402-PAD

1 2

Del reservaton 1D5V_S5

12

C2056

C2056
SC2D2U6D3V 3KX-GP

SC2D2U6D3V 3KX-GP

2

<Core Desig n>

<Core Desig n>

<Core Desig n>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Title

Title

Title

HUDSON-M1 Power(4/6)

HUDSON-M1 Power(4/6)

HUDSON-M1 Power(4/6)

Size Docu ment Number Rev

Size Docu ment Number Rev

Size Docu ment Number Rev

A2

A2

A2

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsie n 221, Taiwan, R.O. C.

1

20 109Friday, Apri l 22, 2011

20 109Friday, Apri l 22, 2011

20 109Friday, Apri l 22, 2011

A00

A00

A00

5

SSID = FCH

4

REQUIRED STRAPS

3

2

1

D D

12

DY

DY

R2102

R2102

10KR2J-3-GP

HDA_SDOUT18

PCI_CLK117
CLK_PCI_LPC17,71
PCI_CLK417

PCI_CLK217

C C

0816

LPC_CLK017,27
LPC_CLK117

EC_PWM318
EC_PWM218

10KR2J-3-GP

12

R2108

R2108

10KR2J-3-GP

10KR2J-3-GP

3D3V_S0 3D3V_S5VDDIO_AZ

R210710KR2J-3-GP R210710KR2J-3-GP

R210310KR2J-3-GP R210310KR2J-3-GP

12

12

12

12

DY

DY

DY

DY

DY

DY

R2104

R2104

R2105

R2105

R2120

R2120

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

12

12

12

DY

DY

R2109

R2109

12

R2110

R2110

R2111

R2111

R2121

R2121

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

12

12

DY

DY

R2106

R2106

10KR2J-3-GP

10KR2J-3-GP

12

12

R2112

R2112

12

12

DY

DY

DY

DY

R2114

R2114

R2119

R2119

R2113

R2113

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

2K2R2F-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

10KR2J-3-GP

REQUIRED SYSTEM STRAPS

PULL
HIGH

PULL
LOW

TYPE
ENABLED

Reserved

LPC ROM

SPI ROM

Reserved

AZ_SDOUT

LOW POWER
MODE

PERFORMANCE
MODE

DEFAULT

2.2-kohm 5% pull-down

Not connected.

2.2-kohm 5% pull-down Not connected.

PCI_CLK1

Allow
PCIE GEN2

DEFAULT

Force
PCIE GEN1

CLK_PCI_LPC PCI_CLK4

USE
DEBUG
STRAPS

IGNORE
DEBUG
STRAPS

DEFAULT

EC_PWM3EC_PWM2

2.2-kohm 5% pull-down

2.2-kohm 5% pull-down

Not connected.Not connected.

non_Fusion
CLOCK mode

Fusion
CLOCK mode

DEFAULT

LPC_CLK0

ENABLE EC

DISABLE EC

DEFAULT

LPC_CLK1

CLKGEN
ENABLED

(Use Internal)

DEFAULT

CLKGEN
DISABLED

(Use External)

LPC_CLK2

Enable
boot timer
function

Disable boot
fail timer
function

DEFAULT

Note: EC_PWM2, EC_PWM3 default have internal 10kohm PU.

B B

DEBUG STRAPS

PCI_AD27 17
PCI_AD26 17
PCI_AD25 17
PCI_AD24 17
PCI_AD23 17

PCI_AD26PCI_AD27

PULL
HIGH

R21162K2R2J-2-GPDYR21162K2R2J-2-GP

R21012K2R2J-2-GPDYR21012K2R2J-2-GP

R21182K2R2J-2-GPDYR21182K2R2J-2-GP

R21152K2R2J-2-GPDYR21152K2R2J-2-GP

DY

A A

R21172K2R2J-2-GPDYR21172K2R2J-2-GP

12

12

12

DY

DY

DY

12

12

DY

PULL
LOW

USE PCI
PLL

BYPASS
PCI PLL

Disable ILA
AUTORUN

Enable ILA
AUTORUN

Note: FCH has 15K internal PU FOR PCI_AD[27:23]

5

4

www.bblianmeng.com

PCI_AD25 PCI_AD23

USE FC
PLL

PCI_AD24

USE DEFAULT
PCIE STRAPS

Disable PCI
MEM BOOT

(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)(DEFAULT)

BYPASS FC
PLL

3

USE EEPROM
PCIE STRAPS

Enable PCI
MEM BOOT

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

HUDSON_STRAPPING_(5/6)

HUDSON_STRAPPING_(5/6)

HUDSON_STRAPPING_(5/6)

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

21 109Friday, April 22, 2011

21 109Friday, April 22, 2011

21 109Friday, April 22, 2011

1

A00

A00

A00

5

4

3

2

1

SSID = FCH

5 OF 5

FCH1E

FCH1E

Y14

VSSIO_SATA

D D

C C

B B

Y16
AB16
AC14
AE12
AE14

AF9
AF11
AF13
AF16

AG8

AH7
AH11
AH13
AH16

AJ7
AJ11
AJ13
AJ16

A9
B10
K11

B9

D10
D12
D14
D17

E9

F9
F12
F14
F16

C9

G11

F18

D9
H12
H14
H16
H18

J11
J19
K12
K14
K16
K18

H19

Y4

D8
M19

P21

P20
M22
M24
M26

P22

P24

P26

T20

T22

T24

V20

J23

HUDSON-M1-1-GP

HUDSON-M1-1-GP

VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA
VSSIO_SATA

VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB
VSSIO_USB

EFUSE
VSSAN_HWM
VSSXL

VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK

HUDSON-1

HUDSON-1

GROUND

GROUND

5 OF 5

VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS

VSSPL_SYS

VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK

AJ2
A28
A2
E5
D23
E25
E6
F24
N15
R13
R17
T10
P10
V11
U15
M18
V19
M11
L12
L18
J7
P3
V4
AD6
AD4
AB7
AC9
V8
W9
W10
AJ28
B29
U4
Y18
Y10
Y12
Y11
AA11
AA12
G4
J4
G8
G9
M12
AF25
H7
AH29
V10
P6
N4
L4
L8

M20

H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Reserved

Reserved

Reserved

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

22 109Friday, April 22, 2011

22 109Friday, April 22, 2011

22 109Friday, April 22, 2011

1

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Reserved

Reserved

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

23 109Friday, April 22, 2011

23 109Friday, April 22, 2011

23 109Friday, April 22, 2011

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Reserved

Reserved

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

24 109Friday, April 22, 2011

24 109Friday, April 22, 2011

24 109Friday, April 22, 2011

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Reserved

Reserved

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

25 109Friday, April 22, 2011

25 109Friday, April 22, 2011

25 109Friday, April 22, 2011

A00

A00

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

<Core Design>

<Core Design>

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Reserved

Reserved

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

26 109Friday, April 22, 2011

26 109Friday, April 22, 2011

26 109Friday, April 22, 2011

A00

A00

A00

5

SSID = KBC

3D3V_AUX_KBC

D D

0816

SERIES_ID

C C

0817 Vendorrecommand Add 10 nF-0.1uF close to pin

VGA_THRM
SYS_THRM
CPU_THR M

0729 Add from page94 to here

B B

A A

R2702 0R0603-PADR2702 0R0603- PAD

R2771

R2771
2D2R3-1-U- GP

2D2R3-1-U- GP

1 2
12

12

C2704

C2704

C2701

C2701

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

3D3V_AUX_KBC

12

Inspiron

Inspiron

12

Vostro

Vostro

C2719 SC D1U10V2KX-5G P

C2719 SC D1U10V2KX-5G P

1 2

DY

DY

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

C2720

C2720

1 2

DY

DY

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

C2721

C2721

1 2

DY

DY

R2774

R2774

1 2

100KR2J-1-GP

100KR2J-1-GP

KBC_PWR BTN#68

1 2

12

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

R2728

R2728
100KR2J-1-GP

100KR2J-1-GP

R2727

R2727
100KR2J-1-GP

100KR2J-1-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2705

C2705

EC_AGND

12

C2706

C2706

RTC_AUX_S5

EC_AGND

12

12

C2707

C2707

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

AD_IA40

C2714 SCD1U10V2KX- 5GP

C2714 SCD1U10V2KX- 5GP

1 2

DY

DY

PSID_EC38
CPU_THR M28

FAN1_DAC28
LCD_TST49

VGA_THRM28
SYS_THRM28

BATT_WH ITE_LED#68

CAP_LED#69

S5_ENABLE36

PCIE_RST#85

X01

BAT_IN#39

LID_CLOSE#70,82

RSMRST#_KBC18

PM_SLP_S5#18,44

EC_SPI_WP#60

RCID38

0817

R2772 0R0402-PADR2772 0R0402-PAD

WIFI_RF_EN65
BLUETOOTH _EN65
1D1V_S5_PW RGD36,46

USB_PWR _EN#61

IMVP_PWRGD36

C2709

C2709

C2708

C2708

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

0816

12

12

SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

12

EC_AGND

12

C2710

C2710

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

PCB_VER_AD

SERIES_ID

PSL_IN2
MODEL_ID_DET

ECSMI#_KBC

PSL_IN1
PSL_OUT

VBKUP

VCORF

C2712

C2712
SC1U10V3ZY-6GP

SC1U10V3ZY-6GP

104

100
101

105
106

108

114
109

110
112
107

X02

EC_SWI#18

L_BKLT_EN

EC_SCI#18

X01

R2778 0R0402-PA D

R2778 0R0402-PA D

PSL

PSL

3

2ND = 83.00054.Q81

2ND = 83.00054.Q81

83.R2003.E81

83.R2003.E81

AC_IN#_KBC

20100906 X01 Modify:
Add C2722 0.1uF between Q2703 G&S pin for
fixed leakage voltage to 3D3V_AUX_KBC under
DC mode.
20100917 X01:
Add Q2706 2N7002 to avoid leakage loop from
3D3V_S5 to 3D3V_AUX_KBC issue when 10mW
latched fail timing. Un-stuff C2713 to follow the standard schematics.

12

BAT54CPT-GP

BAT54CPT-GP

10mW

10mW

D2702

D2702

PSL_IN2

1

83.R2003.E81

83.R2003.E81

2ND = 83.00054.Q81

2ND = 83.00054.Q81

2

KBC_ON#

D2703

D2703

2

10mW

10mW

1

BAT54CPT-GP

BAT54CPT-GP

5

R2704

R2704

1 2

3

RTC_POW ER

330KR2J-L1-GP

330KR2J-L1-GP

KBC_ON#_R

AC_IN# 40

RN2706

RN2706

4

SRN10KJ-5-G P

SRN10KJ-5-G P

VBAT

3D3V_AUX_KBC _VCC

U2701A

U2701A

VREF

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2
GPIO93/AD3

GPIO94/DA0
GPIO95/DA1
GPIO96/DA2

79

GPIO2

95

GPIO3/AD6

96

GPIO4/AD5
GPIO5/AD4

93

PSL_IN2#_GPIO6

94

GPIO7/AD7
GPIO16

6

GPIO24
GPIO30

14

GPIO34/CIRRXL

15

GPIO36

80

GPIO41

17

GPIO42/TCK

20

GPIO43/TMS

21

GPIO44/TDI

23

GPIO46/CIRRXM/TRST#

26

GPIO51

73

PSL_IN1_GPIO70

74

PSL_OUT_GPIO71

75

VBKUP

82

GPIO75

83

GPO76/SHBM

84

GPIO77

91

GPIO81
GPO82/IOX_LDSH/TEST#
GPIO84/IOX_SCLK/XORTR#
GPIO97

44

VCORF

NPCE795PA0DX -GP-U

NPCE795PA0DX -GP-U

3D3V_AUX_S5 3D3V_AUX_S5

1

KBC_ON#_GAT E

23

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

115

VCC19VCC46VCC76VCC88VCC

GND18GND45GND78GND89GND

5

116

1 2

D2701

D2701

1

DY

DY

2

BAS16-6-GP

BAS16-6-GP

83.00016.K11

83.00016.K11

2ND = 83.00016.F11

2ND = 83.00016.F11

1 2

D2704

D2704

1

DY

DY

2

BAS16-6-GP

BAS16-6-GP

83.00016.K11

83.00016.K11

2ND = 83.00016.F11

2ND = 83.00016.F11

X01

C2722

C2722

1 2

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

X01

12

C2713

C2713

DY

DY

X01

2N7002K-2-GP

2N7002K-2-GP

G

DY

DY

S

Q2706

Q2706

84.2N702.J31

84.2N702.J31

2ND = 84.2N702.031

2ND = 84.2N702.031

GND

3

3

G

102

AVCC

GPIO11/CLKRUN#

ECSCI#/GPIO54

GPIO10/LPCPD#

GPIO67/PWUREQ#

KBRST#/GPIO86

GPIO52/PSDAT3/RDY#

GPIO50/PSCLK3/TDO

GPIO27/PSDAT2

GPIO26/PSCLK2

GPIO35/PSDAT1

GPIO37/PSCLK1

F_SDIO/F_SDIO0

R2711

R2711

0R0402-PAD

0R0402-PAD

R27810R0402-PAD R27810R0402-PAD

ECSWI#_KBC

R27820R0402-PAD R27820R0402-PAD

ECSCI#_KBC

S

G

G

D

D

D

3D3V_AUX_KBC

S5_ENABLE

D

4

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

4

1 OF 2

1 OF 2

VDD

LRESET#

LCLK

LFRAME#

LAD3
LAD2
LAD1
LAD0

SERIRQ

GPIO65/SMI#

GPIO85/GA20

GPIO17/SCL1
GPIO22/SDA1
GPIO73/SCL2
GPIO74/SDA2
GPIO23/SCL3
GPIO31/SDA3
GPIO47/SCL4
GPIO53/SDA4

F_CS0#

F_SCK

F_SDI/F_SDIO1

AGND

103

EC_AGND

12

EC_AGND

Q2703

Q2703
DMP2130L-7-GP

DMP2130L-7-GP

2ND = 84.03413.A31

2ND = 84.03413.A31

84.02130.031

84.02130.031

4

3D3V_S0

12

C2702

C2702

PLT_RST#_EC

7
2
3

LPC_AD3

1

LPC_AD2

128

LPC_AD1

127

LPC_AD0

126
125
8
9

ECSCI#_KBC

29

EC_GPIO10

124

ECSWI#_KBC

123
121
122

27
25
11
10
71
72

70
69
67
68
119

EC_ENABLE#_1

120

PROCHOT _EC

24
28

EC_SPI_CS#_R

90

EC_SPI_CLK_R

92

EC_SPI_DI_R

86

EC_SPI_DO_R

87

NOTE:
Locate resistors R2719 and R2722 close
to the NPCE791L.

NOTE:
Connect GND and AGND planes via either
0R resistor or one point layout connection.

EC_GPIO47 High Active

X01

PCB_VER_AD

0817

12

C2703

C2703
SC2D2U10V3KX- 1GP

SC2D2U10V3KX- 1GP

C2711 SC220P50V2KX-3GP

C2711 SC220P50V2KX-3GP

1 2

DY

DY

R2735

R2735

12

0R0402-PAD

0R0402-PAD

LPC_CLK0 17,21

LPC_FRAME# 17,71

INT_SERIRQ 17
PM_CLKRUN # 17
L_BKLT_EN 6

H_A20GATE 18
H_RCIN# 18

BLON_OUT 49

AD_IA_HW2 40

KB_DET# 69
TPDATA 69
TPCLK 69

PM_LAN_ENABLE 31

R2737 0R0402-PA DR2737 0R0402-PAD
R2722 33R2J-2- GPR2722 33R 2J-2-GP

12

R2773

R2773
100KR2J-1-GP

100KR2J-1-GP

PROCHOT _EC

12

R2732

R2732

DY

DY

100KR2J-1-GP

100KR2J-1-GP

PSL SOLUTION

X01

PWR_CH G_ACOK40

1 2

0R0402-PAD

0R0402-PAD

0804 Add short pad separate

PSL_OUT

G

S

84.2N702.J31

2nd = 84.07002.I31

3D3V_AUX_KBC

A00

12

12

EC_AGND

A_RST# 17,36

LPC_AD3 17,71
LPC_AD2 17,71
LPC_AD1 17,71
LPC_AD0 17,71

TP2701 TPAD14TP2701 TPAD14

1

X01

<------ TP

<------ BATTERY / CHARGER

BAT_SCL 39,40
BAT_SDA 39,40
SML1_CLK 6,8 5

<------ CPU -Temp / eDP(Reserved)

SML1_DATA 6,8 5

LCD_TST_EN 49

33R2J-2-GPR2736 33R2J-2- GPR2736

12

33R2J-2-GPR2719 33R2J-2- GPR2719

12
12
12

R2780 0R0402-PADR2780 0R0402-PAD

1 2

Q2702

Q2702

G

DY

DY

S

2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2nd = 84.07002.I31

R2756

R2756

12

0R0402-PAD

0R0402-PAD

PSL

PSL

R2775

R2775

AC_OK

0R0402-PAD

0R0402-PAD

R2767

R2767

1 2

DY

DY

0R2J-2-GP

0R2J-2-GP

Q2705

Q2705

D

PSL

PSL

2N7002K-2-GP

2N7002K-2-GP

www.bblianmeng.com

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR

R2724

R2724
47KR2F-GP

47KR2F-GP

R2726

R2726
100KR2F-L1-GP

100KR2F-L1-GP

PCH_WA KE# 1 8

EC_SPI_CS# 60
EC_SPI_CLK 60

EC_SPI_DI 60

EC_SPI_DO 60

H_PROCHO T#_EC

D

SB
SC

A00
Reserved
Reserved

R2733

R2733

0R0402-PAD

0R0402-PAD

10mW SOLUTION

RTC_POW ER

R2768

R2768

12

PSL

PSL

KBC_ON#_R

0702 Modify:
Rename EC_GPIO71 to PSL_OUT

3D3V_AUX_KBC3D3V_AUX_S5

PSL_IN1

0702 Modify:
Rename EC_GPIO70 to PSL_IN1

3D3V_AUX_KBC

EC_ENABLE#_1

3

12

1 2

10mW

10mW

AC_IN#_KBC

3

H_PROCHO T# 6,40

R2734

R2734

0R2J-2-GP

0R2J-2-GP

R2763

R2763

1 2

10mW

10mW

Q2704

Q2704

G

10mW

10mW

S

2N7002K-2-GP

2N7002K-2-GP

R2766

R2766

1 2

10mW

10mW

100.0KSA

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

FAN_TACH 128
PM_PWRBT N#18

CHG_AMBER_L ED#68

KBC_BEEP29

0810 Add

AD_IA_HW40

WLAN_LED #68

X01

PWRLED #68

PCH_SUSCL K_KBC17

PURE_HW _SHUTDO WN#28,36,85

VBACKUP

RTC_POW ER

PSL_IN1

0R2J-2-GP

0R2J-2-GP

PSL_IN1

PSL_OUT

KBC_ON#

D

84.2N702.J31

2nd = 84.07002.I31

KBC_ON#_RKBC _ON#

0R2J-2-GP

0R2J-2-GP

PULL-HIGH RESISTOR VOLTAGE

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

PCIE_WAKE#18,31
PM_SLP_S3#18,36,44,46,47

E51_RxD65
E51_TxD65

AMP_MUTE#29

ECRST#

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65VReserved

X01

3D3V_AUX_KBC 3D3V_AUX_KBC

12

R2705

R2705
10KR2J-3-GP

10KR2J-3-GP

PSL_IN1

12

DY

DY

2

X01

MODEL_ID_DET

SCD1U10V2KX- 5GP

SCD1U10V2KX- 5GP

U2701B

U2701B

31

GPIO56/TA1

117

GPIO20/TA2

63

GPIO14/TB1

64

GPIO01/TB2

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

81

GPIO66/G_PWM

66

GPIO33/H_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM

85

VCC_POR#

113

GPIO87/CIRRXM/SIN_CR

111

GPIO83/SOUT_CR/TRIST#

30

GPIO55/CLKOUT/IOX_DIN_DIO

77

GPIO00/EXTCLK

13

PECI

12

VTT

NPCE795PA0DX -GP-U

NPCE795PA0DX -GP-U

2

PMBS3906-GP

PMBS3906-GP

1

Q2701

Q2701

3

3D3V_AUX_KBC

R2710

R2710

10KR2F-2-GP

10KR2F-2-GP

C2718

C2718

1 2

EC_AGND

KBSOUT0/JENK#

KBSOUT4/JEN0#

KBSOUT6/RDY#

KBSOUT9/SDP_VIS#
KBSOUT10/P80_CLK
KBSOUT11/P80_DAT

KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62

KBSOUT15/GPIO61/XOR_OUT

GPIO60/KBSOUT16
GPIO57/KBSOUT17

ECRST#

12

DY

DY

C2715

C2715

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

MODELID

MODELID

1 2

12

R2739

R2739

100KR2F-L1-GP

100KR2F-L1-GP

2 OF 2

2 OF 2

KBSOUT1/TCK
KBSOUT2/TMS

KBSOUT3/TDI

KBSOUT5/TDO

KBSOUT7
KBSOUT8

KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7

EC GPIO standard PH/PL

BAT_SCL
BAT_SDA

BAT_IN#
AC_IN#_KBC

0630 Modify:
Removed LID_CLOSE#
PH 10K on RN2705.

S5_ENABLE

EC_ENABLE#_1

ECRST#

FAN_TACH 1

E51_RxD

BLUETOOTH _EN

R2769

R2769
100KR2J-1-GP

100KR2J-1-GP

RN2701

RN2701

4

SRN4K7J-8-G P

SRN4K7J-8-G P
RN2703

RN2703

4

SRN100KJ-6-G P

SRN100KJ-6-G P

X01

RN2705

RN2705

4

SRN10KJ-5-G P

SRN10KJ-5-G P

R2713 10KR2J-3-G PR2713 10KR2J- 3-GP

1 2

1 2

1 2

1 2

2

23
1

1
23

1

DY

DY

23

R2712

R2712

10KR2J-3-GP

10KR2J-3-GP

R2708 10KR2J- 3-GP

R2708 10KR2J- 3-GP

DY

DY

R2709 10KR2J- 3-GPR 2709 10KR2J-3- GP

3D3V_AUX_KBC

3D3V_S0

MODEL_ID_DET(GPIO07)

DV14_DIS
Reserved
DV15_UMA
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KCOL16

34

<------AMD Dont Have BL Keybo ard

33

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

KB_DET#

X02

EC_SMI#18

1

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K

100.0K 143.0K

100.0K

KCOL[0..16] 69

KROW[0..7] 69

R2770

R2770

1 2

100KR2J-1-GP

100KR2J-1-GP

R27830R0402-PAD R27830R0402-PAD

1 2

D2705

D2705

1

DY

DY

2

BAS16-6-GP

BAS16-6-GP

83.00016.K11

83.00016.K11

2ND = 83.00016.F11

2ND = 83.00016.F11

ECSMI#_KBC

3

<Core Desig n>

<Core Desig n>

<Core Desig n>

Title

Title

Title

KBC Nuvoton NPCE795PA0DX

KBC Nuvoton NPCE795PA0DX

KBC Nuvoton NPCE795PA0DX

Size D ocument Numb er Rev

Size D ocument Numb er Rev

Size D ocument Numb er Rev

A2

A2

A2

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Date: Sheet of

Date: Sheet of

Date: Sheet of

10.0K

20.0K

33.0K

47.0K

64.9K

76.8K

100.0K

174.0K

215.0K100.0K

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin T ai Wu Rd ., Hsichih,
Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

Taipei Hsie n 221, Taiwan, R.O. C.

27 109Friday, April 22 , 2011

27 109Friday, April 22 , 2011

1

27 109Friday, April 22 , 2011

VOLTAGEPULL-HIGH RESISTORPULL-LOW RESISTOR

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65V

1.358V

1.204V

1.048V

A00

A00

A00

5

SSID = Thermal

X01

3D3V_AUX_KBC

4

3

2

1

Fan controller P2793

0721 Pull-down: full speed, R2830 dummy.

R2828

R2828

NTC-100K-8-GP

NTC-100K-8-GP

DY

DY

R2802

R2802

1 2

0R0402-PAD

0R0402-PAD

12

3D3V_S0

D D

C C

3D3V_S0_thermal

12

12

C2827

C2827

C2830

C2830

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

12

1 2

R2823

R2823

SCD1U10V2KX-5GP

P2800_DXP

SC390P50V3JN-GP

SC390P50V3JN-GP

C2829

C2829

P2800_DXN

X01

0R0402-PAD

0R0402-PAD

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

12

C2828

C2828

Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.

2ND = 84.03904.P11

2ND = 84.03904.P11

3

84.03904.L06

84.03904.L06

Q2808

Q2808

1

PMBS3904-1-GP

PMBS3904-1-GP

2

2.System Sensor, Put on palm rest

THERM_SYS_SHDN#

X02

12

DY

DY

ADJ

12

R2817

R2817

0R2J-2-GP

0R2J-2-GP

3D3V_S0_thermal

T8_P2800

1.H/W T8 Shutdown

R2816

R2816
107KR2F-GP

107KR2F-GP

12

C2831

C2831

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

X01

U2801

U2801

5

VCC

6

DXP

7

DXN

8

OTZ

P2800EB0-GP

P2800EB0-GP

74.02800.B71

TDR

TDL

GND

ADJ

R2830

1 2

5V_S0

FAN1_DAC27

R2829

R2829

DY

DY

1 2

0R0402-PAD

0R0402-PAD

FAN_VCC

4
3
2

ADJ

1

SYS_THRM 27
CPU_THRM 27

5V_S0

FAN_TACH127

R2819

R2819

1 2

0R2J-2-GP

0R2J-2-GP

R2830

DY

DY

0R2J-2-GP

0R2J-2-GP

FAN_VCC

3D3V_S0

12

R2820

R2820
10KR2J-3-GP

10KR2J-3-GP

DY

DY

*Layout* 15 mil

X02

12

12

C2815

C2815

DY

DY

ADJ floating : OTZ shutdown temperature=85°C

SCD1U16V2KX-3GP

ADJ pull-down : OTZ shutdown temperature=90°C

SCD1U16V2KX-3GP

ADJ pull-up : OTZ shutdown temperature=95°C

D2801

D2801

BAT54PT-GP

BAT54PT-GP

83.00054.T81

83.00054.T81

2ND = 83.BAT54.D81

2ND = 83.BAT54.D81

3rd = 83.BAT54.S81

3rd = 83.BAT54.S81

X02

VGA Thermal sensor P2800

PURE_HW _SHUTDOWN#27,36,85

12

R2818

R2818

DY

10KR2J-3-GP

10KR2J-3-GP

DY

U2802

U2802

1
2
3

P2793AB0-GP

P2793AB0-GP

FAN_TACH1_C

21

C2816

C2816

DY

DY

2ND = 83.R5003.H8H

2ND = 83.R5003.H8H

3rd = 83.5R003.08F

3rd = 83.5R003.08F

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

3D3V_AUX_S5

3

DY

DY

1

12

C2811

C2811
SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

DY

FON#

GND

VIN

GND

VOUT

GND

VSET4GND

AFTP2802

AFTP2802
AFTE14P-GP

AFTE14P-GP

1

FAN_VCC

D2802

D2802

CH551H-30PT-GP

CH551H-30PT-GP

83.R5003.C8F

83.R5003.C8F

Q2805

2

Q2805

D

2nd = 84.07002.I31

8
7
6
5

AFTP2803

AFTP2803
AFTE14P-GP

AFTE14P-GP

FAN_VCC

12

C2817

C2817

DY

DY

SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

S

2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

G

1

5V_S0

X02

12

C2818

C2818

DY

DY

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

FAN1

FAN1

5
3
2

AFTE14P-GP

AFTE14P-GP

1 2

1
4

FOX-CON3-6-GP-U

FOX-CON3-6-GP-U

20.D0210.103

3D3V_S0

12

1

AFTP2801

AFTP2801

THERM_SYS_SHDN#

R2810 0R0402-PADR2810 0R0402-PAD

12

C2832

C2832

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

R2831

R2831
100KR2J-1-GP

100KR2J-1-GP

3D3V_S0

X02

B B

P2800_VGA_DXP85

Layout notice :
Both DXN and DXP routing 10 mil
trace width and 10 mil spacing.

P2800_VGA_DXN85

3D3V_S0

P2800_VGA_DXP

P2800_VGA_DXN

R2814

R2814

1 2

DY

DY

0806 Rename

3D3V_VGA_S0_thermal

0R2J-2-GP

0R2J-2-GP

DY

DY

0806 Rename

12

DY

DY

C2812

C2812
SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

12

C2813

C2813

DY

DY

3D3V_VGA_S0_thermal

12

C2814

C2814

U2803

U2803

5

VCC
DXP

DY

DY

DXN
OTZ

P2800EB0-GP

P2800EB0-GP

TDR

TDL

GND

ADJ

6
7
8

74.02800.B71

4
3
2
1

DY

DY

12

R2815

R2815
100KR2J-1-GP

100KR2J-1-GP

VGA_THRM 27

0809 Vendor review and pop

11/4 Vendor recommand

THERM_SYS_SHDN# T8_G709

1 2

DY

DY

R2811 0R2J-2-GP

R2811 0R2J-2-GP

86.9 ℃

℃

℃℃

R2812

R2812

12

DY

DY

24K3R2F-1-GP

24K3R2F-1-GP

ADJ_G709

R2813

R2813

1 2

DY

DY

3D3V_S0

470KR2J-2-GP

470KR2J-2-GP

U2805

U2805

1

SET

2

GND
OUT#3HYST

G709T1UF-GP

G709T1UF-GP

DY

DY

5

VCC

4

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2808

C2808

12

DY

DY

DY

DY

R2805

R2805

150R2F-1-GP

150R2F-1-GP

DY

DY

R2832

R2832

1 2

0R2J-2-GP

0R2J-2-GP

12

R2861

R2861
0R2J-2-GP

0R2J-2-GP

DY

DY

1 2

SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

A A

5

4

www.bblianmeng.com

3

R(KΩ)= 0.0012*T^2- 0.9308T+ 96.147

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Thermal/Fan Controllor EMC2102

Thermal/Fan Controllor EMC2102

Thermal/Fan Controllor EMC2102

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

Taipei Hsien 221, Taiwan, R.O.C.

28 109Friday, April 22, 2011

28 109Friday, April 22, 2011

28 109Friday, April 22, 2011

1

A00

A00

A00

5

SSID = AUDIO

D D

0625 Modify:
AUD_DMIC_CLK&AUD_DMIC_IN0 connector
to LVDS pin define.

3D3V_S0

Close to codec

12

C2903

C2903

C2904

C2904

1 2

1 2

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C C

3D3V_S0

12

R2908

R2908
10KR2J-3-GP

10KR2J-3-GP

AMP_MUTE#

AUD_VREFOUT_B
HDA_CODEC_BITCLK

12

C2923

C2923

SC1U10V2KX-1GP

SC1U10V2KX-1GP

B B

12

C2907

C2907

DY

DY

SC4D7P50V2CN-1GP

SC4D7P50V2CN-1GP

HDA_CODEC_SDOUT18
HDA_CODEC_BITCLK18

HDA_SDIN018

HDA_CODEC_SYNC18
HDA_CODEC_RST#18

C2902

C2902

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

AUD_PC_BEEP
Trace width>15 mils

4

AMP_MUTE#27

AMP_MUTE#

Close to codec

AUD_DVDDCORE

12

C2901

C2901
SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1
2

HDA_CODEC_SDOUT
HDA_CODEC_BITCLK
HDA_CODEC_SDIN0

R2901

R2901

1 2

33R2J-2-GP

33R2J-2-GP

0707 Modify:
updated U2901 part number from data base.

HDA_CODEC_SYNC
HDA_CODEC_RST#
AUD_PC_BEEP

2010/06/30 Change to 92HD87 (71.92H87.A03)

3
4
5
6
7
8
9

10

92HD87B1A5NDGXTBX8-GP

92HD87B1A5NDGXTBX8-GP

0730 Add internal MIC

C2912 SCD1U10V2KX-5GPC2912 SCD1U10V2KX-5GP
C2913 SCD1U10V2KX-5GPC2913 SCD1U10V2KX-5GP

12
12

U2901

U2901

DVDD_LV
DMIC_CLK/GPIO_1
DMIC_0/GPIO_2
SDATA_OUT
BITCLK
SDATA_IN
DVDD
SYNC
RESET#
PCBEEP

SB_SPKR_RAUD_PC_BEEP
KBC_BEEP_R

+PVDD

35

36

37

38

39

40

41

PVSS

EAPD

PVDD

PORTD_-R

PORTD_+R

THERMAL_PAD

71.92H87.A03

71.92H87.A03

SENSE_A11SENSE_B12PORTF_L13PORTF_R14PORTC_L15PORTC_R16VREFFILT17CAP218VREFOUT_A19VREFOUT_C

AUD_SENSE_A

AUD_SENSE_B

AUD_PC_BEEP

SC1U10V3KX-3GP

SC1U10V3KX-3GP

120KR2J-L-GP

120KR2J-L-GP

R2909

R2909

1 2
1 2

R2910 470KR2J-2-GPR2910 470KR2J-2-GP

3

AUD_SPK_R+
AUD_SPK_R­AUD_SPK_L­AUD_SPK_L+

+AVDD

AUD_AGND

AUD_VREG

31

32

33

34

PVDD

AVDD2

PORTD_-L

PORTD_+L

VREG/+2_5V

CAP+

CAP-

V-

AVSS2

PORTB_R

PORTB_L

AVSS2

PORTA_R

PORTA_L

AVDD1

20

0809 Vendor recommand

R2920

R2920

1 2

2K2R2J-2-GP

2K2R2J-2-GP

AUD_CAP2

AUD_VREFFLT

AUD_VREFOUT_B

AUD_VREFOUT_B

C2924

C2924

12

From SB

HDA_SPKR 18

KBC_BEEP 27

From EC

AUD_SPK_R+ 58

AUD_SPK_R- 58

AUD_SPK_L- 58

AUD_SPK_L+ 58

PUMP_CAPP

30
29
28
27
26
25
24
23
22
21

INT_MIC_L_R

INT_MIC_L_R 58,82

PUMP_CAPN
AUD_V_B

AUD_HP1_JACK_R
AUD_HP1_JACK_L

AUD_EXT_MIC_R
AUD_EXT_MIC_L

2

+AVDD

+AVDD

C2905

C2905

1 2

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2914

C2914
SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

1 2

R2906 60D4R2F-GPR2906 60D4R2F-GP
R2905 60D4R2F-GPR2905 60D4R2F-GP

C2922 SC1U10V3KX-3GPC2922 SC1U10V3KX-3GP
C2921 SC1U10V3KX-3GPC2921 SC1U10V3KX-3GP

R2902 0R0603-PADR2902 0R0603-PAD

12

C2906

C2906

SC1U10V2KX-1GP

SC1U10V2KX-1GP

AUD_AGND

CLOSE TO CODEC

1 2
1 2

12
12

1 2

Put C2921 and C2922 close to codec

0707 Modify:
Change R2911,R2914,R2917 change
to 0ohm 0603 from short pad.

R2911 0R0603-PADR2911 0R0603-PAD

1 2

R2914 0R0603-PADR2914 0R0603-PAD

1 2

R2917 0R0603-PADR2917 0R0603-PAD

1 2

12

12

C2909

C2909

C2910

C2910

SC1U10V2KX-1GP

SC1U10V2KX-1GP

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

AUD_AGND

12

C2917

C2917

SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

AUD_AGND AUD_AGND AUD_AGND AUD_AGND

Close to codec

AUD_AGND

C2908

C2908

1 2

AUD_HP1_JACK_R2 82

AUD_HP1_JACK_L2 82

AUD_AGND

MIC_IN_R 82
MIC_IN_L 82

AUD_CAP2
AUD_VREFFLT
AUD_V_B
AUD_VREG

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

MIC IN

0719 Modify:
Move RN2901 to closed AUDIO CODEC from speaker connector.

AUD_VREFOUT_B

RN2901

RN2901

SRN4K7J-8-GP

SRN4K7J-8-GP

1

R2903 0R0603-PADR2903 0R0603-PAD

1 2

R2904 0R0603-PADR2904 0R0603-PAD

1 2

12

C2918

C2918

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

23

5V_S05V_S0 +PVDD

12

C2915

C2915

SC10U6D3V5MX-3GP

SC10U6D3V5MX-3GP

1

4

12

C2916

C2916

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

Azalia I/F EMI

HDA_CODEC_SDOUT

12

R2912

R2912
47R2J-2-GP

47R2J-2-GP

DY

DY

PCH_AZ_CODEC_SDOUT1

A A

12

C2920

C2920

DY

DY

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

5

AUD_SENSE_A

+AVDD

12

R2915

R2915
2K49R2F-GP

2K49R2F-GP

12

C2919

C2919
SC1000P50V3JN-GP-U

SC1000P50V3JN-GP-U

AUD_AGND

Close to Pin13

R2913

R2913

1 2

20KR2F-L-GP

20KR2F-L-GP

R2919

R2919

39K2R2F-L-GP

39K2R2F-L-GP

12

AUD_HP1_JD# 82

AUD_SENSE_B

EXT_MIC_JD# 82

Close to Pin14

4

www.bblianmeng.com

3

+AVDD

12

12

AUD_AGND

R2916

R2916
2K49R2F-GP

2K49R2F-GP

R2918

R2918
20KR2F-L-GP

20KR2F-L-GP

2

MIC_IN_R82
MIC_IN_L82

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Audio Codec 92HD87B1

Audio Codec 92HD87B1

Audio Codec 92HD87B1

Taipei Hsien 221, Taiwan, R.O.C.

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

A00

A00

29 109Friday, April 22, 2011

29 109Friday, April 22, 2011

29 109Friday, April 22, 2011

A00

5

D D

C C

4

3

2

1

B B

A A

5

4

www.bblianmeng.com

3

2

<Core Design>

<Core Design>

<Core Design>

Wistron Corporation

Wistron Corporation

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Title

Title

Size Document Number Rev

Size Document Number Rev

Size Document Number Rev

A3

A3

A3

Date: Sheet of

Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

AMP

AMP

AMP

Enrico 14 AMD

Enrico 14 AMD

Enrico 14 AMD

1

30 109Friday, April 22, 2011

30 109Friday, April 22, 2011

30 109Friday, April 22, 2011

A00

A00

A00