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Ansenal DJ1 UMA Schematics Document
D D
AMD Danube CPU S1G4
RS880M + SB820M
C C
2010-05-25
REV : A00
B B
A A
5
4
DY : Nopop Component
http://hobi-elektronika.net
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Cover Page
Cover Page
Cover Page
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
19 0 Tuesday, May 25, 2010
19 0 Tuesday, May 25, 2010
19 0 Tuesday, May 25, 2010
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Project code : 91.4EK01.001
PCB P/N : 09940
Revision : SC
D D
4
3
Ansenal DJ1 AMD UMA Block Diagram
AMD S1G4
CPU
OUT
8,9,10,11
HyperTransport
16X16
IN
DDR III 800
DDR III 800
DDRIII
800/1066
DDRIII
800/1066
DIMM1
18
DIMM2
19
2
1
CHARGER
BQ24745RHDR
INPUTS
+DC_IN_SS
+CHAGER_SRC
OUTPUTS
+PWR_SRC
SYSTEM DC/DC
RT8205BGQW-GP
INPUTS
+PWR_SRC
OUTPUTS
+5V_ALW2
+3.3V_RTC_LDO
+5V_ALW
+3.3V_ALW
46
SYSTEM DC/DC
RT8209EGQW
50
INPUTS OUTPUTS
RT9025
+1.1V_RUN +PWR_SRC
OUTPUTS
+VCC_CORE
+VDDNB
OUTPUTS
+1.5V_SUS
OUTPUTS
+1.8V_RUN
42,53
OUTPUTS
+3.3V_RUN +3.3V_ALW
48,51
+1.1V_ALW
+CPU_VDDR +1.5V_SUS
47
49
52
CRT
LCD
C C
55
54
RGB CRT
LVDS(Single Channel)
North Bridge
AMD RS880M
CPU I/F LVDS, CRT I/F
INTEGRATED GRAHPICS
12,13,14,15
A-LINK
4X4
PCIE x 1
USB 2.0 x 1
PCIE x 1
USB 2.0 x 1
I/O Board
Connector
76
10/100 NIC
ATHEROS AR8132
Left Side:
USB x 1
Mini-Card
802.11a/b/g
RJ45
CONN
CPU CORE
ISL6265AHRTZ-T-GP
INPUTS
+PWR_SRC
DDR III SUS&VTT
RT8207GQW-GP
INPUTS
+PWR_SRC
SYSTEM DC/DC
APL5930KAI
INPUTS
CardReader
SD/SDIO/MMC
MS/MS Pro/xD
B B
Internal Analog MIC
44
MIC IN
HP OUT
Realtek
RTS5138
Azalia
CODEC
&
OP AMP
92HD79B
32
30
2CH SPEAKER
USB2.0
AZALIA
South Bridge
AMD SB820M
14 USB 2.0 ports
ETHERNET (10/100/1000Mb)
High Definition Audio
4 PCIE GPP
6 SATA ports
ACPI 1.1
LPC I/F
PCI/PCI BRIDGE
SATA
20,21,22,23,24
SATA
USB 2.0
SPI
LPC Bus
KBC
NUVOTON
NPCE781BA0DX
USB 2.0 x 1
USB 2.0 x 1
USB 2.0 x 1
37
CAMERA
(Option)
Bluetooth
Right Side:
USB x 1
+3.3V_ALW
SYSTEM DC/DC
Swithes/RT9013
INPUTS
73
73
+5V_ALW +5V_RUN
+1.5V_SUS +1.5V_RUN
+3.3V_RUN +2.5V_RUN
SYSTEM DC/DC
INPUTS OUTPUTS
63
+3.3V_ALW
PCB LAYER
L1: Top
L2: VCC
L3: Signal
L4: Signal
L5: GND
A A
HDD
ODD
59 59
http://hobi-elektronika.net
5
4
Flash ROM
2MB
3
Touch
PAD
62 68 25
68
KB
Thermal Int.
EMC2102
Fan
58
2
39
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
L6: Bottom
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
29 0 Thursday, May 13, 2010
29 0 Thursday, May 13, 2010
29 0 Thursday, May 13, 2010
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Page 3
A
B
C
D
E
Power Shape
Power Block Diagram
Regulator LDO Switch
4 4
Adapter
AO4407A
Battery
3 3
77.5mA
+3.3V_RTC_LDO
+PWR_SRC
Charger
+PBATT
G547F2P81U
+5V_USB1
RT8205BGQW
+5V_ALW
AO4468
6257.3mA 2000mA 2000mA
+5V_RUN
36A 4A 17868mA
10337mA
G547F2P81U
+5V_USB2
ISL6265AHRTZ RT8207GQW RT8209EGQW
+VCC_CORE
+VDDNB(CPU)
+5V_ALW2
AO4468
+3.3V_RUN
+1.1V_RUN
+3.3V_ALW
5966mA
8774mA
PA102FMG
201mA 1320mA
+3.3V_LAN
APL5930
+1.8V_RUN
RT9025
1250mA
VDDR(CPU)
RT9025-25PSP
+1.1V_ALW
1000mA
+0.75V_DDR_VTT
572mA
13480mA
+1.5V_SUS
AO4468
1230mA
+1.5V_RUN
2 2
RESISTER
RESISTER
60mA 1370mA
+PVDD
1 1
A
+AVDD
G5285T11U
606mA 250mA
+LCDVDD
B
RTS5138
+3.3V_RUN_CARD
RT9013-25PB
+2.5V_RUN
http://hobi-elektronika.net
C
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
D
Date: Sheet
Power Block Diagram
Power Block Diagram
Power Block Diagram
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
39 0 Thursday, May 13, 2010
39 0 Thursday, May 13, 2010
39 0 Thursday, May 13, 2010
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SB820M SMBus Block Diagram
D D
+3.3V_RUN
SRN2K2J
SB820M
C C
SCL3_LV/IMC_GPIO13
SDA3_LV/IMC_GPIO14
SCL0
SDA0
SCL1
SDA1
SCL2
SDA2
SB_SMBCLK
SB_SMBDATA
SMB_CLK
SMB_DATA
SCL2
SDA2
CPU_SIC
CPU_SID
+3.3V_ALW
SRN10K2J
+3.3V_ALW
SRN10K2J
SB_SMBCLK
SB_SMBDATA
SB_SMBCLK
SB_SMBDATA
SB_SMBCLK
SB_SMBDATA
DIMM 1
SCL
SDA
SMBus Address:A0
DIMM 2
SCL
SDA
SMBus Address:A4
MINI CARD
SMB_CLK
SMB_DATA
NPCE781
KBC SMBus Block Diagram
+5V_RUN
SRN10KJ-5-GP
PSDAT1
KBC
PSCLK1
GPIO61/SCL2
GPIO62/SDA2
SCL1
SDA1
TPDATA
TPCLK
BAT_SCL
BAT_SDA
KBC_SCL1
KBC_SDA1
+KBC_PWR
+KBC_PWR
SRN4K7J-8-GP
SRN4K7J-8-GP
SRN100J-3-GP
2N7002SPT
PBAT_SMBCLK1
PBAT_SMBDAT1
TPDATA
TPCLK
Battery Conn.
CLK_SMB
DAT_SMB
BQ24745RHDR
SCL
SDA
+3.3V_RUN
+3.3V_RUN
TouchPad Conn.
TPDATA
TPCLK
(In I/O Board)
(In I/O Board)
SRN4K7J-8-GP
Thermal
THERM_SCL
SCL
THERM_SDA
SDA
SMBus address:16
SMBus address:12
SMBus address:7A
B B
+1.5V_SUS
SRN1K2J
CPU_SIC
CPU_SID
CPU S1G4
SIC
SID
I2C_CLK
I2C_DATA
LDDC_CLK
LDDC_DATA
+3.3V_RUN
4K7R2J-2-GP
LCD Conn.
SMBus address:98
RS880M
A A
DAC_SCL
DDC_CLK_CON
DAC_SDA
DDC_DATA_CON
5
4
http://hobi-elektronika.net
3
+5V_CRT_RUN
4K7R2J-2-GP
CRT CONN
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
SMBUS BLOCK DIAGRAM
SMBUS BLOCK DIAGRAM
SMBUS BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
49 0 Thursday, May 13, 2010
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D D
C C
Thermal Block Diagram
CPU
DP1
DN1
H_THERMDA
SC470P50V3JN-2GP
H_THERMDC
THERMDA
THERMDC
Thermal
EMC2102
DP2
DN2
EMC2102_DP2
SC470P50V3JN-2GP
EMC2102_DN2
System sensor, put
PMBS3904
Audio Block Diagram
SPKR_PORT_D_L+
SPKR_PORT_D_L-
SPKR_PORT_D_R-
SPKR_PORT_D_R+
HP1_PORT_B_L
HP1_PORT_B_R
Codec
92HD79
VREFOUT_A_OR_F
HP0_PORT_A_L
HP0_PORT_A_R
AUD_SPK_L+
AUD_SPK_L-
AUD_SPK_R-
AUD_SPK_R+
AUD_HP1_JACK_L
AUD_HP1_JACK_R
AUD_VREFOUT_B
AUD_EXT_MIC_L
AUD_EXT_MIC_R
60D4R2F
60D4R2F
4K7R2J-2-GP
4K7R2J-2-GP
Bead
Bead
AUD_HP1_JACK_L1
AUD_HP1_JACK_R1
SPEAKER
60
HP
OUT
60
MIC
IN
60
near DIMM.
B B
EMC2102_DP3
DP3
SC470P50V3JN-2GP
EMC2102_DN3
DN3
System sensor, put
CPU.
A A
5
4
PMBS3904
http://hobi-elektronika.net
3
PORT_C_L
PORT_C_R
VREFOUT_C
AUD_INT_MIC_R_L
AUD_INT_MIC_R_L
AUD_VREFOUT_C
30
4K7R2J-2-GP
SC1U10V3KX-3GP
2
INT_MIC_L_R
Internal
MIC
60
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
THERMAL/AUDIO BLOCK DIAGRAM
THERMAL/AUDIO BLOCK DIAGRAM
THERMAL/AUDIO BLOCK DIAGRAM
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
59 0 Thursday, May 13, 2010
59 0 Thursday, May 13, 2010
59 0 Thursday, May 13, 2010
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SB820M Strapping
Capture from 45484 Rev. 1.02 AMD SB8xx-Series Southbridge Design Guide
Name Strap Name Schematic Note
LPCCLK0
D D
EC_PWM3
EC_PWM2
LPCCLK1
PCICLK1
C C
ECEnableStrap
{ROMTYPE_1,
ROMTYPE_0 }
CLKGEN
BIF_GEN2_
COMPLIANCE_Strap
Embedded Controller (EC)
0 V – Disabled
*
3.3 V - Enabled
ROMTYPE_1 ROMTYPE_0 ROM TYPE
3.3V 0V
3.3V 3.3V
0V 0V
0V 3.3V
*
LPC ROM
(supports both LPC and PMC ROM types)
Defines clock generator
External clock mode: Use 100-MHz PCIeR
0V –
clock as reference clock and generate i
nternal clocks only.
Integrated clock mode: Use 25-MHz crystal
3.3V–
*
clock and generate both internal and external clocks
Set PCIe to Gen II mode
Force PCIe interface at Gen I mode
0V–
PCIe interfacce is at Gen II mode
3.3V-
*
Not Applicable to SB820M but provision for
pull-down is required.
SPI ROM
Reserved
Firmware Hub
NB880M Strapping
Capture from 46113_rs880m_ds_nda_1.03
DAC_VSYNC
DAC_HSYNC
SUS_STAT#
STRAP_DEBUG_BUS_GPIO
_ENABLE#
SIDE_PORT_EN#
LOAD_EEPROM_STRAPS#
Schematic Note Strap Function Name
Enables debug bus access
through memory I/O pads and GPIOs.
0: Enable
1: Disable
*
Indicates if memory side-port is available or not
0: Available
1: Not available
*
Selects loading of strap values from EEPROM.
0: I2C master can load strap values from EEPROM if
connected, or use default values if EEPROM is not
connected. Please refer to RS880M's reference
schematics for system level implementation details.
1: Use default values
*
Watchdog function
PCICLK2 BootFailTmrEn
*
Disable the boot fail timer function
0V–
Enable the boot fail timer function
3.3V-
Default Debug Straps
PCICLK3 DefaultStrapMode
*
Disable Debug Straps.
0V–
Select external Debug Straps
3.3V–
CPU/NB HT Clock Selection
PCICLK4 CPUClkSel
*
0V–
Required setting for integrated clock mode.
3.3V–
This strap is not used if the strap CLKGEN is
configured for external clock generator mode.
Reserved.
Slow down core clock for low power platform.
AZ_SDOUT CoreSpeedMode
B B
*
0V–
3.3V-
Performance mode
Low Power mode
USB Table
PCIE Routing
USB
Pair
0
1
2
3
4
5
6
7
8
9
10
A A
11
12
13
Device
USB1
USB3
USB2 (I/O Board)
Reserve
WLAN
Reserve
Reserve
Reserve
Reserve
BLUETOOTH
CARD READER
CAMERA
Reserve
Reserve
5
LANE0
LANE1
LAN
MiniCard WLAN
4
http://hobi-elektronika.net
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Table of Content
Table of Content
Table of Content
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
69 0 Thursday, May 13, 2010
69 0 Thursday, May 13, 2010
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Clock Generator ICS9LPRS480
Clock Generator ICS9LPRS480
Clock Generator ICS9LPRS480
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
79 0 Thursday, May 13, 2010
79 0 Thursday, May 13, 2010
79 0 Thursday, May 13, 2010
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SSID = CPU
D D
+1.1V_RUN
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
C C
B B
Place close to socket 1.1V(1.5A) for VLDT
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C801
C801
C802
C802
1 2
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C803
C803
1 2
1 2
C804
C804
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C805
C805
1 2
1 2
HT_NB_CPU_CAD_H0 12
HT_NB_CPU_CAD_L0 12
HT_NB_CPU_CAD_H1 12
HT_NB_CPU_CAD_L1 12
HT_NB_CPU_CAD_H2 12
HT_NB_CPU_CAD_L2 12
HT_NB_CPU_CAD_H3 12
HT_NB_CPU_CAD_L3 12
HT_NB_CPU_CAD_H4 12
HT_NB_CPU_CAD_L4 12
HT_NB_CPU_CAD_H5 12
HT_NB_CPU_CAD_L5 12
HT_NB_CPU_CAD_H6 12
HT_NB_CPU_CAD_L6 12
HT_NB_CPU_CAD_H7 12
HT_NB_CPU_CAD_L7 12
HT_NB_CPU_CAD_H8 12
HT_NB_CPU_CAD_L8 12
HT_NB_CPU_CAD_H9 12
HT_NB_CPU_CAD_L9 12
HT_NB_CPU_CAD_H10 12
HT_NB_CPU_CAD_L10 12
HT_NB_CPU_CAD_H11 12
HT_NB_CPU_CAD_L11 12
HT_NB_CPU_CAD_H12 12
HT_NB_CPU_CAD_L12 12
HT_NB_CPU_CAD_H13 12
HT_NB_CPU_CAD_L13 12
HT_NB_CPU_CAD_H14 12
HT_NB_CPU_CAD_L14 12
HT_NB_CPU_CAD_H15 12
HT_NB_CPU_CAD_L15 12
HT_NB_CPU_CLK_H0 12
HT_NB_CPU_CLK_L0 12
HT_NB_CPU_CLK_H1 12
HT_NB_CPU_CLK_L1 12
HT_NB_CPU_CTL_H0 12
HT_NB_CPU_CTL_L0 12
HT_NB_CPU_CTL_H1 12
HT_NB_CPU_CTL_L1 12
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C806
C806
1 2
C807
C807
CPU1A
CPU1A
D1
VLDT_A0
D2
VLDT_A1
D3
VLDT_A2
D4
VLDT_A3
E3
L0_CADIN_H0
E2
L0_CADIN_L0
E1
L0_CADIN_H1
F1
L0_CADIN_L1
G3
L0_CADIN_H2
G2
L0_CADIN_L2
G1
L0_CADIN_H3
H1
L0_CADIN_L3
J1
L0_CADIN_H4
K1
L0_CADIN_L4
L3
L0_CADIN_H5
L2
L0_CADIN_L5
L1
L0_CADIN_H6
M1
L0_CADIN_L6
N3
L0_CADIN_H7
N2
L0_CADIN_L7
E5
L0_CADIN_H8
F5
L0_CADIN_L8
F3
L0_CADIN_H9
F4
L0_CADIN_L9
G5
L0_CADIN_H10
H5
L0_CADIN_L10
H3
L0_CADIN_H11
H4
L0_CADIN_L11
K3
L0_CADIN_H12
K4
L0_CADIN_L12
L5
L0_CADIN_H13
M5
L0_CADIN_L13
M3
L0_CADIN_H14
M4
L0_CADIN_L14
N5
L0_CADIN_H15
P5
L0_CADIN_L15
J3
L0_CLKIN_H0
J2
L0_CLKIN_L0
J5
L0_CLKIN_H1
K5
L0_CLKIN_L1
N1
L0_CTLIN_H0
P1
L0_CTLIN_L0
P3
L0_CTLIN_H1
P4
L0_CTLIN_L1
DANUB
DANUB
DANUBE
DANUBE
L0_CADOUT_H0
L0_CADOUT_L0
L0_CADOUT_H1
L0_CADOUT_L1
L0_CADOUT_H2
L0_CADOUT_L2
L0_CADOUT_H3
L0_CADOUT_L3
L0_CADOUT_H4
L0_CADOUT_L4
L0_CADOUT_H5
L0_CADOUT_L5
L0_CADOUT_H6
L0_CADOUT_L6
L0_CADOUT_H7
L0_CADOUT_L7
L0_CADOUT_H8
L0_CADOUT_L8
L0_CADOUT_H9
L0_CADOUT_L9
L0_CADOUT_H10
L0_CADOUT_L10
L0_CADOUT_H11
L0_CADOUT_L11
L0_CADOUT_H12
L0_CADOUT_L12
L0_CADOUT_H13
L0_CADOUT_L13
L0_CADOUT_H14
L0_CADOUT_L14
L0_CADOUT_H15
L0_CADOUT_L15
L0_CLKOUT_H0
L0_CLKOUT_L0
L0_CLKOUT_H1
L0_CLKOUT_L1
L0_CTLOUT_H0
L0_CTLOUT_L0
L0_CTLOUT_H1
L0_CTLOUT_L1
1 OF 6
1 OF 6
VLDT_B0
VLDT_B1
VLDT_B2
VLDT_B3
AE2
AE3
AE4
AE5
AD1
AC1
AC2
AC3
AB1
AA1
AA2
AA3
W2
W3
V1
U1
U2
U3
T1
R1
AD4
AD3
AD5
AC5
AB4
AB3
AB5
AA5
Y5
W5
V4
V3
V5
U5
T4
T3
Y1
W1
Y4
Y3
R2
R3
T5
R5
HT_CPU_NB_CAD_H0 12
HT_CPU_NB_CAD_L0 12
HT_CPU_NB_CAD_H1 12
HT_CPU_NB_CAD_L1 12
HT_CPU_NB_CAD_H2 12
HT_CPU_NB_CAD_L2 12
HT_CPU_NB_CAD_H3 12
HT_CPU_NB_CAD_L3 12
HT_CPU_NB_CAD_H4 12
HT_CPU_NB_CAD_L4 12
HT_CPU_NB_CAD_H5 12
HT_CPU_NB_CAD_L5 12
HT_CPU_NB_CAD_H6 12
HT_CPU_NB_CAD_L6 12
HT_CPU_NB_CAD_H7 12
HT_CPU_NB_CAD_L7 12
HT_CPU_NB_CAD_H8 12
HT_CPU_NB_CAD_L8 12
HT_CPU_NB_CAD_H9 12
HT_CPU_NB_CAD_L9 12
HT_CPU_NB_CAD_H10 12
HT_CPU_NB_CAD_L10 12
HT_CPU_NB_CAD_H11 12
HT_CPU_NB_CAD_L11 12
HT_CPU_NB_CAD_H12 12
HT_CPU_NB_CAD_L12 12
HT_CPU_NB_CAD_H13 12
HT_CPU_NB_CAD_L13 12
HT_CPU_NB_CAD_H14 12
HT_CPU_NB_CAD_L14 12
HT_CPU_NB_CAD_H15 12
HT_CPU_NB_CAD_L15 12
HT_CPU_NB_CLK_H0 12
HT_CPU_NB_CLK_L0 12
HT_CPU_NB_CLK_H1 12
HT_CPU_NB_CLK_L1 12
HT_CPU_NB_CTL_H0 12
HT_CPU_NB_CTL_L0 12
HT_CPU_NB_CTL_H1 12
HT_CPU_NB_CTL_L1 12
SKT-BGA638H176
1'nd 62.10055.111
2'nd 62.10055.171
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
CPU_HT_LINK I/F_(1/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
89 0 Thursday, May 27, 2010
89 0 Thursday, May 27, 2010
89 0 Thursday, May 27, 2010
1
of
A00
A00
A00
Page 9
5
4
3
2
1
SSID = CPU
3 OF 6
G12
F12
H14
G14
H11
H12
C13
E13
H15
E15
E17
H17
E14
F14
C17
G17
G18
C19
D22
E20
E18
F18
B22
C23
F20
F22
H24
E21
E22
H20
H22
Y24
AB24
AB22
AA21
W22
W21
Y22
AA22
Y20
AA20
AA18
AB18
AB21
AD21
AD19
Y18
AD17
W16
W14
Y14
Y17
AB17
AB15
AD15
AB13
AD13
Y12
W11
AB14
AA14
AB12
AA12
E12
C15
E19
F24
AC24
Y19
AB16
Y13
G13
H13
G16
G15
C22
C21
G22
G21
AD23
AC23
AB19
AB20
Y15
W15
W12
W13
J19
3 OF 6
MA_DATA0
MA_DATA1
MA_DATA2
MA_DATA3
MA_DATA4
MA_DATA5
MA_DATA6
MA_DATA7
MA_DATA8
MA_DATA9
MA_DATA10
MA_DATA11
MA_DATA12
MA_DATA13
MA_DATA14
MA_DATA15
MA_DATA16
MA_DATA17
MA_DATA18
MA_DATA19
MA_DATA20
MA_DATA21
MA_DATA22
MA_DATA23
MA_DATA24
MA_DATA25
MA_DATA26
MA_DATA27
MA_DATA28
MA_DATA29
MA_DATA30
MA_DATA31
MA_DATA32
MA_DATA33
MA_DATA34
MA_DATA35
MA_DATA36
MA_DATA37
MA_DATA38
MA_DATA39
MA_DATA40
MA_DATA41
MA_DATA42
MA_DATA43
MA_DATA44
MA_DATA45
MA_DATA46
MA_DATA47
MA_DATA48
MA_DATA49
MA_DATA50
MA_DATA51
MA_DATA52
MA_DATA53
MA_DATA54
MA_DATA55
MA_DATA56
MA_DATA57
MA_DATA58
MA_DATA59
MA_DATA60
MA_DATA61
MA_DATA62
MA_DATA63
MA_DM0
MA_DM1
MA_DM2
MA_DM3
MA_DM4
MA_DM5
MA_DM6
MA_DM7
MA_DQS_H0
MA_DQS_L0
MA_DQS_H1
MA_DQS_L1
MA_DQS_H2
MA_DQS_L2
MA_DQS_H3
MA_DQS_L3
MA_DQS_H4
MA_DQS_L4
MA_DQS_H5
MA_DQS_L5
MA_DQS_H6
MA_DQS_L6
MA_DQS_H7
MA_DQS_L7
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C916
C916
1 2
DY
DY
C912
C912
M_A_DQ[63..0] 18
4.7UF*4
0.22UF*4
D D
+CPU_VDDR
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C901
C901
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C902
C902
1 2
C903
C903
1 2
Place near to CPU
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
C913
C913
C904
C904
1 2
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C914
C914
1 2
1 2
DY
DY
DY
DY
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C906
C906
C905
C905
1 2
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
C907
C907
1 2
1000PF*4
180PF*4
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
C915
C915
1 2
1 2
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
C908
C908
C909
C909
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C910
C910
1 2
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C911
C911
1 2
DY
DY
0.9V(1.25A) for VDDR
+CPU_VDDR
C C
+1.5V_SUS
R901 39D2R2F-L-GP R901 39D2R2F-L-GP
1 2
R903 39D2R2F-L-GP R903 39D2R2F-L-GP
1 2
1 2
B B
MEM_MA_ADD[0..15] 18
A A
DDR3_A_DRAMRST# 18
C917
C917
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
MEM_MA0_ODT0 18
MEM_MA0_ODT1 18
MEM_MA0_CS#0 18
MEM_MA0_CS#1 18
MEM_MA_CKE0 18
MEM_MA_CKE1 18
MEM_MA_CLK0_P 18
MEM_MA_CLK0_N 18
MEM_MA_CLK1_P 18
MEM_MA_CLK1_N 18
MEM_MA_BANK0 18
MEM_MA_BANK1 18
MEM_MA_BANK2 18
MEM_MA_RAS# 18
MEM_MA_CAS# 18
MEM_MA_WE# 18
MEMZP
MEMZN
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
0.9V--DDR1066
1.05V---DDR1333 (1.75A)
CPU1B
CPU1B
D10
VDDR
C10
VDDR
B10
VDDR
AD10
VDDR
AF10
MEMZP
AE10
MEMZN
H16
MA_RESET#
T19
MA0_ODT0
V22
MA0_ODT1
U21
MA1_ODT0
V19
MA1_ODT1
T20
MA0_CS#0
U19
MA0_CS#1
U20
MA1_CS#0
V20
MA1_CS#1
J22
MA_CKE0
J20
MA_CKE1
N19
MA_CLK_H5
N20
MA_CLK_L5
E16
MA_CLK_H1
F16
MA_CLK_L1
Y16
MA_CLK_H7
AA16
MA_CLK_L7
P19
MA_CLK_H4
P20
MA_CLK_L4
N21
MA_ADD0
M20
MA_ADD1
N22
MA_ADD2
M19
MA_ADD3
M22
MA_ADD4
L20
MA_ADD5
M24
MA_ADD6
L21
MA_ADD7
L19
MA_ADD8
K22
MA_ADD9
R21
MA_ADD10
L22
MA_ADD11
K20
MA_ADD12
V24
MA_ADD13
K24
MA_ADD14
K19
MA_ADD15
R20
MA_BANK0
R23
MA_BANK1
J21
MA_BANK2
R19
MA_RAS#
T22
MA_CAS#
T24
MA_WE#
DANUB
DANUB
2 OF 6
2 OF 6
VDDR
VDDR
VDDR
DANUBE
DANUBE
VDDR
VDDR
VDDR_SENSE
MEMVREF
MB_RESET#
MB0_ODT0
MB0_ODT1
MB1_ODT0
MB0_CS#0
MB0_CS#1
MB1_CS#0
MB_CKE0
MB_CKE1
MB_CLK_H5
MB_CLK_L5
MB_CLK_H1
MB_CLK_L1
MB_CLK_H7
MB_CLK_L7
MB_CLK_H4
MB_CLK_L4
MB_ADD0
MB_ADD1
MB_ADD2
MB_ADD3
MB_ADD4
MB_ADD5
MB_ADD6
MB_ADD7
MB_ADD8
MB_ADD9
MB_ADD10
MB_ADD11
MB_ADD12
MB_ADD13
MB_ADD14
MB_ADD15
MB_BANK0
MB_BANK1
MB_BANK2
MB_RAS#
MB_CAS#
MB_WE#
W10
AC10
AB10
AA10
A10
TP_CPU_VDDR_SENSE
Y10
W17
B18
W26
W23
Y26
V26
W25
U22
J25
H26
P22
R22
A17
A18
AF18
AF17
R26
R25
MEM_MB_ADD0
P24
MEM_MB_ADD1
N24
MEM_MB_ADD2
P26
MEM_MB_ADD3
N23
MEM_MB_ADD4
N26
MEM_MB_ADD5
L23
MEM_MB_ADD6
N25
MEM_MB_ADD7
L24
MEM_MB_ADD8
M26
MEM_MB_ADD9
K26
MEM_MB_ADD10
T26
MEM_MB_ADD11
L26
MEM_MB_ADD12
L25
MEM_MB_ADD13
W24
MEM_MB_ADD14
J23
MEM_MB_ADD15
J24
R24
U26
J26
U25
U24
U23
+1.5V_SUS
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C918
C918
1KR3F-GP
1KR3F-GP
1 2
+0.75V_SUS_CPU_M_VREF +V_DDR_REF
TP901 TP901
1
DDR3_B_DRAMRST# 19
MEM_MB0_ODT0 19
MEM_MB0_ODT1 19
MEM_MB0_CS#0 19
MEM_MB0_CS#1 19
MEM_MB_CKE0 19
MEM_MB_CKE1 19
MEM_MB_CLK0_P 19
MEM_MB_CLK0_N 19
MEM_MB_CLK1_P 19
MEM_MB_CLK1_N 19
MEM_MB_BANK0 19
MEM_MB_BANK1 19
MEM_MB_BANK2 19
MEM_MB_RAS# 19
MEM_MB_CAS# 19
MEM_MB_WE# 19
MEM_MB_ADD[0..15] 19
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
C919
C919
1 2
1 2
CLOSE TO CPU
C920
C920
1KR3F-GP
1KR3F-GP
1 2
R902
R902
1 2
1 2
R905
R905
R904
R904
DY
DY
0R3J-0-U-GP
0R3J-0-U-GP
M_A_DM[7..0] 18
M_A_DQS0 18
M_A_DQS#0 18
M_A_DQS1 18
M_A_DQS#1 18
M_A_DQS2 18
M_A_DQS#2 18
M_A_DQS3 18
M_A_DQS#3 18
M_A_DQS4 18
M_A_DQS#4 18
M_A_DQS5 18
M_A_DQS#5 18
M_A_DQS6 18
M_A_DQS#6 18
M_A_DQS7 18
M_A_DQS#7 18
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DM0
M_A_DM1
M_A_DM2
M_A_DM3
M_A_DM4
M_A_DM5
M_A_DM6
M_A_DM7
http://hobi-elektronika.net
5
4
3
2
CPU1C
CPU1C
MB_DATA0
MB_DATA1
MB_DATA2
MB_DATA3
DANUBE
DANUBE
MB_DATA4
MB_DATA5
MB_DATA6
MB_DATA7
MB_DATA8
MB_DATA9
MB_DATA10
MB_DATA11
MB_DATA12
MB_DATA13
MB_DATA14
MB_DATA15
MB_DATA16
MB_DATA17
MB_DATA18
MB_DATA19
MB_DATA20
MB_DATA21
MB_DATA22
MB_DATA23
MB_DATA24
MB_DATA25
MB_DATA26
MB_DATA27
MB_DATA28
MB_DATA29
MB_DATA30
MB_DATA31
MB_DATA32
MB_DATA33
MB_DATA34
MB_DATA35
MB_DATA36
MB_DATA37
MB_DATA38
MB_DATA39
MB_DATA40
MB_DATA41
MB_DATA42
MB_DATA43
MB_DATA44
MB_DATA45
MB_DATA46
MB_DATA47
MB_DATA48
MB_DATA49
MB_DATA50
MB_DATA51
MB_DATA52
MB_DATA53
MB_DATA54
MB_DATA55
MB_DATA56
MB_DATA57
MB_DATA58
MB_DATA59
MB_DATA60
MB_DATA61
MB_DATA62
MB_DATA63
MB_DM0
MB_DM1
MB_DM2
MB_DM3
MB_DM4
MB_DM5
MB_DM6
MB_DM7
MB_DQS_H0
MB_DQS_L0
MB_DQS_H1
MB_DQS_L1
MB_DQS_H2
MB_DQS_L2
MB_DQS_H3
MB_DQS_L3
MB_DQS_H4
MB_DQS_L4
MB_DQS_H5
MB_DQS_L5
MB_DQS_H6
MB_DQS_L6
MB_DQS_H7
MB_DQS_L7
DANUB
DANUB
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
M_B_DQ0
C11
M_B_DQ1
A11
M_B_DQ2
A14
M_B_DQ3
B14
M_B_DQ4
G11
M_B_DQ5
E11
M_B_DQ6
D12
M_B_DQ7
A13
M_B_DQ8
A15
M_B_DQ9
A16
M_B_DQ10
A19
M_B_DQ11
A20
M_B_DQ12
C14
M_B_DQ13
D14
M_B_DQ14
C18
M_B_DQ15
D18
M_B_DQ16
D20
M_B_DQ17
A21
M_B_DQ18
D24
M_B_DQ19
C25
M_B_DQ20
B20
M_B_DQ21
C20
M_B_DQ22
B24
M_B_DQ23
C24
M_B_DQ24
E23
M_B_DQ25
E24
M_B_DQ26
G25
M_B_DQ27
G26
M_B_DQ28
C26
M_B_DQ29
D26
M_B_DQ30
G23
M_B_DQ31
G24
M_B_DQ32
AA24
M_B_DQ33
AA23
M_B_DQ34
AD24
M_B_DQ35
AE24
M_B_DQ36
AA26
M_B_DQ37
AA25
M_B_DQ38
AD26
M_B_DQ39
AE25
M_B_DQ40
AC22
M_B_DQ41
AD22
M_B_DQ42
AE20
M_B_DQ43
AF20
M_B_DQ44
AF24
M_B_DQ45
AF23
M_B_DQ46
AC20
M_B_DQ47
AD20
M_B_DQ48
AD18
M_B_DQ49
AE18
M_B_DQ50
AC14
M_B_DQ51
AD14
M_B_DQ52
AF19
M_B_DQ53
AC18
M_B_DQ54
AF16
M_B_DQ55
AF15
M_B_DQ56
AF13
M_B_DQ57
AC12
M_B_DQ58
AB11
M_B_DQ59
Y11
M_B_DQ60
AE14
M_B_DQ61
AF14
M_B_DQ62
AF11
M_B_DQ63
AD11
M_B_DM0
A12
M_B_DM1
B16
M_B_DM2
A22
M_B_DM3
E25
M_B_DM4
AB26
M_B_DM5
AE22
M_B_DM6
AC16
M_B_DM7
AD12
C12
B12
D16
C16
A24
A23
F26
E26
AC25
AC26
AF21
AF22
AE16
AD16
AF12
AE12
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
M_B_DQS0 19
M_B_DQS#0 19
M_B_DQS1 19
M_B_DQS#1 19
M_B_DQS2 19
M_B_DQS#2 19
M_B_DQS3 19
M_B_DQS#3 19
M_B_DQS4 19
M_B_DQS#4 19
M_B_DQS5 19
M_B_DQS#5 19
M_B_DQS6 19
M_B_DQS#6 19
M_B_DQS7 19
M_B_DQS#7 19
CPU_DDR(2/4)
CPU_DDR(2/4)
CPU_DDR(2/4)
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
99 0 Thursday, May 27, 2010
99 0 Thursday, May 27, 2010
99 0 Thursday, May 27, 2010
M_B_DQ[63..0] 19
M_B_DM[7..0] 19
A00
A00
A00
of
Page 10
5
SSID = CPU
D D
+1.5V_RUN
4
RN1001
RN1001
SRN300J-3-GP
SRN300J-3-GP
1
2 3
CPU_LDT_RST# 20
CPU_LDT_PWRGD 20,42
CPU_LDT_STOP# 13,20
C C
+1.5V_RUN
R1012 300R2J-4-GP
R1012 300R2J-4-GP
1 2
R1013 300R2J-4-GP
R1013 300R2J-4-GP
R1014 300R2J-4-GP
R1014 300R2J-4-GP
R1016 300R2J-4-GP
R1016 300R2J-4-GP
RN1002 SRN1KJ-7-GP RN1002 SRN1KJ-7-GP
RN1004 SRN1KJ-7-GP RN1004 SRN1KJ-7-GP
X01
+1.5V_SUS
B B
R1026
R1026
1KR2J-1-GP
1KR2J-1-GP
1 2
CPU_TEST27
R1029
R1029
300R2J-4-GP
300R2J-4-GP
DY
DY
1 2
TP1001 TP1001
TP1003 TP1003
TP1006 TP1006
TP1007 TP1007
TP_CPU_VDDIO_SUS_FB_H
1
TP_CPU_VDDIO_SUS_FB_L
1
TP_CPU_TEST17
1
TP_CPU_TEST16
1
1 2
R1001 0R0402-PAD R1001 0R0402-PAD
1 2
R1002 0R0402-PAD R1002 0R0402-PAD
1 2
R1003 0R0402-PAD R1003 0R0402-PAD
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
2 3
1
4
1
4
2 3
RN1003
RN1003
1
8
2
7
3
6
4 5
SRN1KJ-4-GP
SRN1KJ-4-GP
X01
A A
CPU_PROCHOT#_EC 37
5
CPU_CLK(200MHz)
CPU_R_LDT_RST#
CPU_R_LDT_PWRGD
CPU_R_LDT_STOP#
X00
CPU_LDT_REQ#
CPU_DBRDY
TP_CPU_TEST14
TP_CPU_TEST15
CPU_TEST18
CPU_TEST19
CPU_TEST24
CPU_TEST22
CPU_TEST23
CPU_TEST12
CPU_TEST20
CPU_TEST21
+3.3V_RUN
10KR2J-3-GP
10KR2J-3-GP
1 2
R1040
R1040
For HDT DBG
C1008
SCD1U16V2ZY-2GP
C1008
SCD1U16V2ZY-2GP
1 2
DY
DY
+1.5V_RUN
2K2R2J-2-GP
2K2R2J-2-GP
1 2
R1039
R1039
1
3
2
Q1005
Q1005
PMBS3904-1-GP
PMBS3904-1-GP
CPU_R_LDT_RST#
HDT_RST_R#
510R2F-L-GP
510R2F-L-GP
510R2F-L-GP
510R2F-L-GP
CPU_PROCHOT#
4
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1 2
Cloce To CPU
C1005 SC3900P50V2KX-2GP C1005 SC3900P50V2KX-2GP
C1006 SC3900P50V2KX-2GP C1006 SC3900P50V2KX-2GP
SCD1U16 V2ZY-2GP
SCD1U16V2ZY-2GP
Close CPU
EC1001
EC1001
1 2
DY
DY
to power IC FB
1 2
R1019
R1019
510R2F-L-GP
510R2F-L-GP
1 2
R1022
R1022
DY
DY
510R2F-L-GP
510R2F-L-GP
+1.5V_SUS
R1018
R1018
R1020
R1020
CPU_CLK 20
CPU_CLK# 20
R1009
R1009
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
X00
+1.5V_SUS
1 2
DY
DY
1 2
1119
RN1005
RN1005
SRN1KJ-7-GP
SRN1KJ-7-GP
CPU_SIC 21
CPU_SID 21
TALERT# 21,39
For old HDT tool (3.3V level)
4
L1001
L1001
1 2
C1001
C1001
PBY160808T-330Y-N-GP
PBY160808T-330Y-N-GP
R1008 169R2F-GP R1008 169R2F-GP
1 2
1 2
+1.1V_RUN
R1010 44D2R2F-GP R1010 44D2R2F-GP
R1011 44D2R2F-GP R1011 44D2R2F-GP
CPU_VDD0_RUN_FB_H 47
CPU_VDD0_RUN_FB_L 47
CPU_VDD1_RUN_FB_H 47
CPU_VDD1_RUN_FB_L 47
1
2 3
4
PMBS3904-1-GP
PMBS3904-1-GP
10KR2J-3-GP
10KR2J-3-GP
1 2
R1037
R1037
DY
DY
3
LYAOUT:ROUTE VDDA TRACE APPROX.
50mils WIDE(USE 2X25 mil TRACES TO
EXIT BALL FIELD) AND 500 mils LONG.
+2.5V_RUN_VDDA +2.5V_RUN
2.5V(250mA) for VDDA
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1002
C1002
1 2
1 2
SCD1U16V2ZY-2GP
SCD1U16V2ZY-2GP
C1007
C1007
1 2
DY
DY
1 2
1 2
R1023
R1023
1 2
0R0402-PAD
0R0402-PAD
2K2R2J-2-GP
2K2R2J-2-GP
1 2
R1032
R1032
312
Q1001
Q1001
+1.8V_RUN +3.3V_RUN
2K2R2J-2-GP
2K2R2J-2-GP
1 2
DY
DY
312
DY
DY
Q1004 PMBS3904-1-GP
Q1004 PMBS3904-1-GP
http://hobi-elektronika.net
SC3300P50V2KX-1GP
SC3300P50V2KX-1GP
C1003
SCD22U10V2KX-1GP
C1003
SCD22U10V2KX-1GP
1 2
1 2
1119
CPUCLK_IN
CPUCLK_IN#
CPU_R_LDT_PWRGD
CPU_R_LDT_STOP#
CPU_LDT_REQ#
CPU_SIC
CPU_SID
CPU_ALERT#
CPU_HTREF0
CPU_HTREF1
CPU_DBRDY
CPU_TMS
CPU_TCK
CPU_TRST#
CPU_TDI
CPU_TEST23
CPU_TEST18
CPU_TEST19
CPU_TEST25_H
CPU_TEST25_L
CPU_TEST21
CPU_TEST20
CPU_TEST24
CPU_TEST22
CPU_TEST12
CPU_TEST27
CPU_TEST9
1KR2J-1-GP
1KR2J-1-GP
1 2
R1033
R1033
CPU_SIC
CPU_SID
CPU_ALERT#
R1036
R1036
HDT_RST_R# HDT_RST#
C1004
C1004
3
F10
AF4
AF5
AE6
AB6
G10
AA9
AC9
AD9
AF9
AD7
H10
AB8
AF7
AE7
AE8
AC8
AF8
AA6
CPU1D
CPU1D
F8
F9
A9
A8
B7
A7
C6
R6
P6
F6
E6
Y6
G9
E9
E8
C2
A3
A5
B3
B5
C1
DANUB
DANUB
VDDA
VDDA
CLKIN_H
CLKIN_L
RESET#
PWROK
LDTSTOP#
LDTREQ#
SIC
SID
ALERT#
HT_REF0
HT_REF1
VDD0_FB_H
VDD0_FB_L
VDD1_FB_H
VDD1_FB_L
DBRDY
TMS
TCK
TRST#
TDI
TEST23
TEST18
TEST19
TEST25_H
TEST25_L
TEST21
TEST20
TEST24
TEST22
TEST12
TEST27
TEST9
TEST6
RSVD#A3
RSVD#A5
RSVD#B3
RSVD#B5
RSVD#C1
CPU_PWRGD_SVID_REG 47
2
1
X01
+1.5V_SUS
1119
4 OF 6
4 OF 6
M11
VSS
SVC
SVD
MEMHOT#
THERMDC
THERMDA
DBREQ#
TDO
TEST28_H
TEST28_L
TEST17
TEST16
TEST15
TEST14
TEST7
TEST10
TEST8
TEST29_H
TEST29_L
RSVD#H18
RSVD#H19
RSVD#AA7
RSVD#D5
RSVD#C5
W18
A6
A4
AF6
AC7
AA8
W7
W8
W9
Y9
H6
G6
E10
AE9
J7
H8
D7
E7
F7
C7
C3
K8
C4
C9
C8
H18
H19
AA7
D5
C5
+KBC_PWR
8K2R2J-3-GP
8K2R2J-3-GP
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
R1034
R1034
RSVD#W18
DANUBE
DANUBE
THERMTRIP#
PROCHOT#
VDDIO_FB_H
VDDIO_FB_L
VDDNB_FB_H
VDDNB_FB_L
H_THERMTRIP# 21,37,39,42
X01
4
RN1006
RN1006
SRN1KJ-7-GP
SRN1KJ-7-GP
1
2 3
CPU_THERMTRIP#
CPU_PROCHOT#
CPU_MEMHOT#
TP_CPU_VDDIO_SUS_FB_H
TP_CPU_VDDIO_SUS_FB_L
R1015
CPU_DBREQ#
CPU_TDO
TP_CPU_TEST17
TP_CPU_TEST16
TP_CPU_TEST15
TP_CPU_TEST14
CPU_TEST10
CPU_TEST29H
CPU_TEST29L
R1027
R1027
PMBS3904-1-GP
PMBS3904-1-GP
PMBS3904-1-GP
PMBS3904-1-GP
R1041 0R2J-2-GP
R1041 0R2J-2-GP
R1015
1 2
300R2J-4-GP
300R2J-4-GP
1 2
DY
DY
R1021 300R3-GP
R1021 300R3-GP
1 2
R1024 80D6R2F-L-GP R1024 80D6R2F-L-GP
+1.5V_RUN
2K2R2J-2-GP
2K2R2J-2-GP
1 2
R1028
R1028
312
Q1002
Q1002
+1.8V_RUN +3.3V_RUN
2K2R2J-2-GP
2K2R2J-2-GP
1 2
R1035
R1035
Q1003
Q1003
DY
DY
CPU_R_LDT_PWRGD
2
312
1 2
CPU_THERMTRIP#
+1.5V_SUS
1KR2J-1-GP
1KR2J-1-GP
300R2J-4-GP
300R2J-4-GP
1 2
R1006
R1006
CPU_SVC 47
CPU_SVD 47
1
TP1002 TP1002
S1G4 not support MEMHOT
H_THERMDC 39
H_THERMDA 39
CPU_VDDNB_RUN_FB_H 47
CPU_VDDNB_RUN_FB_L 47
+1.5V_SUS
+1.1V_RUN
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
1 2
R1007
R1007
CPU_PROCHOT# 20
LAYOUT: Route FBCLKOUT_H/L
differentially impedance 80
HDT Connectors
HDT1
HDT1
1
DY
DY
3
SMC-CONN26A-FP
SMC-CONN26A-FP
1
5
7
9
11
13
15
17
19
21
23
of
10 90 Thursday, May 27, 2010
10 90 Thursday, May 27, 2010
10 90 Thursday, May 27, 2010
CPU_DBREQ#
CPU_DBRDY
CPU_TCK
CPU_TMS
CPU_TDI
CPU_TRST#
CPU_TDO CPU_TDO
1.5V
CPU_R_LDT_RST#
HDT_RST#
3.3V
+1.5V_SUS
1 2
DY
DY
R1038 0R2J-2-GP
R1038 0R2J-2-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
CPU_Control&Debug_(3/4)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
2
4
6
8
10
12
14
16
18
20
22
24
26
A00
A00
A00
Page 11
5
4
3
2
1
SSID = CPU
D D
6 OF 6
6 OF 6
CPU1F
CPU1F
AA4
VSS
AA11
VSS
AA13
VSS
AA15
VSS
AA17
VSS
AA19
VSS
AB2
VSS
AB7
VSS
AB9
VSS
AB23
VSS
AB25
VSS
AC11
VSS
AC13
VSS
AC15
VSS
AC17
VSS
AC19
VSS
AC21
C C
B B
AD6
AD8
AD25
AE11
AE13
AE15
AE17
AE19
AE21
AE23
B11
B13
B15
B17
B19
B21
B23
B25
D11
D13
D15
D17
D19
D21
D23
D25
F11
F13
F15
F17
F19
F21
F23
F25
H21
H23
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
B4
VSS
B6
VSS
B8
VSS
B9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
D6
VSS
D8
VSS
D9
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
E4
VSS
F2
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
H7
VSS
H9
VSS
VSS
VSS
J4
VSS
DANUB
DANUB
VSS
VSS
VSS
DANUBE
DANUBE
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
J6
J8
J10
J12
J14
J16
J18
K2
K7
K9
K11
K13
K15
K17
L6
L8
L10
L12
L14
L16
L18
M7
M9
AC6
M17
N4
N8
N10
N16
N18
P2
P7
P9
P11
P17
R8
R10
R16
R18
T7
T9
T11
T13
T15
T17
U4
U6
U8
U10
U12
U14
U16
U18
V2
V7
V9
V11
V13
V15
V17
W6
Y21
Y23
N6
+1.5V_SUS
(36A) for 35W S1G4 VDD
+VCC_CORE +VCC_CORE
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
Bottom Side Decoupling Bottom Side Decoupling
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1101
C1101
1 2
1 2
DY
DY
+VDDNB
0.9V(4A) for VDDNB
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1115
C1115
1 2
1 2
1.5V(3A) for VDDIO
Bottom Side Decoupling
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1130
C1130
C1131
C1131
1 2
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1103
C1103
C1104
C1104
1 2
1 2
22UF *4
0.22UF *1
180PF *1
10nF*1
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1116
C1116
C1117
C1117
1 2
DY
DY
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C1133
C1133
C1132
C1132
1 2
1 2
DY
DY
22UF *2
0.22UF *2
180PF *1
0.01UF *1
0.1UF *2
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1105
C1105
C1102
C1102
1 2
1 2
22UF *3
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1120
C1120
C1134
C1134
1 2
1 2
DY
DY
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C1106
C1106
C1107
C1107
1 2
DY
DY
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1135
C1135
1 2
CPU1E
CPU1E
G4
VDD
H2
VDD
J9
VDD
J11
VDD
J13
VDD
J15
VDD
K6
VDD
K10
VDD
K12
VDD
K14
VDD
L4
VDD
L7
VDD
L9
VDD
L11
VDD
L13
VDD
L15
VDD
M2
VDD
M6
VDD
M8
VDD
M10
VDD
N7
VDD
N9
VDD
N11
VDD
K16
VDDNB
M16
VDDNB
P16
VDDNB
T16
VDDNB
V16
VDDNB
H25
VDDIO
J17
VDDIO
K18
VDDIO
K21
VDDIO
K23
VDDIO
K25
VDDIO
L17
VDDIO
M18
VDDIO
M21
VDDIO
M23
VDDIO
M25
VDDIO
N17
VDDIO
C1121
C1121
DANUB
DANUB
1 2
5 OF 6
5 OF 6
DANUBE
DANUBE
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
P8
P10
R4
R7
R9
R11
T2
T6
T8
T10
T12
T14
U7
U9
U11
U13
U15
V6
V8
V10
V12
V14
W4
Y2
AC4
AD2
Y25
V25
V23
V21
V18
U17
T25
T23
T21
T18
R17
P25
P23
P21
P18
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C1108
C1108
1 2
1 2
DY
DY
Place near to CPU
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
SC180P50V2JN-1GP
SC180P50V2JN-1GP
C1118
C1118
1 2
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C1109
C1109
C1110
C1110
1 2
22UF *4
0.22UF *1
180PF *1
10nF*1
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1119
C1119
1 2
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C1112
C1112
C1111
C1111
1 2
1 2
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C1123
C1123
C1122
C1122
1 2
0.22UF *4
4.7UF *4
180PF *2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C1141
C1141
1 2
1 2
SCD22U10V3KX-2GP
SCD22U10V3KX-2GP
C1125
C1125
C1124
C1124
1 2
1 2
C1114
C1114
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1126
C1126
C1127
C1127
1 2
1 2
DY
DY
+1.5V_SUS
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1128
C1128
C1129
C1129
1 2
1 2
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_Power_(4/4)
CPU_Power_(4/4)
CPU_Power_(4/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
11 90 Thursday, May 13, 2010
11 90 Thursday, May 13, 2010
11 90 Thursday, May 13, 2010
1
of
of
of
A00
A00
A00
Page 12
5
4
3
2
1
SSID = N.B
HT_CPU_NB_CAD_H0 8
HT_CPU_NB_CAD_L0 8
RS880M : 71.RS880.M05
D D
C C
Place < 1000mils from pin C23 and A24 Place < 1000mils from pin B25 and B24
B B
A A
A-LINK
5
ALINK_NBRX_SBTX_P0 20
ALINK_NBRX_SBTX_N0 20
ALINK_NBRX_SBTX_P1 20
ALINK_NBRX_SBTX_N1 20
ALINK_NBRX_SBTX_P2 20
ALINK_NBRX_SBTX_N2 20
ALINK_NBRX_SBTX_P3 20
ALINK_NBRX_SBTX_N3 20
HT_CPU_NB_CAD_H1 8
HT_CPU_NB_CAD_L1 8
HT_CPU_NB_CAD_H2 8
HT_CPU_NB_CAD_L2 8
HT_CPU_NB_CAD_H3 8
HT_CPU_NB_CAD_L3 8
HT_CPU_NB_CAD_H4 8
HT_CPU_NB_CAD_L4 8
HT_CPU_NB_CAD_H5 8
HT_CPU_NB_CAD_L5 8
HT_CPU_NB_CAD_H6 8
HT_CPU_NB_CAD_L6 8
HT_CPU_NB_CAD_H7 8
HT_CPU_NB_CAD_L7 8
HT_CPU_NB_CAD_H8 8
HT_CPU_NB_CAD_L8 8
HT_CPU_NB_CAD_H9 8
HT_CPU_NB_CAD_L9 8
HT_CPU_NB_CAD_H10 8
HT_CPU_NB_CAD_L10 8
HT_CPU_NB_CAD_H11 8
HT_CPU_NB_CAD_L11 8
HT_CPU_NB_CAD_H12 8
HT_CPU_NB_CAD_L12 8
HT_CPU_NB_CAD_H13 8
HT_CPU_NB_CAD_L13 8
HT_CPU_NB_CAD_H14 8
HT_CPU_NB_CAD_L14 8
HT_CPU_NB_CAD_H15 8
HT_CPU_NB_CAD_L15 8
HT_CPU_NB_CLK_H0 8
HT_CPU_NB_CLK_L0 8
HT_CPU_NB_CLK_H1 8
HT_CPU_NB_CLK_L1 8
HT_CPU_NB_CTL_H0 8
HT_CPU_NB_CTL_L0 8
HT_CPU_NB_CTL_H1 8
HT_CPU_NB_CTL_L1 8
R1201 301R2F-GP R1201 301R2F-GP
1 2
HT_RXCALP HT_TXCALP
HT_RXCALN
Y25
Y24
V22
V23
V25
V24
U24
U25
T25
T24
P22
P23
P25
P24
N24
N25
AC24
AC25
AB25
AB24
AA24
AA25
Y22
Y23
W21
W20
V21
V20
U20
U21
U19
U18
T22
T23
AB23
AA22
M22
M23
R21
R20
C23
A24
U1B
U1B
D4
C4
A3
B3
C2
C1
E5
F5
G5
G6
H5
H6
J6
J5
J7
J8
L5
L6
M8
L8
P7
M7
P5
M5
R8
P8
R6
R5
P4
P3
T4
T3
AE3
AD4
AE2
AD3
AD1
AD2
V5
W6
U5
U6
U8
U7
AA8
Y8
AA7
Y7
AA5
AA6
W5
Y5
RS880M-1-GP
RS880M-1-GP
4
U1A
U1A
HT_RXCAD0P
HT_RXCAD0N
HT_RXCAD1P
HT_RXCAD1N
HT_RXCAD2P
HT_RXCAD2N
HT_RXCAD3P
HT_RXCAD3N
HT_RXCAD4P
HT_RXCAD4N
HT_RXCAD5P
HT_RXCAD5N
HT_RXCAD6P
HT_RXCAD6N
HT_RXCAD7P
HT_RXCAD7N
HT_RXCAD8P
HT_RXCAD8N
HT_RXCAD9P
HT_RXCAD9N
HT_RXCAD10P
HT_RXCAD10N
HT_RXCAD11P
HT_RXCAD11N
HT_RXCAD12P
HT_RXCAD12N
HT_RXCAD13P
HT_RXCAD13N
HT_RXCAD14P
HT_RXCAD14N
HT_RXCAD15P
HT_RXCAD15N
HT_RXCLK0P
HT_RXCLK0N
HT_RXCLK1P
HT_RXCLK1N
HT_RXCTL0P
HT_RXCTL0N
HT_RXCTL1P
HT_RXCTL1N
HT_RXCALP
HT_RXCALN
RS880M-1-GP
RS880M-1-GP
GFX_RX0P
GFX_RX0N
GFX_RX1P
GFX_RX1N
GFX_RX2P
GFX_RX2N
GFX_RX3P
GFX_RX3N
GFX_RX4P
GFX_RX4N
GFX_RX5P
GFX_RX5N
GFX_RX6P
GFX_RX6N
GFX_RX7P
GFX_RX7N
GFX_RX8P
GFX_RX8N
GFX_RX9P
GFX_RX9N
GFX_RX10P
GFX_RX10N
GFX_RX11P
GFX_RX11N
GFX_RX12P
GFX_RX12N
GFX_RX13P
GFX_RX13N
GFX_RX14P
GFX_RX14N
GFX_RX15P
GFX_RX15N
GPP_RX0P
GPP_RX0N
GPP_RX1P
GPP_RX1N
GPP_RX2P
GPP_RX2N
GPP_RX3P
GPP_RX3N
GPP_RX4P
GPP_RX4N
GPP_RX5P
GPP_RX5N
SB_RX0P
SB_RX0N
SB_RX1P
SB_RX1N
SB_RX2P
SB_RX2N
SB_RX3P
SB_RX3N
PART 1 OF 6
PART 1 OF 6
PART 2 OF 6
PART 2 OF 6
PCIE I/F GPP
PCIE I/F GPP
PCIE I/F SB
PCIE I/F SB
HT_TXCAD0P
HT_TXCAD0N
HT_TXCAD1P
HT_TXCAD1N
HT_TXCAD2P
HT_TXCAD2N
HT_TXCAD3P
HT_TXCAD3N
HT_TXCAD4P
HT_TXCAD4N
HT_TXCAD5P
HT_TXCAD5N
HT_TXCAD6P
HT_TXCAD6N
HT_TXCAD7P
HT_TXCAD7N
HT_TXCAD8P
HT_TXCAD8N
HT_TXCAD9P
HT_TXCAD9N
HT_TXCAD10P
HT_TXCAD10N
HT_TXCAD11P
HT_TXCAD11N
HT_TXCAD12P
HT_TXCAD12N
HT_TXCAD13P
HT_TXCAD13N
HT_TXCAD14P
HT_TXCAD14N
HT_TXCAD15P
HT_TXCAD15N
HT_TXCLK0P
HT_TXCLK0N
HT_TXCLK1P
HT_TXCLK1N
HYPER TRANSPORT CPU I/F
HYPER TRANSPORT CPU I/F
HT_TXCTL0P
HT_TXCTL0N
HT_TXCTL1P
HT_TXCTL1N
HT_TXCALP
HT_TXCALN
GFX_TX0P
GFX_TX0N
GFX_TX1P
GFX_TX1N
GFX_TX2P
GFX_TX2N
GFX_TX3P
GFX_TX3N
GFX_TX4P
GFX_TX4N
GFX_TX5P
GFX_TX5N
GFX_TX6P
GFX_TX6N
GFX_TX7P
GFX_TX7N
GFX_TX8P
GFX_TX8N
GFX_TX9P
GFX_TX9N
GFX_TX10P
GFX_TX10N
GFX_TX11P
GFX_TX11N
GFX_TX12P
GFX_TX12N
GFX_TX13P
GFX_TX13N
GFX_TX14P
GFX_TX14N
GFX_TX15P
GFX_TX15N
PCIE I/F GFX
PCIE I/F GFX
GPP_TX0P
GPP_TX0N
GPP_TX1P
GPP_TX1N
GPP_TX2P
GPP_TX2N
GPP_TX3P
GPP_TX3N
GPP_TX4P
GPP_TX4N
GPP_TX5P
GPP_TX5N
SB_TX0P
SB_TX0N
SB_TX1P
SB_TX1N
SB_TX2P
SB_TX2N
SB_TX3P
SB_TX3N
PCE_CALRP
PCE_CALRN
D24
D25
E24
E25
F24
F25
F23
F22
H23
H22
J25
J24
K24
K25
K23
K22
F21
G21
G20
H21
J20
J21
J18
K17
L19
J19
M19
L18
M21
P21
P18
M18
H24
H25
L21
L20
M24
M25
P19
R18
B24
HT_TXCALN
B25
A5
B5
A4
B4
C3
B2
D1
D2
E2
E1
F4
F3
F1
F2
H4
H3
H1
H2
J2
J1
K4
K3
K1
K2
M4
M3
M1
M2
N2
N1
P1
P2
AC1
AC2
AB4
AB3
AA2
AA1
Y1
Y2
Y4
Y3
V1
V2
ALINK_NBTX_SBRX_C_P0
AD7
ALINK_NBTX_SBRX_C_N0
AE7
ALINK_NBTX_SBRX_C_P1
AE6
ALINK_NBTX_SBRX_C_N1
AD6
ALINK_NBTX_SBRX_C_P2
AB6
ALINK_NBTX_SBRX_C_N2
AC6
ALINK_NBTX_SBRX_C_P3
AD5
ALINK_NBTX_SBRX_C_N3
AE5
PCE_PCAL
AC8
PCE_NCAL
AB8
http://hobi-elektronika.net
HT_NB_CPU_CAD_H0 8
HT_NB_CPU_CAD_L0 8
HT_NB_CPU_CAD_H1 8
HT_NB_CPU_CAD_L1 8
HT_NB_CPU_CAD_H2 8
HT_NB_CPU_CAD_L2 8
HT_NB_CPU_CAD_H3 8
HT_NB_CPU_CAD_L3 8
HT_NB_CPU_CAD_H4 8
HT_NB_CPU_CAD_L4 8
HT_NB_CPU_CAD_H5 8
HT_NB_CPU_CAD_L5 8
HT_NB_CPU_CAD_H6 8
HT_NB_CPU_CAD_L6 8
HT_NB_CPU_CAD_H7 8
HT_NB_CPU_CAD_L7 8
HT_NB_CPU_CAD_H8 8
HT_NB_CPU_CAD_L8 8
HT_NB_CPU_CAD_H9 8
HT_NB_CPU_CAD_L9 8
HT_NB_CPU_CAD_H10 8
HT_NB_CPU_CAD_L10 8
HT_NB_CPU_CAD_H11 8
HT_NB_CPU_CAD_L11 8
HT_NB_CPU_CAD_H12 8
HT_NB_CPU_CAD_L12 8
HT_NB_CPU_CAD_H13 8
HT_NB_CPU_CAD_L13 8
HT_NB_CPU_CAD_H14 8
HT_NB_CPU_CAD_L14 8
HT_NB_CPU_CAD_H15 8
HT_NB_CPU_CAD_L15 8
HT_NB_CPU_CLK_H0 8
HT_NB_CPU_CLK_L0 8
HT_NB_CPU_CLK_H1 8
HT_NB_CPU_CLK_L1 8
HT_NB_CPU_CTL_H0 8
HT_NB_CPU_CTL_L0 8
HT_NB_CPU_CTL_H1 8
HT_NB_CPU_CTL_L1 8
R1202 301R2F-GP R1202 301R2F-GP
1 2
C1237 SCD1U10V2KX-5GP C1237 SCD1U10V2KX-5GP
1 2
C1238 SCD1U10V2KX-5GP C1238 SCD1U10V2KX-5GP
1 2
C1239 SCD1U10V2KX-5GP C1239 SCD1U10V2KX-5GP
1 2
C1240 SCD1U10V2KX-5GP C1240 SCD1U10V2KX-5GP
1 2
C1241 SCD1U10V2KX-5GP C1241 SCD1U10V2KX-5GP
1 2
C1242 SCD1U10V2KX-5GP C1242 SCD1U10V2KX-5GP
1 2
C1243 SCD1U10V2KX-5GP C1243 SCD1U10V2KX-5GP
1 2
C1244 SCD1U10V2KX-5GP C1244 SCD1U10V2KX-5GP
1 2
1 2
1 2
R1203 1K27R2F-L-GP R1203 1K27R2F-L-GP
R1204 2KR2F-3-GP R1204 2KR2F-3-GP
ALINK_NBTX_SBRX_P0 20
ALINK_NBTX_SBRX_N0 20
ALINK_NBTX_SBRX_P1 20
ALINK_NBTX_SBRX_N1 20
ALINK_NBTX_SBRX_P2 20
ALINK_NBTX_SBRX_N2 20
ALINK_NBTX_SBRX_P3 20
ALINK_NBTX_SBRX_N3 20
+1.1V_RUN
Place < 100mils from pin AC8 and AB8
3
<Core Design>
<Core Design>
<Core Design>
A-LINK
Title
Title
Title
AMD-RS880M_HT LINK&PCIe(1/4)
AMD-RS880M_HT LINK&PCIe(1/4)
AMD-RS880M_HT LINK&PCIe(1/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
12 90 Thursday, May 27, 2010
12 90 Thursday, May 27, 2010
12 90 Thursday, May 27, 2010
1
A00
A00
of
A00
Page 13
5
SSID = N.B
RS880M : 71.RS880.M05
+1.1V_RUN
D D
+1.8V_RUN
+1.8V_RUN
C C
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
B B
A A
L1308
L1308
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
220 ohm 300mA
-A00
R1323
R1323
1 2
0R0402-PAD
0R0402-PAD
-A00
R1324
R1324
1 2
0R0402-PAD
0R0402-PAD
R1325
R1325
1 2
0R0402-PAD
0R0402-PAD
C1301
C1301
1 2
DY
DY
CPU_LDT_STOP# 10,20
ALLOW_LDTSTOP 20
+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL
300R2J-4-GP
300R2J-4-GP
65mA
PLLVDD
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C1312
C1312
1 2
PLLVDD18
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C1311
C1311
1 2
Layout Note
Trace at least 15 mil
20mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C1302
C1302
1 2
1 2
DY
DY
120mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C1304
C1304
1 2
1 2
DY
DY
1 2
R1309
R1309
R1322 0R2J-2-GP
R1322 0R2J-2-GP
U1301
U1301
1
2
SN74LVC2G07DCKR-GP
SN74LVC2G07DCKR-GP
-A00
R1316 0R0402-PAD R1316 0R0402-PAD
1 2
5
C1303
C1303
C1305
C1305
+1.8V_RUN +1.5V_RUN
1 2
DY
DY
1A
GND
2A32Y
6
1Y
5
SCD1U10V2KX-5GP
4
+1.8V_RUN
1 2
SCD1U10V2KX-5GP
1 2
R1315
R1315
1KR2J-1-GP
1KR2J-1-GP
NB_ALLOW_LDTSTOP
VCC
ALLOW_LDTSTOP:
1 = LDTSTOP# can be asserted
0 = LDTSTOP# has to be de-asserted
UMA: DAC_CLK and DATA with
5V-tolerant.not need level shift
1 2
R1311
R1311
2K2R2J-2-GP
2K2R2J-2-GP
NB_LDT_STOP#
C1314
C1314
4
-A00
R1342
R1342
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
+1.8V_RUN
+1.8V_RUN
M_RED 55
M_GREEN 55
M_BLUE 55
Trace at least 10 mil
LDDC_CLK 54
LDDC_DATA 54
4
+3.3V_RUN_AVDD +3.3V_RUN
1 2
C1307
C1307
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
C1306
C1306
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C1308
C1308
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
X00
1 2
R1326 150R2F-1-GP R1326 150R2F-1-GP
1 2
R1327 150R2F-1-GP R1327 150R2F-1-GP
1 2
R1328 150R2F-1-GP R1328 150R2F-1-GP
PLTRST#_NB_GPU 20
NB_PWRGD_IN 41
X01
+3.3V_RUN
4
RN1302
RN1302
SRN4K7J-8-GP
SRN4K7J-8-GP
1
2 3
1 2
R1318
R1318
2KR2J-1-GP
2KR2J-1-GP
3
110mA
20mA
4mA
TV_OUT
TV_OUT
VGA_HSYNC 55
VGA_VSYNC 55
DDC_CLK_CON 55
DDC_DATA_CON 55
CLK_NBHT_CLK 20
CLK_NBHT_CLK# 20
X01
RN1303
RN1303
SRN4K7J-8-GP
SRN4K7J-8-GP
NB_REFCLK_P 20
NB_REFCLK_N 20
NB_GPPSB_CLK 20
NB_GPPSB_CLK# 20
VGA_HSYNC
VGA_VSYNC
DDC_CLK_CON
DDC_DATA_CON
R1306
R1306
1 2
715R2F-GP
715R2F-GP
+1.8V_VDDA18HTPLL
+1.8V_VDDA18PCIEPLL
NB_LDT_STOP#
NB_ALLOW_LDTSTOP
TP1307 TP1307
TP1308 TP1308
TP1301 TP1301
TP1302 TP1302
TP1303 TP1303
TP1304 TP1304
TP1305 TP1305
1 2
R1319 150R2F-1-GP R1319 150R2F-1-GP
NB_GFX_CLK
NB_GFX_CLK#
4
1
2 3
DAC_RSET
PLLVDD
PLLVDD18
NB_GFX_CLK
NB_GFX_CLK#
NB_GPP_CLK
1
NB_GPP_CLK#
1
TP_NB_DDC_DATA0
1
TP_NB_DDC_CLK0
1
TP_NB_DDC_CLK1
1
TP_NB_DDC_DATA1
1
TP_STRP_DATA
TP_NB_RESERVED
1
RS780_AUX_CAL
http://hobi-elektronika.net
3
+3.3V_RUN
3KR2J-2-GP
3KR2J-2-GP
1 2
3KR2J-2-GP
3KR2J-2-GP
1 2
DY
DY
U1C
U1C
F12
AVDD1
E12
AVDD2
F14
AVDDDI
G15
AVSSDI
H15
AVDDQ
H14
AVSSQ
E17
C_Pr
F17
Y
F15
COMP_Pb
G18
RED
G17
REDb
E18
GREEN
F18
GREENb
E19
BLUE
F19
BLUEb
A11
DAC_HSYNC
B11
DAC_VSYNC
F8
DAC_SCL
E8
DAC_SDA
G14
DAC_RSET
A12
PLLVDD
D14
PLLVDD18
B12
PLLVSS
H17
VDDA18HTPLL
D7
VDDA18PCIEPLL1
E7
VDDA18PCIEPLL2
D8
SYSRESET#
A10
POWERGOOD
C10
LDTSTOP#
C12
ALLOW_LDTSTOP
C25
HT_REFCLKP
C24
HT_REFCLKN
E11
REFCLK_P/OSCIN
F11
REFCLK_N
T2
GFX_REFCLKP
T1
GFX_REFCLKN
U1
GPP_REFCLKP
U2
GPP_REFCLKN
V4
GPPSB_REFCLKP
V3
GPPSB_REFCLKN
B9
I2C_CLK
A9
I2C_DATA
B8
DDC_DATA0/AUX0N
A8
DDC_CLK0/AUX0P
B7
DDC_CLK1/AUX1P
A7
DDC_DATA1/AUX1N
B10
STRP_DATA
G11
RESERVED
C8
AUX_CAL
RS880M-1-GP
RS880M-1-GP
3KR2J-2-GP
3KR2J-2-GP
R1302
R1302
3KR2J-2-GP
3KR2J-2-GP
R1304
R1304
DY
DY
1 2
1 2
R1303
R1303
R1305
R1305
20mA
120mA
VGA_VSYNC
VGA_HSYNC
PART 3 OF 6
PART 3 OF 6
NB_SUS_STAT#
2
STRAP_DEBUG_BUS_GPIO_ENABLE# ( RS880M use VGA_VSYNC)
Enables debug bus access through memory I/O pads and GPIOs.
1 : Disable
*
0 : Enable
SIDE_PORT_EN# ( RS880M use VGA_HSYNC)
*
1 = Memory Side port Not available
0 = Memory Side port available
LOAD_EEPROM_STRAPS#(RS880M use SUS_STAT#)
Selects Loading of STRAPS From EEPROM
1 : use Default Values
*
0 : I2C Master can load strap values from EEPROM if connected,
or use default values if not connected
*DEFAULT
CRT/TVOUT
CRT/TVOUT
PM
PM
CLOCKs PLL PWR
CLOCKs PLL PWR
MIS.
MIS.
LVTM
LVTM
LVDS_ENA_BL
THERMALDIODE_P
THERMALDIODE_N
+3.3V_RUN
R1314
R1314
4K7R2J-2-GP
4K7R2J-2-GP
1 2
1 2
R1321
R1321
3KR2J-2-GP
3KR2J-2-GP
DY
DY
2
TXOUT_L0P
TXOUT_L0N
TXOUT_L1P
TXOUT_L1N
TXOUT_L2P
TXOUT_L2N
TXOUT_L3P
TXOUT_L3N
TXOUT_U0P
TXOUT_U0N
TXOUT_U1P
TXOUT_U1N
TXOUT_U2P
TXOUT_U2N
TXOUT_U3P
TXOUT_U3N
TXCLK_LP
TXCLK_LN
TXCLK_UP
TXCLK_UN
VDDLTP18
VSSLTP18
VDDLT18_1
VDDLT18_2
VDDLT33_1
VDDLT33_2
VSSLT1
VSSLT2
VSSLT3
VSSLT4
VSSLT5
VSSLT6
VSSLT7
LVDS_DIGON
LVDS_BLON
TMDS_HPD
HPD
SUS_STAT#
TESTMODE
A22
B22
A21
B21
B20
A20
A19
B19
B18
A18
A17
B17
D20
D21
D18
D19
B16
A16
D16
D17
VDDLTP18_R
A13
B13
VDDLT18_R
A15
B15
A14
B14
C14
D15
C16
C18
C20
E20
C22
LCDVDD_EN_R
E9
BLON_R
F7
LVDS_BLEN
G12
TMDS_HPD
D9
D10
NB_SUS_STAT#
D12
AE8
AD8
TESTMODE_NB
D13
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
VGA_TXAOUT0+ 54
VGA_TXAOUT0- 54
VGA_TXAOUT1+ 54
VGA_TXAOUT1- 54
VGA_TXAOUT2+ 54
VGA_TXAOUT2- 54
VGA_TXACLK+ 54
VGA_TXACLK- 54
15mA
300mA
C1313
SC4D7U6D3V3KX-GP
C1313
SC4D7U6D3V3KX-GP
C1310
SCD1U10V2KX-5GP
C1310
SCD1U10V2KX-5GP
1 2
HPD
AMD-RS880M_LVDS&CRT_(2/4)
AMD-RS880M_LVDS&CRT_(2/4)
AMD-RS880M_LVDS&CRT_(2/4)
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C1309
C1309
1 2
1 2
DY
DY
R1332 0R0402-PAD R1332 0R0402-PAD
1 2
R1331 0R0402-PAD R1331 0R0402-PAD
1 2
R1308 0R0402-PAD R1308 0R0402-PAD
1 2
RN1301
RN1301
1
4
2 3
SRN4K7J-8-G P
SRN4K7J-8-GP
1
TP1311 TP1311
1
TP1306 TP1306
1 2
R1317 0R0402-PAD R1317 0R0402-PAD
1K8R2F-GP
1K8R2F-GP
1 2
R1320
R1320
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
220 ohm 300mA
L1305
L1305
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
R1329
R1329
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
LCDVDD_EN 54
LBKLT_CTL 54
PANEL_BKEN 37
+1.8V_RUN
+1.8V_RUN
-A00
X00
SUS_STAT# 21
-A00
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
13 90 Thursday, May 27, 2010
13 90 Thursday, May 27, 2010
13 90 Thursday, May 27, 2010
1
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5
4
3
2
1
SSID = N.B
D D
U1D
U1D
AB12
MEM_A0
AE16
MEM_A1
V11
MEM_A2
AE15
MEM_A3
AA12
MEM_A4
AB16
MEM_A5
AB14
MEM_A6
AD14
MEM_A7
AD13
MEM_A8
AD15
MEM_A9
AC16
C C
AE13
AC14
AD16
AE17
AD17
W12
AD18
AB13
AB18
W14
AE12
AD12
Y14
Y12
V14
V15
MEM_A10
MEM_A11
MEM_A12
MEM_A13
MEM_BA0
MEM_BA1
MEM_BA2
MEM_RAS#
MEM_CAS#
MEM_WE#
MEM_CS#
MEM_CKE
MEM_ODT
MEM_CKP
MEM_CKN
MEM_COMPP
MEM_COMPN
RS880M-1-GP
RS880M-1-GP
PAR 4 OF 6
PAR 4 OF 6
MEM_DQ0/DVO_VSYNC
MEM_DQ1/DVO_HSYNC
MEM_DQ2/DVO_DE
MEM_DQ3/DVO_D0
MEM_DQ4
MEM_DQ5/DVO_D1
MEM_DQ6/DVO_D2
MEM_DQ7/DVO_D4
MEM_DQ8/DVO_D3
MEM_DQ9/DVO_D5
MEM_DQ10/DVO_D6
MEM_DQ11/DVO_D7
MEM_DQ12
MEM_DQ13/DVO_D9
MEM_DQ14/DVO_D10
MEM_DQ15/DVO_D11
MEM_DQS0P/DVO_IDCKP
MEM_DQS0N/DVO_IDCKN
MEM_DQS1P
MEM_DQS1N
MEM_DM0
MEM_DM1/DVO_D8
SBD_MEM/DVO_I/F
SBD_MEM/DVO_I/F
IOPLLVDD18
IOPLLVDD
IOPLLVSS
MEM_VREF
AA18
AA20
AA19
Y19
V17
AA17
AA15
Y15
AC20
AD19
AE22
AC18
AB20
AD22
AC22
AD21
Y17
W18
AD20
AE21
W17
AE19
AE23
AE24
AD23
AE18
15mA
+1.8V_RUN +1.1V_RUN
26mA
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
AMD-RS880M_SidePort_(3/4)
AMD-RS880M_SidePort_(3/4)
AMD-RS880M_SidePort_(3/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
14 90 Thursday, May 13, 2010
14 90 Thursday, May 13, 2010
14 90 Thursday, May 13, 2010
1
of
of
of
A00
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5
4
3
2
1
SSID = N.B
D D
+1.1V_RUN
R1501
R1501
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
+1.1V_RUN
R1502
R1502
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
C C
+1.1V_RUN
+1.8V_RUN
B B
+1.8V_RUN
40 mils
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1501
C1501
1 2
40 mils
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1511
C1511
1 2
20 mils
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1514
C1514
1 2
40 mils
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1528
C1528
1 2
DY
DY
15 mils
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1534
C1534
1 2
DY
DY
1.1V(0.6A) for VDDHT
+1.1V_RUN_VDDHT
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1502
C1502
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1507
C1507
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1515
C1515
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1529
C1529
1 2
SCD1U10V2KX-5GP
C1506
C1506
C1503
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1512
C1512
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1516
C1516
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1530
C1530
1 2
C1503
C1513
C1513
C1517
C1517
C1531
C1531
1 2
DY
DY
1.1V(0.7A) for VDDHTRX
+1.1V_RUN_VDDHTRX
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
1.2V(0.4A) for VDDHTTX
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1.8V(0.7A) for VDDA18PCIE
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1.8V(0.01A) for VDD18
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1518
C1518
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1532
C1532
1 2
1207
U1E
U1E
J17
VDDHT_1
K16
L16
M16
P16
R16
T16
H18
G19
F20
E21
D22
B23
A23
AE25
AD24
AC23
AB22
AA21
Y20
W19
V18
U17
T17
R17
P17
M17
J10
P10
K10
C1533
C1533
1 2
M10
L10
W9
T10
R10
AA9
AB9
AD9
AE9
U10
AE11
AD11
H9
Y9
F9
G9
VDDHT_2
VDDHT_3
VDDHT_4
VDDHT_5
VDDHT_6
VDDHT_7
VDDHTRX_1
VDDHTRX_2
VDDHTRX_3
VDDHTRX_4
VDDHTRX_5
VDDHTRX_6
VDDHTRX_7
VDDHTTX_1
VDDHTTX_2
VDDHTTX_3
VDDHTTX_4
VDDHTTX_5
VDDHTTX_6
VDDHTTX_7
VDDHTTX_8
VDDHTTX_9
VDDHTTX_10
VDDHTTX_11
VDDHTTX_12
VDDHTTX_13
VDDA18PCIE_1
VDDA18PCIE_2
VDDA18PCIE_3
VDDA18PCIE_4
VDDA18PCIE_5
VDDA18PCIE_6
VDDA18PCIE_7
VDDA18PCIE_8
VDDA18PCIE_9
VDDA18PCIE_10
VDDA18PCIE_11
VDDA18PCIE_12
VDDA18PCIE_13
VDDA18PCIE_14
VDDA18PCIE_15
VDD18_1
VDD18_2
VDD18_MEM1
VDD18_MEM2
RS880M-1-GP
RS880M-1-GP
PART 5/6
PART 5/6
VDDPCIE_1
VDDPCIE_2
VDDPCIE_3
VDDPCIE_4
VDDPCIE_5
VDDPCIE_6
VDDPCIE_7
VDDPCIE_8
VDDPCIE_9
VDDPCIE_10
VDDPCIE_11
VDDPCIE_12
VDDPCIE_13
VDDPCIE_14
VDDPCIE_15
VDDPCIE_16
VDDPCIE_17
POWER
POWER
VDD_MEM1
VDD_MEM2
VDD_MEM3
VDD_MEM4
VDD_MEM5
VDD_MEM6
VDDC_1
VDDC_2
VDDC_3
VDDC_4
VDDC_5
VDDC_6
VDDC_7
VDDC_8
VDDC_9
VDDC_10
VDDC_11
VDDC_12
VDDC_13
VDDC_14
VDDC_15
VDDC_16
VDDC_17
VDDC_18
VDDC_19
VDDC_20
VDDC_21
VDDC_22
VDD33_1
VDD33_2
A6
B6
C6
D6
E6
F6
G7
H8
J9
K9
M9
L9
P9
R9
T9
V9
U9
K12
J14
U16
J11
K15
M12
L14
L11
M13
M15
N12
N14
P11
P13
P14
R12
R15
T11
T15
U12
T14
J16
AE10
AA11
Y11
AD10
AB10
AC10
H11
H12
SPM DIS
1.1V(2.5A) for VDDPCIE
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1543
C1543
1 2
DY
DY
0.95~1.1V(10A) for VDDC
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1519
C1519
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1544
C1544
1 2
1 2
DY
DY
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1520
C1520
1 2
1 2
DY
DY
C1509
C1509
C1521
C1521
SPM DIS
3.3V(0.06A) for VDD33
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1535
C1535
C1536
1 2
C1536
1 2
+1.1V_RUN_VDDPCI E
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1510
C1510
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C1522
C1522
1 2
130 mils
C1505
C1505
1 2
550 mils
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1523
C1523
1 2
1 2
15 mils
Layout Note
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
GAP-CLOSE-PWR
+NB_VCORE
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1525
C1525
C1524
C1524
1 2
+1.1V_RUN
G1501
G1501
1 2
G1502
G1502
1 2
G1503
G1503
1 2
G1504
G1504
1 2
+NB_VDDC
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1526
C1526
1 2
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C1527
C1527
1 2
+3.3V_RUN
M20
N22
R19
R22
R24
R25
H20
U22
W22
W24
W25
AD25
M14
N13
R11
R14
U14
U11
U15
W11
W15
AC12
AA14
AB11
AB15
AB17
AB19
AE20
AB21
A25
D23
E22
G22
G24
G25
H19
L17
L22
L24
L25
P20
V19
Y21
L12
P12
P15
T12
V12
Y18
K11
J22
U1F
U1F
VSSAHT1
VSSAHT2
VSSAHT3
VSSAHT4
VSSAHT5
VSSAHT6
VSSAHT7
VSSAHT8
VSSAHT9
VSSAHT10
VSSAHT11
VSSAHT12
VSSAHT13
VSSAHT14
VSSAHT15
VSSAHT16
VSSAHT17
VSSAHT18
VSSAHT19
VSSAHT20
VSSAHT21
VSSAHT22
VSSAHT23
VSSAHT24
VSSAHT25
VSSAHT26
VSSAHT27
VSS11
VSS12
VSS13
VSS14
VSS15
VSS16
VSS17
VSS18
VSS19
VSS20
VSS21
VSS22
VSS23
VSS24
VSS25
VSS26
VSS27
VSS28
VSS29
VSS30
VSS31
VSS32
VSS33
VSS34
RS880M-1-GP
RS880M-1-GP
PART 6/6
PART 6/6
GROUND
GROUND
VSSAPCIE1
VSSAPCIE2
VSSAPCIE3
VSSAPCIE4
VSSAPCIE5
VSSAPCIE6
VSSAPCIE7
VSSAPCIE8
VSSAPCIE9
VSSAPCIE10
VSSAPCIE11
VSSAPCIE12
VSSAPCIE13
VSSAPCIE14
VSSAPCIE15
VSSAPCIE16
VSSAPCIE17
VSSAPCIE18
VSSAPCIE19
VSSAPCIE20
VSSAPCIE21
VSSAPCIE22
VSSAPCIE23
VSSAPCIE24
VSSAPCIE25
VSSAPCIE26
VSSAPCIE27
VSSAPCIE28
VSSAPCIE29
VSSAPCIE30
VSSAPCIE31
VSSAPCIE32
VSSAPCIE33
VSSAPCIE34
VSSAPCIE35
VSSAPCIE36
VSSAPCIE37
VSSAPCIE38
VSSAPCIE39
VSSAPCIE40
VSS1
VSS2
VSS3
VSS4
VSS5
VSS6
VSS7
VSS8
VSS9
VSS10
A2
B1
D3
D5
E4
G1
G2
G4
H7
J4
R7
L1
L2
L4
L7
M6
N4
P6
R1
R2
R4
V7
U4
V8
V6
W1
W2
W4
W7
W8
Y6
AA4
AB5
AB1
AB7
AC3
AC4
AE1
AE4
AB2
AE14
D11
G8
E14
E15
J15
J12
K14
M11
L15
Layout Note
1020 Noise coupling for NB
+1.1V_RUN +NB_VDDC
R1507
R1507
1 2
0R3J-0-U-GP
0R3J-0-U-GP
R1508
R1508
1 2
0R3J-0-U-GP
A A
http://hobi-elektronika.net
5
4
3
0R3J-0-U-GP
R1509
R1509
1 2
0R3J-0-U-GP
0R3J-0-U-GP
R1510
R1510
1 2
0R3J-0-U-GP
0R3J-0-U-GP
R1511
R1511
1 2
0R3J-0-U-GP
0R3J-0-U-GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
AMD-RS880M_PWR&GD_(4/4)
AMD-RS880M_PWR&GD_(4/4)
AMD-RS880M_PWR&GD_(4/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
15 90 Thursday, May 13, 2010
15 90 Thursday, May 13, 2010
15 90 Thursday, May 13, 2010
1
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A00
of
of
of
A00
Page 16
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
16 90 Thursday, May 13, 2010
16 90 Thursday, May 13, 2010
16 90 Thursday, May 13, 2010
of
of
of
A00
A00
A00
Page 17
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
17 90 Thursday, May 13, 2010
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17 90 Thursday, May 13, 2010
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MEM_MA_ADD[0..15] 9
D D
MEM_MA_BANK2 9
MEM_MA_BANK0 9
MEM_MA_BANK1 9
M_A_DQ[63..0] 9
C C
M_A_DQS#0 9
M_A_DQS#1 9
M_A_DQS#2 9
M_A_DQS#3 9
B B
+V_DDR_REF
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
C1811
C1811
C1810
C1810
1 2
Place these caps
close to VTT1 and
A A
VTT2.
C1801
C1801
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
M_A_DQS#4 9
M_A_DQS#5 9
M_A_DQS#6 9
M_A_DQS#7 9
M_A_DQS0 9
M_A_DQS1 9
M_A_DQS2 9
M_A_DQS3 9
M_A_DQS4 9
M_A_DQS5 9
M_A_DQS6 9
M_A_DQS7 9
MEM_MA0_ODT0 9
MEM_MA0_ODT1 9
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DDR3_A_DRAMRST# 9
1 2
1 2
C1819
C1819
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
DY
DY
C1820
C1820
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
+0.75V_DDR_VTT
1 2
C1821
C1821
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
DY
DY
C1822
C1822
1 2
MEM_MA_ADD0
MEM_MA_ADD1
MEM_MA_ADD2
MEM_MA_ADD3
MEM_MA_ADD4
MEM_MA_ADD5
MEM_MA_ADD6
MEM_MA_ADD7
MEM_MA_ADD8
MEM_MA_ADD9
MEM_MA_ADD10
MEM_MA_ADD11
MEM_MA_ADD12
MEM_MA_ADD13
MEM_MA_ADD14
MEM_MA_ADD15
M_A_DQ0
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_A_DQS0
M_A_DQS1
M_A_DQS2
M_A_DQS3
M_A_DQS4
M_A_DQS5
M_A_DQS6
M_A_DQS7
SCD1U 16V2KX-3GP
SCD1U16V2KX-3GP
1 2
DY
DY
4
98
97
96
95
92
91
90
86
89
85
107
84
83
119
80
78
79
109
108
5
7
15
17
4
6
16
18
21
23
33
35
22
24
34
36
39
41
51
53
40
42
50
52
57
59
67
69
56
58
68
70
129
131
141
143
130
132
140
142
147
149
157
159
146
148
158
160
163
165
175
177
164
166
174
176
181
183
191
193
180
182
192
194
10
27
45
62
135
152
169
186
12
29
47
64
137
154
171
188
116
120
126
1
30
203
204
DM1
DM1
A0
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10/AP
A11
A12
A13
A14
A15
A16/BA2
BA0
BA1
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
2mA
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
DQS0#
DQS1#
DQS2#
DQS3#
DQS4#
DQS5#
DQS6#
DQS7#
DQS0
DQS1
DQS2
DQS3
DQS4
DQS5
DQS6
DQS7
ODT0
ODT1
VREF_CA
18uA
VREF_DQ
RESET#
VTT1
500mA
VTT2
DDR3-204P-41-GP-U
DDR3-204P-41-GP-U
62.10017.N41
62.10017.N41
62.10017.P41
H =5.2mm
RAS#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
EVENT#
VDDSPD
NC#1
NC#2
NC#/TEST
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
3
NP1
NP1
NP2
NP2
110
113
WE#
115
114
121
73
74
101
CK0
103
102
CK1
104
M_A_DM0
11
DM0
M_A_DM1
28
DM1
M_A_DM2
46
DM2
M_A_DM3
63
DM3
M_A_DM4
136
DM4
M_A_DM5
153
DM5
M_A_DM6
170
DM6
M_A_DM7
187
DM7
200
SDA
202
SCL
PM_EXTTS#0
198
199
197
SA0
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
3.5A
+1.5V_SUS
MEM_MA_RAS# 9
MEM_MA_WE# 9
MEM_MA_CAS# 9
MEM_MA0_CS#0 9
MEM_MA0_CS#1 9
MEM_MA_CKE0 9
MEM_MA_CKE1 9
MEM_MA_CLK0_P 9
MEM_MA_CLK0_N 9
MEM_MA_CLK1_P 9
MEM_MA_CLK1_N 9
M_A_DM[7..0] 9
SB_SMBDATA 19,21,76
SB_SMBCLK 19,21,76
Layout Note:
Place these Caps near
SO-DIMMA.
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C1802
C1802
1 2
+3.3V_RUN
SODIMM A DECOUPLING (ONE CAP PER POWER PIN)
+1.5V_SUS
C1806
C1806
C1805
C1805
C1804
C1804
C1812
C1812
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
DY
DY
1 2
1 2
1 2
C1813
C1813
C1814
C1814
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
1 2
DY
DY
DY
DY
Note:
If SA0 DIM0 = 0, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA0
SO-DIMMA TS Address is 0x30
If SA0 DIM0 = 1, SA1_DIM0 = 0
SO-DIMMA SPD Address is 0xA2
SO-DIMMA TS Address is 0x32
PM_EXTTS#0
C1809
C1809
C1808
C1808
C1807
C1807
C1815
C1815
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U 10V2KX-5GP
SCD1U10V2KX-5GP
1 2
1 2
C1816
C1816
C1817
C1817
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
DY
DY
DY
DY
1 2
1 2
DY
DY
1 2
DY
X01
1 2
TC1801
TC1801
SE330U2VDM-L-GP
SE330U2VDM-L-GP
2
+1.5V_SUS
R1806 4K7R 2J-2-GPDYR1806 4K7R 2J-2-GP
1
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
5
4
3
2
http://hobi-elektronika.net
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
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MEM_MB_ADD[0..15] 9
D D
C C
B B
+V_DDR_REF
Place these caps
close to VTT1 and
VTT2.
MEM_MB_BANK2 9
MEM_MB_BANK0 9
MEM_MB_BANK1 9
M_B_DQ[63..0] 9
M_B_DQS#0 9
M_B_DQS#1 9
M_B_DQS#2 9
M_B_DQS#3 9
M_B_DQS#4 9
M_B_DQS#5 9
M_B_DQS#6 9
M_B_DQS#7 9
M_B_DQS0 9
M_B_DQS1 9
M_B_DQS2 9
M_B_DQS3 9
M_B_DQS4 9
M_B_DQS5 9
M_B_DQS6 9
M_B_DQS7 9
MEM_MB0_ODT0 9
SCD01U50V3KX-4GP
SCD01U50V3KX-4GP
MEM_MB0_ODT1 9
C1905
SCD1U10V2KX-5GP
C1905
SCD1U10V2KX-5GP
C1904
C1904
1 2
1 2
C1901
C1901
DDR3_B_DRAMR ST# 9
+0.75V_DDR_VTT
1 2
C1918
C1918
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
1 2
1 2
C1919
C1919
C1920
C1920
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1 U10V2KX-5GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
SCD1U10V2KX-5GP
DY
DY
C1921
C1921
1 2
MEM_MB_ADD0
MEM_MB_ADD1
MEM_MB_ADD2
MEM_MB_ADD3
MEM_MB_ADD4
MEM_MB_ADD5
MEM_MB_ADD6
MEM_MB_ADD7
MEM_MB_ADD8
MEM_MB_ADD9
MEM_MB_ADD10
MEM_MB_ADD11
MEM_MB_ADD12
MEM_MB_ADD13
MEM_MB_ADD14
MEM_MB_ADD15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
M_B_DQS0
M_B_DQS1
M_B_DQS2
M_B_DQS3
M_B_DQS4
M_B_DQS5
M_B_DQS6
M_B_DQS7
SCD1U 16V2KX-3GP
SCD1U16V2KX-3GP
1 2
DY
DY
4
DM2
DM2
98
A0
97
A1
96
A2
95
A3
92
A4
91
A5
90
A6
86
A7
89
A8
85
A9
107
A10/AP
84
A11
83
A12
119
A13
80
A14
78
A15
79
A16/BA2
109
BA0
108
BA1
5
DQ0
7
DQ1
15
DQ2
17
DQ3
4
DQ4
6
DQ5
16
DQ6
18
DQ7
21
DQ8
23
DQ9
33
DQ10
35
DQ11
22
DQ12
24
DQ13
34
DQ14
36
DQ15
39
DQ16
41
DQ17
51
DQ18
53
DQ19
40
DQ20
42
DQ21
50
DQ22
52
DQ23
57
DQ24
59
DQ25
67
DQ26
69
DQ27
56
DQ28
58
DQ29
68
DQ30
70
DQ31
129
DQ32
131
DQ33
141
DQ34
143
DQ35
130
DQ36
132
DQ37
140
DQ38
142
DQ39
147
DQ40
149
DQ41
157
DQ42
159
DQ43
146
DQ44
148
DQ45
158
DQ46
160
DQ47
163
DQ48
165
DQ49
175
DQ50
177
DQ51
164
DQ52
166
DQ53
174
DQ54
176
DQ55
181
DQ56
183
DQ57
191
DQ58
193
DQ59
180
DQ60
182
DQ61
192
DQ62
194
DQ63
10
DQS0#
27
DQS1#
45
DQS2#
62
DQS3#
135
DQS4#
152
DQS5#
169
DQS6#
186
DQS7#
12
DQS0
29
DQS1
47
DQS2
64
DQS3
137
DQS4
154
DQS5
171
DQS6
188
DQS7
116
ODT0
120
ODT1
126
VREF_CA
1
VREF_DQ
30
RESET#
203
VTT1
204
VTT2
62.10017.N11
62.10017.N11
62.10017.N61
500mA
DDR3-204P-40-GP-U
DDR3-204P-40-GP-U
2mA
18uA
EVENT#
VDDSPD
NC#/TEST
VDD10
VDD11
VDD12
VDD13
VDD14
VDD15
VDD16
VDD17
VDD18
RAS#
CAS#
CS0#
CS1#
CKE0
CKE1
CK0#
CK1#
NC#1
NC#2
VDD1
VDD2
VDD3
VDD4
VDD5
VDD6
VDD7
VDD8
VDD9
NP1
NP1
NP2
NP2
110
113
WE#
115
114
121
73
74
101
CK0
103
102
CK1
104
M_B_DM0
11
DM0
M_B_DM1
28
DM1
M_B_DM2
46
DM2
M_B_DM3
63
DM3
M_B_DM4
136
DM4
M_B_DM5
153
DM5
M_B_DM6
170
DM6
M_B_DM7
187
DM7
200
SDA
202
SCL
PM_EXTTS#1
198
199
197
SA0
201
SA1
77
122
125
75
76
81
82
87
88
93
94
99
100
105
106
111
112
117
118
123
124
2
VSS
3
VSS
8
VSS
9
VSS
13
VSS
14
VSS
19
VSS
20
VSS
25
VSS
26
VSS
31
VSS
32
VSS
37
VSS
38
VSS
43
VSS
44
VSS
48
VSS
49
VSS
54
VSS
55
VSS
60
VSS
61
VSS
65
VSS
66
VSS
71
VSS
72
VSS
127
VSS
128
VSS
133
VSS
134
VSS
138
VSS
139
VSS
144
VSS
145
VSS
150
VSS
151
VSS
155
VSS
156
VSS
161
VSS
162
VSS
167
VSS
168
VSS
172
VSS
173
VSS
178
VSS
179
VSS
184
VSS
185
VSS
189
VSS
190
VSS
195
VSS
196
VSS
205
VSS
206
VSS
3.5A
+1.5V_SUS
MEM_MB_RAS# 9
MEM_MB_WE# 9
MEM_MB_CAS# 9
MEM_MB0_CS#0 9
MEM_MB0_CS#1 9
MEM_MB_CKE0 9
MEM_MB_CKE1 9
MEM_MB_CLK0_P 9
MEM_MB_CLK0_N 9
MEM_MB_CLK1_P 9
MEM_MB_CLK1_N 9
M_B_DM[7..0] 9
SB_SMBDATA 18,21,76
SB_SMBCLK 18,21,76
+3.3V_RUN
3
C1902
SCD1U10V2KX-5GP
C1902
SCD1U10V2KX-5GP
1 2
SO-DIMMB is placed farther from
the Processor than SO-DIMMA
Layout Note:
Place these Caps near
SO-DIMMB.
+3.3V_RUN
C1906
C1906
C1912
C1912
+1.5V_SUS
1 2
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
DY
DY
2
+1.5V_SUS
PM_EXTTS#1
1 2
DY
R1906 4K7R2J-2-GPDYR1906 4K7R2J-2-GP
SODIMM B DECOUPLING (ONE CAP PER POWER PIN)
C1907
C1907
C1913
C1913
1 2
1 2
C1908
C1908
C1909
C1909
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
C1914
C1914
C1915
C1915
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
DY
DY
DY
DY
DY
DY
1 2
1 2
1 2
C1911
C1911
C1910
C1910
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1 U10V2KX-5GP
SCD1U10V2KX-5GP
C1917
C1917
C1916
C1916
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
SC10U10V5ZY-1GP
1 2
1 2
1 2
DY
DY
DY
DY
1
H = 9.2mm
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
5
4
3
2
http://hobi-elektronika.net
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiw an, R.O.C.
DDR3-SODIMM2
DDR3-SODIMM2
DDR3-SODIMM2
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
19 90 Thursday, May 27, 2010
19 90 Thursday, May 27, 2010
19 90 Thursday, May 27, 2010
A00
A00
A00
of
Page 20
5
SSID = S.B
SB700 A12 : 71.SB82 0.M02
D D
Place R <100mils form
pins AD29,AD28
LAN
WLAN
C C
X01
B B
A A
C2014
C2014
SC12P50V2JN-3GP
SC12P50V2JN-3GP
C2001 SC150P50V2KX-GP C2001 SC150P50V2KX-GP
1 2
ALINK_NBRX_SBTX_P0 12
ALINK_NBRX_SBTX_N0 12
ALINK_NBRX_SBTX_P1 12
ALINK_NBRX_SBTX_N1 12
ALINK_NBRX_SBTX_P2 12
ALINK_NBRX_SBTX_N2 12
ALINK_NBRX_SBTX_P3 12
ALINK_NBRX_SBTX_N3 12
ALINK_NBTX_SBRX_P0 12
ALINK_NBTX_SBRX_N0 12
ALINK_NBTX_SBRX_P1 12
ALINK_NBTX_SBRX_N1 12
ALINK_NBTX_SBRX_P2 12
ALINK_NBTX_SBRX_N2 12
ALINK_NBTX_SBRX_P3 12
ALINK_NBTX_SBRX_N3 12
+1.1V_RUN_PCIE_VDDR
PCIE_TXP1 76
PCIE_TXN1 76
PCIE_TXP0 76
PCIE_TXN0 76
X02
NOTE: SB8XX ONLY SUPPORTS 2 GPP
PORT 2 AND 3 IS NOT SUPPORTED. (From CRB)
NB_GPPSB_CLK 13
NB_GPPSB_CLK# 13
NB_REFCLK_P 13
NB_REFCLK_N 13
CLK_NBHT_CLK 13
CLK_NBHT_CLK# 13
CPU_CLK 10
CPU_CLK# 10
CLK_PCIE_MINI1 76
CLK_PCIE_MINI1# 76
CLK_PCIE_LAN 76
CLK_PCIE_LAN# 76
CLK_48M_CARD 32
1nd 82.30020.851
2nd 82.30020.791
R2017 1MR2J-1-GP R2017 1MR2J-1-GP
1 2
X2001
X2001
1 2
XTAL-25MHZ-102-GP
XTAL-25MHZ-102-GP
1 2
5
R2024 22R2J-2-GP R2024 22R2J-2-GP
C2002 SCD1U10V2KX-5GP C2002 SCD1U10V2KX-5GP
1 2
C2003 SCD1U10V2KX-5GP C2003 SCD1U10V2KX-5GP
1 2
C2004 SCD1U10V2KX-5GP C2004 SCD1U10V2KX-5GP
1 2
C2005 SCD1U10V2KX-5GP C2005 SCD1U10V2KX-5GP
1 2
C2006 SCD1U10V2KX-5GP C2006 SCD1U10V2KX-5GP
1 2
C2007 SCD1U10V2KX-5GP C2007 SCD1U10V2KX-5GP
1 2
C2008 SCD1U10V2KX-5GP C2008 SCD1U10V2KX-5GP
1 2
C2009 SCD1U10V2KX-5GP C2009 SCD1U10V2KX-5GP
1 2
LAN
WLAN
1 2
C2015
C2015
SC12P50V2JN-3GP
SC12P50V2JN-3GP
1 2
R2002 590R2F-GP R2002 590R2F-GP
R2007 2KR2F-3-GP R2007 2KR2F-3-GP
1 2
1 2
1 2
1 2
PCIE_RXP1 76
PCIE_RXN1 76
PCIE_RXP0 76
PCIE_RXN0 76
RN2001
RN2001
2 3
SRN0J-6-GP
SRN0J-6-GP
1
RN2002
RN2002
2 3
SRN22-3-GP
SRN22-3-GP
1
RN2003
RN2003
2 3
SRN0J-6-GP
SRN0J-6-GP
1
RN2004
RN2004
2 3
SRN0J-6-GP
SRN0J-6-GP
1
TP2012 TP2012
TP2013 TP2013
RN2005
RN2005
2 3
SRN0J-6-GP
SRN0J-6-GP
1
RN2006
RN2006
2 3
SRN0J-6-GP
SRN0J-6-GP
1
R2019 22R2J-2-GP R2019 22R2J-2-GP
1 2
25M_X1
25M_X2
1 2
1 2
C2018 SCD1U10V2KX-5GP C2018 SCD1U10V2KX-5GP
C2019 SCD1U10V2KX-5GP C2019 SCD1U10V2KX-5GP
C2020 SCD1U10V2KX-5GP C2020 SCD1U10V2KX-5GP
C2021 SCD1U10V2KX-5GP C2021 SCD1U10V2KX-5GP
ALINK_NBRX_SBTX_C_P0
ALINK_NBRX_SBTX_C_N0
ALINK_NBRX_SBTX_C_P1
ALINK_NBRX_SBTX_C_N1
ALINK_NBRX_SBTX_C_P2
ALINK_NBRX_SBTX_C_N2
ALINK_NBRX_SBTX_C_P3
ALINK_NBRX_SBTX_C_N3
SB_PCIE_CLK
SB_PCIE_CLK#
4
DISP_CLKP_R
DISP_CLKN_R
4
CLK_NBHT_CLK_R
CLK_NBHT_CLK#_R
4
CPU_HT_CLK
CPU_HT_CLK#
4
CLK_NB_GFX_SB
1
CLK_NB_GFX#_SB
1
CLK_MINI1_R
CLK_MINI1#_R
4
LAN_CLK_R
LAN_CLK#_R
4
4
PCIE_RST#_SB
A_RST#_R A_RST#
SB_PCIE_CALRP
SB_PCIE_CALRN
PCIE_C_TXP1
PCIE_C_TXN1
PCIE_C_TXP0
PCIE_C_TXN0
OSC_CLK
25M_X1
25M_X2
4
U2A
U2A
P1
PCIE_RST#
L1
A_RST#
AD26
A_TX0P
AD27
A_TX0N
AC28
A_TX1P
AC29
A_TX1N
AB29
A_TX2P
AB28
A_TX2N
AB26
A_TX3P
AB27
A_TX3N
AE24
A_RX0P
AE23
A_RX0N
AD25
A_RX1P
AD24
A_RX1N
AC24
A_RX2P
AC25
A_RX2N
AB25
A_RX3P
AB24
A_RX3N
AD29
PCIE_CALRP
AD28
PCIE_CALRN
AA28
GPP_TX0P
AA29
GPP_TX0N
Y29
GPP_TX1P
Y28
GPP_TX1N
Y26
GPP_TX2P
Y27
GPP_TX2N
W28
GPP_TX3P
W29
GPP_TX3N
AA22
GPP_RX0P
Y21
GPP_RX0N
AA25
GPP_RX1P
AA24
GPP_RX1N
W23
GPP_RX2P
V24
GPP_RX2N
W24
GPP_RX3P
W25
GPP_RX3N
M23
PCIE_RCLKP/NB_LNK_CLKP
P23
PCIE_RCLKN/NB_LNK_CLKN
U29
NB_DISP_CLKP
U28
NB_DISP_CLKN
T26
NB_HT_CLKP
T27
NB_HT_CLKN
V21
CPU_HT_CLKP
T21
CPU_HT_CLKN
V23
SLT_GFX_CLKP
T23
SLT_GFX_CLKN
L29
GPP_CLK0P
L28
GPP_CLK0N
N29
GPP_CLK1P
N28
GPP_CLK1N
M29
GPP_CLK2P
M28
GPP_CLK2N
T25
GPP_CLK3P
V25
GPP_CLK3N
L24
GPP_CLK4P
L23
GPP_CLK4N
P25
GPP_CLK5P
M25
GPP_CLK5N
P29
GPP_CLK6P
P28
GPP_CLK6N
N26
GPP_CLK7P
N27
GPP_CLK7N
T29
GPP_CLK8P
T28
GPP_CLK8N
L25
14M_25M_48M_OSC
L26
25M_X1
L27
25M_X2
SB820M-1-GP
SB820M-1-GP
3
Part 1 of 5
Part 1 of 5
PCICLK4/14M_OSC/GPO39
PCI CLKS
PCI CLKS
PCI EXPRESS INTERFACES
PCI EXPRESS INTERFACES
REQ2#/CLK_REQ8#/GPIO41
REQ3#/CLK_REQ5#/GPIO42
GNT3#/CLK_REQ7#/GPIO46
LDRQ1#/CLK_REQ6#/GPIO49
ALLOW_LDTSTP/DMA_ACTIVE#
CLOCK GENERATOR
CLOCK GENERATOR
CPU
CPU
RTC
RTC
PCICLK0
PCICLK1/GPO36
PCICLK2/GPO37
PCICLK3/GPO38
PCIRST#
AD0/GPIO0
AD1/GPIO1
AD2/GPIO2
AD3/GPIO3
AD4/GPIO4
AD5/GPIO5
AD6/GPIO6
AD7/GPIO7
AD8/GPIO8
AD9/GPIO9
AD10/GPIO10
AD11/GPIO11
AD12/GPIO12
AD13/GPIO13
AD14/GPIO14
AD15/GPIO15
AD16/GPIO16
AD17/GPIO17
AD18/GPIO18
AD19/GPIO19
AD20/GPIO20
AD21/GPIO21
AD22/GPIO22
AD23/GPIO23
AD24/GPIO24
AD25/GPIO25
AD26/GPIO26
AD27/GPIO27
AD28/GPIO28
AD29/GPIO29
AD30/GPIO30
AD31/GPIO31
FRAME#
DEVSEL#
REQ1#/GPIO40
PCI INTERFACE LPC
PCI INTERFACE LPC
GNT1#/GPO44
GNT2#/GPO45
CLKRUN#
INTE#/GPIO32
INTF#/GPIO33
INTG#/GPIO34
INTH#/GPIO35
LPCCLK0
LPCCLK1
LFRAME#
SERIRQ/GPIO48
PROCHOT#
LDT_STP#
LDT_RST#
INTRUDER_ALERT#
VDDBT_RTC_G
CBE0#
CBE1#
CBE2#
CBE3#
IRDY#
TRDY#
PAR
STOP#
PERR#
SERR#
REQ0#
GNT0#
LOCK#
LAD0
LAD1
LAD2
LAD3
LDRQ0#
LDT_PG
32K_X1
32K_X2
RTCCLK
http://hobi-elektronika.net
3
W2
W1
W3
PCI_CLK3_R
W4
Y1
PCI_RST#
V2
AA1
AA4
AA3
AB1
AA5
AB2
AB6
AB5
AA6
AC2
AC3
AC4
AC1
AD1
AD2
AC6
AE2
AE1
AF8
AE3
AF1
AG1
AF2
AE9
AD9
AC11
AF6
AF4
AF3
AH2
AG2
AH3
AA8
AD5
AD8
AA10
AE8
AB9
AJ3
AE7
AC5
AF5
AE6
AE4
AE11
AH5
AH4
SB_GPIO42
AC12
AD12
AJ5
AH6
SB_GPIO46
AB12
AB11
AD7
AJ6
AG6
AG4
AJ4
H24
H25
LPC_LAD0_R
J27
LPC_LAD1_R
J26
LPC_LAD2_R
H29
LPC_LAD3_R
H28
G28
TP_LPC_LDRQ0#
J25
TP_LPC_LDRQ1#
AA18
AB19
G21
H21
K19
G22
J24
32K_X1
C1
32K_X2_R
C2
RTC_CLK
D2
INTRUDER_ALERT#
B2
B1
R2009 22R2J-2-GP R2009 22R2J-2-GP
1
TP2008 TP2008
SB_GPIO_PCIE_RST# 21
PCIE_RST#_SB
SB_GPIO28
1
SB_GPIO29
1
SB_GPIO_A_RST# 21
1
1
RN2009 SRN33J-4-GP RN2009 SRN33J-4-GP
1
1 2
1'nd 73.01G08.DHG
2'nd 73.01G08.L04
PCI_AD23 24
VDDR_SEL 24,51
PCI_AD25 24
PCI_AD26 24
PCI_AD27 24
TP2010 TP2010
TP2011 TP2011
1'nd 73.01G08.DHG
2'nd 73.01G08.L04
A_RST#
TP2003 TP2003
TP2004 TP2004
RN2008
RN2008
SRN22-3-GP
SRN22-3-GP
2 3
1
1
2
3
4 5
1
1
4
8
7
6
X01
TP2005 TP2005
TP2006 TP2006
INT_SERIRQ 37
ALLOW_LDTSTOP 13
CPU_PROCHOT# 10
CPU_LDT_PWRGD 10,42
CPU_LDT_STOP# 10,13
CPU_LDT_RST# 10
1 2
R2018 10R2J-2-GP R2018 10R2J-2-GP
TP2007 TP2007
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2017
C2017
1 2
DY
DY
2
X01
U2002
U2002
SNLVC1G08DCKRG4-GP
SNLVC1G08DCKRG4-GP
1
A
VCC
2
B
DY
DY
GND3Y
U2001
U2001
SNLVC1G08DCKRG4-GP
SNLVC1G08DCKRG4-GP
1
A
2
B
DY
DY
GND3Y
1 2
R2021
R2021
0R0402-PAD
0R0402-PAD
LPC Bus Routing first connects to
MINICARD then connects to KBC
RTCCLK_KBC 37
RTC_CLK 39
+RTC_CELL
2
PCI_CLK1 24
PCI_CLK2 24
PCI_CLK3 24,70
PCLK_FWH 24
5
4
1 2
R2025 33R2J-2-GP R2025 33R2J-2-GP
+3.3V_ALW
5
VCC
4
PM_CLKRUN# 37
PCLK_KBC 24,37
LPCCLK1 24
LPC_LAD0 37
LPC_LAD1 37
LPC_LAD2 37
LPC_LAD3 37
LPC_LFRAME# 37,70
STRAP PIN
X01
C2013
C2013
SC150P50V2KX-GP
SC150P50V2KX-GP
1 2
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
C2010
C2010
1 2
DY
DY
PLTRST#
32K_X1
32K_X2_R 32K_X2
Main Source
Main Source
Main Source
Title
Title
Title
SB820M_PCIE&PCI_(1/5)
SB820M_PCIE&PCI_(1/5)
SB820M_PCIE&PCI_(1/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
placed CAP
closed SB820M
X01
+3.3V_RUN +3.3V_ALW
1 2
R2026
R2026
10KR2J-3-GP
10KR2J-3-GP
R2028
R2028
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
R2005 0R0402-PAD R2005 0R0402-PAD
1 2
R2008 0R0402-PAD R2008 0R0402-PAD
1 2
LPC_LAD0_R 70
LPC_LAD1_R 70
LPC_LAD2_R 70
LPC_LAD3_R 70
1 2
R2014
R2014
20MR3-GP
20MR3-GP
R2016
R2016
1 2
0R0402-PAD
0R0402-PAD
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
PCI_CLK3
EC2002
EC2002
PLTRST#_LAN_WLAN 70,76
PLTRST#_NB_GPU 13
PLTRST#_EC 37
X01
1 2
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
4
1
2 3
X2002
X2002
X-32D768KHZ-38GPU
X-32D768KHZ-38GPU
1 2
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
20 90 Thursday, May 27, 2010
20 90 Thursday, May 27, 2010
20 90 Thursday, May 27, 2010
1
1 2
DY
DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
NB
KBC
C2011
C2011
C2012
C2012
of
of
of
A00
A00
A00
Page 21
5
4
3
2
1
USB
SSID = S.B
+3.3V_RUN
RN2101
RN2101
1
2 3
SRN2K2J-1-G P
D D
+3.3V_ALW
C C
B B
+3.3V_ALW
A A
SRN2K2J-1-GP
1 2
RN2103
RN2103
1
4
2 3
SRN10KJ-5-G P
SRN10KJ-5-GP
R2134
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
1 2
DY
DY
R2124
R2124
10KR2J-3-GP
10KR2J-3-GP
TP_SB_GPIO64
TP_SB_GPIO63
USB_OC#2_3
USB_OC#0_1
R2134
4K7R2J-2-GP
4K7R2J-2-GP
R2108
R2108
2K2R2J-2-GP
2K2R2J-2-GP
R2110
R2110
2K2R2J-2-GP
2K2R2J-2-GP
R2112
R2112
2K2R2J-2-GP
2K2R2J-2-GP
R2113
R2113
10KR2J-3-GP
10KR2J-3-GP
R2114
R2114
10KR2J-3-GP
10KR2J-3-GP
R2115
R2115
10KR2J-3-GP
10KR2J-3-GP
R2116
R2116
10KR2J-3-GP
10KR2J-3-GP
R2117
R2117
10KR2J-3-GP
10KR2J-3-GP
R2118
R2118
10KR2J-3-GP
10KR2J-3-GP
R2119
R2119
10KR2J-3-GP
10KR2J-3-GP
R2127
R2127
1KR2J-1-GP
1KR2J-1-GP
Close SB
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
C2101 SCD1U10V2KX-5GP
C2101 SCD1U10V2KX-5GP
4
R2135
R2135
10KR2J-3-GP
10KR2J-3-GP
KBC_RSMRST#
SIO_EXT_WAKE#
SIO_EXT_SCI#
SIO_EXT_SMI#
SB_SDIN_CODEC
ACZ_BIT_CLK
SP_VRAM_SEL
PM_RSMRST#_R
RN2102
RN2102
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
1 2
RN2104
RN2104
1
2 3
SRN10KJ-5-G P
SRN10KJ-5-GP
TP2121 TP2121
1
TP2122 TP2122
1
TP2134 TP2134
1
TP2135 TP2135
1
5
SB_SMBCLK
SB_SMBDATA
MINI1_CLK_REQ#
SMB_DATA
SMB_CLK
TALERT#
SB_TEST2
SB_TEST1
SB_TEST0
PCIE_WAKE#
GBE_MDIO
8
GBE_CRS
7
GBE_COL
6
GBE_RXERR
GBE_PHY_INTR
SCL2
4
SDA2
JTAG_TDI
JTAG_RST#
X01
DY
DY
X00
SB_AZ_CODEC_BITCLK 30
SB_AZ_CODEC_SDOUT 30
SB_AZ_CODEC_SYNC 30
SB_AZ_CODEC_RST# 30
SIO_RCIN#
1 2
C2105
C2105
SC180P50V2JN-1GP
SC180P50V2JN-1GP
SB_SDIN_CODEC 30
GbE Controller Not Enabled
EC Not Implemented
SIO_EXT_WAKE# 37
PM_SLP_S3# 37,41,42,49,50,52,54
PM_SLP_S5# 37,49
PM_PWRBTN# 37
SB_PWRGD 41
SUS_STAT# 13
SIO_A20GATE 37
SIO_RCIN# 37
SIO_EXT_SCI# 37
SIO_EXT_SMI# 37
PCIE_WAKE# 76
H_THERMTRIP# 10,37,39,42
NB_PWRGD 41
KBC_RSMRST# 37
SB_GPIO_A_RST# 20
SB_GPIO_PCIE_RST# 20
ACZ_SPKR 30
SB_SMBCLK 18,19,76
SB_SMBDATA 18,19,76
MINI1_CLK_REQ# 76
TALERT# 10,39
ACZ_SDATAOUT_R 24
1 2
1 2
1 2
1 2
R2111
R2111
0R0402-PAD
0R0402-PAD
R2125
R2125
0R0402-PAD
0R0402-PAD
R2126 0R0402-PAD R2126 0R0402-PAD
1130
R2129 0R2J-2-GP R2129 0R2J-2-GP
R2130 0R2J-2-GP R2130 0R2J-2-GP
USB_OC#2_3 63
USB_OC#0_1 63
33R2J-2-GPR2120 33R2J-2-GPR2120
33R2J-2-GPR2121 33R2J-2-GPR2121
33R2J-2-GPR2122 33R2J-2-GPR2122
33R2J-2-GPR2123 33R2J-2-GPR2123
4
TP2101 TP2101
1 2
TP2120 TP2120
1 2
DY
1 2
1 2
1 2
not use
TP2113 TP2113
TP2118 TP2118
SBD DDR RESET
TP2144 TP2144
TP2138 TP2138
TP2139 TP2139
TP2137 TP2137
TP2132 TP2132
TP2133 TP2133
TP2128 TP2128
TP2131 TP2131
TP2116 TP2116
TP2117 TP2117
TP_PCI_PME#
1
PM_PWRBTN#_R
R2106 0R0402-PAD R2106 0R0402-PAD
SB_TEST0
SB_TEST1
SB_TEST2
SYS_RESET#
1
SB_THERMTRIP# SB_THERMTRIP#
R2109 0R2J-2-GPDYR2109 0R2J-2-GP
PM_RSMRST#_R
TP_SB_GPIO64
TP_SB_GPIO63
SB_GPIO_A_RST#_R
SB_GPIO_PCIE_RST#_R
1 2
1 2
SMB_CLK
SMB_DATA
SP_VRAM_SEL
MINI1_CLK_REQ#
SB_GPIO51
1
GEVENT7#
1
SB_OSCIN
1
USB_OC7#
1
USB_OC6#
1
TALERT#
USB_OC4#
1
TP_JTAG_TDO
1
TP_JTAG_TCK
1
USB_OC#2_3
USB_OC#0_1
ACZ_BIT_CLK
ACZ_SYNC_R
ACZ_RST#_R
GBE_COL
GBE_CRS
GBE_MDIO
GBE_RXERR
GBE_PHY_INTR
TP_DEBUG_DAT
1
TP_DEBUG_CLK
1
SPI_CS2#
1
GPO160
1
SCL0
SDA0
U2D
U2D
J2
PCI_PME#/GEVENT4#
K1
RI#/GEVENT22#
D3
SPI_CS3#/GBE_STAT1/GEVENT21#
F1
SLP_S3#
H1
SLP_S5#
F2
PWR_BTN#
H5
PWR_GOOD
G6
SUS_STAT#
B3
TEST0
C4
TEST1/TMS
F6
TEST2
AD21
GA20IN/GEVENT0#
AE21
KBRST#/GEVENT1#
K2
LPC_PME#/GEVENT3#
J29
LPC_SMI#/GEVENT23#
H2
GEVENT5#
J1
SYS_RESET#/GEVENT19#
H6
WAKE#/GEVENT8#
F3
IR_RX1/GEVENT20#
J6
THRMTRIP#/SMBALERT#/GEVENT2#
AC19
NB_PWRGD
G1
RSMRST#
AD19
CLK_REQ4#/SATA_IS0#/GPIO64
AA16
CLK_REQ3#/SATA_IS1#/GPIO63
AB21
SMARTVOLT1/SATA_IS2#/GPIO50
AC18
CLK_REQ0#/SATA_IS3#/GPIO60
AF20
SATA_IS4#/FANOUT3/GPIO55
AE19
SATA_IS5#/FANIN3/GPIO59
AF19
SPKR/GPIO66
AD22
SCL0/GPIO43
AE22
SDA0/GPIO47
F5
SCL1/GPIO227
F4
SDA1/GPIO228
AH21
CLK_REQ2#/FANIN4/GPIO62
AB18
CLK_REQ1#/FANOUT4/GPIO61
E1
IR_LED#/LLB#/GPIO184
AJ21
SMARTVOLT2/SHUTDOWN#/GPIO51
H4
DDR3_RST#/GEVENT7#
D5
GBE_LED0/GPIO183
D7
GBE_LED1/GEVENT9#
G5
GBE_LED2/GEVENT10#
K3
GBE_STAT0/GEVENT11#
AA20
CLK_REQG#/GPIO65/OSCIN/IDLEEXT#
H3
BLINK/USB_OC7#/GEVENT18#
D1
USB_OC6#/IR_TX1/GEVENT6#
E4
USB_OC5#/IR_TX0/GEVENT17#
D4
USB_OC4#/IR_RX0/GEVENT16#
E8
USB_OC3#/AC_PRES/TDO/GEVENT15#
F7
USB_OC2#/TCK/GEVENT14#
E7
USB_OC1#/TDI/GEVENT13#
F8
USB_OC0#/TRST#/GEVENT12#
M3
AZ_BITCLK
N1
AZ_SDOUT
L2
AZ_SDIN0/GPIO167
M2
AZ_SDIN1/GPIO168
M1
AZ_SDIN2/GPIO169
M4
AZ_SDIN3/GPIO170
N2
AZ_SYNC
P2
AZ_RST#
T1
GBE_COL
T4
GBE_CRS
L6
GBE_MDCK
L5
GBE_MDIO
T9
GBE_RXCLK
U1
GBE_RXD3
U3
GBE_RXD2
T2
GBE_RXD1
U2
GBE_RXD0
T5
GBE_RXCTL/RXDV
V5
GBE_RXERR
P5
GBE_TXCLK
M5
GBE_TXD3
P9
GBE_TXD2
T7
GBE_TXD1
P7
GBE_TXD0
M7
GBE_TXCTL/TXEN
P4
GBE_PHY_PD
M9
GBE_PHY_RST#
V7
GBE_PHY_INTR
E23
PS2_DAT/SDA4/GPIO187
E24
PS2_CLK/SCL4/GPIO188
F21
SPI_CS2#/GBE_STAT2/GPIO166
G29
FC_RST#/GPO160
D27
PS2KB_DAT/GPIO189
F28
PS2KB_CLK/GPIO190
F29
PS2M_DAT/GPIO191
E27
PS2M_CLK/GPIO192
SB820M-1-GP
SB820M-1-GP
Part 4 of 5
Part 4 of 5
HD AUDIO
HD AUDIO
GBE LAN
GBE LAN
http://hobi-elektronika.net
3
USBCLK/14M_25M_48M_OSC
ACPI / WAKE UP EVENTS
ACPI / WAKE UP EVENTS
GPIO
GPIO
USB OC
USB OC
EC_PWM0/EC_TIMER0/GPIO197
EC_PWM1/EC_TIMER1/GPIO198
EC_PWM2/EC_TIMER2/GPIO199
EC_PWM3/EC_TIMER3/GPIO200
EMBEDDED CTRL
EMBEDDED CTRL
USB_RCOMP
USB_FSD1P/GPIO186
USB_FSD0P/GPIO185
USB_HSD13P
USB_HSD13N
USB 1.1 USB MISC EMBEDDED CTRL
USB 1.1 USB MISC EMBEDDED CTRL
USB_HSD12P
USB_HSD12N
USB_HSD11P
USB_HSD11N
USB_HSD10P
USB_HSD10N
USB_HSD9N
USB_HSD8N
USB_HSD7N
USB 2.0
USB 2.0
USB_HSD6N
USB_HSD5N
USB_HSD4N
USB_HSD3N
USB_HSD2N
USB_HSD1N
USB_HSD0N
SCL2/GPIO193
SDA2/GPIO194
SCL3_LV/GPIO195
SDA3_LV/GPIO196
KSI_0/GPIO201
KSI_1/GPIO202
KSI_2/GPIO203
KSI_3/GPIO204
KSI_4/GPIO205
KSI_5/GPIO206
KSI_6/GPIO207
KSI_7/GPIO208
KSO_0/GPIO209
KSO_1/GPIO210
KSO_2/GPIO211
KSO_3/GPIO212
KSO_4/GPIO213
KSO_5/GPIO214
KSO_6/GPIO215
KSO_7/GPIO216
KSO_8/GPIO217
KSO_9/GPIO218
KSO_10/GPIO219
KSO_11/GPIO220
KSO_12/GPIO221
KSO_13/GPIO222
KSO_14/GPIO223
KSO_15/GPIO224
KSO_16/GPIO225
KSO_17/GPIO226
USB_FSD1N
USB_FSD0N
USB_HSD9P
USB_HSD8P
USB_HSD7P
USB_HSD6P
USB_HSD5P
USB_HSD4P
USB_HSD3P
USB_HSD2P
USB_HSD1P
USB_HSD0P
A10
G19
J10
H11
H9
J8
B12
A12
F11
E11
E14
E12
J12
J14
A13
B13
D13
C13
G12
G14
G16
G18
D16
C16
B14
A14
E18
E16
J16
J18
B17
A17
A16
B16
D25
F23
B26
E26
F25
E22
F22
E21
G24
G25
E28
E29
D29
D28
C29
C28
B28
A27
B27
D26
A26
C26
A24
B25
A25
D24
B24
C24
B23
A23
D22
C22
A22
B22
USB_48M_CLK
USB_RCOMP
TP_USB_PP8
TP_USB_PN8
TP_USB_PP5
TP_USB_PN5
USB_PP3
USB_PN3
SCL2
SDA2
TP2145 TP2145
1
1 2
R2102
R2102
11K8R2F-GP
11K8R2F-GP
USB_PP11 54
USB_PN11 54
USB_PP10 32
USB_PN10 32
TP2140 TP2140
1
TP2141 TP2141
1
TP2142 TP2142
1
TP2143 TP2143
1
TP2114 TP2114
1
TP2115 TP2115
1
USB_PP2 76
USB_PN2 76
USB_PP1 63
USB_PN1 63
USB_PP0 63
USB_PN0 63
USB_PP9 73
USB_PN9 73
USB_PP4 76
USB_PN4 76
Not use
CPU_SIC 10
CPU_SID 10
SB_GPO199 24
SB_GPO200 24
Strap Pin / define to use LPC or SPI ROM
EC Not Implemented
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
SB820M_USB&GPIO_(2/5)
SB820M_USB&GPIO_(2/5)
SB820M_USB&GPIO_(2/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
Pair
0
1
2
3
4
5
6
7
8
9
10
11
12
13
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Device
USB1
USB3
USB2 (I/O Board)
RESERVED
WLAN
RESERVED
RESERVED
RESERVED
RESERVED
BLUETOOTH
CARD READER
CAMERA
RESERVED
RESERVED
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
of
21 90 Thursday, May 27, 2010
21 90 Thursday, May 27, 2010
21 90 Thursday, May 27, 2010
1
A00
A00
A00
Page 22
SSID = S.B
XTAL
1'nd 82.30020.851
C2209
C2209
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
C2210
C2210
1 2
SC12P50V2JN-3GP
SC12P50V2JN-3GP
2'nd 82.30020.791
XTAL-25MHZ-102-GP
DY
DY
DY
DY
XTAL-25MHZ-102-GP
1 2
DY
DY
X2201
X2201
10MR2J-L-GP
10MR2J-L-GP
1 2
R2204
R2204
DY
DY
SATA HDD
SATA ODD
SATA_X1
SATA_X2
SATA_TXP0 59
SATA_TXN0 59
SATA_RXN0 59
SATA_RXP0 59
SATA_TXP1 59
SATA_TXN1 59
SATA_RXN1 59
SATA_RXP1 59
C2201 SCD01U16V2KX-3GP C2201 SCD01U16V2KX-3GP
1 2
C2202 SCD01U16V2KX-3GP C2202 SCD01U16V2KX-3GP
1 2
C2203 SCD01U16V2KX-3GP C2203 SCD01U16V2KX-3GP
1 2
C2204 SCD01U16V2KX-3GP C2204 SCD01U16V2KX-3GP
1 2
C2205 SCD01U16V2KX-3GP C2205 SCD01U16V2KX-3GP
1 2
C2206 SCD01U16V2KX-3GP C2206 SCD01U16V2KX-3GP
1 2
C2208 SCD01U16V2KX-3GP C2208 SCD01U16V2KX-3GP
1 2
C2207 SCD01U16V2KX-3GP C2207 SCD01U16V2KX-3GP
1 2
PLACE SATA AC DECOUPLING
CAPS CLOSE TO SB820M
+1.1V_RUN_AVDD_SATA
SPI ROM in KBC side
Very Close
to SB820
1KR2F-3-GP
1KR2F-3-GP
R2201
R2201
1 2
1 2
R2202 931R2F-1-GP R2202 931R2F-1-GP
SATA_ACT# 66
SATA_X1
SATA_X2
SATA_TXP0_C
SATA_TXN0_C
SATA_RXN0_C
SATA_RXP0_C
SATA_TXP1_C
SATA_TXN1_C
SATA_RXN1_C
SATA_RXP1_C
SATA_CALP
SATA_CALN
U2B
U2B
AH9
SATA_TX0P
AJ9
SATA_TX0N
AJ8
SATA_RX0N
AH8
SATA_RX0P
AH10
SATA_TX1P
AJ10
SATA_TX1N
AG10
SATA_RX1N
AF10
SATA_RX1P
AG12
SATA_TX2P
AF12
SATA_TX2N
AJ12
SATA_RX2N
AH12
SATA_RX2P
AH14
SATA_TX3P
AJ14
SATA_TX3N
AG14
SATA_RX3N
AF14
SATA_RX3P
AG17
SATA_TX4P
AF17
SATA_TX4N
AJ17
SATA_RX4N
AH17
SATA_RX4P
AJ18
SATA_TX5P
AH18
SATA_TX5N
AH19
SATA_RX5N
AJ19
SATA_RX5P
AB14
SATA_CALRP
AA14
SATA_CALRN
AD11
SATA_ACT#/GPIO67
AD16
SATA_X1
AC16
SATA_X2
J5
SPI_DI/GPIO164
E2
SPI_DO/GPIO163
K4
SPI_CLK/GPIO162
K9
SPI_CS1#/GPIO165
G2
ROM_RST#/GPIO161
SB820M-1-GP
SB820M-1-GP
Part 2 of 5
Part 2 of 5
SERIAL ATA
SERIAL ATA
HW MONITOR
HW MONITOR
SPI ROM
SPI ROM
FC_CLK
FC_FBCLKOUT
FC_FBCLKIN
FC_OE#/GPIOD145
FC_AVD#/GPIOD146
FC_WE#/GPIOD148
FC_CE1#/GPIOD149
FC_CE2#/GPIOD150
FC_INT1/GPIOD144
FC_INT2/GPIOD147
FC_ADQ0/GPIOD128
FC_ADQ1/GPIOD129
FC_ADQ2/GPIOD130
FC_ADQ3/GPIOD131
FC_ADQ4/GPIOD132
FC_ADQ5/GPIOD133
FC_ADQ6/GPIOD134
FC_ADQ7/GPIOD135
FC_ADQ8/GPIOD136
FC_ADQ9/GPIOD137
FC_ADQ10/GPIOD138
FC_ADQ11/GPIOD139
FC_ADQ12/GPIOD140
FC_ADQ13/GPIOD141
FC_ADQ14/GPIOD142
FC_ADQ15/GPIOD143
FLASH
FLASH
FANOUT0/GPIO52
FANOUT1/GPIO53
FANOUT2/GPIO54
FANIN0/GPIO56
FANIN1/GPIO57
FANIN2/GPIO58
TEMPIN0/GPIO171
TEMPIN1/GPIO172
TEMPIN2/GPIO173
TEMPIN3/TALERT#/GPIO174
TEMP_COMM
VIN0/GPIO175
VIN1/GPIO176
VIN2/GPIO177
VIN3/GPIO178
VIN4/GPIO179
VIN5/GPIO180
VIN6/GBE_STAT3/GPIO181
VIN7/GBE_LED3/GPIO182
NC#G27
NC2#Y2
AH28
AG28
AF26
AF28
AG29
AG26
AF27
AE29
AF29
AH27
AJ27
AJ26
AH25
AH24
AG23
AH23
AJ22
AG21
AF21
AH22
AJ23
AF23
AJ24
AJ25
AG25
AH26
W5
W6
Y9
W7
V9
W8
B6
A6
A5
B5
C7
A3
B4
A4
C5
A7
B7
B8
A8
G27
Y2
GPIOD[150:128] are open drain GPIO pins
where as GPO160 is an open drain GPO pi n.
These pins are not programmed to GPIO mode by default.
If use as GPIO, need to pull up to 1.8V_RUN
TEMPIN0
TEMPIN1
TEMPIN2
TEMPIN3
VIN0
VIN1
VIN2
VIN3
MEM_1V5
VIN5
VIN6
VIN7
suggest not use HW monitor
MEM_1V5 51
VIN3
VIN2
VIN1
VIN0
TEMPIN3
TEMPIN2
TEMPIN1
TEMPIN0
VIN5
VIN6
VIN7
1
2
3
4 5
1
2
3
4 5
1
2
3
4 5
RN2201
RN2201
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2202
RN2202
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2203
RN2203
8
7
6
SRN10KJ-6-GP
SRN10KJ-6-GP
+3.3V_ALW
+3.3V_ALW
+3.3V_ALW
http://hobi-elektronika.net
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
SB820M_SATA-IDE_(3/5)
SB820M_SATA-IDE_(3/5)
SB820M_SATA-IDE_(3/5)
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
22 90 Thursday, May 27, 2010
22 90 Thursday, May 27, 2010
22 90 Thursday, May 27, 2010
of
A00
A00
A00
Page 23
5
4
3
2
1
SSID = S.B
+3.3V_RUN
0R0603-PAD-1-GP
0R0603-PAD-1-GP
D D
+1.8V_RUN
0R0603-PAD-1-GP
0R0603-PAD-1-GP
+3.3V_RUN
C C
+1.1V_RUN +1.1V_RUN_PCIE_VDDR
PBY160808T-330Y-N-GP
PBY160808T-330Y-N-GP
+3.3V_RUN
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
220 ohm 300mA
+1.1V_RUN +1.1V_RUN_AVDD_SATA
1 2
PBY160808T-330Y-N-GP
B B
A A
PBY160808T-330Y-N-GP
+3.3V_ALW
+1.1V_ALW +1.1V_AVDD_USB
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
220 ohm 300mA
WOL supported: Tied +3.3V_ALW
not supported: Tied +3.3V_RUN
TBDmA
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
DY
DY
R2301
R2301
1 2
R2302
R2302
1 2
-A00
R2306
R2306
1 2
0R0402-PAD
0R0402-PAD
L2303
L2303
1 2
33R 3A
L2304
L2304
1 2
L2305
L2305
33R 3A
L2309
L2309
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2341
C2341
1 2
+3.3V_SB_VDDIO
+1.8V_SB_VDDIO_FC
+3.3V_VDDPL_PCIE
+3.3V_VDDPL_SATA
R2307
R2307
1 2
0R0402-PAD
0R0402-PAD
C2342
C2342
1 2
5
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TC2301
TC2301
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2313
SC1U10V3KX-3GP
C2313
SC1U10V3KX-3GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
DY
DY
DY
DY
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
TC2303
TC2303
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2325
C2325
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
TC2304
TC2304
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2337
C2337
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2343
C2343
1 2
C2301
1 2
1 2
C2307
C2307
C2314
C2314
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2320
C2320
C2319
C2319
1 2
DY
DY
C2326
C2326
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2330
C2330
C2331
C2331
1 2
DY
DY
DY
DY
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C2339
C2339
C2338
C2338
1 2
C2344
C2344
WOL supported: Tied +1.1V_ALW
not supported: Tied +1.1V_RUN
62mA 47mA
1.1V_ALW_VDDPL 3.3V_RUN_VDDPL 3.3V_ALW_VDDXL
C2303
C2303
C2302
C2302
1 2
DY
DY
U2C
U2C
AH1
VDDIO_33_PCIGP
V6
VDDIO_33_PCIGP
Y19
71mA
43mA
600mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2321
C2321
C2322
C2322
1 2
1 2
DY
DY
93mA
567mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2332
C2332
C2333
C2333
1 2
1 2
658mA
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C2340
C2340
1 2
DY
DY
AE5
AC21
AA2
AB4
AC8
AA7
AA9
AF7
AA19
AF22
AE25
AF24
AC22
AE28
U26
V22
V26
V27
V28
V29
W22
W26
AD14
AJ20
AF18
AH20
AG19
AE18
AD18
AE16
A18
A19
A20
B18
B19
B20
C18
C20
D18
D19
D20
E19
C11
D11
SB820M-1-GP
SB820M-1-GP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_33_PCIGP
VDDIO_18_FC
VDDIO_18_FC
VDDIO_18_FC
VDDIO_18_FC
POWER
POWER
VDDPL_33_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDAN_11_PCIE
VDDPL_33_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_11_SATA
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_33_USB_S
VDDAN_11_USB_S
VDDAN_11_USB_S
TBDmA
R2305
R2305
1 2
0R0402-PAD
0R0402-PAD
+1.1V_ALW +3.3V_RUN +3.3V_ALW
4
-A00 -A00
C2349
SC1U10V3KX-3GP
C2349
SC1U10V3KX-3GP
1 2
131mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2301
Part 3 of 5
Part 3 of 5
PCI/GPIO I/O
PCI/GPIO I/O
FLASH I/O
FLASH I/O
GBE LAN
GBE LAN
PCI EXPRESS SERIAL ATA
PCI EXPRESS SERIAL ATA
USB I/O
USB I/O
PLL CLKGEN I/O
PLL CLKGEN I/O
SC1U10V3KX-3GP
SC1U10V3KX-3GP
N13
VDDCR_11
R15
VDDCR_11
N17
VDDCR_11
U13
VDDCR_11
U17
VDDCR_11
V12
VDDCR_11
V18
VDDCR_11
VDDCR_11
VDDCR_11
W12
W18
K28
K29
J28
K26
J21
J20
K21
J22
V1
M10
CORE S0 3.3V_S5 I/O
CORE S0 3.3V_S5 I/O
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDAN_11_CLK
VDDRF_GBE_S
VDDIO_33_GBE_S
GBE PHY not used
R2308
R2308
1 2
0R0402-PAD
0R0402-PAD
L7
L9
M6
P8
A21
D21
B21
K10
L10
J9
T6
T8
F26
G26
+3.3VALW_VDDIO_AZ
M8
A11
B11
3.3V_RUN_VDDPL
M21
1.1V_ALW_VDDPL
L22
F19
D6
3.3V_ALW_VDDXL
L20
VDDCR_11_GBE_S
VDDCR_11_GBE_S
VDDIO_GBE_S
VDDIO_GBE_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDIO_33_S
VDDCR_11_S
VDDCR_11_S
VDDIO_AZ_S
CORE S5
CORE S5
VDDCR_11_USB_S
VDDCR_11_USB_S
VDDPL_33_SYS
VDDPL_11_SYS_S
VDDPL_33_USB_S
VDDAN_33_HWM_S
VDDXL_33_S
C2350
C2350
1 2
220 ohm 300mA
http://hobi-elektronika.net
3
510mA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
400 mA
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
32mA
113mA
TBDmA
197mA
C2304
C2304
1 2
C2315
C2315
1 2
R2303
R2303
1 2
0R0402-PAD
0R0402-PAD
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2309
C2309
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2317
C2317
1 2
DY
DY
-A00
17mA
5mA
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2308
C2308
1 2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C2316
C2316
1 2
+3.3V_ALW
C2329
SC2D2U6D3V3KX-GP
C2329
SC2D2U6D3V3KX-GP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2334
C2334
1 2
DY
DY
+1.1V_RUN
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C2310
C2310
1 2
DY
DY
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
C2318
C2318
1 2
DY
DY
+3.3V_ALW
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C2323
C2323
1 2
+1.1V_ALW
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2327
C2327
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2335
C2335
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2347
C2347
1 2
DY
DY
C2311
C2311
1 2
R2304
R2304
1 2
TC2302
TC2302
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
DY
DY
C2324
C2324
1 2
DY
DY
C2328
C2328
1 2
DY
DY
L2306
L2306
1 2
BLM15AG221SS1D-GP
BLM15AG221SS1D-GP
C2336
C2336
220 ohm 300mA
1 2
DY
DY
+3.3V_ALW
SC2D2U6D3V3KX-GP
SC2D2U6D3V3KX-GP
C2348
C2348
1 2
+3.3V_ALW
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C2345
C2345
1 2
DY
DY
2
+1.1V_RUN +1.1V_RUN_SB_CLKGEN
-A00
+1.1V_ALW +1.1V_ALW_VDDR_USB
U2E
U2E
Part 5 of 5
Y14
VSSIO_SATA
Y16
VSSIO_SATA
AB16
VSSIO_SATA
AC14
VSSIO_SATA
AE12
VSSIO_SATA
AE14
VSSIO_SATA
AF9
VSSIO_SATA
AF11
VSSIO_SATA
AF13
VSSIO_SATA
AF16
VSSIO_SATA
AG8
VSSIO_SATA
AH7
VSSIO_SATA
AH11
VSSIO_SATA
AH13
VSSIO_SATA
AH16
VSSIO_SATA
AJ7
VSSIO_SATA
AJ11
VSSIO_SATA
AJ13
VSSIO_SATA
AJ16
VSSIO_SATA
A9
VSSIO_USB
B10
VSSIO_USB
K11
VSSIO_USB
B9
VSSIO_USB
D10
VSSIO_USB
D12
VSSIO_USB
D14
VSSIO_USB
D17
VSSIO_USB
E9
VSSIO_USB
F9
VSSIO_USB
F12
VSSIO_USB
F14
VSSIO_USB
F16
VSSIO_USB
C9
VSSIO_USB
G11
VSSIO_USB
F18
VSSIO_USB
D9
VSSIO_USB
H12
VSSIO_USB
H14
VSSIO_USB
H16
VSSIO_USB
H18
VSSIO_USB
J11
VSSIO_USB
J19
VSSIO_USB
K12
VSSIO_USB
K14
VSSIO_USB
K16
VSSIO_USB
K18
VSSIO_USB
H19
VSSIO_USB
Y4
EFUSE
D8
VSSAN_HWM
M19
VSSXL
P21
VSSIO_PCIECLK
P20
VSSIO_PCIECLK
M22
VSSIO_PCIECLK
M24
VSSIO_PCIECLK
M26
VSSIO_PCIECLK
P22
VSSIO_PCIECLK
P24
VSSIO_PCIECLK
P26
VSSIO_PCIECLK
T20
VSSIO_PCIECLK
T22
VSSIO_PCIECLK
T24
VSSIO_PCIECLK
V20
VSSIO_PCIECLK
J23
VSSIO_PCIECLK
SB820M-1-GP
SB820M-1-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
SB820M_POWER&GND_(4/5)
SB820M_POWER&GND_(4/5)
SB820M_POWER&GND_(4/5)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Part 5 of 5
GROUND
GROUND
VSSPL_SYS
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
VSSIO_PCIECLK
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
AJ2
VSS
A28
VSS
A2
VSS
E5
VSS
D23
VSS
E25
VSS
E6
VSS
F24
VSS
N15
VSS
R13
VSS
R17
VSS
T10
VSS
P10
VSS
V11
VSS
U15
VSS
M18
VSS
V19
VSS
M11
VSS
L12
VSS
L18
VSS
J7
VSS
P3
VSS
V4
VSS
AD6
VSS
AD4
VSS
AB7
VSS
AC9
VSS
V8
VSS
W9
VSS
W10
VSS
AJ28
VSS
B29
VSS
U4
VSS
Y18
VSS
Y10
VSS
Y12
VSS
Y11
VSS
AA11
VSS
AA12
VSS
G4
VSS
J4
VSS
G8
VSS
G9
VSS
M12
VSS
AF25
VSS
H7
VSS
AH29
VSS
V10
VSS
P6
VSS
N4
VSS
L4
VSS
L8
VSS
M20
H23
H26
AA21
AA23
AB23
AD23
AA26
AC26
Y20
W21
W20
AE26
L21
K20
of
23 90 Thursday, May 20, 2010
23 90 Thursday, May 20, 2010
23 90 Thursday, May 20, 2010
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5
SSID = S.B
4
3
2
1
REQUIRED STRAPS
D D
PCI_CLK1 20
PCI_CLK2 20
PCI_CLK3 20,70
PCLK_FWH 20
C C
PCLK_KBC 20,37
LPCCLK1 20
SB_GPO200 21
SB_GPO199 21
ACZ_SDATAOUT_R 21
+3.3V_RUN +3.3V_ALW
R2402 10KR2J-3-GP
R2402 10KR2J-3-GP
R2403 10KR2J-3-GP
R2403 10KR2J-3-GP
1 2
DY
DY
DY
DY
R2417 10KR2J-3-GP R2417 10KR2J-3-GP
1 2
R2404 10KR2J-3-GP R2404 10KR2J-3-GP
1 2
1 2
R2418 10KR2J-3-GP R2418 10KR2J-3-GP
R2419 10KR2J-3-GP
R2419 10KR2J-3-GP
1 2
1 2
DY
DY
R2401 10KR2J-3-GP
R2401 10KR2J-3-GP
1 2
DY
DY
R2416 10KR2J-3-GP
R2416 10KR2J-3-GP
1 2
DY
DY
R2405 10KR2J-3-GP
R2405 10KR2J-3-GP
1 2
DY
DY
R2420 10KR2J-3-GP R2420 10KR2J-3-GP
1 2
R2406 10KR2J-3-GP R2406 10KR2J-3-GP
1 2
R2421 10KR2J-3-GP
R2421 10KR2J-3-GP
1 2
DY
DY
R2407 2K2R2F-GP
R2407 2K2R2F-GP
1 2
DY
DY
R2422 2K2R2F-GP R2422 2K2R2F-GP
1 2
R2408 2K2R2F-GP R2408 2K2R2F-GP
1 2
DY
DY
R2423 2K2R2F-GP
R2423 2K2R2F-GP
1 2
DY
DY
R2409 10KR2J-3-GP
R2409 10KR2J-3-GP
1 2
R2424 10KR2J-3-GP R2424 10KR2J-3-GP
1 2
DEBUG STRAPS
PCI_AD23 20
VDDR_SEL 20,51
PCI_AD25 20
PCI_AD26 20
PCI_AD27 20
R2414 2K2R2J-2-GP
R2414 2K2R2J-2-GP
R2412 2K2R2J-2-GP
R2412 2K2R2J-2-GP
R2411 2K2R2J-2-GP
R2411 2K2R2J-2-GP
1 2
DY
DY
DY
DY
R2413 2K2R2J-2-GP
R2413 2K2R2J-2-GP
12
1 2
DY
DY
DY
DY
12
DY
DY
R2415 2K2R2J-2-GP
R2415 2K2R2J-2-GP
1 2
B B
REQUIRED SYSTEM STRAPS
PULL
HIGH
PULL
LOW
AZ_SDOUT#
LOW POWER
MODE
PERFORMANCE
MODE
DEFAULT
PCI_CLK1
Allow
PCIE GEN2
DEFAULT
Force
PCIE GEN1
PCI_CLK2
WatchDOG
(NB_PWRGD)
ENABLED
WatchDog
(NB_PWRGD)
DISABLED
DEFAULT
PCI_CLK3
USE
DEBUG
STRAPS
IGNORE
DEBUG
STRAPS
DEFAULT
(PCI_CLK4)
non_Fusion
CLOCK mode
DEFAULT
Fusion
CLOCK mode
USE this pin to determine INT/EXT CLK
PCLK_KBC PCLK_FWH
(LPCCLK0)
ENABLE EC
DISABLE EC
DEFAULT
LPCCLK1
DEFAULT
CLKGEN
ENABLED
(Use Internal)
CLKGEN
DISABLED
(Use External)
SB_GPO200 , SB_GPO199
ROM TYPE:
H, H = Reserved
H, L = SPI ROM
L, H = LPC ROM
L, L = FWH ROM
DEFAULT
PULL
HIGH
PULL
LOW
USE PCI
PLL
BYPASS
PCI PLL
PCI_AD26 PCI_AD27
Disable ILA
AUTORUN
Enable ILA
AUTORUN
PCI_AD25 PCI_AD23
USE FC
PLL
BYPASS FC
PLL
PCI_AD24
USE DEFAULT
PCIE STRAPS
USE EEPROM
PCIE STRAPS
Disable PCI
MEM BOOT
(DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT) (DEFAULT)
Enable PCI
MEM BOOT
Note: SB820 has 15K internal P U FOR P CI _AD[27:23]
Not Applicable to SB820M
but provision for pull-down is required.
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
SB820M_STRAPPING_(5/5)
SB820M_STRAPPING_(5/5)
SB820M_STRAPPING_(5/5)
A3
A3
A3
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
24 90 Thursday, May 27, 2010
24 90 Thursday, May 27, 2010
24 90 Thursday, May 27, 2010
1
of
of
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (VCC_CORE)
CPU (VCC_CORE)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CPU (VCC_CORE)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
25 90 Thursday, May 13, 2010
of
25 90 Thursday, May 13, 2010
of
25 90 Thursday, May 13, 2010
1
A00
A00
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU (VCC_GFXCORE)
CPU (VCC_GFXCORE)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
CPU (VCC_GFXCORE)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
26 90 Thursday, May 13, 2010
of
26 90 Thursday, May 13, 2010
of
26 90 Thursday, May 13, 2010
1
A00
A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
CPU (VSS)
CPU (VSS)
CPU (VSS)
1
of
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27 90 Thursday, May 13, 2010
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
28 90 Thursday, May 13, 2010
28 90 Thursday, May 13, 2010
28 90 Thursday, May 13, 2010
of
of
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
29 90 Thursday, May 13, 2010
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SSID = AUDIO
5
4
3
2
1
D D
SB_AZ_CODEC_BITCLK
1 2
EC3007
EC3007
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+3.3V_RUN
C C
B B
1 2
R3008
R3008
10KR2J-3-GP
10KR2J-3-GP
AMP_MUTE#
+3.3V_RUN
1 2
+3.3V_RUN
Close to codec
1 2
C3001
C3001
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SB_AZ_CODEC_BITCLK 21
SB_SDIN_CODEC 21
SB_AZ_CODEC_SDOUT 21
SB_AZ_CODEC_SYNC 21
SB_AZ_CODEC_RST# 21
C3002
C3002
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
1 2
1 2
AMP_MUTE# 37
C3004
C3004
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Close to codec
33R2J-2-GPR3001 33R2J-2-GPR3001
Remove DMIC
1 2
AUD_DVDDCORE
1 2
C3003
C3003
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
SB_AZ_CODEC_BITCLK
SB_SDIN_CODEC_C0
SB_AZ_CODEC_SDOUT
SB_AZ_CODEC_SYNC
SB_AZ_CODEC_RST#
AMP_MUTE#
PUMP_CAPN
C3014
C3014
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
PUMP_CAPP
AUD_AGND
Version Changing to UA
U3001
U3001
1
DVDD_CORE
9
DVDD
25mA
3
DVDD_IO
6
HDA_BITCLK
8
HDA_SDI
5
HDA_SDO
10
HDA_SYNC
11
HDA_RST#
2
DMIC_CLK/GPIO1
4
DMIC0 /GPIO2
46
DMIC1/GPIO0/SPDIF_OUT_1
48
SPDIF_OUT_0
47
EAPD
35
CAP-
36
CAP+
7
DVSS
33
AVSS
30
AVSS
26
AVSS
42
PVSS
49
GND
92HD79B1A5NLGXTAX-GP
92HD79B1A5NLGXTAX-GP
84mA
HP0_PORT_A_L
HP0_PORT_A_R
VREFOUT _A_OR_F
HP1_PORT_B_L
HP1_PORT_B_R
VREFOUT _C
SPKR_PORT_D_L+
SPKR_PORT_D_LSPKR_PORT_D_R-
SPKR_PORT_D_R+
MONO_OUT
AVDD
AVDD
PVDD
PVDD
SENSE_A
SENSE_B
PORT_C_L
PORT_C_R
PORT_E_L
PORT_E_R
PORT_F_L
PORT_F_R
PC_BEEP
CAP2
VREFFILT
VREG
V-
27
38
39
45
13
14
28
29
23
31
32
AUD_INT_MIC_R_L
19
20
AUD_VREFOUT_C
24
40
41
43
44
15
16
17
18
12
25
22
21
34
37
AUD_SENSE_A
AUD_SENSE_B
AUD_EXT_MIC_L
AUD_EXT_MIC_R
AUD_VREFOUT_B
AUD_HP1_JACK_L
AUD_HP1_JACK_R
AUD_SPK_L+
AUD_SPK_L-
AUD_SPK_RAUD_SPK_R+
AUD_CAP2
AUD_VREFFLT
AUD_V_B
AUD_VREG
+AVDD
1 2
1 2
C3005
C3005
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
AUD_AGND
R3005 60D4R2F-GP R3005 60D4R2F-GP
R3006 60D4R2F-GP R3006 60D4R2F-GP
C3011 SC1U10V3KX-3GP C3011 SC1U10V3KX-3GP
R3007 2K2R2J-2-GP R3007 2K2R2J-2-GP
AUD_SPK_L- 60
AUD_SPK_R+ 60
AUD_PC_BEEP
AUD_PC_BEEP
Trace width>15 mils
1 2
C3016
C3016
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
AUD_AGND AUD_AGND AUD_AGND AUD_AGND
Close to codec
C 3006
C3006
SC1U10V3KX-3GP
SC1U10V3KX-3GP
AUD_EXT_MIC_L 60
AUD_EXT_MIC_R 60
1 2
1 2
1 2
1 2
AUD_SPK_L+ 60
AUD_SPK_R- 60
1 2
C 3017
C3017
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
-A00
R3002
R3002
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
1 2
1016
1 2
C 3018
C3018
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C3008
C3008
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
+5V_RUN
1.4A
1 2
C3015
C3015
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
C 3009
C3009
SC1U10V3KX-3GP
SC1U10V3KX-3GP
AUD_AGND
-A00
+PVDD
1 2
C3010
C3010
SC10U10V5KX-2GP
SC10U10V5KX-2GP
AUD_VREFOUT_B 60
AUD_HP1_JACK_L2 60
AUD_HP1_JACK_R2 60
INT_MIC_L_R 60
C3012
C3012
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C3013
C3013
R3003
R3003
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
R3004
R3004
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
+5V_RUN
-A00
SB_SPKR_R
KBC_BEEP_R
X00
Reserve
R3009
R3009
120KR2F-L- GP
120KR2F-L-GP
1 2
1 2
R3010
R3010
499KR2F-1-GP
499KR2F-1-GP
+15V_ALW
DY
DY
From SB
ACZ_SPKR 21
From EC
AUD_HP1_JACK_R2
Q3002
Q3002
P8503BMG-GP
P8503BMG-GP
P8503BMG-GP
P8503BMG-GP
Q3004
Q3004
1 2
R3013
R3013
100KR2J-1-GP
100KR2J-1-GP
HP_CODEC_MUTE
KBC_BEEP 37
DY
DY
DY
DY
D S
G
CODEC_Q2601_03
G
D S
DY
DY
G
G
DY
DY
AUD_HP1_JACK_L2
D S
Q3003
Q3003
P8503BMG-GP
P8503BMG-GP
CODEC_Q2602_04
P8503BMG-GP
P8503BMG-GP
Q3005
Q3005
D S
Q3001
$]DOLD,)(0,
SB_AZ_CODEC_SDOUT
1 2
R3015
R3015
47R2J-2-GP
47R2J-2-GP
DY
DY
5
DY
DY
SB_AZ_CODEC_SDOUT1
1 2
C3020
C3020
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
AUD_SENSE_A
A A
+AVDD
AUD_AGND
1 2
R3018
R3018
2K49R2F-GP
2K49R2F-GP
1 2
C3019
C3019
SC1000P50V3JN-GP-U
SC1000P50V3JN-GP-U
Close to Pin13
4
R3016
R3016
20KR2F-L-GP
20KR2F-L-GP
1 2
R3022
R3022
39K2R2F-L-GP
39K2R2F-L-GP
AUD_HP1_JD# 60
AUD_SENSE_B
1 2
EXT_MIC_JD# 60
+AVDD
1 2
R3019
R3019
2K49R2F-GP
2K49R2F-GP
1 2
R3021
R3021
20KR2F-L-GP
20KR2F-L-GP
AUD_AGND
Close to Pin14
3
-A00
R3014
R3014
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
R3017
R3017
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
R3020
R3020
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
AUD_AGND
2
AMP_MUTE#
Q3001
G
DY
DY
2N7002A-7-GP
2N7002A-7-GP
S D
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Date: Sheet
Date: Sheet
Date: Sheet
1 2
R3012
R3012
100KR2J-1-GP
100KR2J-1-GP
DY
DY
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Audio Codec 92HD81B1
Audio Codec 92HD81B1
Audio Codec 92HD81B1
of
of
of
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30 90 Thursday, May 27, 2010
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3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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5
SSID = SDIO
4
3
2
1
D D
+3.3V_PHY
1 2
C3201
C3201
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C3202
C3202
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
Plase close to u3201
XD_D7
XD_D6/MS_BS
XD_D5/SD_D2/MS_D5
XD_D4/SD_D3/MS_D1
XD_D3/SD_D4/MS_D4
CLK_48M_CARD 20
C C
SCD1U10V2KX-5GP
B B
SCD1U10V2KX-5GP
C3206
C3206
R2_CLK_48M_CARD
1 2
DY
DY
SC10P50V2JN-4GP
SC10P50V2JN-4GP
+3.3V_RUN +3.3V_PHY
+3.3V_RUN_CARD
C3205
C3205
Place these close RTS5138
R3202
R3202
1 2
0R0603-PAD-1-GP
0R0603-PAD-1-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
DY
DY
C3204
C3204
10R2F-L-GP
10R2F-L-GP
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R3203
R3203
DY
DY
C3203
C3203
1 2
C3207
C3207
RREF
1 2
DY
DY
SC100P50V2JN-3GP
SC100P50V2JN-3GP
R3201
R3201
1 2
6K2R2F-GP
6K2R2F-GP
USB_PN10_1
USB_PP10_1
43mA
1 2
1 2
C3208
C3208
SC1U6D3V2KX-GP
250mA
SC1U6D3V2KX-GP
U3201
U3201
1
RREF
2
DM
3
DP
4
3V3_IN
5
CARD_3V3
6
V18
25
GND
RTS5138-GR-GP
RTS5138-GR-GP
22
24
23
XD_D7
CLK_IN
XD_CD#7SP18SP29SP310SP411SP5
SP1119SP1220SP1321SP14
SP10
GPIO0
SP9
SP8
SP7
SP6
12
XD_ALE/SD_D7/MS_D3
XD_CLE/SD_D0/MS_D7
XD_CE#/SD_D1
XD_RE#/MS_INS#
XD_RDY/SD_WP/MS_CLK_R
XD_CD#
XD_D2/SD_CMD
18
CR_GPIO0
17
XD_D1/SD_D5/MS_D0
16
XD_D0/SD_CLK/MS_D2
15
XD_WP/SD_D6/MS_D6
14
XD_WE#/SD_CD#
13
XD_D7 71
XD_D6/MS_BS 71
XD_D5/SD_D2/MS_D5 71
XD_D4/SD_D3/MS_D1 71
XD_D3/SD_D4/MS_D4 71
XD_D2/SD_CMD 71
1
TP3201 TPAD14-GP TP3201 TPAD14-GP
XD_D1/SD_D5/MS_D0 71
XD_D0/SD_CLK/MS_D2 71
XD_WP/SD_D6/MS_D6 71
XD_WE#/SD_CD# 71
XD_ALE/SD_D7/MS_D3 71
XD_CLE/SD_D0/MS_D7 71
XD_CE#/SD_D1 71
XD_RE#/MS_INS# 71
XD_CD# 71
R3206
R3206
1 2
22R2J-2-GP
22R2J-2-GP
XD_RDY/SD_WP/MS_CLK 71
R3204
R3204
0R3J-0-U-GP
USB_PN10_1
USB_PP10_1
0R3J-0-U-GP
1 2
1 2
R3205
R3205
0R3J-0-U-GP
0R3J-0-U-GP
USB_PN10 21
USB_PP10 21
Place R3204 and R3205 together
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Card Reader-RTS5138
Card Reader-RTS5138
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Close U27
Date: Sheet of
Date: Sheet of
Date: Sheet
Card Reader-RTS5138
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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D D
C C
4
3
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1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
34 90 Thursday, May 13, 2010
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4 4
3 3
B
C
D
E
(Blanking)
2 2
1 1
http://hobi-elektronika.net
A
B
C
D
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
E
35 90 Thursday, May 13, 2010
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D D
C C
4
3
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1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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SSID = KBC
+KBC_PWR
UMA PD
DIS PU
+KBC_PWR
1 2
DY
DY
1 2
R3720
R3720
2K2R2J-2-GP
2K2R2J-2-GP
DISCRETE_DET
R3715
R3715
2K2R2J-2-GP
2K2R2J-2-GP
1 2
KB_DET_KBC
1 2
D D
DJ PU
DG PD
+KBC_PWR
R3712
R3712
2K2R2J-2-GP
2K2R2J-2-GP
X00
C C
5
1 2
DY
DY
R3701 0R5J-5-GP
R3701 0R5J-5-GP
L3701 BLM15AG601SS 1D -GP L3701 BLM15AG601SS1D-GP
1 2
1 2
1 2
C3701
C3701
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
1 2
DY
DY
C3705
C3705
C3704
C3704
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1.5V_RUN_EN 42,49
BAT_LED_WHITE 66
KBC_RSMRST# 21
EC_RESET_OUT 39,41
EC_SPI_WP#_R 62
PSID_DISABLE# 76
USB_PWR_EN# 63
C3706
C3706
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
X01
CPU_PROCHOT#_EC 10
PWRLED# 66
PM_SLP_S5# 21,49
3V_5V_POK 46,48
BLON_OUT 54
IMVP_VR_ON 47
R3747 0R0402-PAD R3747 0R0402-PAD
R3722 0R0402-PAD R3722 0R0402-PAD
1 2
PM_SLP_S3# 21,41,42,49,50,52,54
LID_CLOSE# 69
C3707
C3707
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
PSID_EC 76
TP3704 TP3704
TP3705 TP3705
TP3714 TP3714
TP3707 TP3707
1 2
1 2
TP3711 TP3711
TP3709 TP3709
+3.3V_RTC_LDO
1 2
C3708
C3708
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
KBC_AGND
1
X00
1 2
1 2
C3709
C3709
SC2D2U10 V3KX-1GP
SC2D2U10 V3KX-1GP
AD_IA_KBC
S0_LKG_DET
KBC_THERMTRIP#
KB_DET_KBC
SUBWOOFER_MUTE#
PCB_VER2
KBC_PWRBTN_EC#
AC_IN#_KBC
PCB_VER0
DISCRETE_DET
PCB_VER1
PWR_BTN_LED#
1
AD_OFF
1
KBC_PLTRST_DELA Y#
1
SYS_PWRGD
EC_SHUTDOWN#
CPUCORE_ON_R
GFX_CORE_EN
1
1.1V_GFX_RUN_EN
1
CAP close to VCC-GND pin pair
VBAT
C3710
C3710
U3701A
U3701A
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
104
VREF
97
GPI90/AD0
98
GPI91/AD1
99
GPI92/AD2
100
GPI93/AD3
108
GPIO05
96
GPIO04
101
GPI94
105
GPI95
106
GPI96
107
GPI97
64
GPIO01/TB2
95
GPIO03
93
GPIO06
94
GPIO07
119
GPIO23
6
GPIO24
109
GPIO30
120
GPIO31
65
GPIO32/D_PWM
66
GPIO33/H_PWM
16
GPIO40/F_PWM
17
GPIO42/TCK
20
GPIO43/TMS
21
GPIO44/TDI
22
GPIO45/E_PWM
23
GPIO46/TRST#
24
GPIO47
25
GPIO50/TDO
26
GPIO51
27
GPIO52/RDY#
28
GPIO53
73
GPIO70
74
GPIO71
75
GPIO72
110
GPO82/TRIS#
NPCE781BA0DX-GP
NPCE781BA0DX-GP
88
115
VCC19VCC46VCC76VCC
VCC
23mA 2mA
A/D
A/D
D/A
D/A
GPIO
GPIO
116
4
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
4
102
80
VDD
AVCC
GPIO41
GPIO10/LPCPD#
LRESET#
LFRAME#
LPC
LPC
SMB
SMB
SP
SP
SPI
SPI
SER/IR
SER/IR
GND5GND18GND45GND78GND89GND
SERIRQ
GPIO11/CLKRUN#
KBRST#
ECSCI#/GPIO54
GPIO65/SMI#
GPIO67/PWUREQ#
GPIO74/SDA2
GPIO73/SCL2
GPIO22/SDA1
GPIO17/SCL1
GPIO66/G_PWM
GPIO76/SHBM
GPO83/SOUT_CR/BADDR1
GPIO87/SIN_CR
GPO84/BADDR0
AGND
103
KBC_AGND
R3732
R3732
1 2
0R0402-PAD
0R0402-PAD
1 OF 2
1 OF 2
LCLK
LAD0
LAD1
LAD2
LAD3
GA20
GPIO77
GPIO75
GPIO81
GPIO16
GPIO34
GPIO36
VCORF
+3.3V_RUN
C3702
C3702
124
7
2
3
126
127
128
1
125
8
122
121
29
9
123
68
67
69
70
1.8V_DELAY_EN
81
84
83
82
91
111
113
112
114
14
15
KBC_VCORF
44
1 2
TP_LPCPD#
PLTRST#_EC
ECSCI#_KBC
ECSWI#_KBC
KBC_SDA1
KBC_SCL1
ECSMI#_KBC
KBC_RCID
E51_TxD
E51_RxD
3.3V_DELAY_EN
C3711
C3711
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
DY
DY
C3703
C3703
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
BAT_IN# 76
TP3712 TP3712
1
PCLK_KBC 20,24
LPC_LFRAME# 20,70
LPC_LAD0 20
LPC_LAD1 20
LPC_LAD2 20
LPC_LAD3 20
INT_S ERIR Q 20
PM_CLKRUN# 20
SIO_RCIN# 21
SIO_A20GATE 21
PANEL_BKEN 13
1 2
R3714 10KR2J-3- GP R3714 10KR2J-3-GP
BAT_SDA 76
BAT_SCL 76
TP3708 TP3708
1
BLUETOOTH_EN 73,76
WIFI_RF_EN 76
X02
E51_TxD 76
E51_RxD 76
1
TP3710 TP3710
PM_LAN_ENABLE 76
VDDC_PWRGD 41,50
S5_ENABLE 42
3
+3.3V_RUN
1 2
DY
DY
R3702 0R2J-2-GP
R3702 0R2J-2-GP
U3702
R3708
R3708
U3702
6
DMN66D0LDW -7-GP
DMN66D0LDW -7-GP
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
THERM_SDA 39
KBC_SCL1
-A00
R3751
KBC_THERMTRIP#
SIO_EXT_WAKE# 21
SIO_EXT_SCI# 21
SIO_EXT_SMI# 21
R3751
1 2
0R0402-PAD
0R0402-PAD
X00
1 2
C3713
C3713
DY
DY
SC470P50V2JN-GP
SC470P50V2JN-GP
23 45
1
D3701
D3701
1
2
D3704
D3704
1
2
D3705
D3705
1
2
KBC_SDA1
ECSWI#_KBC
3
BAS16PT-GP
BAS16PT-GP
ECSCI#_KBC
3
BAS16PT-GP
BAS16PT-GP
ECSMI#_KBC
3
BAS16PT-GP
BAS16PT-GP
PLTRST#_EC 20
THERM_SCL 39
H_THERMTRIP# 10,21,39,42
2
KBC_PWRBTN# 76
+3.3V_RTC_LDO
Q3703
Q3703
SI2301CDS-T1-GE3-GP
SI2301CDS-T1-GE3-GP
+KBC_PWR
Internal PU
+KBC_PWR
1 2
R3703
R3703
100KR2J-1-GP
1 2
BAT54C-U-GP
BAT54C-U-GP
KBC_ON_R#
G
1 2
100KR2J-1-GP
KBC_PWRBTN_EC#
3
D3702
D3702
1 2
KBC_ON#
C3720
C3720
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R3756
R3756
10KR2J-3-GP
10KR2J-3-GP
+3.3V_RTC_LDO
1 2
1 2
D S
R3709
R3709
DY
DY
0R2J-2-GP
0R2J-2-GP
1207
X01
RN3704
KBC_SDA1
KBC_SCL1
BAT_SDA KCOL0
BAT_SCL
AC_IN#_KBC
LCD_CBL_DET#
KB_DET#
E51_RxD
SIO_A20GATE
SIO_RCIN#
VDDC_PWRGD
EC_RESET_OUT
S0_LKG_DET
0917
For EC to detect leakage
KBC_PWRBTN#
RN3704
1
8
2
7
3
6
4 5
S RN4K7J-10-GP
SRN4K7J-10-GP
1 2
R3749 10KR2J -3-GP R3749 10KR2J-3-GP
1 2
R3717 100KR2J -1-GP R3717 100KR2J-1-GP
1 2
R3718 100KR2J -1-GP R3718 100KR2J-1-GP
1 2
DY
DY
R3710 10KR2J -3-GP
R3710 10KR2J -3-GP
1 2
DY
DY
R3711 10KR2J -3-GP
R3711 10KR2J -3-GP
1 2
DY
DY
R3713 10KR2J -3-GP
R3713 10KR2J -3-GP
1 2
R3719 10KR2J -3-GP R3719 10KR2J-3-GP
1 2
R3748 100KR2J -1-GP R3748 100KR2J-1-GP
1 2
R3753 100KR2J -1-GP R3753 100KR2J-1-GP
1 2
R3716 100KR2J-1-GP R3716 100KR2J-1-GP
R3704
R3704
10KR2J-3-GP
10KR2J-3-GP
+KBC_PWR
+3.3V_RUN
+3.3V_RTC_LDO
D3703
D3703
BAT54C-U-GP
BAT54C-U-GP
1
Q3705
Q3705
2N7002A-7-GP
2N7002A-7-GP
3
S5_ENABLE
BLUETOOTH_EN
IMVP_VR_ON
+KBC_PWR
G
EC_SHUTDOWN #
S D
AC_IN# 76
1 2
R3750
R3750
DY
DY
0R2J-2-GP
0R2J-2-GP
AC_IN#_KBC
1 2
1 2
R3723 10KR2J -3-GP R3723 10KR2J-3-GP
1 2
DY
DY
R3724 10KR2J -3-GP
R3724 10KR2J -3-GP
1 2
R3726 10KR2J -3-GP R3726 10KR2J-3-GP
1 2
R3727 10KR2J -3-GP R3727 10KR2J-3-GP
-A00
2 OF 2
U3701B
X00
VCC
EC_SPI_DI
EC_SPI_DO
EC_SPI_CS#
EC_SPI_CLK
+KBC_PWR
3
RTCCLK_KBC 20
LCD_CBL_DET# 54
R3737 33R2J- 2-GP R3737 33R2J-2-GP
4K7R2J-2-GP
4K7R2J-2-GP
1 2
-A00
1 2
R3744 0R0402- PAD R3744 0R 0402-PAD
B B
+3.3V_RUN
X02
R3729
R3729
10KR2J-3-GP
10KR2J-3-GP
PCB_VER0
PCB_VER1
PCB_VER2
R3733
R3733
10KR2J-3-GP
10KR2J-3-GP
A A
DY
DY
1 2
1 2
R3741
R3741
4K7R2J-2-GP
4K7R2J-2-GP
1 2
E51_TxD
10KR2J-3-GP
10KR2J-3-GP
R3731
10KR2J-3-GPDYR3731
10KR2J-3-GP
1 2
R3730
R3730
10KR2J-3-GP
10KR2J-3-GP
1 2
R3734
R3734
DY
DY
0%9(56,21,'
DY
1 2
;
;
R3735
10KR2J-3-GP
R3735
10KR2J-3-GP
1 2
;
$
9(5
9(5
9(5
.%&&/.
(0,
PCLK_KBC
C3715
C3715
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
1 2
POP when support RCID function
2010/03/23
KBC_RCID
G
S
X01
R3757
AD_IA 76
R3757
0R0402-PAD
0R0402-PAD
Q3706
Q3706
.....
.....
D
DY
DY
2N7002E-1-GP
2N7002E-1-GP
Place close to KBC
AD_IA_KBC
1 2
1 2
C3724
C3724
DY
DY
SC10P50V2JN-4GP
-A00
SC10P50V2JN-4GP
PSID_EC
EC_SPI_DI 62
EC_SPI_DO 62
EC_SPI_CS# 62
EC_SPI_CLK 62
X01
U3703
U3703
1
GND
DY
DY
2
RESET#
G690L293T73UF-GP
G690L293T73UF-GP
PURE_HW_SHUTDOWN# 39,42
http://hobi-elektronika.net
5
4
3
R3752 0R0402-PAD R3752 0R0402- PAD
AMP_MUTE# 30
IMVP_PWRGD 41,47,50,51
PM_PWRBTN# 21
LCD_TST_EN 54
KBC_BEEP 30
BATLOW_LED 66
BRIGHTNESS 54
KB_DET# 68
TP3706 TP3706
LCD_TST 54
TPDATA 68
TPCLK 68
1 2
x01
R3743
R3743
1 2
TP3713 TP3713
THERMTRIP_VGA_GATE
1
ECRST#_C
Q3701
Q3701
PMBS3906-GP
PMBS3906-GP
2
EC_SPI_CLK_C
1
U3701B
KBC_XI
77
32KX1/32KCLKIN
GPIO02
1
79
32KX2
30
GPIO55/CLKOUT
63
GPIO14/TB1
117
GPIO20/TA2
31
GPIO56/TA1
32
GPIO15/A_PWM
118
GPIO21/B_PWM
62
GPIO13/C_PWM
KBSOUT15/GPIO61/XOR_OUT
PS/2
PS/2
FIU
FIU
ECRST#
2
3
13
12
11
10
71
72
86
87
90
92
1 2
DY
DY
GPIO12/PSDAT3
GPIO25/PSCLK3
GPIO27/PSDAT2
GPIO26/PSCLK2
GPIO35/PSDAT1
GPIO37/PSCLK1
F_SDI
F_SDO
F_CS0#
F_SCK
NPCE781BA0DX-GP
NPCE781BA0DX-GP
C3714
C3714
SC1U10V3KX-3GP
SC1U10V3KX-3GP
2 OF 2
KCOL0
KBSOUT0/JENK#
KBSOUT4/JEN0#
KBC
KBC
KBSOUT12/GPIO64
KBSOUT13/GPIO63
KBSOUT14/GPIO62
GPIO60/KBSOUT16
GPIO57/KBSOUT17
53
KCOL1
52
KBSOUT1/TCK
KBSOUT2/TMS
KBSOUT3/TDI
KBSOUT5/TDO
KBSOUT6/RDY#
KBSOUT7
KBSOUT8
KBSOUT9
KBSOUT10
KBSOUT11
KBSIN0
KBSIN1
KBSIN2
KBSIN3
KBSIN4
KBSIN5
KBSIN6
KBSIN7
VCC_POR#
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
KCOL2
51
KCOL3
50
KCOL4
49
KCOL5
48
KCOL6
47
KCOL7
43
KCOL8
42
KCOL9
41
KCOL10
40
KCOL11
39
KCOL12
38
KCOL13
37
KCOL14
36
KCOL15
35
KCOL16
34
KCOL17
TP3701 TP3701
33
54
55
56
57
58
59
60
61
85
KBC Nuvoton NPCE781BA0DX
KBC Nuvoton NPCE781BA0DX
KBC Nuvoton NPCE781BA0DX
1
KROW0
KROW1
KROW2
KROW3
KROW4
KROW5
KROW6
KROW7
ECRST#
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
KCOL[0..16] 68
KROW[0..7] 68
37 90 Thursday, May 27, 2010
37 90 Thursday, May 27, 2010
37 90 Thursday, May 27, 2010
A00
A00
A00
of
of
of
Page 38
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
38 90 Thursday, May 13, 2010
38 90 Thursday, May 13, 2010
38 90 Thursday, May 13, 2010
of
of
of
A00
A00
A00
Page 39
5
SSID = Thermal
SC10U10V5KX-2GP
SC10U10V5KX-2GP
D D
1.For CPU Sensor
Pleace near to CPU side
H_THERMDC 10
SC470P50V2JN-GP
SC470P50V2JN-GP
H_THERMDA 10
C C
Q3904
Q3904
PMBS3904-1-GP
PMBS3904-1-GP
Q3901
Q3901
PMBS3904-1-GP
PMBS3904-1-GP
2
1
3
2.System Sensor
Layout notice :
Both DN2 and DP2 routing
10 mil trace width and 10 mil spacing.
C3907 must be near Q3902
2
1
3
Layout notice :
Both H_THERMDA and THERMDC routing
10 mil trace width and 10 mil spacing
1 2
C3910
C3910
DY
DY
1 2
C3912
C3912
SC470P50V2JN-GP
SC470P50V2JN-GP
DY
DY
1 2
C3906
C3906
SC470P50V2JN-GP
SC470P50V2JN-GP
DY
DY
1 2
C3907
C3907
SC470P50V2JN-GP
SC470P50V2JN-GP
3.HW T8 sensor
Layout notice :
Both DN3 and DP3 routing 10 mil
B B
trace width and 10 mil spacing.
+3.3V_RUN
1 2
C3904
C3904
SC470P50V2JN-GP
SC470P50V2JN-GP
1 2
C3905
C3905
SC470P50V2JN-GP
SC470P50V2JN-GP
C3907 must be
near EMC2102
4
+5V_RUN
600mA
1 2
1 2
C3902
C3901
C3901
R3902
R3902
49D9R2F-GP
49D9R2F-GP
EMC2102_VDD_3D3
1 2
C3903
C3903
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
EMC2102_DN2
EMC2102_DP2
EMC2102_DN3
EMC2102_DP3
GND = Channel 1
OPEN = Channel 3
+3.3V = Disabled
C3902
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
+3.3V_RUN
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
10KR2J-3-GP
10KR2J-3-GP
R3905
R3905
DY
DY
R3907
R3907
DY
DY
10KR2J-3-GP
10KR2J-3-GP
U3901
U3901
1
VDD_3V
2
DN1
3
DP1
4
DN2
5
DP2
6
DN3
7
DP3
EMC2102_SHDN
EMC2102_FAN_mode
-A00
R3910
R3910
1 2
0R0402-PAD
GND = Fan is OFF
OPEN = Fan is at 60% full-scale
+3.3V = Fan is at 75% full-scale
0R0402-PAD
R3901
R3901
29
GND
0.75mA
+3.3V_RUN
1 2
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
28
25
26
27
FANb
FANa
TACH
VDD_5Va
EMC2102
EMC2102
SHDN_SEL9FAN_MODE10TRIP_SET11SYS_SHDN#12THERMTRIP#13POWER_OK#
NC#8
8
3
4
23
22
24
SMCLK
SMDATA
VDD_5Vb
CLK_SEL
EMC2102-DZK-GP
EMC2102-DZK-GP
14
THERM_POWER_OK#
THERMTRIP#
+3.3V_RUN
1 2
R3908
R3908
10KR2J-3-GP
10KR2J-3-GP
THERMAL_P_HW_SHT
THERM_SYS_SHDN#
G
Q3902
Q3902
2N7002A-7-GP
2N7002A-7-GP
S D
R3915
R3915
1 2
0R2J-2-GP
0R2J-2-GP
D3901
D3901
2 1
DY
DY
CH751H-40PT-GP
CH751H-40PT-GP
RN3901
RN3901
2 3
1
SRN4K7J-8-GP
SRN4K7J-8-GP
THERM_SCL 37
THERM_SDA 37
21
NC#21
20
GND
R3903 0R2J-2-GP
R3903 0R2J-2-GP
19
ALERT#
18
CLK_IN
17
16
RESET#
15
NC#15
+3.3V_RUN
1 2
DY
DY
CLK_32K
EMC2102_CLK_SEL
EM2102_RESET#
+KBC_PWR
R3909
R3909
10KR2J-3-GP
10KR2J-3-GP
1 2
2
+5V_RUN
10KR2J-3-GP
10KR2J-3-GP
1 2
R3916
R3916
DY
DY
EMC2102_FAN_TACH 58
EMC2102_FAN_DRIVE 58
+3.3V_RUN
TALERT# 10,21
-A00
R3904 0R0402-PAD R3904 0R0402-PAD
1 2
R3914 0R2J-2-GP
R3914 0R2J-2-GP
1 2
DY
DY
+3.3V_RUN
1
2 3
RN3902
RN3902
SRN10KJ-5-GP
SRN10KJ-5-GP
4
R3906
R3906
1 2
0R0402-PAD
0R0402-PAD
X00 -A00
PURE_HW_SHUTDOWN# 37,42
V_DEGREE
1
GND = Internal Oscillator Selected
+3.3V = External 32.768kHz Clock Selected
EC_RESET_OUT 37,41
H_THERMTRIP# 10,21,37,42
+3.3V_RUN
1 2
1 2
R3911
C3908
C3908
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C3909
C3909
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
R3911
10KR2F-2-GP
10KR2F-2-GP
TRIP_SET Pin Voltage
V_DEGREE=(((Degree-75)/21)
1 2
1 2
R3912
R3912
2K37R2F-GP
2K37R2F-GP
T8 shutdown is set 88 deg-C.
32K suspend clock output
Q3903
Q3903
2N7002A-7-GP
2N7002A-7-GP
RTC_CLK 20
A A
RUN_ENABLE 42
5
S D
G
4
R3913
R3913
1 2
10R2J-2-GP
10R2J-2-GP
CLK_32K CLK_32K_R
CLK_32K
1 2
C3911
C3911
DY
DY
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
http://hobi-elektronika.net
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Thermal/Fan Controllor EMC2102
Thermal/Fan Controllor EMC2102
Thermal/Fan Controllor EMC2102
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
2
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
of
of
39 90 Thursday, May 27, 2010
39 90 Thursday, May 27, 2010
39 90 Thursday, May 27, 2010
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D D
C C
4
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1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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40 90 Thursday, May 13, 2010
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1
SSID = Reset.Suspend
D D
+3.3V_RUN +3.3V_RUN
100KR2J-1-GP
10KR2J-3-GP
10KR2J-3-GP
1 2
R4101
R4101
+3.3V_ALW
X01
U4102
1
2
SB_PWRGD_C
EC_RESET_OUT 37,39
U4102
VCC
DY
DY
R4106
R4106
1 2
0R2J-2-GP
0R2J-2-GP
5
4
NC#1
A
GND3Y
SNAUC1G17DCKR-1GP
SNAUC1G17DCKR-1GP
D4103
D4103
PM_SLP_S3# 21,37,42,49,50,52,54
C C
B B
IMVP_PWRGD 37,47,50,51
EC_RESET_OUT 37,39
VDDC_PWRGD 37,50
VDDC_PWRGD 37,50
1
2
1
2
DY
DY
BAT54APT-GP
BAT54APT-GP
D4102
D4102
BAT54APT-GP
BAT54APT-GP
R4105
R4105
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
3
3
K A
D4101 SDMK0340L-7-F-GP
D4101 SDMK0340L-7-F-GP
SB_PWRGD 21
DY
DY
100KR2J-1-GP
1 2
R4102
R4102
DY
DY
SB_PWRGD_D
U4101
U4101
1
NC#1
2
A
GND3Y
SNAUC1G17DCKR-1GP
SNAUC1G17DCKR-1GP
NB_PWRGD 21
1 2
0R0402-PAD
0R0402-PAD
DY
DY
R4104
R4104
VCC
5
4
+1.8V_RUN
+1.8V_RUN
300R2J-4-GP
300R2J-4-GP
1 2
R4103
R4103
NB_PWRGD_IN 13
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Power On Logic
Power On Logic
Power On Logic
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
41 90 Thursday, May 27, 2010
41 90 Thursday, May 27, 2010
41 90 Thursday, May 27, 2010
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4
3
2
1
SSID = Reset.Suspend
DY
DY
E
B
DY
DY
Q4201
Q4201
1 2
C
R4201
R4201
R4203
R4203
200KR2J-L1-GP
200KR2J-L1-GP
1 2
DY
DY
1KR2J-1-GP
1KR2J-1-GP
CPU_LDT_PWRGD 10,20
D D
3V_5V_EN 46
1 2
DY
DY
H_PWRGD_R
C4216
C4216
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
2
D4201
D4201
3
1
BAS16PT-GP
BAS16PT-GP
1 2
R4202 1KR2J-1-GP R4202 1KR2J-1-GP
H_THERMTRIP# 10,21,37,39
CHT2222APT-GP
CHT2222APT-GP
PURE_HW_SHUTDOWN# 37,39
S5_ENABLE 37
Run Power
+15V_ALW
C C
B B
+3.3V_RTC_LDO
100KR2J-1-GP
100KR2J-1-GP
R4204
R4204
1 2
PM_SLP_S3# 21,37,41,49,50,52,54
RUN_ENABLE 39
RUN_ON_5V#
6
123 4
S
S
5
GG DD
U4207
U4207
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
RUN_ENABLE
R4205
R4205
100KR2J-1-GP
100KR2J-1-GP
1 2
R4206
R4206
1 2
0R2J-2-GP
0R2J-2-GP
R4207
R4207
1 2
20KR2F-L-GP
20KR2F-L-GP
X01
+5V_ALW +5V_RUN
U4201
U4201
D
D
8
D
D
7
D
D
6
FDS8884-GP
5V_RUN_ENABLE
1 2
C4201
C4201
SC100P50V2JN-3GP
SC100P50V2JN-3GP
+3.3V_ALW
3.3V_RUN_ENABLE
1 2
C4203
C4203
SC100P50V2JN-3GP
SC100P50V2JN-3GP
FDS8884-GP
U4202
U4202
D
D
8
D
D
7
D
D
6
FDS8884-GP
FDS8884-GP
S
S
1
S
S
2
S
S
3
G D
G D
4 5
1 2
C4202
C4202
SC4D7U10V5KX-4GP
SC4D7U10V5KX-4GP
X01
+3.3V_RUN
S
S
1
S
S
2
S
S
3
G D
G D
4 5
1 2
C4204
C4204
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
X01
X01
+3.3V_RTC_LDO
100KR2J-1-GP
100KR2J-1-GP
R4211
R4211
RUN_ON_1.5V#
1 2
S
5
6
U4209
U4209
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
123 4
GG DD
S
A A
1.5V_RUN_EN 37,49
1.5V_RUN_ENABLE_R
+15V_ALW
1 2
R4212
R4212
100KR2J-1-GP
100KR2J-1-GP
R4213
R4213
1 2
0R2J-2-GP
0R2J-2-GP
1.5V_RUN_ENABLE
C4207
C4207
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
U4204
U4204
D
D
8
D
D
7
D
D
6
FDS8884-GP
FDS8884-GP
+1.5V_RUN +1.5V_SUS
S
S
1
S
S
2
S
S
3
G D
G D
4 5
1 2
C4208
C4208
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
X01
http://hobi-elektronika.net
5
4
3
Peak current: 6257.3mA ( HD:1100 ODD:2500 )
Design current: 4380.11 mA
11.6A
Rds=14m ohm
Peak current: 5966mA
Design current: 4177 mA
11.6A
Rds=14m ohm
Peak current: 1230mA
Design current: 861 mA
11.6A
Rds=14m ohm
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
2
Date: Sheet
+1.5V_RUN
1 2
R4226
R4226
10R3J-3-GP
10R3J-3-GP
DY
DY
DY
RUN_ON_1.5V#
Power Plane Enable
Power Plane Enable
Power Plane Enable
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
DY
G
S D
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
42 90 Friday, May 28, 2010
42 90 Friday, May 28, 2010
42 90 Friday, May 28, 2010
1
Q4207
Q4207
2N7002A-7-GP
2N7002A-7-GP
of
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A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
43 90 Thursday, May 13, 2010
43 90 Thursday, May 13, 2010
43 90 Thursday, May 13, 2010
of
of
of
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A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
44 90 Thursday, May 13, 2010
44 90 Thursday, May 13, 2010
44 90 Thursday, May 13, 2010
of
of
of
A00
A00
A00
Page 45
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
45 90 Thursday, May 13, 2010
45 90 Thursday, May 13, 2010
45 90 Thursday, May 13, 2010
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of
of
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Page 46
A
+3D3V_PWR
+3.3V_ALW
PG4601
PG4601
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4602
PG4602
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4603
PG4603
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4606
PG4606
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4607
PG4607
4 4
Design Current =7.57A
11.89A<OCP<14.053A
3 3
+3D3V_PWR +5V_PWR
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
1 2
PC4618
PC4618
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4609
PG4609
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4611
PG4611
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4613
PG4613
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4614
PG4614
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4615
PG4615
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
PTC4601
PTC4601
DY
DY
1 2
1 2
1 2
PTC4602
PTC4602
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
X01
COIL-3D3UH-15-GP-U
COIL-3D3UH-15-GP-U
PL4601
PL4601
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
2D2R5F-2-GP
2D2R5F-2-GP
1 2
PG4623
PG4623
SC330P50V3JN-GP
SC330P50V3JN-GP
+PWR_SRC
+PWR_SRC _3D3V
PC4609
PC4609
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
1 2
PR4606
PR4606
PC4621
PC4621
+PWR_SRC _3D3V
PG4604
PG4604
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4605
PG4605
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4608
PG4608
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4610
PG4610
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PC4610
PC4610
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
D
SG
1 2
D
DY
DY
1 2
DY
DY
S
678
DDD
DDD
PU4602
PU4602
FDS8884-GP
FDS8884-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
SSS
GD
SSS
GD
123
4 5
678
DDD
DDD
PU4604
PU4604
FDS6690AS-GP
FDS6690AS-GP
SSS
GD
SSS
GD
123
4 5
G
PR4622
PR4604
PC4616
PC4616
51125_VBST2_1 51125_VBST1_1
1 2
X02
1 2
1 2
PR4610
PR4610
0R2J-2-GP
0R2J-2-GP
PR4609
PR4609
DY
6K65R2F-GP
6K65R2F-GP
10KR2F-2-GP
10KR2F-2-GP
2 2
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDS8884 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS 12mOhm/15mOhm@4.5Vgs/ 84.06690.E37
1 1
Close to VFB Pin (pin5)
DY
51125_FB2_R
1 2
PC4623
PC4623
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
DY
DY
1 2
PR4613
PR4613
A
X01
51125_VREF
+3.3V_ALW_2
51125_VREF
+3.3V_ALW_2
0R0402-PAD
0R0402-PAD
-A00
RT8205B(74.08208.A73):
GND
VREF
VREG3
VREG5
RT8205B(74.08205.B73):
GND
VREF
VREG3
VREG5
TPS51125
RT8205BGQW
PR4616
PR4616
DY
DY
DY
DY
B
3V_5V_EN 42
TPS51125 RT8205B
DY ASM
PR4622
PR4622
51125_EN
1 2
820KR3J-GP
820KR3J-GP
TPS51125 RT8205B
0R3J 4R7
PR4604
PR4604
1 2
4D7R3J-L1-GP
4D7R3J-L1-GP
51125_DRVH2
51125_DRVL2
1 2
DY
DY
PR4608 820KR2F-G P
PR4608 820KR2F-G P
51125_VREF
PC4622
SCD22U10V2KX-1GP
PC4622
SCD22U10V2KX-1GP
1 2
51125_TONSEL
51125_SKIPSEL
+3.3V_ALW_2
-A00
1 2
PR4617
PR4617
1 2
0R2J-2-GP
0R2J-2-GP
PR4618
PR4618
1 2
0R2J-2-GP
0R2J-2-GP
PR4619
PR4619
1 2
0R0402-PAD
0R0402-PAD
PR4621
PR4621
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
TPS51125 RT8205B
PR4617 ASM
200kHz
245kHz
300kHz
365kHz
200kHz
300kHz
365kHz
74.51125.073
74.08205.B73
B
51125_ENTRIP
PQ4601
PQ4601
2N7002A-7-GP
2N7002A-7-GP
G
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
S D
+PWR_SRC
PU4601
PU4601
0.55mA
51125_VBST2
9
BOOT2
10
UGATE2
51125_LL2
11
PHASE2
LGATE212LGATE1
51125_VO2
7
VOUT2
51125_FB2
5
FB2
51125_EN
13
EN
51125_ENTIP2
6
ENTRIP2
3
REF
4
TONSEL
14
SKIPSEL
VREG38VREG5
RT8205BGQW- GP-U
RT8205BGQW- GP-U
PG4631
PG4631
1 2
GAP-CLOSE-PWR-3 - G P
GAP-CLOSE-PWR-3-GP
PC4625
PC4625
3D3V_AUX_S5_5_51125
1 2
SC4D7U10V5KX-4GP
SC4D7U10V5KX-4GP
DY PR4616
ASM
DY
SKIPSEL GND VREG3 or VREG5 TONSEL
CH2 CH1 VREF(2V)
265kHz
Operating
Mode
305kHz
375kHz
460kHz
Operating
Mode
CH2 CH1 TONSEL
250kHz
375kHz
460kHz 365kHz
460kHz
51125_ENTIP1
1 2
1 2
PC4601
PC4601
DY
DY
PC4612
PC4612
PC4611
PC4611
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
1 2
DY
DY
16
VIN
51125_VBST1
22
BOOT1
51125_DRVH1
21
UGATE1
51125_LL1
20
PHASE1
51125_DRVL1
19
51125_VO1
24
VOUT1
51125_FB1
2
FB1
3V_5V_POK
23
PGOOD
51125_ENTIP1
1
ENTRIP1
15
PGND
25
GND
51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK
18
LG1_CP
17
+5V_ALW2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC4627
PC4627
1 2
1 2
PC4626
PC4626
+3.3V_ALW_2
SC10U10V5KX-2GP
SC10U10V5KX-2GP
OOA Auto Skip Auto Skip
Open EN0 820kȍ to GND
enable both
LDOs, VCLK on
and ready to
turn on
switcher
channels
PR4601
PR4601
127KR2F-GP
127KR2F-GP
C
+3.3V_ALW_2
1 2
PR4602
PR4602
100KR2J-1-GP
100KR2J-1-GP
5
6
PU4606
PU4606
DMN66D0LDW-7-GP
DMN66D0LDW-7-GP
123 4
TPS51125 RT8205B
PR4605
PR4605
PR4605
1 2
4D7R3J-L1-GP
4D7R3J-L1-GP
51125_ENTIP2
PC4605
PC4605
0R3J 4R7
1 2
1 2
PR4603
PR4603
127KR2F-GP
DY
DY
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
127KR2F-GP
X01
PU4603
PU4603
FDS8884-GP
FDS8884-GP
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC4617
PC4617
1 2
PU4605
PU4605
0924
+KBC_PWR
1130
PR4614
PR4614
10KR2J-3-GP
10KR2J-3-GP
1 2
3V_5V_POK 37,48
+3.3V_RTC_LDO
PR4620
PR4620
1 2
0R0402-PAD
0R0402-PAD
-A00
PWM only
GND
enable both LDOs,
VCLK off and
ready to turn on
switcher channels
disable all
circuit
http://hobi-elektronika.net
C
D
51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK 51125_VCLK
+PWR_SRC_5V
PC4613
PC4613
PC4614
PC4614
PC4615
PC4615
1 2
678
DDD
DDD
G D
G D
4 5
G
678
DDD
DDD
G D
G D
4 5
D
SSS
SSS
123
S
D
FDS6690AS-GP
FDS6690AS-GP
SSS
SSS
123
S G
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
IND-2D2UH-157-GP-U1
IND-2D2UH-157-GP-U1
1 2
DY
DY
PR4607
PR4607
2D2R5F-2-GP
2D2R5F-2-GP
1 2
PC4620
PC4620
DY
DY
SC560P50V-GP
SC560P50V-GP
0R2J-2-GP
0R2J-2-GP
PC4624
PC4624
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
PL4602
PL4602
1 2
PR4611
PR4611
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
DY
DY
DY
DY
PG4612
PG4612
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1 2
X01
1 2
PG4626
PG4626
1 2
1 2
51125_FB1_R
1 2
1 2
51125_VCLK 51125_VCLK
1 2
BAT54S-5-GP
BAT54S-5-GP
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1 2
PC4602
SC1KP50V2KX-1GP
PC4602
SC1KP50V2KX-1GP
PD3903_1
3
PD4601
PD4601
2
PD3903_2
1 2
PC4606
PC4606
SC1U25V3KX-1-GP
SC1U25V3KX-1-GP
Design Current = 7.3A
11.45A<OCP< 16A
PC4619
SCD1U10V2KX-4GP
PC4619
SCD1U10V2KX-4GP
1 2
X02
PR4612
PR4612
33KR2F-GP
33KR2F-GP
PR4615
PR4615
21K5R2F-GP
21K5R2F-GP
PC4603
PC4603
SCD1U25V3KX-GP
SCD1U25V3KX-GP
1
ST220U6D3VDM-15GP
ST220U6D3VDM-15GP
1 2
PTC4603
PTC4603
1 2
PD3904_1
3
2
PD3903_04
1 2
PC4608
PC4608
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PC4604
PC4604
SCD1U25V3KX-GP
SCD1U25V3KX-GP
PD4602
PD4602
BAT54S-5-GP
BAT54S-5-GP
1
+5V_PWR +15V_ALW
Cl ose to VFB Pin (pin2)
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 2.2uH PCMC063T-2R2MN Cyntec 18mohm/20mohm Isat =14Arms 68.2R210.20B
O/P cap: 220U 6.3V PSLV0J227M(25) 25mOhm 2.236Arms NEC_TOKIN/77.C2271.00L
O/P cap: 100U 6.3V TEPSLB20J107M(45)8R 45mOhm 1.374Arms NEC_TOKIN/77.C1071.081
H/S: FDS8884 23mohm/30mOhm@4.5Vgs/ 84.08884.037
L/S: FDS6690AS 12mOhm/15mOhm@4.5Vgs/ 84.06690.E37
D
1 2
PC4607
PC4607
SCD1U25V3KX-GP
SCD1U25V3KX-GP
+PWR_SRC
PG4616
PG4616
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4620
PG4620
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4622
PG4622
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4624
PG4624
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4628
PG4628
GAP-CLOSE-PWR
GAP-CLOSE-PWR
E
+5V_PWR
+PWR_SRC _5V
1 2
1 2
1 2
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Date: Sheet
Date: Sheet
Date: Sheet
+5V_ALW
PG4618
PG4618
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4617
PG4617
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4619
PG4619
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4621
PG4621
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4625
PG4625
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4627
PG4627
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4629
PG4629
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4630
PG4630
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
RT8205B_5V/3D3V
RT8205B_5V/3D3V
RT8205B_5V/3D3V
E
A00
A00
46 90 Thursday, May 27, 2010
46 90 Thursday, May 27, 2010
46 90 Thursday, May 27, 2010
A00
of
of
of
Page 47
5
4
3
2
1
SSID = CPU.Regulator
+5V_RUN
PR4701
PR4701
1 2
D D
+3.3V_RUN
10KR2J-3-GP
10KR2J-3-GP
1 2
PR4713
PR4713
IMVP_PWRGD 37,41,50,51
CPU_PWRGD_SVID_REG 10
GNDA_VCORE
PC4723
PC4723
1 2
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
PR4739
PR4739
IMVP_VR_ON 37
54K9R2F-L-GP
54K9R2F-L-GP
1 2
PR4744
PR4744
C C
B B
6265_FB0_C
PR4737
PR4737
1 2
249R2F-GP
249R2F-GP
1 2
1KR2F-3-GP
1KR2F-3-GP
A A
CPU_SVD 10
CPU_SVC 10
X02
CPU_VDD0_RUN_FB_H 10
CPU_VDD0_RUN_FB_L 10
CPU_VDD1_RUN_FB_L 10
CPU_VDD1_RUN_FB_H 10
PC4724
PC4724
1 2
SC180P50V2JN-1GP
SC180P50V2JN-1GP
6265_FB0_R
-A00
PR4719
PR4719
1 2
0R0402-PAD
0R0402-PAD
1 2
PR4721 24KR2F-G P PR 4721 24KR2F-GP
SC1200P50V2KX-1GP
SC1200P50V2KX-1GP
1 2
5
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
PC4728
PC4728
6K81R2F-1-GP
6K81R2F-1-GP
+PWR_SRC
+5V_RUN +3.3V_RUN
-A00
1 2
PR4709
PR4709
0R0402-PAD
0R0402-PAD
10KR2J-3-GP
10KR2J-3-GP
1 2
PR4714
PR4714
DY
DY
PR4717 0R0402-PAD PR4717 0R0402-PAD
1 2
PR4718 0R0402-PAD PR4718 0R0402-PAD
1 2
PR4720 93 K1R2F- L-GP PR4720 93K1R2F-L-GP
1 2
1%
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
PC4718
PC4718
1 2
DY
DY
+VCC_CORE
+VCC_CORE
10R2J-2-GP
10R2J-2-GP
1 2
PR4727
0R2J-2-GP
PR4727
0R2J-2-GP
PR4726
PR4726
1 2
10R2J-2-GP
10R2J-2-GP
10R2J-2-GP
10R2J-2-GP
1 2
1 2
PR4735
PR4735
PR4736
PR4736
DY
DY
Close to CPU socket
PC4725
PC4725
1 2
PR4740
PR4740
1 2
X01
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
GNDA_VCORE
1 2
0R2J-2-GPDYPR4710
0R2J-2-GP
DY
0R2J-2-GP
0R2J-2-GP
DY
DY
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PC4739
PC4739
1 2
DY
DY
2R3J-GP
2R3J-GP
PR4703
PR4703
2R3J-GP
2R3J-GP
1 2
1 2
PG4701
PG4701
SCD22U10V 2KX-1GP
SCD22U10V 2KX-1GP
PR4710
PR4715
PR4715
CPU_SVD_R
CPU_SVC_R
VCC_CORE_EN
6265_RBIAS
6265_OCSET
6265_VDIFF0
6265_FB0
6265_COMP0
6265_VW0
-A00
PC4740
PC4740
1 2
DY
DY
6265_OFS/VFIXEN
GNDA_VCORE
+1.8V_RUN
1KR2J-1-GP
1KR2J-1-GP
1 2
DY
DY
SC1U16V3KX-2GP
SC1U16V3KX-2GP
PC4701
PC4701
1 2
GNDA_VCORE
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4707
PC4707
1 2
GNDA_VCORE
6265_VIN
1 2
GNDA_VCORE
PR4723
PR4723
10
11
12
PU4701
PU4701
1
OFS/VFIXEN
2
PGOOD
3
PWROK
4
SVD
5
SVC
6
ENABLE
7
RBIAS
8
OCSET
9
VDIFF0
FB0
COMP0
VW0
ISL6265AHRTZ-T-GP
ISL6265AHRTZ-T-GP
ISP0
ISN0
48
49
VIN
GND
10mA
74.06265.B73
ISP013ISN014VSEN015RTN016RTN117VSEN118VDIFF119FB120COMP121VW122ISP123ISN1
Parallel
PR4729 0R0402-PAD PR4729 0R0402-PAD
1 2
PR4730 0R0402-PAD PR4730 0R0402-PAD
1 2
PR4733 0R0402-PAD PR4733 0R0402-PAD
1 2
PR4734 0R0402-PAD PR4734 0R0402-PAD
1 2
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
PC4741
PC4741
PC4742
PC4742
1 2
X01
DY
DY
PR4738
PR4738
1 2
DY
DY
249R2F-GP
249R2F-GP
6265_FB1_C
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
PR4741
PR4741
1 2
DY
DY
1KR2F-3-GP
1KR2F-3-GP
PC4726
PC4726
1 2
DY
DY
6265_COMP_NB
6265_FB_NB
6265_VCC
47
46
VCC
FB_NB
6265_VSEN0
6265_RTN0
6265_RTN1
54K9R2F-L-GP
54K9R2F-L-GP
4
PR4702
PR4702
1 2
44K2R2F-1-GP
44K2R2F-1-GP
PC4704
PC4704
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
PR4704
PR4704
1 2
22KR2F-GP
22KR2F-GP
6265_FSET_NB
CPU_VDDNB_RUN_FB_H_R
42
44
43
45
RTN_NB
FSET_NB
VSEN_NB
COMP_NB
6265_FB1
6265_VDIFF1
6265_VSEN1
PC4727
PC4727
SC180P50V2JN-1GP
SC180P50V2JN-1GP
1 2
PR4743
PR4743
DY
DY
6265_FB1_R
ISL6265HRTZ-T for +VCC_CORE&+VDDNB
PC4702
PC4702
1 2
SC33P50V2JN-3GP
SC33P50V2JN-3GP
6265_FB_NB_R
1 2
-A00
1 2
0R0402-PAD
0R0402-PAD
PR4707
PR4707
1 2
6K8R2F-2-GP
6K8R2F-2-GP
PHASE_NB_R
41
37
40
39
38
PGND_NB
LGATE_NB
PHASE_NB
OCSET_NB
24
6265_VW1
6265_COMP1
1 2
DY
DY
SC1200P50V2KX-1GP
SC1200P50V2KX-1GP
PC4703
PC4703
1 2
SC1200P50V2KX-1GP
SC1200P50V2KX-1GP
+VDDNB
10R2J-2-GP
10R2J-2-GP
PR4706
PR4706
PHASE_NB
LGATE_NB
PHASE_NB
UGATE_NB
CPU_VDDNB_RUN_FB_L_R
UGATE_NB
36
BOOT_NB
35
BOOT0
34
UGATE0
33
PHASE0
32
PGND0
31
LGATE0
30
PVCC
29
LGATE1
28
PGND1
27
PHASE1
26
UGATE1
25
BOOT1
ISN1
ISP1
PC4722
PC4722
1 2
DY
DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
PR4742
PR4742
1 2
DY
DY
PC4733
PC4733
6K81R2F-1-GP
6K81R2F-1-GP
1 2
DY
DY
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor:4.7uH PCMC063T-4R7MN 35mohm Isat =10Arms CYNTEC/68.4R710.20D
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01
H/S:VISHAY SIS412DN-T1-GE3/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
L/S:VISHAY SIS412DN-T1-GE3/ 24mohm/30mOhm@4.5Vgs/ 84.00412.037
GNDA_VCORE
1 2
PR4705
PR4705
PR4708
PR4708
BOOT_NB BOOT_NB_R
BOOT0_R
LGATE0
PC4735
PC4735
BOOT1_R BOOT1
SCD22U25V3KX-GP
SCD22U25V3KX-GP
1 2
0R3J-0-U-GP
0R3J-0-U-GP
PC4719
PC4719
SCD22U25V3KX-GP
SCD22U25V3KX-GP
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
1 2
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
1 2
PU4711
PU4711
PU4709
PU4709
BOOT_NB
BOOT0
UGATE0
PHASE0
LGATE0
LGATE1
PHASE1
UGATE1
BOOT1
CPU_VDDNB_RUN_FB_H 10
-A00
PR4712
PR4712
1 2
0R0402-PAD
0R0402-PAD
+5V_RUN
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
PC4712
PC4712
1 2
CPU_VDDNB_RUN_FB_L 10
10R2F-L-GP
10R2F-L-GP
1 2
PR4716
PR4716
X01
06/11 modify
1.Change PU3501 Ver. from ISL6265HRTZ to ISL6265AHRTZ
UGATE0
PHASE0
PR4724
PR4724
BOOT0
1 2
1R3J-L1-GP
1R3J-L1-GP
UGATE1
PHASE1
PR4746
PR4746
1 2
1R3J-L1-GP
1R3J-L1-GP
LGATE1
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 0.36UH PCMC104T-R36MN1R05J CYNTEC DCR 1.05(+5%~-5%)mohm
Isat =60Arms 68.R3610.20C
O/P cap: 330U 2V EEFSX0D331ER 9mOhm 3.0Arms Panasonic/79.33719.L01
H/S: SiS406DN/ POWERPAK-8/ 11.5mOhm/14.5mOhm @4.5Vgs/ 84.00406.037
L/S: SiS402DN/ POWERPAK-8/ 6.4mOhm/8mohm@4.5Vgs/ 84.00402.037
http://hobi-elektronika.net
3
SCD22U25V3KX-GP
SCD22U25V3KX-GP
PU4710
PU4710
PU4708
PU4708
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
678
DDD
DDD
G
G
4 5
678
DDD
DDD
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
G
G
4 5
GS
UGATE_NB
PC4708
PC4708
1 2
LGATE_NB
678
DDD
D
DDD
D
SSS
SSS
G
G
123
4 5
D
678
DDD
D
DDD
D
SSS
SSS
G
G
123
4 5
GS
D
D
SSS
SSS
123
D
D
D
SSS
SSS
123
SIS412DN-T1-GE3-GP
SIS412DN-T1-GE3-GP
SIS412DN-T1-GE3-GP
SIS412DN-T1-GE3-GP
D
678
DDD
D
DDD
D
SSS
SSS
G
G
123
4 5
GS
D
678
DDD
D
DDD
D
SSS
SSS
G
G
123
4 5
GS
D
678
DDD
D
DDD
D
PU4706
PU4706
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
SSS
SSS
G
G
123
4 5
GS
D
678
DDD
D
DDD
D
PU4707
PU4707
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
SSS
SSS
G
G
123
4 5
S G
678
G D
G D
4 5
678
G D
G D
4 5
PU4704
PU4704
SIS406DN-T1-GE3-GP
SIS406DN-T1-GE3-GP
PU4705
PU4705
SIS402DN-T1-GE3-GP
SIS402DN-T1-GE3-GP
DDD
DDD
DDD
DDD
+PWR_SRC
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4738
PC4738
PC4705
PC4705
1 2
DY
DY
PC4730
PC4730
1 2
1 2
PR4711
PR4711
DY
DY
2D2R5F-2-GP
2D2R5F-2-GP
PHASENB_RC
1 2
DY
DY
PC4711
PC4711
SC330P50V3JN-GP
SC330P50V3JN-GP
1 2
DY
DY
PHASE0_RC
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4731
PC4731
1 2
1 2
DY
DY
PHASE1_RC
1 2
DY
DY
PR4725
PR4725
2D2R5F-2-GP
2D2R5F-2-GP
PC4721
PC4721
SC330P50V3JN-GP
SC330P50V3JN-GP
PR4747
PR4747
2D2R5F-2-GP
2D2R5F-2-GP
PC4737
PC4737
SC330P50V3JN-GP
SC330P50V3JN-GP
2
1 2
PL4702
PL4702
1 2
IND-4D7UH-88-G P
IND-4D7UH-88-G P
16KR2F-GP
16KR2F-GP
1 2
ISP0
+PWR_SRC
SE100U25VM-14GP
SE100U25VM-14GP
SCD1U50V3KX-GP
SCD1U50V3KX-GP
PC4734
PC4734
1 2
DY
DY
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PR4722
PR4722
1 2
10R2F-L-GP
10R2F-L-GP
PTC4706
PTC4706
1 2
16KR2F-GP
16KR2F-GP
ISP1
PC4713
PC4713
1 2
X01
PR4731
PR4731
DY
DY
X01
1 2
PR4748
PR4748
PR4750
PR4750
1 2
10R2F-L-GP
10R2F-L-GP
+VDDNB
Design Current: 2.8A
Peak current: 4A
4.4A<OCP<5.6A
+VDDNB
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4714
PC4714
1 2
1 2
PL4701
PL4701
1 2
COIL-D36UH-3-GP-U
COIL-D36UH-3-GP-U
PR4728
PR4728
1 2
4K02R2F-GP
4K02R2F-GP
PC4720
PC4720
1 2
SCD1U16V3KX-3GP
SCD1U16V3KX-3GP
ISP0_R
PL4703
PL4703
1 2
COIL-D36UH-3-GP-U
COIL-D36UH-3-GP-U
PR4749
PR4749
1 2
4K02R2F-GP
4K02R2F-GP
PC4736
PC4736
1 2
SCD1U16V3KX-3GP
SCD1U16V3KX-3GP
ISP1_R
DY
DY
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
PC4709
PC4709
+PWR_SRC
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
PC4715
PC4715
0907
1 2
NTC-10K-26-GP
NTC-10K-26-GP
PC4710
PC4710
1 2
PC4717
PC4717
1 2
0907
PR4732
PR4732
1 2
DY
DY
NTC-10K-26-GP
NTC-10K-26-GP
PR4751
PR4751
DY
DY
PTC4701
SE330U2VDM-L-GP
PTC4701
SE330U2VDM-L-GP
1 2
+VCC_CORE
Design Current: 36A
39.6A<OCP<54A
+VCC_CORE
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
SE330U2VDM-L-GP
PTC4703
PTC4703
PTC4705
PTC4705
PTC4704
PTC4704
1 2
1 2
PG4702
PG4702
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
ISN0
SE330U2VDM-L -GP
SE330U2VDM-L -GP
1 2
1 2
PG4703
PG4703
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
ISN1
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
VREG : +VCC_CORE&+VDDNB
VREG : +VCC_CORE&+VDDNB
VREG : +VCC_CORE&+VDDNB
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet
Date: Sheet
Date: Sheet
1 2
1 2
+VCC_CORE
SE330U2VDM-L -GP
SE330U2VDM-L -GP
SE330U2VDM-L -GP
SE330U2VDM-L -GP
PTC4709
PTC4709
PTC4708
PTC4708
PTC4707
PTC4707
1 2
1 2
DY
DY
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
21F, 88, Sec.1, Hsin Tai W u Rd., Hsichi h,
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
Taipei Hsien 221, Taiw an, R.O.C.
A00
A00
47 90 Thursday, May 27, 2010
47 90 Thursday, May 27, 2010
47 90 Thursday, May 27, 2010
A00
of
of
of
PU4702
PU4702
SSS
SSS
123
PHASE_NB
PU4703
PU4703
SSS
SSS
123
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
PC4729
PC4729
1 2
Page 48
5
4
SSID = PWR.Plane.Regulator_+1.1V_RUN
3
2
1
D D
X01
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PR4812
PR4812
10KR2J-3-GP
10KR2J-3-GP
1 2
3V_5V_POK 37,46
C C
1 2
PR4810
PR4810
2K2R2J-2-GP
2K2R2J-2-GP
TP4802 TP4802
DY
DY
1.1V_RUN_PWRGD
1
Vout=0.8V*(R1+R2)/R2
RT9025 for +1.1V_ALW
+5V_ALW
PC4813
SC1U10V3KX-3GP
PC4813
SC1U10V3KX-3GP
1 2
+3.3V_ALW
PC4812
PC4812
1 2
9
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
PC4811
PC4811
1 2
DY
DY
1.2mA
VDD4NC#5
3
VIN
2
EN
1
PGOOD
PU4802
PU4802
RT9025-25PSP-GP
RT9025-25PSP-GP
Vo=0.8*(1+(R1/R2))
GND
VOUT
ADJ
GND
5
6
+1.1V_ALW_ADJ +1.1V_VOUT_EN
7
8
1 2
PR4809
PR4809
1K02R2F-1-GP
1K02R2F-1-GP
1 2
PR4811
PR4811
2K7R2F-GP
2K7R2F-GP
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
DY
DY
PC4808
PC4808
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
PC4809
PC4809
+1.1V_ALW_P
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC4810
PC4810
1 2
DY
DY
Design Current = 0.4A
+1.1V_ALW
PG4804
PG4804
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4803
PG4803
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
RT9025_+1.1VALW
RT9025_+1.1VALW
RT9025_+1.1VALW
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
48 90 Thursday, May 27, 2010
48 90 Thursday, May 27, 2010
48 90 Thursday, May 27, 2010
of
of
1
of
A00
A00
A00
Page 49
5
SSID = PWR.Plane.Regulator_1p5v0p75v
7K68R2F-GP
7K68R2F-GP
PR4902
PR4902
D D
SC1KP50V2KX-1GP
+3.3V_RUN
PR4905
PR4905
100KR2J-1-GP
100KR2J-1-GP
RUNPWROK 51,52
+5116_PWR_SRC
TI51116 RT8207
PR4906
Non_ASM ASM
C C
1 2
PR4906 620KR2F-GP PR4906 620KR2F-GP
1 2
1029
+5V_ALW
PR4909 1M1R2J-GP
PR4909 1M1R2J-GP
+1.5V_SUS_P
+0D75V_DDR_P
1 2
PR4910 0R0402-PAD PR4910 0R0402-PAD
1 2
-A00
SC1KP50V2KX-1GP
0622
PM_SLP_S5# 21,37
+1.5V_SUS_P
SC1U10V3KX-3GP
SC1U10V3KX-3GP
DY
DY
PC4906
PC4906
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
1 2
1 2
PC4902
PC4902
+5116_PWR_SRC1
PC4905
PC4905
+1.5V_SUS_P1
DY
DY
1 2
51116_VDD
51116_VDD1
0D75V_EN
1 2
13
12
11
10
23
7
1
4
24
2
+5V_ALW
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
PC4901
PC4901
16
CS
0.8mA
PGOOD
TON
S5
S3
VLDOIN
NC#7
VTTGND
MODE
VTT
VTTSNS
GND
GND
3
25
Design Current = 0.7A
+0D75V_DDR_P
+0D75V_DDR_P +0.75V_DDR_VTT
PG4901
1 2
PC4915
PC4915
1 2
PC4916
PC4916
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
1 2
PC4914
B B
PC4914
PC4913
PC4913
1 2
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PG4901
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4917
PG4917
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
State S3 S5 VDDR VTTREF VTT
S0
S3
S4/S5
Hi Hi
Lo Lo
OnOnOnOnOn
Hi Lo
Off Off Off
Off(Hi-Z)
VDDQSET VDDQ (V) VTTREF and VTT NOTE
GND
A A
V5IN
FB Resistors
2.5
1.8
Adjustable
5
VVDDQSNS/2
VVDDQSNS/2
VVDDQSNS/2
DDR
DDR2
1.5 V < VVDDQ < 3 V
4
PR4901
PR4901
1 2
5D1R3J-GP
5D1R3J-GP
+5V_ALW
TPS51116_VBST
+5V_ALW
DY
DY
2 1
PD4901
PD4901
CH551H-30PT-GP
CH551H-30PT-GP
+5116_PWR_SRC
PU4902
PU4902
PU4903
PU4903
1 2
PC4903
PC4903
SC1U10V3KX-3GP
SC1U10V3KX-3GP
14
15
PU4901
PU4901
VDD
22
VDDP
BOOT
21
UGATE
20
PHASE
19
LGATE
18
PGND
17
NC#17
8
VDDQ
9
FB
6
DEM
VTTREF
RT8207GQW-GP
RT8207GQW-GP
5
+V_DRR_REF1
+V_DDR_REF
PR4912
PR4912
1 2
0R0603-PAD
0R0603-PAD
1 2
PC4908
PC4908
SCD033U16V3KX-GP
SCD033U16V3KX-GP
TPS51116_UGT
TPS51116_VBST
SCD1U25V3KX-GP
SCD1U25V3KX-GP
TPS51116_LGT
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5UHPCMC104T-1R5MN DCR:3.8/4.2mohm Isat =33Arms Cyntec/ 68.1R510.10J
O/P cap: 220U 2V EEFCX0D221R 15mOhm 2.7Arms PANASONIC/ 79.22719.20L
H/S: FDS8880 9.6mohm/12mOhm@4.5Vgs/ 84.08880.037
L/S: FDS6676AS 5.9mOhm/7.25mOhm@4.5Vgs/ 84.06676.A37
4
TPS51116_VBST1
TPS51116_UGT
TPS51116_PHS
TPS51116_LGT
TPS51116_VDDQSNS
51116_VDDQSET
+5V_ALW
1 2
DY
DY
1 2
PC4917
PC4917
PR4908
PR4908
1 2
0R3J-0-U-GP
0R3J-0-U-GP
PR4911
PR4911
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
PC4907
PC4907
SC1U10V3KX-3GP
SC1U10V3KX-3GP
4 5
DDD
DDD
G
G
4 5
678
DDD
DDD
678
3
SI7686DP-T1-GP
SI7686DP-T1-GP
SSG D
S
SSG D
S
123
TPS51116_PHS
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
D
D
SSS
SSS
123
3
PC4909
PC4909
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
COIL-1D5UH-25-GP-U
COIL-1D5UH-25-GP-U
1 2
PR4913
PR4913
DY
DY
2D2R5F-2-GP
2D2R5F-2-GP
TPS51116_PHS_SET
1 2
PC4920
PC4920
SC330P50V3JN-GP
SC330P50V3JN-GP
DY
DY
X01
PL4901
PL4901
1 2
1.5V_RUN_EN 37,42
PC4922
PC4922
1 2
SC10U25V6KX-1GP
SC10U25V6KX-1GP
TPS51116_VDDQSN S
51116_VDDQSET
PM_SLP_S3# 21,37,41,42,50,52,54
PM_SLP_S5# 21,37
PC4911
PC4911
1 2
PR4914
PR4914
30KR2F-GP
30KR2F-GP
PR4915
PR4915
30KR2F-GP
30KR2F-GP
-A00
PR4903 0R0402-PAD PR4903 0R0402-PAD
PR4907 0R2J-2-GP
PR4907 0R2J-2-GP
PR4904 0R2J-2-GP
PR4904 0R2J-2-GP
+PWR_SRC
1 2
PC4912
PC4912
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SC4D7U25V5KX-GP
SC4D7U25V5KX-GP
1 2
PG4918
PG4918
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
1 2
1 2
DY
DY
1 2
2
1 2
1 2
DY
DY
1 2
DY
DY
DY
DY
+5116_PWR_SRC
PG4903
PG4903
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4905
PG4905
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4907
PG4907
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4909
PG4909
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4911
PG4911
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
Design Current = 9.44A
12.7A<OCP< 14.2A
12
PC4918
PC4918
PC4921
PC4921
SC18P50V2JN-1-GP
SC18P50V2JN-1-GP
1 2
PC4919
PC4919
1 2
PTC4902
PTC4902
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC4D7U6D3V5KX-3GP
SC4D7U6D3V5KX-3GP
Close to VFB Pin (pin5)
2
0D75V_EN
1 2
+1.5V_SUS_P
1 2
SE220U2VDM-8GP
SE220U2VDM-8GP
PC4904
PC4904
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
PTC4901
PTC4901
SE220U2VDM-8GP
SE220U2VDM-8GP
1
+1.5V_SUS_P
+1.5V_SUS
PG4902
PG4902
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4904
PG4904
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4906
PG4906
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4908
PG4908
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4910
PG4910
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4912
PG4912
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4913
PG4913
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4914
PG4914
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4915
PG4915
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4916
PG4916
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4919
PG4919
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4920
PG4920
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG4921
PG4921
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RT8207GQW_+1.5V_SUS
RT8207GQW_+1.5V_SUS
RT8207GQW_+1.5V_SUS
Size Document Num ber Rev
Size Document Num ber Rev
Size Document Num ber Rev
Custom
Custom
Custom
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
1
X02
X02
49 90 Thursday, May 27, 2010
49 90 Thursday, May 27, 2010
49 90 Thursday, May 27, 2010
X02
of
of
of
http://hobi-elektronika.net
Page 50
5
4
SSID = PWR.Plane.Regulator_VDDC
3
2
1
PU5001
PU5001
4
VDD
10
VDDP
5
FB
14
BOOT
1
EN/DEM
2
TON
11
CS
RT8209EGQW-GP
RT8209EGQW-GP
PR5002 PR5001
4.7 ohm RT8209E 10 ohm
0 ohm
1 2
4D7R3J-L1-GP
4D7R3J-L1-GP
PR5002
PR5002
UGATE
LGATE
PHASE
PGOOD
VOUT
GND
PGND
NC#15
13
9
12
3
6
7
8
15
+VDDC_LL1
+VDDC_DRVH
+VDDC_DRVL
+VDDC_LL +VDDC_FB
+VDDC_VOUT
PC5009
PC5009
1 2
SCD1U25V3KX-GP
SCD1U25V3KX-GP
VDDC_PWRGD 37,41
+PWR_SRC_+VDDC
PU5003
PU5003
4 5
PU5002
PU5002
4 5
DDD
DDD
G
G
678
DDD
DDD
678
SSG D
S
SSG D
S
123
D
D
SSS
SSS
123
1 2
PC5004
PC5004
SI7686DP-T1-GP
SI7686DP-T1-GP
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1126
SIR460DP-T1-GE3-GP
SIR460DP-T1-GE3-GP
1 2
PC5011
PC5011
SC10U25V6KX-1GP
SC10U25V6KX-1GP
1 2
PC5003
PC5003
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
PC5007
PC5007
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
Design Current =12.5A
13.8A<OCP <17.5A
Vout=0.75V*(R1+R2)/R2
X01
PL5001
PL5001
1 2
1 2
COIL-1D5UH-25-GP-U
COIL-1D5UH-25-GP-U
PR5003
PR5003
DY
DY
2D2R5F-2-GP
2D2R5F-2-GP
1 2
PC5006
PC5006
SC330P50V3JN-GP
SC330P50V3JN-GP
DY
DY
X00
PR5008
PR5008
23K7R2F-GP
23K7R2F-GP
PR5005
PR5005
49K9R2F-L-GP
49K9R2F-L-GP
1 2
1 2
PG5014
PG5014
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
+VDDC_VOUT
1 2
+VDDC_FB
1 2
PC5010
PC5010
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+1.1V_RUN
1 2
PTC5002
PTC5002
ST330U2VDM-3GP
ST330U2VDM-3GP
1 2
DY
DY
PTC5001
PTC5001
ST330U2VDM-3GP
ST330U2VDM-3GP
PWM TYPE
*
D D
PC5001
PC5001
SC1U10V3KX-3GP
SC1U10V3KX-3GP
+5V_ALW
PD5001
PD5001
B0530WS-7-F-GP
B0530WS-7-F-GP
K A
PR5012 100KR2J-1-GP
PM_SLP_S3# 21,37,41,42,49,52,54
C C
IMVP_PWRGD 37,41,47,51
PR5012 100KR2J-1-GP
PR5016 0R0402-PAD PR5016 0R0402-PAD
1 2
1 2
DY
DY
1 2
+5V_ALW
-A00
*DEFAULT
10R3J-3-GP
10R3J-3-GP
1 2
PR5001
PR5001
PC5002
PC5002
1 2
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
PR5004
PR5004
1 2
200KR2J-L1-GP
200KR2J-L1-GP
300 ohm TPS51117
0.4mA
+VDDC_V5FILT
+VDDC_BST
+VDDC_EN
+VDDC__TON
+VDDC_TRIP
PR5010
PR5010
8K25R2F-1-GP
8K25R2F-1-GP
0307
1 2
DY
DY
PC5008
PC5008
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
B B
I/P cap: 10U 25V K1206 X5R/ 78.10622.52L
Inductor: 1.5UHPCMC104T-1R5MN DCR:3.8/4.2mohm Isat =33Arms Cyntec/ 68.1R510.10
O/P cap: 330U 2.5V PSLV0E337M(15) 15mOhm 2.886Arms NEC_TOKIN/ 77.C3371.10L
H/S: SI7686DP/ POWERPAK-8/11mOhm/14mOhm@4.5Vgs/ 84.07686.037
L/S: SiR460DP/ POWERPAK-8/ 4.9mOhm/6.1mohm@4.5Vgs/ 84.00460.037
A A
http://hobi-elektronika.net
5
4
3
+PWR_SRC +PWR_SRC_+VDDC
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1020
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5001
PG5001
PG5007
PG5007
PG5008
PG5008
PG5018
PG5018
PG5003
PG5003
PG5004
PG5004
PG5005
PG5005
PG5006
PG5006
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RT8209 +1.1V_RUN
RT8209 +1.1V_RUN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
2
Date: Sheet
RT8209 +1.1V_RUN
A3
A3
A3
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
50 90 Thursday, May 27, 2010
50 90 Thursday, May 27, 2010
50 90 Thursday, May 27, 2010
of
of
1
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A00
A00
A00
Page 51
5
4
3
2
1
SSID = PWR.Plane.Regulator_VDDR
D D
RT9025 for +VDDR
+5V_ALW
PC5101
SC1U10V3KX-3GP
PC5101
SC1U10V3KX-3GP
1 2
+1.5V_SUS
PC5106
SC10U6D3V5MX-3GP
PC5106
SC10U6D3V5MX-3GP
1 2
C C
1.2mA
RUNPWROK 49,52
Vo=0.8*(1+(R1/R2))
IMVP_PWRGD 37,41,47,50
1 2
PR5101
PR5101
2K2R2J-2-GP
2K2R2J-2-GP
VDDR_EN +VDDR_ADJ
SC4700P50V2KX-1GP
SC4700P50V2KX-1GP
PC5104
PC5104
1 2
DY
DY
Vout=0.8V*(R1+R2)/R2
X00
+3.3V_RUN
MEM_1V5 22
B B
VDDR_SEL 20,24
BAT54A-3-GP
BAT54A-3-GP
PD5101
PD5101
1 2
10KR2F-2-GP
10KR2F-2-GP
3
1 2
DY
DY
PR5108 0R2J-2-GP
PR5108 0R2J-2-GP
PR5105
PR5105
1 2
PR5103
PR5103
10KR2F-2-GP
10KR2F-2-GP
1 2
VDDR_SEL_CNTL
DY
DY
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
VDD4NC#5
3
VIN
2
EN
1
PGOOD
PU5101
PU5101
RT9025-25PSP-GP
RT9025-25PSP-GP
12
DY
DY
PC5102
PC5102
1 2
9
GND
VOUT
ADJ
GND
PR5104
PR5104
100KR2J-1-GP
100KR2J-1-GP
5
6
7
8
2N7002-7F-GP
2N7002-7F-GP
PQ5101
PQ5101
G
1 2
PR5107
PR5107
5K62R2F-GP
5K62R2F-GP
VDDRSEL_R
S D
PR5102
1K05R2F-GP
PR5102
1K05R2F-GP
1 2
1 2
PR5106
PR5106
8K2R2F-1-GP
8K2R2F-1-GP
X00
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
DY
DY
PC5105
PC5105
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1 2
PC5107
PC5107
+VDDR_P
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
+1.5V_RUN +/- 5%
Design Current: 0.805A
Peak current 1.15A
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
1 2
DY
DY
PC5103
PC5103
PG5101
PG5101
PG5102
PG5102
PG5103
PG5103
+CPU_VDDR
VDDR_SEL
+CPU_VDDR
1.05V H
0.9V L
<Core Design>
<Core Design>
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RT9025 +VDDR
RT9025 +VDDR
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
RT9025 +VDDR
A3
A3
A3
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
51 90 Thursday, May 27, 2010
51 90 Thursday, May 27, 2010
51 90 Thursday, May 27, 2010
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5
4
3
2
1
SSID = PWR.Plane.Regulator_1p8v
D D
APL5930 for +1.8V_RUN
+3.3V_ALW +1.8V_RUN_VIN
PG5201
PG5201
1 2
GAP-CLOSE-PWR
C C
B B
GAP-CLOSE-PWR
PG5202
PG5202
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
RUNPWROK 49,51
PM_SLP_S3# 21,37,41,42,49,50,54
PR5201
PR5201
1 2
10KR2J-3-GP
10KR2J-3-GP
1D8V_RUN_EN
1 2
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
1.5mA
PU5201
PU5201
7
POK
8
EN
APL5930KAI-TRG-GP
APL5930KAI-TRG-GP
PC5207
PC5207
PC5201
PC5201
6
VCNTL
VOUT#3
VOUT#4
GND
1
VIN#5
VIN#9
FB
SO-8-P
+1.8V_RUN_VIN +5V_ALW
5
9
3
4
2
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PC5202
PC5202
1 2
PR5203
16K5R2F-2-GP
PR5203
16K5R2F-2-GP
1 2
5912_1.8V_RUN_FB
1 2
PR5204
PR5204
13K3R2F-L1-GP
13K3R2F-L1-GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
PC5203
PC5203
1 2
DY
DY
Design Current =0.92A
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC5205
1 2
PC5205
PC5204
SC68P50V2JN-1GP
PC5204
SC68P50V2JN-1GP
1 2
Vout=0.8V*(R1+R2)/R2
+1.8V_RUN_P
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC5206
PC5206
1 2
DY
DY
+1.8V_RUN_P +1.8V_RUN
PG5203
PG5203
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
PG5204
PG5204
1 2
GAP-CLOSE-PWR
GAP-CLOSE-PWR
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
APL5930_+1.8V_RUN
APL5930_+1.8V_RUN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
APL5930_+1.8V_RUN
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
52 90 Thursday, May 27, 2010
52 90 Thursday, May 27, 2010
52 90 Thursday, May 27, 2010
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5
4
3
2
1
SSID = PWR.Plane.Regulator_2p5v
D D
RT9013-25PB for +2.5V_RUN
C C
+3.3V_RUN +2.5V_RUN
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
1 2
PC5301
PC5301
PR5301
PR5301
1 2
1KR2J-1-GP
1KR2J-1-GP
2D5V_RUN_EN
1 2
P C5302
PC5302
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
PU5301
PU5301
1
VIN
2
GND
EN3NC#4
RT9013-25PB-GP
RT9013-25PB-GP
VOUT
5
4
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
+2.5V_RUN +/- 5%
PC5303
PC5303
Design Current: 175mA
1 2
Peak current 250mA
X00
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
VREG : +CPU_VDDR&+2.5V_RUN
VREG : +CPU_VDDR&+2.5V_RUN
VREG : +CPU_VDDR&+2.5V_RUN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet of
Date: Sheet of
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
53 90 Thursday, May 13, 2010
53 90 Thursday, May 13, 2010
53 90 Thursday, May 13, 2010
1
of
A00
A00
A00
Page 54
SSID = VIDEO
LVDS CONNECTOR
51
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
50
GFX_PWR_SRC
LCD_BRIGHTNESS
LCD_CBL_DET#_C
BLON_OUT_C
LCD_TST_C
LDDC_CLK
LDDC_DATA
LCD_DET_G
VGA_TXAOUT0- VGA_TXAOUT0VGA_TXAOUT0+
VGA_TXAOUT1VGA_TXAOUT1+
VGA_TXAOUT2VGA_TXAOUT2+
VGA_TXACLKVGA_TXACLK+
USB_CAMERAUSB_CAMERA+
IPEX-CONN40-2R-GP-U
IPEX-CONN40-2R-GP-U
49
47
46
45
44
43
42
41
48
LCD1
LCD1
+LCDVDD
1 2
C5401
C5401
LDDC_CLK 13
LDDC_DATA 13
VGA_TXAOUT0- 13
VGA_TXAOUT0+ 13
VGA_TXAOUT1- 13
VGA_TXAOUT1+ 13
VGA_TXAOUT2- 13
VGA_TXAOUT2+ 13
VGA_TXACLK- 13
VGA_TXACLK+ 13
+3.3V_CAMERA
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C5404
C5404
1 2
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
+3.3V_RUN
100KR2J-1-GP
100KR2J-1-GP
1 2
R5409 0R3J-0-U-GP R5409 0R3J-0-U-GP
1 2
R5411 0R3J-0-U-GP R5411 0R3J-0-U-GP
1 2
Place R5409 and R5411 together
R5408
R5408
LCD_BRIGHTNESS
USB_PN11 21
USB_PP11 21
+3.3V_RUN
DY
DY
LCD_CBL_DET#_C
BLON_OUT_C
LCD_TST_C
LCD_DET_G
1 2
R5401
R5401
10KR2J-3-GP
10KR2J-3-GP
R5402 100R2J-2-GP R5402 100R2J-2-GP
R5403 100R2J-2-GP
R5403 100R2J-2-GP
R5405
R5405
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
SRN100J-4-GP
SRN100J-4-GP
4 5
3
2
1
RN5401
RN5401
1 2
1 2
DY
DY
6
7
8
LBKLT_CTL 13
BRIGHTNESS 37
LCD_CBL_DET# 37
BLON_OUT 37
LCD_TST 37
SSID = Inverter
INVERTER POWER
GFX_PWR_SRC +PWR_SRC
1 2
R_PWR_SRC_C
DY
DY
S D
C5402
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
C5402
1 2
C5403
C5403
SCD1U50V3KX-GP
SCD1U50V3KX-GP
1 2
PM_SLP_S3# 21,37,41,42,49,50,52
G
use Poly-SW
F5401
F5401
POLYSW-1D1A24V-1-GP
POLYSW-1D1A24V-1-GP
Q5401
Q5401
D
D
1
D
D
2
G
G
3 4
DY
DY
SI3457CDV-T1-GE3- GP
SI3457CDV-T1-GE3-GP
R_PWR_SRC
1 2
R5407 100KR2J-1-GP
R5407 100KR2J-1-GP
Q5402
Q5402
2N7002A-7-GP
2N7002A-7-GP
D
D
6
D
D
5
S
S
C5405
C5405
SCD1U50V3KX-GP
SCD1U50V3KX-GP
DY
DY
DY
DY
1 2
SSID = VIDEO
LCD POWER
DY
DY
1 2
R5404
R5404
100KR2J-1-GP
100KR2J-1-GP
20.F1093.040
20.F1289.040
R5414
R5414
1 2
0R3J-0-U-GP
0R3J-0-U-GP
EC5405
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
EC5405
CAMERA Power
+3.3V_CAMERA +3.3V_RUN
1 2
1 2
C5408
DY
DY
C5408
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
LCD_BRIGHTNESS
LCD_TST
1 2
1 2
DY
DY
DY
DY
E C5403
EC5403
E C5402
EC5402
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
SC33P50V2JN-3GP
For EMI request
http://hobi-elektronika.net
LCDVDD_EN 13
LCD_TST_EN 37
D5401
D5401
1 2
BAT54C-U-GP
BAT54C-U-GP
3
-A00
ENVDD ENVDD_D
R5412
R5412
1 2
0R0402-PAD
0R0402-PAD
1 2
R5413
R5413
49K9R2F-L-GP
49K9R2F-L-GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
1 2
DY
DY
C 5406
C5406
LCD/Inverter Connector
LCD/Inverter Connector
LCD/Inverter Connector
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
U5401
U5401
OUT3IN#4
2
GND
1
EN
G5285T11U-GP
G5285T11U-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
IN#5
4
5
54 90 Thursday, May 27, 2010
54 90 Thursday, May 27, 2010
54 90 Thursday, May 27, 2010
+3.3V_RUN +LCDVDD
1 2
C5407
C5407
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
A00
A00
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5
4
3
2
1
SSID = VIDEO
+5V_CRT_RUN
1
C5501
C5501
2 3
RN5501
RN5501
SRN4K7J-8-GP
SRN4K7J-8-GP
4
DDC_DATA_CON
12
12
C5502
C5502
SC22P50V2JN-4GP
SC22P50V2JN-4GP
D5501
D5501
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
D5503
D5503
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
D5504
D5504
3
DY
DY
BAV99PT-GP-U
BAV99PT-GP-U
DDC_CLK_CON
+5V_CRT_RUN
2
1
2
1
2
1
X01 X01
AFTP5501 AFTP5501
AFTP5508 AFTP5508
AFTP5503 AFTP5503
AFTP5506 AFTP5506
AFTP5507 AFTP5507
AFTP5504 AFTP5504
+5V_CRT_RUN
AFTP5502 AFTP5502
CRT_R
CRT_G
CRT_B
+5V_CRT_RUN
1
DDC_DATA_CON
1
DDC_CLK_CON
1
CRT_R
1
CRT_G
1
CRT_B
1
+5V_CRT_RUN
+5V_CRT_RUN
12 11
1
14
10
9 8
U5501C
U5501C
7
TSAHCT125PW-GP
TSAHCT125PW-GP
14
13
U5501D
U5501D
7
TSAHCT125PW-GP
TSAHCT125PW-GP
D D
Layout Note:
*Pi-filter & 150 Ohm pull-down
resistors should be as close
as to CRT CONN.
* RGB signal will hit 75 Ohm
DDC_DATA_CON 13
DDC_CLK_CON 13
SC22P50V2JN-4GP
SC22P50V2JN-4GP
first, then pi-filter, finally
CRT CONN.
L5501
L5501
M_RED 13
M_GREEN 13
C C
B B
M_BLUE 13
1 2
R5504
R5504
R5505
1 2
R5503
R5503
150R2F-1-GP
150R2F-1-GP
1 2
1 2
150R2F-1-GP
150R2F-1-GP
R5505
DY
DY
150R2F-1-GP
150R2F-1-GP
X00
VGA_HSYNC 13
14
4
U5501B
U5501B
VGA_VSYNC 13
5 6
TSAHCT125PW-GP
TSAHCT125PW-GP
7
1 2
DY
DY
C 5505
C5505
SC8P250V2CC-GP
SC8P250V2CC-GP
R5501
R5501
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
14
1
2 3
TSAHCT125PW-GP
TSAHCT125PW-GP
7
DY
DY
C 5506
C5506
SC8P250V2CC-GP
SC8P250V2CC-GP
+5V_CRT_RUN
1 2
C5511
C5511
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
U5501A
U5501A
1 2
BLM15BB220SS1D-GP
BLM15BB220SS1D-GP
L5502
L5502
1 2
BLM15BA100SS1D-GP
BLM15BA100SS1D-GP
L5503
L5503
1 2
BLM15BA100SS1D-GP
BLM15BA100SS1D-GP
1 2
C 5507
C5507
SC8P250V2CC-GP
SC8P250V2CC-GP
HSYNC_5
RN5502
RN5502
VSYNC_5 JVGA_VS
4
SRN33J-5-GP-U
SRN33J-5-GP-U
1 2
C 5508
C5508
JVGA_HS
1
2 3
SC8P250V2CC-GP
SC8P250V2CC-GP
CRT_R
CRT_G
CRT_B
1 2
C 5509
C5509
SC8P250V2CC-GP
SC8P250V2CC-GP
1 2
C 5510
C5510
SC8P250V2CC-GP
SC8P250V2CC-GP
CRT_R
CRT_G
CRT_B
CRT1
CRT1
16
6
1
11
7
2
8
3
9
4
10
5
17
D-SUB-15-81-GP
D-SUB-15-81-GP
DDC_DATA_CON
12
JVGA_HS
13
JVGA_VS
14
15
DDC_CLK_CON
20.20401.015
20.20479.015
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
1 2
1 2
DY
DY
DY
DY
C5504
C5 503
C5503
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+5V_CRT_RUN +5V_RUN
1 2
C5512
C5512
C5504
SC33P50V2JN-3GP
SC33P50V2JN-3GP
D5502
D5502
2 1
CH551H-30PT-GP
CH551H-30PT-GP
R5502
R5502
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
CRT Connector
CRT Connector
CRT Connector
1
of
55 90 Thursday, May 27, 2010
55 90 Thursday, May 27, 2010
55 90 Thursday, May 27, 2010
A00
A00
A00
Page 56
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
56 90 Thursday, May 13, 2010
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of
of
of
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
HDMI (Reserved)
HDMI (Reserved)
HDMI (Reserved)
57 90 Thursday, May 13, 2010
57 90 Thursday, May 13, 2010
57 90 Thursday, May 13, 2010
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4
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1
SSID = Thermal
D D
Fan Connector
31
*Layout* 15 mil
C C
EMC2102_FAN_TACH 39
EMC2102_FAN_DRIVE 39
EMC2102_FAN_TACH
EMC2102_FAN_DRIVE
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
C5801
C5801
AFTP5801 AFTP5801
2 1
1 2
D5801
D5801
CH551H-30PT-GP
CH551H-30PT-GP
1
FAN1
FAN1
5
3
2
1
4
FOX-CON3-6-GP-U
FOX-CON3-6-GP-U
20.D0210.103
20.F1293.003
AFTP5802 AFTP5802
AFTP5803 AFTP5803
EMC2102_FAN_TACH
1
EMC2102_FAN_DRIVE
1
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
ITP/Fan Connector
ITP/Fan Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
ITP/Fan Connector
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
58 90 Thursday, May 27, 2010
58 90 Thursday, May 27, 2010
58 90 Thursday, May 27, 2010
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of
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SSID = SATA
+3.3V_RUN
+5V_RUN
SATA_TXP0 22
SATA_TXN0 22
SATA_RXP0 22
SATA_RXN0 22
SATA HDD Connector
HDD1
HDD1
P1
V33
P2
V33
P3
V33
1 2
C5903
C5903
SC10U10V5KX-2GP
SC10U10V5KX-2GP
1 2
C5904
C5904
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC10U10V5KX-2GP
SC10U10V5KX-2GP
C5901
C5901
1 2
1 2
DY
DY
DY
DY
C5902
C5902
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
P7
V5
P8
V5
P9
V5
P13
V12
P14
V12
P15
V12
S2
A+
S3
A-
S6
B+
S5
B-
SKT-SATA7P-15P-23-GP
SKT-SATA7P-15P-23-GP
22.10300.961
GND
GND
GND
GND
GND
GND
GND
GND
DAS/DSS
NP1
NP2
23
23
24
24
NP1
NP2
S1
S4
S7
P4
P5
P6
P10
P12
P11
ODD Connector
X01
ODD1
ODD1
8
NP1
S1
S2
S3
S4
S5
S6
S7
P1
P2
P3
P4
P5
P6
NP2
9
SKT-SATA7P-6P-4-GP
SKT-SATA7P-6P-4-GP
22.10300.811
22.10300.421
22.10300.471
http://hobi-elektronika.net
SATA_TXP1 22
SATA_TXN1 22
SATA_RXN1 22
SATA_RXP1 22
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SATA_RX- and SATA_RX+ Trace
Length match within 20 mil
+5V_RUN
1 2
C5905
C5905
1 2
C5906
C5906
SC10U10V5KX-2GP
SC10U10V5KX-2GP
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
HDD/ODD
HDD/ODD
HDD/ODD
59 90 Thursday, May 27, 2010
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5
4
3
2
1
SSID = AUDIO
6SHDNHU
/,1(
&RQQHFWRU
287
D D
5
SPK1
SPK1
FOX-CON4-19-GP
FOX-CON4-19-GP
AUD_SPK_L- 30
AUD_SPK_L+ 30
AUD_SPK_R- 30
AUD_SPK_R+ 30
1 2
EC6001
EC6001
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
EC6002
EC6002
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
EC6003
EC6003
SC100P50V2JN-3GP
SC100P50V2JN-3GP
1 2
EC6004
EC6004
SC100P50V2JN-3GP
SC100P50V2JN-3GP
20.F0711.004
20.F1561.004
1
2
3
4
6
AUD_HP1_JD# 30
AUD_HP1_JACK_L2 30
AUD_HP1_JACK_R2 30
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
AUD_HP1_JACK_L2
AUD_HP1_JACK_R2
1 2
EC6005
EC6005
X01
1
AFTP6013 AFTP6013
X01
C C
X01
AFTP6002 AFTP6002
AFTP6003 AFTP6003
AFTP6004 AFTP6004
AFTP6005 AFTP6005
AUD_SPK_L-
1
AUD_SPK_L+
1
AUD_SPK_R-
1
AUD_SPK_R+
1
AFTP6010 AFTP6010
AFTP6011 AFTP6011
AFTP6012 AFTP6012
AUD_HP1_JD#
1
AUD_HP1_JACK_L1
1
AUD_HP1_JACK_R1
1
BLM18BD601SN1D-GP
BLM18BD601SN1D-GP
L6001
L6001
1 2
1 2
L6002
L6002
BLM18BD601SN1D-GP
BLM18BD601SN1D-GP
1 2
EC6006
EC6006
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
600ohm 100MHz
200mA 0.5ohm DC
X01
AUD_HP1_JD#
AUD_HP1_JACK_L1
AUD_HP1_JACK_R1
1 2
EC6007
EC6007
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
X01
AFTP6009 AFTP6009
1 2
EC6008
EC6008
SCD01U16V2KX-3GP
SCD01U16V2KX-3GP
PHONE-JK383-GP
PHONE-JK383-GP
6
5
2
4
1
3
7
8
22.10133.K31
1
22.10133.K71
LINEOUT1
LINEOUT1
,QWHUQDO
0,&,1
AUD_VREFOUT_B 30
RN6001
1 2
1 2
MIC_IN_L_C
1
MIC_IN_R_C
1
EXT_MIC_JD#
1
RN6001
SRN4K7J-8-GP
SRN4K7J-8-GP
B B
AUD_EXT_MIC_L 30
AUD_EXT_MIC_R 30
A A
AUD_EXT_MIC_L
AUD_EXT_MIC_R
X01
AFTP6006 AFTP6006
AFTP6007 AFTP6007
AFTP6008 AFTP6008
C6001 SC1U10V3KX-3GP C6001 SC1U10V3KX-3GP
C6003 SC1U10V3KX-3GP C6003 SC1U10V3KX-3GP
1
2 3
4
1 2
C 6002
C6002
SC1U10V3KX-3GP
SC1U10V3KX-3GP
MIC_IN_L_2
R6001 0R3J-0-U-GP R6001 0R3J-0-U-GP
MIC_IN_R_2
EXT_MIC_JD# 30
1 2
R6002 0R3J-0-U-GP R6002 0R3J-0-U-GP
MICIN1
MICIN1
8
7
MIC_IN_L_C
1 2
MIC_IN_R_C
1 2
1 2
EC6010
EC6010
EC6011
EC6011
SC100P50V2JN-3GP
SC100P50V2JN-3GP
3
1
4
2
5
6
P HONE-JK383-GP
PHONE-JK383-GP
X01
1
SC100P50V2JN-3GP
SC100P50V2JN-3GP
INT_MIC_L_R 30
AFTP6001 AFTP6001
22.10133.K31
22.10133.K71
http://hobi-elektronika.net
5
4
3
2
0LFURSKRQH
MIC1 is in DIP
MIC1 is in DIP
MIC1
MIC1
1
MICROPHONE-40-GP-U1
MICROPHONE-40-GP-U1
1 2
EC6009
EC6009
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
2
23.42143.001
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Audio Jack
Audio Jack
Audio Jack
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
60 90 Thursday, May 27, 2010
60 90 Thursday, May 27, 2010
60 90 Thursday, May 27, 2010
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of
of
X02
X02
X02
Page 61
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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1
SSID = Flash.ROM
SPI FLASH ROM (16M bits) for KBC
D D
+KBC_PWR
X01
1 2
4
R6201
R6201
100KR2J-1-GP
100KR2J-1-GP
EC_SPI_CS# 37
EC_SPI_DI 37
C C
EC_SPI_WP#_R 37
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
EC6201
EC6201
R6202 33R2J-2-GP R6202 33R2J-2-GP
1 2
R6203 0R0402-PAD R6203 0R0402-PAD
1 2
DY
DY
12
-A00
100KR2J-1-GP
100KR2J-1-GP
R6207
R6207
DY
DY
1
2 3
EC_SPI_CS#
EC_SPI_DI_R
EC_SPI_WP#
1 2
RN6201
RN6201
SRN100KJ-6-GP
SRN100KJ-6-GP
EC_SPI_HOLD#
U6201
U6201
1
2
3
4
W25Q16BVSSIG-GP
W25Q16BVSSIG-GP
CS#
DO/IO1
WP#/IO2
GND
VCC
HOLD#/IO3
CLK
DI/IO0
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
SC10U6D3V5MX-3GP
SC10U6D3V5MX-3GP
+KBC_PWR
8
EC_SPI_HOLD#
7
6
EC_SPI_DO_R
5
EC6202
EC6202
DY
DY
25mA
12
DY
DY
1 2
C6201
C6201
DY
DY
1 2
R6204 33R2J-2-GP R6204 33R2J-2-GP
1 2
EC6203
EC6203
SC4D7P50V2CN-1GP
SC4D7P50V2CN-1GP
+KBC_PWR
1 2
C6202
C6202
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C6203
C6203
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
EC_SPI_CLK 37
EC_SPI_DO 37
PN:72.25Q16.001
SSID = RBATT
B B
+3.3V_RTC_LDO
+RTC_CELL
1 2
-A00
R6205
R6205
1 2
0R0402-PAD
0R0402-PAD
C6204
C6204
SC1U10V3KX-3GP
SC1U10V3KX-3GP
RTC_PWR_L
D6201
D6201
BAT54C-U-GP
BAT54C-U-GP
1 2
3
RTC_PWR
X00
1 2
1KR2J-1-GP
1KR2J-1-GP
Width=20mils
A A
RTC Connector
-A00
+RTC_VCC
R6206
R6206
1
2
NP1
NP2
BAT-330DG02PSS0301CE-GP
BAT-330DG02PSS0301CE-GP
62.70001.051
PWR
GND
NP1
NP2
RTC1
RTC1
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
http://hobi-elektronika.net
5
4
3
2
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Flash/RTC
Flash/RTC
Flash/RTC
1
A00
A00
62 90 Thursday, May 27, 2010
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4
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1
SSID = USB
IO Board USB Power
U6301
U6301
D D
1 2
DY
DY
C 6302
C6302
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
at least 80 mil
USB_PWR_EN# 37
1
GND
2
IN#2
3
IN#3
4
EN/EN#
G547F2P81U-GP
G547F2P81U-GP
OUT#8
OUT#7
OUT#6
OC#
8
7
6
5
at least 80 mil
USB_OC#0_1 21
+5V_USB1 +5V_ALW
DY
DY
1 2
C6301
C6301
SC1U10V3KX-3GP
SC1U10V3KX-3GP
C C
+5V_ALW
at least 80 mil
DY
DY
1 2
USB_PWR_EN# 37
C 6303
C6303
SCD1U10V2KX-4GP
SCD1U10V2KX-4GP
-A00
EL6301
EL6301
B B
USB_PN0 21
USB_PP0 21
USB_PP0
4 3
FILTER-137-GP
FILTER-137-GP
USB_P0- USB_PN0
USB_P0+
2 1
-A00
EL6302
USB_PN1 21
USB_PP1 21
A A
USB_PN1 USB_P1USB_PP1
EL6302
4 3
FILTER-137-GP
FILTER-137-GP
USB_P1+
2 1
Right USB Power
U6302
U6302
1
GND
2
IN#2
3
IN#3
4
EN/EN#
G547F2P81U-GP
G547F2P81U-GP
USB_P0+
8
OUT#8
7
OUT#7
6
OUT#6
5
OC#
D6301
D6301
1
2 3
PRTR5V0U2X-GP
PRTR5V0U2X-GP
D6302
D6302
1
2 3
PRTR5V0U2X-GP
PRTR5V0U2X-GP
DY
DY
DY
DY
at least 80 mil
USB_OC#2_3 21
+5V_USB2
4
USB_P0-
+5V_USB2
4
USB_P1- USB_P1+
+5V_USB2
1 2
DY
DY
R6301
R6301
100KR2J-1-GP
100KR2J-1-GP
1 2
C6304
C6304
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C6305
C6305
SC1U10V3KX-3GP
SC1U10V3KX-3GP
1 2
TC6301
TC6301
ST100U6D3VBM-5GP
ST100U6D3VBM-5GP
+5V_USB2
USB_P0USB_P0+
+5V_USB2
USB_P1USB_P1+
X01
AFTP6304 AFTP6304
AFTP6302 AFTP6302
AFTP6301 AFTP6301
AFTP6306 AFTP6306
AFTP6305 AFTP6305
USB1
USB1
1
2
3
4
6 8
SKT-USB8-29- GP -U
SKT-USB8-29-GP-U
22.10254.451
22.10321.A21
USB3
USB3
1
2
3
4
6 8
SKT-USB8-29- GP -U
SKT-USB8-29-GP-U
<Core Design>
<Core Design>
<Core Design>
+5V_USB2
1
USB_P0-
1
USB_P0+
1
USB_P1-
1
USB_P1+
1
7 5
7 5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
http://hobi-elektronika.net
5
4
3
2
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
USB
USB
USB
of
63 90 Thursday, May 27, 2010
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63 90 Thursday, May 27, 2010
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63 90 Thursday, May 27, 2010
1
A00
A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
MINICARD
MINICARD
MINICARD
1
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
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SSID = User.Interface
4
3
2
1
Battery LED
POWER LED
LED-OW-3-GP
D D
BAT_LED_WHITE 37
Q6601
Q6601
R1
R1
B
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
LED_PWR#
C
E
1 2
EC6601
EC6601
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
R6601
R6601
1 2
330R2J-3-GP
330R2J-3-GP
PWR_LED_B
LED-OW-3-GP
3
2
LED1
LED1
1
+5V_ALW
White
83.00326.G70
83.01222.K70
Amber
BATT LED
R6602
1 2
EC6602
EC6602
DY
DY
SC220P50V2KX-3GP
SC220P50V2KX-3GP
R6602
1 2
330R2J-3-GP
330R2J-3-GP
BAT_LED_B
Q6602
Q6602
R1
R1
BATLOW_LED 37
C C
B
R2
R2
PDTC124EU-1-GP
PDTC124EU-1-GP
LED_BAT#
C
E
BREATHE PWR LED (Front)
PDTA144VT-GP
PDTA144VT-GP
R2
R2
B
R1
PWRLED# 37
R1
Q6605
Q6605
84.00144.P11
84.00144.P11
+5V_ALW
E
BREATHE_LED#_R POWER_SW_LED_FRONT
C
R6605 330R2J-3-GP R6605 330R2J-3-GP
1 2
White
3
LED3
LED3
AK
AK
1 2
LED-W-27-GP
LED-W-27-GP
B B
HDD LED
PDTA144VT-GP
PDTA144VT-GP
R2
SATA_ACT# 22
A A
SATA_ACT#
R2
B
R1
R1
Q6604
Q6604
84.00144.P11
84.00144.P11
http://hobi-elektronika.net
5
4
+5V_RUN
E
C
3
R6604
R6604
1 2
330R2J-3-GP
330R2J-3-GP
LED2
LED2
AK
HDD_LED HDD_LED_R
AK
1 2
3
LED-W-27-GP
LED-W-27-GP
White
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
LED
LED
LED
66 90 Thursday, May 27, 2010
66 90 Thursday, May 27, 2010
66 90 Thursday, May 27, 2010
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
67 90 Thursday, May 13, 2010
67 90 Thursday, May 13, 2010
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4
3
2
1
SSID = Touch.Pad SSID = KBC
D D
C C
Internal KeyBoard Connector TouchPad Connector
KB1
KB1
31
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
32
HRS-CON30-1-GP-U
HRS-CON30-1-GP-U
KROW7
KROW6
KROW4
KROW2
KROW5
KROW1
KROW3
KROW0
KCOL5
KCOL4
KCOL7
KCOL6
KCOL8
KCOL3
KCOL1
KCOL2
KCOL0
KCOL12
KCOL16
KCOL15
KCOL13
KCOL14
KCOL9
KCOL11
KCOL10
X01
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
AFTP6831 AFTP6831
AFTP6827 AFTP6827
AFTP6825 AFTP6825
AFTP6824 AFTP6824
AFTP6822 AFTP6822
AFTP6823 AFTP6823
AFTP6820 AFTP6820
AFTP6821 AFTP6821
AFTP6819 AFTP6819
AFTP6817 AFTP6817
AFTP6818 AFTP6818
AFTP6816 AFTP6816
AFTP6814 AFTP6814
AFTP6812 AFTP6812
AFTP6813 AFTP6813
AFTP6815 AFTP6815
AFTP6810 AFTP6810
AFTP6808 AFTP6808
AFTP6809 AFTP6809
AFTP6806 AFTP6806
AFTP6807 AFTP6807
AFTP6804 AFTP6804
AFTP6805 AFTP6805
AFTP6803 AFTP6803
AFTP6801 AFTP6801
AFTP6802 AFTP6802
1
AFTP6829 AFTP6829
KB_DET# 37
KROW[0..7] 37
KCOL[0..16] 37
TPCLK 37
TPDATA 37
SC33P50V2JN-3GP
SC33P50V2JN-3GP
C6803
C6803
+5V_RUN
2 3
1 2
X01
AFTP6826 AFTP6826
AFTP6828 AFTP6828
1
RN6801
RN6801
SRN10KJ-5-GP
SRN10KJ-5-GP
4
AFTP6811 AFTP6811
1 2
C6801
C6801
SC33P50V2JN-3GP
SC33P50V2JN-3GP
AFTP6830 AFTP6830
+5V_RUN
1
X01
1
1
1
1 2
C6802
C6802
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
TP1
TP1
5
1
2
3
4
6
ACES-CON4-10-GP-U
ACES-CON4-10-GP-U
20.K0320.004
20.K0382.004
+5V_RUN
TPCLK
TPDATA
20.K0259.030
20.K0421.030
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Key Board/Touch Pad
Key Board/Touch Pad
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Key Board/Touch Pad
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
68 90 Thursday, May 27, 2010
68 90 Thursday, May 27, 2010
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D D
4
3
+3.3V_ALW
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C6903
C6903
1 2
2
1
+3.3V_ALW
1 2
R6901
R6901
DY
DY
100KR2J-1-GP
100KR2J-1-GP
LID_CLOSE# 37
C C
LID_CLOSE# LID_CLOSE#_1
1 2
C6902
C6902
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
1 2
R6902 10R2J-2-GPR6902 10R2J-2-GP
2
3
S-5711ACDL-M3T1S-GP
S-5711ACDL-M3T1S-GP
HSC1
HSC1
VDD
OUT
VSS
0307
1
74.05711.07B
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Hall Sensor
Hall Sensor
Hall Sensor
1
69 90 Thursday, May 27, 2010
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D D
C C
4
+3.3V_RUN
GF1
GF1
1
LPC_LAD0_R 20
LPC_LAD1_R 20
LPC_LAD2_R 20
LPC_LAD3_R 20
LPC_LFRAME# 20,37
PLTRST#_LAN_WLAN 20,76
PCI_CLK3 20,24
X01
2
3
4
5
6
DY
DY
7
8
9
10
11
12
MLX-CON10-7-GP
MLX-CON10-7-GP
3
2
1
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
70 90 Thursday, May 27, 2010
70 90 Thursday, May 27, 2010
70 90 Thursday, May 27, 2010
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4
3
2
1
SSID = SDIO
D D
+3.3V_RUN_CARD
1 2
DY
DY
C7102
C7102
1 2
C7103
C7103
DY
DY
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
1 2
C7101
C7101
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
C C
B B
SD/XD/MS Card Reader
1 2
1 2
C7104
C7104
C7105
C7105
SCD1U10V2KX-5GP
SCD1U10V2KX-5GP
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
0826
+3.3V_RUN_CARD
XD_D0/SD_CLK/MS_D2 32
XD_D1/SD_D5/MS_D0 32
XD_D2/SD_CMD 32
XD_D3/SD_D4/MS_D4 32
XD_D4/SD_D3/MS_D1 32
XD_D5/SD_D2/MS_D5 32
XD_D6/MS_BS 32
XD_D7 32
XD_RDY/SD_WP/MS_CLK 32
XD_RE#/MS_INS# 32
XD_CE#/SD_D1 32
XD_CLE/SD_D0/MS_D7 32
XD_ALE/SD_D7/MS_D3 32
XD_WE#/SD_CD# 32
XD_WP/SD_D6/MS_D6 32
XD_CD# 32
XD_D0/SD_CLK/MS_D2
XD_D1/SD_D5/MS_D0
XD_D2/SD_CMD XD_WE#/SD_CD#
XD_D3/SD_D4/MS_D4
XD_D4/SD_D3/MS_D1
XD_D5/SD_D2/MS_D5
XD_D6/MS_BS
XD_D7
XD_RDY/SD_WP/MS_CLK
XD_RE#/MS_INS#
XD_CE#/SD_D1
XD_CLE/SD_D0/MS_D7
XD_ALE/SD_D7/MS_D3
XD_WE#/SD_CD#
XD_WP/SD_D6/MS_D6
XD_CD#
CARD1
CARD1
23
SD_VCC
14
MS_VCC
33
XD_VCC
8
XD_D0
9
XD_D1
26
XD_D2
27
XD_D3
28
XD_D4
30
XD_D5
31
XD_D6
32
XD_D7
1
XD_R/B
2
XD_RE
3
XD_CE
4
XD_CLE
5
XD_ALE
6
XD_WE
7
XD_WP
34
XD_CD_SW
NP1
NP1
NP2
NP2
CARDBUS36P-1-GP
CARDBUS36P-1-GP
SD_DAT0
SD_DAT1
SD_DAT2
SD_DAT3
SD_CMD
SD_CLK
SD_CD_SW
SD_WP_SW
MS_DATA0
MS_DATA1
MS_DATA2
MS_DATA3
MS_BS
MS_INS
MS_SCLK
4IN1_GND
4IN1_GND
4IN1_GND
4IN1_GND
XD_CLE/SD_D0/MS_D7
25
XD_CE#/SD_D1
29
XD_D5/SD_D2/MS_D5
10
XD_D4/SD_D3/MS_D1
11
XD_D2/SD_CMD
12
XD_D0/SD_CLK/MS_D2
24
36
XD_RDY/SD_WP/MS_CLK
35
XD_D1/SD_D5/MS_D0
19
XD_D4/SD_D3/MS_D1
20
XD_D0/SD_CLK/MS_D2
18
XD_ALE/SD_D7/MS_D3
16
XD_D6/MS_BS
21
XD_RE#/MS_INS#
17
XD_RDY/SD_WP/MS_CLK
15
13
22
38
37
XD_D2/SD_CMD 32
XD_D0/SD_CLK/MS_D2 32
XD_WE#/SD_CD# 32
XD_RDY/SD_WP/MS_CLK 32
XD_D4/SD_D3/MS_D1 32
XD_RE#/MS_INS# 32
XD_RDY/SD_WP/MS_CLK 32
20.I0109.001
20.I0081.011
XD_CLE/SD_D0/MS_D7
XD_CE#/SD_D1
XD_D5/SD_D2/MS_D5
XD_D4/SD_D3/MS_D1
XD_D2/SD_CMD
XD_D0/SD_CLK/MS_D2
XD_WE#/SD_CD#
A A
5
XD_RDY/SD_WP/MS_CLK
1 2
DY
DY
EC7101
EC7101
For EMI
SC220P50V2KX-3GP
SC220P50V2KX-3GP
DY
DY
1 2
EC7102
EC7102
1 2
DY
DY
DY
DY
EC7103
EC7103
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
4
1 2
DY
DY
EC7104
EC7104
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1 2
DY
DY
EC7105
EC7105
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1 2
DY
DY
EC7106
EC7106
SC220P50V2KX-3GP
SC220P50V2KX-3GP
1 2
1 2
DY
DY
EC7107
EC7107
EC7108
EC7108
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
http://hobi-elektronika.net
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CARD Reader CONN
CARD Reader CONN
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
2
Date: Sheet
CARD Reader CONN
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
71 90 Thursday, May 27, 2010
71 90 Thursday, May 27, 2010
71 90 Thursday, May 27, 2010
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of
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D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
RESERVED
RESERVED
RESERVED
1
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72 90 Thursday, May 13, 2010
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4
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1
SSID = User.Interface
D D
Bluetooth Module conn.
BT1
X01
AFTP7319 AFTP7319
AFTP7311 AFTP7311
C C
USB_PP9 21
USB_PN9 21
BT_ACT 76
BLUETOOTH_EN 37,76
WLAN_ACT 76
AFTP7308 AFTP7308
AFTP7318 AFTP7318
AFTP7316 AFTP7316
BLUETOOTH_DET#
1
WLAN_ACT
BDC_ON
1
BLUETOOTH_EN
BT_LED
1
BLUETOOTH_GPIO3
1
BLUETOOTH_GPIO5
1
X00
1 2
1 2
DY
DY
DY
DY
R7303
R7303
100KR2J-1-GP
100KR2J-1-GP
B B
BT1
15
NP1
2
1
4
3
6
5
8
7
10
9
11
13
HRS-CONN14D-GP-U
HRS-CONN14D-GP-U
12
14
NP2
16
20.F0987.014
USB_PP9
USB_PN9
BT_ACT
BLUETOOTH_EN
WLAN_ACT
1 2
R7304
R7304
EC7302
EC7302
10KR2J-3-GP
10KR2J-3-GP
SC220P50V2KX-3GP
SC220P50V2KX-3GP
BT_ACT
USB_PP9
USB_PN9
X01
1
AFTP7314 AFTP7314
AFTP7309 AFTP7309
AFTP7315 AFTP7315
AFTP7312 AFTP7312
AFTP7310 AFTP7310
AFTP7317 AFTP7317
AFTP7313 AFTP7313
WLAN_ACT
1
BLUETOOTH_EN
1
BT_ACT
1
+3.3V_RUN
1
USB_PP9
1
USB_PN9
1
+3.3V_RUN
12
C7301
C7301
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Bluetooth
Bluetooth
Bluetooth
1
73 90 Thursday, May 27, 2010
73 90 Thursday, May 27, 2010
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C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
74 90 Thursday, May 13, 2010
74 90 Thursday, May 13, 2010
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5
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C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
75 90 Thursday, May 13, 2010
75 90 Thursday, May 13, 2010
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5
4
3
2
1
SSID = PWR.Support
D D
IOBD1
IOBD1
+PWR_SRC
BATT SMBUS
WLAN SMBUS
WLAN CLK
C C
WLAN PCIE
WLAN PCIE
WLAN USB
LAN CLK
LAN PCIE
LAN PCIE
USB Port
B B
BAT_SDA 37
BAT_SCL 37
SB_SMBDATA 18,19,21
SB_SMBCLK 18,19,21
CLK_PCIE_MINI1# 20
CLK_PCIE_MINI1 20
PCIE_RXN0 20
PCIE_RXP0 20
PCIE_TXN0 20
PCIE_TXP0 20
USB_PN4 21
USB_PP4 21
CLK_PCIE_LAN# 20
CLK_PCIE_LAN 20
PCIE_RXN1 20
PCIE_RXP1 20
PCIE_TXN1 20
PCIE_TXP1 20
USB_PN2 21
USB_PP2 21
20.F1563.060
65
64 66
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
63
62
NP1 NP2
ACES-CONN60C-1-GP-U
ACES-CONN60C-1-GP-U
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
61
+PWR_SRC
+3.3V_RUN
+1.5V_RUN
+5V_USB1
+5V_ALW
+KBC_PWR
+3.3V_ALW
E51_RXD 37
E51_TXD 37
BAT_IN# 37
AC_IN# 37
PSID_DISABLE# 37
PSID_EC 37
AD_IA 37
WIFI_RF_EN 37
MINI1_CLK_REQ# 21
PCIE_WAKE# 21
PLTRST#_LAN_WLAN 20,70
PM_LAN_ENABLE 37
KBC_PWRBTN# 37
BT_ACT 73
BLUETOOTH_EN 37,73
WLAN_ACT 73
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
IO Board Connector
IO Board Connector
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
IO Board Connector
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
76 90 Thursday, May 27, 2010
76 90 Thursday, May 27, 2010
76 90 Thursday, May 27, 2010
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of
1
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C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
77 90 Thursday, May 13, 2010
77 90 Thursday, May 13, 2010
77 90 Thursday, May 13, 2010
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
78 90 Thursday, May 13, 2010
78 90 Thursday, May 13, 2010
78 90 Thursday, May 13, 2010
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D D
EC7900
EC7900
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7901
EC7901
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7902
EC7902
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7903
EC7903
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7904
EC7904
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7905
EC7905
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7906
EC7906
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7907
EC7907
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7908
EC7908
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7909
EC7909
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
+PWR_SRC +1.5V_SUS +5V_USB1
EMI Request
5
4
H21
H22
H23
C C
EC7916
X02
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
EC7916
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7917
EC7917
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7918
EC7918
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7919
EC7919
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7920
EC7920
EC7921
EC7921
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7922
EC7922
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7923
EC7923
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7924
EC7924
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7925
EC7925
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
EC7926
EC7926
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
+5V_ALW +3.3V_ALW
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
A A
X02 remove HBT1 stand off
3/25
5
1211
SPR2
SPR ING-51-GPDYSPR2
SPRING-51-GP
DY
1
HOLET315B236R95-GP
HOLET315B236R95-GP
H20
H20
1
4
HMI2
STF217R128H83-GP
HMI2
STF217R128H83-GP
1
1
1
1
1
1
B B
H1
HOLE355X355R111-S1-GPH1HOLE355X355R111-S1-GP
H18
HOLE237R95-GP
H18
HOLE237R95-GP
1
H7
HOLE355X355R111-S1-GPH7HOLE355X355R111-S1-GP
H8
HOLE237R95-GPH8HOLE237R95-GP
1
H2
HT85BE95R29-U-5-GPH2HT85BE95R29-U-5-GP
H6
HT85BE95R29-U-5-GPH6HT85BE95R29-U-5-GP
H3
HTE95BE95R29-R-5-GPH3HTE95BE95R29-R-5-GP
HOLE197R166-GPD YH21
HOLE197R166-GP
DY
1
HOLE197R166-GPD YH22
HOLE197R166-GP
DY
1
HOLE197R166-GPD YH23
HOLE197R166-GP
DY
1
EC7910
EC7910
SCD1U25V2ZY-1GP
H13
HT85BE95R29-U-5-GP
H13
HT85BE95R29-U-5-GP
SPR3
SPR ING-51-GP
SPR3
SPRING-51-GP
1
SPR4
SPR ING-51-GP
SPR4
SPRING-51-GP
1
3
2
1
H4
HT85BE95R29-U-5-GPH4HT85BE95R29-U-5-GP
1
EC7927
EC7927
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
1 2
EC7928
EC7928
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7929
EC7929
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
1 2
EC7930
EC7930
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
1 2
EC7931
EC7931
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7932
EC7932
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
1 2
EC7941
EC7941
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
X01
+PWR_SRC_+VDDC
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
EC7911
EC7911
EC7912
EC7912
EC7913
EC7913
EC7914
EC7914
EC7915
EC7915
EC7933
EC7933
EC7934
EC7934
1 2
1 2
1 2
1 2
1 2
DY
DY
1 2
1 2
1 2
3
+3.3V_RUN
2
EC7935
EC7935
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
Date: Sheet
Date: Sheet
Date: Sheet
1
79 90 Thursday, May 13, 2010
79 90 Thursday, May 13, 2010
79 90 Thursday, May 13, 2010
of
of
of
Title
Size Document Number Rev
Title
Size Document Number Rev
A3
A3
A3
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
A00
A00
A00
Title
Size Document Number Rev
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
http://hobi-elektronika.net
EC7936
EC7936
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7937
EC7937
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
DY
DY
1 2
EC7938
EC7938
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7939
EC7939
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
EC7940
EC7940
SCD1U25V2ZY-1GP
SCD1U25V2ZY-1GP
1 2
SSID = Mechanical
1
Page 80
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
VGA PCIE(1/4)
VGA PCIE(1/4)
VGA PCIE(1/4)
1
A00
A00
A00
of
80 90 Thursday, May 13, 2010
of
80 90 Thursday, May 13, 2010
of
80 90 Thursday, May 13, 2010
Page 81
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
VGA LVDS/TV/CRT(2/4)
VGA LVDS/TV/CRT(2/4)
VGA LVDS/TV/CRT(2/4)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
81 90 Thursday, May 13, 2010
81 90 Thursday, May 13, 2010
81 90 Thursday, May 13, 2010
of
of
1
of
A00
A00
A00
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
VGA POWER/GND(3/4)
VGA POWER/GND(3/4)
VGA POWER/GND(3/4)
Ansenal DJ1 AMD UMA A00
Ansenal DJ1 AMD UMA A00
Ansenal DJ1 AMD UMA A00
Taipei Hsien 221, Taiwan, R.O.C.
of
82 90 Thursday, May 13, 2010
of
82 90 Thursday, May 13, 2010
of
82 90 Thursday, May 13, 2010
1
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5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
VGA MEMORY/STRAPS(4/4)
VGA MEMORY/STRAPS(4/4)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet
Date: Sheet
Date: Sheet
VGA MEMORY/STRAPS(4/4)
A3
A3
A3
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
83 90 Thursday, May 13, 2010
of
83 90 Thursday, May 13, 2010
of
83 90 Thursday, May 13, 2010
1
A00
A00
A00
Page 84
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU-VRAM (1/2)
GPU-VRAM (1/2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
GPU-VRAM (1/2)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
of
84 90 Thursday, May 13, 2010
of
84 90 Thursday, May 13, 2010
of
84 90 Thursday, May 13, 2010
1
A00
A00
A00
Page 85
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
http://hobi-elektronika.net
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
GPU-VRAM (2/2)
GPU-VRAM (2/2)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
GPU-VRAM (2/2)
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
85 90 Thursday, May 13, 2010
85 90 Thursday, May 13, 2010
85 90 Thursday, May 13, 2010
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http://hobi-elektronika.net
5
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
TPS51117_+VCC_GFXCORE
TPS51117_+VCC_GFXCORE
TPS51117_+VCC_GFXCORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
86 90 Thursday, May 13, 2010
86 90 Thursday, May 13, 2010
86 90 Thursday, May 13, 2010
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D D
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(Blanking)
C C
B B
A A
http://hobi-elektronika.net
5
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
APL5930_+1.1V_RUN
APL5930_+1.1V_RUN
APL5930_+1.1V_RUN
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
87 90 Thursday, May 13, 2010
87 90 Thursday, May 13, 2010
87 90 Thursday, May 13, 2010
of
of
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http://hobi-elektronika.net
5
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<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A3
A3
A3
Date: Sheet
Date: Sheet
Date: Sheet
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
88 90 Thursday, May 13, 2010
88 90 Thursday, May 13, 2010
88 90 Thursday, May 13, 2010
1
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Change notes - Page 1
PAGE OWNER DATE VERSON Issue Description Modify List ITEM
1
10 change RN1006 pull-up power plane
D D
2
20 RN2002 replace to 22R NB_REFCLK votlage level too high
3
20
4
37 pop R3729 & depop R3733 MB version ID
from +1.5V_RUN to +1.5V_SUS
R2009 move to PCI_CLK3,
change DF1 clk from PCLK_FWH to PCI_CLK3
avoid leakage in S3 EE
PCLK_FWH in internal CLKGEN only support 14MHz
DF1 clk need 33MHz
EE
EE
EE
5
37
6
46
7
C C
37,10 add Q1005, pop R1039 and R1040
8
42 C4201, C4203 to 100pF
reserve U3703, pop R6207 and depop R6201
pop PR4619 & depop PR4618
CPU PROCHOT connect from EC through a level shift
allow EC to force CPU enter HTC state
when power budge over the limit in DOS mode.
avioding SPI ROM data loss
modify operating mode for+15V_ALW voltage
For power sequence
C2011, C2012 to 18pF 92 0 vendor measure feedback value
EE
EE
EE
EE
EE
10 48 Add PR4812 PU +3.3V_ALW For +1.1V_ALW rising issue EE
18 Change TC1801 to 330uF, 2V tolerance. Implement common part for 1.5V power rail. 11
13 remove R1329,R1330 and add RN1302
12
10 remove RN1007 and change RN1003 to 1K8P
remove R1323,R1324 and add RN1303
Combine resistor
EE
EE
55 arrange CRT conn. AFTP
X01
B B
60 arrange SPKR, MIC, JACK conn. AFTP
13
63 arrange USB conn. AFTP
68 arrange KB, TP conn. AFTP
Sink with DJ1 CP
EE
73 arrange BT conn. AFTP
20 14 R2020 to RN2009 For SIV report LPC_LAD bus rising time fail
EE
37 15 Add C3724, R3757 To set accurate current in EC. EE
16 10 Reserve R1041 for CPU_R_LDT_PWRGD reseve POWOK level for 6265 IC EE
17 47 PR4732 and PR4750 to small size power team request power
18 20 Del D2001 solve PLTRST# signal rising time too slow EE
19 41 Dummy D4103 and exchange IMVP and VDDC_PWRGD signal For SB_PWRGD shotdown drop EE
20 47 Reserve PC4739, PC4740, PC4741,PC4742 Reserve for FB noise EE
21 79 Reserve EC7941 EMI request EMI
A A
5
22 21 Reserve C2105 Reserve for SIO_RCIN# noise EE
23 47 PR4727 from 10ohm to 0 ohm power team request power
24 64 DEL R6302,R6303, add EL6301
DEL R6304,R6305, add EL6302
EMI request
http://hobi-elektronika.net
4
3
2
<Core Des ign>
<Core Des ign>
<Core Des ign>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Change History
Change History
Change History
1
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of
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89 90 Thursday, May 13, 2010
89 90 Thursday, May 13, 2010
89 90 Thursday, May 13, 2010
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Page 90
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Change notes - Page 2
PAGE OWNER DATE VERSON Issue Description Modify List ITEM
4
3
2
1
D D
26 37 R3737 from 0R to 33R for SPI_CLK over and under shoot EE
27 Add glue for choke pad PL4701,PL4703,PL4601,PL4602,PL5001,PL4901 power
28 55 L5502,L5503 bead to 10ohm for SIV CRT G, B report fail EE
25 60 EC6007 and EC6008 from 100p to 0.01uF codec vendor suggestion EE
29 42
C4202,C4204, C4208 to 4.7uF For sequence
EE
1 50 Change PR5010 from 4.2KR to 8.25KR Avoid +1.1V_RUN OCP power
2 69 Change HSC1 from 74.06781.07B(AKE) to
C C
X02
3 20 Exchange Lan & Wlan signal EE For lan loop
74.05711.07B(SEKIO)
Avoid AKE and SEKIO footprint not match EE
4 37 Add one 2N7002 to pull low PSID_EC For RCID function EE
5 37 Change KBC GPI81 from NB_VDDR_EN to KBC_RCID For RCID function
6 79 Remove HBT1 stand off For ME request
EE
ME
7 37 Change PCB version from X01 to X02 EE For version change
8 37 Remove NB_VDD_EN signal EE For GPIO change
16 0
B B
26 0
Change RTC1 from 62.70001.011 to
62.70001.051
Change MICIN1 from 22.10133.K31 to
22.10133.K71
For CE request
For ME request
CE
ME
3 37 Add R3729 to pull high PCB_VER0 For MB VERSION ID change EE
Change EL6301 and EL6302 from 68.02012.201 to
69.10087.011
Add second source EE
A00
46 3
5 49 PR4905 PWR change from +3.3V_ALW to +3.3V_RUN PWR saving EE
6 39 Dummy D3901 paste R3915 For Fan EE
7 short PAD R1329 R2304 R3014 R3017 R3020 R3002
R3003 R3004 R1342
8 short PAD R2303 R3732 R3751 R3757 R3906 R6203 R6205 EE
A A
9 short PAD PR4616 PR4619 PR4620 PR4706 PR4709 PR4712
10
PR4719 PR4729 PR4730 PR4733 PR4734 PR4903 PR4910 PR5016
short PAD R1316 R1317 R1323 R1324 R1325 R2305
R2308 R2306 R3744 R3904 R3910 R5412
http://hobi-elektronika.net
5
4
PSE request
PSE request
PSE request
PSE request EE
3
2
EE
EE
<Core Des ign>
<Core Des ign>
<Core Des ign>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Date: Sheet
Date: Sheet
Date: Sheet
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Ansenal DJ1 AMD UMA
Taipei Hsien 221, Taiwan, R.O.C.
Change History
Change History
Change History
1
of
of
of
90 90 Friday, May 28, 2010
90 90 Friday, May 28, 2010
90 90 Friday, May 28, 2010
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A00