Dell Latitude 300 Schematic

5

D D

4

3

2

1

Latitude3000 Schematic

Haswell-ULT

C C

2013-4-19

REV : X01

B B

A A

DY : None Installed UMA: UMA only installed OPS: DISCRTE OPTIMUS installed

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

Date: Sheet

Cover Page

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

1104

of

1104

of

1104

1

X00

5

Project code: 91.46O01.001 PCB P/N : 13221-SB Revision: X01

D D

VRAM(GDDR5) *8

128M x 16b x 4(1GB) 256M x 16b x 4(2GB)

78,79,80,81

DDR3L

Switchable Graphic only

eDP/CRT Converter

C C

CRT

R G B

55

14.0" LCD (16:9)

52

Touch Panel

MIC_IN/GND

B B

29

Combo Jack

HP_R/L

2CH SPEAKER (2CH 2W/4ohm)

NXP PTN3393

eDP/LVDS Converter

Realtek RTD2136R

Digital MIC

HDA CODEC

Camera

Realtek ALC3223

4

3

Latitude3000 Block Diagram

GPU

Nvidia N14P-GV2

73,74,75,76,77

55

53

52

27

PCIE x 4

eDP

USB2.0 x 1

HDA

Intel CPU

Haswell ULT

15W

Lynx Point

8 USB 2.0/1.1 ports

4 USB 3.0 port s

High Definition A udio

4 SATA ports

8 PCIE ports

LPC I/F

ACPI 4.0a

DDR3L 1333/1600MHz Channel A

DDR3L 1333/1600MHz Channel B

PCIE x 1

USB2.0 x 1

USB3.0 x 2

USB2.0 x 2

USB2.0 x 1

2

Giga LAN

RealTek 8111GUS

Mini-Card

802.11 b/g/n BT V4.0 combo

Left side

USB3.0 Port x 2

Right side

USB2.0 Port x 1

CardReader

RealTek RTS5176E

32

58

34,35

USB Board

DDR3L 1333/1600

SODIMM A

DDR3L 1333/1600

SODIMM B

30

SD/SDHC/MS/MS Pro Slot

12

13

RJ45 Conn.

1

CHARGER

BQ24717

INPUTS

AD+

BT+

SYSTEM DC/DC

TPS51225

INPUTS

DCBATOUT

CPU Core Power

ISL95813

INPUTS

DCBATOUT

DDR3L SUS

TPS51216

INPUTS OUTPUTS

DCBATOUT 1D35V_S3

CPU 1.05V

RT8237

DCBATOUT

31

CPU 1D5V_S0

TLV70215

3D3V_S5

OUTPUTS

DCBATOUT

OUTPUTS

3D3V_AUX_S5 5V_AUX_S5 5V_S5 3D3V_S5

OUTPUTS

VCC_CORE

0D65V_S0

OUTPUTSINPUTS

1D05V_S0

OUTPUTSINPUTS

1D5V_S0

Switches

46,47

33

36 83

44

45

49

48

51

INPUTS OUTPUTS

1D35V_S3 1D35V_S0

5V_S5 5V_S0

3D3V_S5

VCCP_CPU 3D3V_S0

3D3V_S0

0D675V_S0

1D05V_VGA_S0

3D3V_VGA_S0

1D35V_VGA_S0

PCB LAYER

L1:Top L2:GND L3:Signal L4:Signal

33

L5:VCC L6:Signal L7:GND L8:Bottom

29

Thermal

NUVOTON NCT7718W

Fan Control

NUVOTON NCT3940S-A

A A

5

FAN

SMBUS

26

LPC debug port

KBC

NUVOTON

NPCE985P

Int.

62

KB

65

Touch PAD

Image sensor

4

PS2

LPC BUS

24

62

SPI

Flash ROM

8MB Quad Read

SMBUS

SATA(Gen3) x 1

25

3

SATA(Gen1) x 1

HDD

ODD

56

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu Rd., Hsic hih,

21F, 88, Sec.1, H sin Tai Wu Rd., Hsic hih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

C

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Latitude300 Haswell

2104Friday, April 19, 2013

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)

Size Document Number Rev

A3

Date: Sheet of

(Reserved)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

3104Tuesday, March 26, 2013

1

X00

5

4

3

2

1

SSID = CPU

1D05S_VCCST

RN401

XDP_TMS

D D

XDP_TDI

XDP_TDO

XDP_TRST# XDP_TCLK

R402 51R2J-2-GP

R402 51R2J-2-GP R406 51R2J-2-GPR406 51R2J-2-GP

Check TCLK Pull down Res.

1D05S_VCCST

12

SKTOCC#

1

H_CATERR#

1

H_PROCHOT#_R XDP_TRST#

H_CPUPWRGD

1

R405

12

10KR2J-3-GP

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST# DDR_PG_CTRL

H_PECI24

TP401TP401 TP402TP402

TP403TP403

1 2

R403

56R2J-4-GP

R401

62R2J-GP

C C

H_PROCHOT#24,42,44,46

Layout Note:

Impedance control:50 ohm

DDR_PG_CTRL12

D61 K61 N62

K63

C61

AU60 AV60 AU61 AV15 AV61

CPU1B

PROC_DETECT# CATERR# PECI

PROCHOT#

PROCPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST# SM_PG_CNTL1

MISC

THERMAL

PWR

DDR3L

HSW_ULT_DDR3L

JTAG

2 OF 19

PRDY#

PREQ# PROC_TCK PROC_TMS

PROC_TRST#

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

J62 K62 E60 E61 E59 F63 F62

J60 H60 H61 H62 K59 H63 K60 J61

XDP_PRDY# XDP_PREQ# XDP_TCLK XDP_TMS

XDP_TDI XDP_TDO

XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

XDP_PRDY# 96 XDP_PREQ# 96 XDP_TCLK 96 XDP_TMS 96 XDP_TRST# 96 XDP_TDI 96 XDP_TDO 96

XDP_BPM[7:0]

RN401

1 2 3

XDP

4 5

SRN51J-1-GP

XDP

1 2 1 2

8 7 6

XDP_BPM[7:0] 96

B B

R407 200R2F-L-GPR407 200R2F-L-GP

1 2

R408 120R2F-GPR408 120R2F-GP

1 2

R409 100R2F-L1-GP-UR409 100R2F-L1-GP-U

1 2

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

Layout Note:

Design Guideline:

HASWELL-6-GP

SM_DRAMRST#

1D35V_S3

12

R410

R410 470R2J-2-GP

470R2J-2-GP

R404

1 2

0R2J-2-GP

Layout Note:

Place close to DIMM

DDR3_DRAMRST# 12,13

SM_RCOMP keep routing length less than 500 mils.

Wistron Corporation

A A

Title

CPU (THERMAL/MISC/PM)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

CPU (THERMAL/MISC/PM)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

4104Friday, April 19, 2013

1

X00

SSID = CPU

5

4

3

2

1

D D

M_A_DQ[63:0]12

C C

B B

M_A_DQ[63:0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AW58

AW56

AW54

AW52

AH63 AH62 AK63 AK62 AH61 AH60 AK61 AK60 AM63 AM62 AP63 AP62 AM61 AM60 AP61 AP60 AP58 AR58 AM57 AK57 AL58 AK58 AR57 AN57 AP55 AR55 AM54 AK54 AL55 AK55 AR54 AN54 AY58

AY56

AV58 AU58 AV56 AU56 AY54

AY52

AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51

CPU1C

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

HASWELL-6-GP

HSW_ULT _DD R3L

DDR CHANNEL A

3 OF 19

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS#

SA_WE#

SA_CAS#

SA_BA0 SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32

AY34 AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

+V_SM_VREF_CNT

M_A_DIMA_CLK_DDR#0 12 M_A_DIMA_CLK_DDR0 12 M_A_DIMA_CLK_DDR#1 12 M_A_DIMA_CLK_DDR1 12

M_A_DIMA_CKE0 12 M_A_DIMA_CKE1 12

M_A_DIMA_CS#0 12 M_A_DIMA_CS#1 12

TP_M_A_DIMA_ODT0

M_A_RAS# 12

M_A_WE# 12

M_A_CAS# 12

M_A_BS0 12 M_A_BS1 12 M_A_BS2 12

M_A_A[15:0] 12

M_A_DQS#[7:0] 12

M_A_DQS[7:0] 12

+V_SM_VREF_CNT 37 DDR_WR_VREF01 12 DDR_WR_VREF02 13

HSW_ULT _DD R3L

CPU1D

M_B_DQ[63:0]13

TP501TP501

1

M_B_DQ[63:0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AY31

AW31

AY29

AW29

AV31 AU31 AV29 AU29 AY27

AW27

AY25

AW25

AV27 AU27 AV25 AU25

AM29

AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26

AM26

AK25 AL25 AY23

AW23

AY21

AW21

AV23 AU23 AV21 AU21 AY19

AW19

AY17

AW17

AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

HASWELL-6-GP

HSW_ULT _DD R3L

DDR CHANNEL B

4 OF 19

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS#

SB_WE#

SB_CAS#

SB_BA0 SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32

AM35 AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

TP_M_B_DIMB_ODT0

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DIMB_CLK_DDR#0 13 M_B_DIMB_CLK_DDR0 13 M_B_DIMB_CLK_DDR#1 13 M_B_DIMB_CLK_DDR1 13

M_B_DIMB_CKE0 13 M_B_DIMB_CKE1 13

M_B_DIMB_CS#0 13 M_B_DIMB_CS#1 13

1

M_B_RAS# 13

M_B_WE# 13

M_B_CAS# 13

M_B_BS0 13 M_B_BS1 13 M_B_BS2 13

M_B_A[15:0] 13

M_B_DQS#[7:0] 13

M_B_DQS[7:0] 13

TP503TP503

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

Latitude300 Has well

1

5104Friday, April 19, 2013

X00

5

SSID = CPU

4

3

2

1

D D

CFG[19:0]96

C C

CFG[19:0]

1 2

R601

R601 49D9R2F-GP

49D9R2F-GP

1 2

R603

R603 8K2R2F-1-GP

8K2R2F-1-GP

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP

TD_IREF

CFG3

AC60 AC62 AC63 AA63 AA60

Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60

AA62

U63

AA61

U62

V63

H18 B12

J20

CPU1S

A5

E1 D1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP

RSVD#A5

RSVD#E1 RSVD#D1 RSVD#J20 RSVD#H18 TD_IREF

12

DY

R604

R604 1KR2J-1-GP

1KR2J-1-GP

HSW_ULT_DDR3L

RESERVED

PROC_OPI_RCOMP

19 OF 19

RSVD_TP#AV63 RSVD_TP#AU63

RSVD_TP#C63 RSVD_TP#C62

RSVD#B43

RSVD_TP#A51 RSVD_TP#B51

RSVD_TP#L60

RSVD#N60

RSVD#W23

RSVD#Y22

RSVD#AV62

RSVD#D58

VSS VSS

RSVD#P20 RSVD#R20

PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)

0 : ENABLED

CFG[3]

SET DFX ENABLED BIT IN DEBUG INTERFACE MSR

AV63 AU63

C63 C62

EDP_SPARE

B43

A51 B51

L60

N60

W23

PROC_OPI_COMP3

Y22

PROC_OPI_COMP

AY15

AV62 D58

P22 N21

HVM_CLK#

P20

HVM_CLK

R20

TP605TP605

1

1127 add (follow EA40)

R606 49D9R2F-GP

1 2

DY

R602 49D9R2F-GPR602 49D9R2F-GP

1 2

1

TP619TP619

1

TP620TP620

Layout Note:

1.Referenced "continuous" VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3.Trace width: 12~15mil

4.Isolation Spacing: 12mil

5.Max length: 500mil

1 : DISABLED

B B

CFG4

12

R605

R605 1KR2J-1-GP

1KR2J-1-GP

DISPLAY PORT PRESENCE STRAP

0 : ENABLED

CFG[4]

AN EXTERNAL DISPLAY PORT DEVICE IS CONNECTED TO THE EMBEDDED DISPLAY PORT

1 : DISABLED

NO PHYSICAL DISPLAY PORT ATTACHED TO EMBEDDED DISPLAY PORT

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (RESERVED)

Latitude300 Haswell

6104Friday, April 19, 2013

1

X00

5

SSID = CPU

4

3

2

1

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

VCC_CORE

HSW_ULT_DDR3L

CPU1L

D D

12

TP701TP701

R701

43R2J-GP

1 2

H_CPU_SVIDCLK H_CPU_SVIDDAT H_VCCST_PWRGD

DY

VCC_CORE

1D35V_S3

VCC_CORE

TP_VCCIO_OUT

1

+VCCIOA_OUT

H_CPU_SVIDALRT#

PWR_DEBUG

1D05S_VCCST

C702

5

4

12

1127 Change net name of R703.2 from VR_SVID_ALERT# to H_CPU_SVIDALRT#

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Lwngth match<25mil

3D3V_S5

1D05S_VCCST

12

DY

12

R706

R706 10KR2J-3-GP

10KR2J-3-GP

DY

H_VCCST_PWRGD 96

R709

R709 47KR2F-GP

47KR2F-GP

1127_modify (follow EA40)

VCC_SENSE46

VR_SVID_ALERT#46

H_CPU_SVIDCLK46

H_CPU_SVIDDAT46

H_VR_ENABLE46

PWR_DEBUG96

1D05S_VCCST

VCC_CORE

R702

100R2F-L1-GP-U

R710 10KR2J-3-GP

1 2

IMVP _PWR GD_R

R705 150R2J-L1-GP-UR705 150R2J-L1-GP-U

1 2

1D05S_VCCST

R703 75R2F-2-GPR703 75R2F-2-GP

1 2

R704 130R2F-1-GPR704 130R2F-1-GP

1 2

VR_SVID_ALERT#

H_CPU_SVIDDAT

1127 130R change to 110R 1203 110R change to 130R

C C

SCD1U10V2KX-5GP

U701

1

NC#1

VCC

1D05V_VTT_PWRGD36,48

B B

2

A

DY

GND3Y

74LVC1G07GW-GP

73.01G07.0HG

1 2

R707

R707 100KR2F-L1-GP

100KR2F-L1-GP

L59

AH26

AJ31 AJ33

AJ37 AN33 AP43 AR48 AY35 AY40 AY44 AY50

F59 N58

AC58

E63

AB23

A59

E20 AD23 AA23 AE59

L62

N63

L63

B59

F60

C59

D63

H59

P62

P60

P61

N59

N61

T59 AD60 AD59 AA59 AE60 AC59 AG58

U59

V59

AC22 AE22 AE23

AB57 AD57 AG57

C24

C28

C32

J58

CPU1L

RSVD#L59 RSVD#J58

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD#N58 RSVD#AC58

VCC_SENSE RSVD#AB23 VCCIO_OUT VCCIOA_OUT RSVD#AD23 RSVD#AA23 RSVD#AE59

VIDALERT# VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG# VSS RSVD_TP#P60 RSVD_TP#P61 RSVD_TP#N59 RSVD_TP#N61 RSVD#T59 RSVD#AD60 RSVD#AD59 RSVD#AA59 RSVD#AE60 RSVD#AC59 RSVD#AG58 RSVD#U59 RSVD#V59

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

HASWELL-6-GP

HSW_ULT_DDR3L

HSW ULT POW ER

12 OF 19

1205 Add

1 2

R711

0R5J-5-GP

1D05S_VCCST

12

DY

IMVP _PWR GD24,46

12

C701

C703

DY

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

4

1 2

R713

R713 100KR2F-L1-GP

100KR2F-L1-GP

IMVP _PWR GD_R

12

R712

R712 47KR2F-GP

47KR2F-GP

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

2

Date: Sheet of

CPU (VCC CORE)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

7104

1

X00

1D05V_S0

A A

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

CPU1A

HSW_ULT_DDR3L

1 OF 19

PCH_DPB_N055

CRT

PCH_DPB_P055 PCH_DPB_N155 PCH_DPB_P155

C C

C54 C55 B58 C58 B55 A55 A57 B57

C51 C50 C53 B54 C49 B50 A53 B53

HASWELL-6-GP

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

EDPDDI

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

EDP_COMP EDP_BRIGHTNESS

EDP_TX0_DN 53 EDP_TX0_DP 53 EDP_TX1_DN 53 EDP_TX1_DP 53

EDP_AUX_DN 53 EDP_AUX_DP 53

1

TP801TP801

R801

24D9R2F-L-GP

+VCCIOA_OUT

Design Guideline: EDP_COMP keep routing length max 100 mils.

12

Trace Width:20 mils.

B B

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDI/EDP)

Latitude300 Haswell

8104Friday, April 19, 2013

X00

5

4

3

2

1

SSID = CPU

HSW_ULT_DDR3L

CPU1P

D33

VSS

D34

D D

C C

B B

VSS

D35

VSS

D37

VSS

D38

VSS

D39

VSS

D41

VSS

D42

VSS

D43

VSS

D45

VSS

D46

VSS

D47

VSS

D49

VSS

D5

VSS

D50

VSS

D51

VSS

D53

VSS

D54

VSS

D55

VSS

D57

VSS

D59

VSS

D62

VSS

D8

VSS

E11

VSS

E17

VSS

F20

VSS

F26

VSS

F30

VSS

F34

VSS

F38

VSS

F42

VSS

F46

VSS

F50

VSS

F54

VSS

F58

VSS

F61

VSS

G18

VSS

G22

VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS

H13

VSS

HASWELL-6-GP

HSW_ULT_DDR3L

16 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS_SENSE

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SENSE

12

VSS_SENSE 46

Layout Note:

R901

100R2F-L1-GP-U

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Lwngth match<25mil

Wistron Corporation

A A

Title

CPU (VSS)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

CPU (VSS)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

9104Friday, April 19, 2013

1

X00

SSID = CPU

5

4

3

2

1

1D35V_S3

D D

12

C1001

C1002

SC10U6D3V3KX-GP

12

C C

C1018

C1017

SC2D2U6D3V2MX-GP

DY

SC2D2U6D3V2MX-GP

X01 DY C1004 C1005 C1006 0409

12

C1003

DY

SC10U6D3V3KX-GP

12

C1019

DY

SC2D2U6D3V2MX-GP

12

C1004

DY

SC10U6D3V3KX-GP

C1020

SC2D2U6D3V2MX-GP

C1006

C1005

DY

SC10U6D3V3KX-GP

Layout Note:

Direct tie to CPU VccIn/Vss balls

Layout Note:

As close to CPU as possible

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

10 104Wednesday, April 10, 2013

X00

5

4

3

2

1

X01 Change L1101 from 2.2uH to 0R and DY C1104 0410

X01 Change L1102 from 2.2uH to 0R and DY C1106 0410

MAX: 1.92A

1.838A 41mA 42mA

D D

R1101

1 2

0R5J-5-GP

CAP need close to pin K9 L10

+V1.05DX_MODPHY_PCH1D05V_HSIO

C1102

SC1U6D3V2KX-GP

C1102

SC1U6D3V2KX-GP

C1101

SC1U6D3V2KX-GP

C1101

12

SC1U6D3V2KX-GP

12

1D05V_HSIO

L1101

0R2J-2-GP

12

C1103

12

+V1.05S_AUSB3PLL

SC1U6D3V2KX-GP

C1104

12

DY

+V1.05S_AUSB3PLL

SC10U6D3V3KX-GPDYC1104

SC10U6D3V3KX-GP

C1123

SC10U6D3V3KX-GPDYC1123

SC10U6D3V3KX-GP

12

DY

CAP need close to pin B18

1D05V_HSIO

L1102 0R2J-2-GPL1102 0R2J-2-GP

12

C1105

SC1U6D3V2KX-GP

C1105

SC1U6D3V2KX-GP

12

CAP need close to pin B11

+V1.05S_ASATA3PLL

C1106

SC10U6D3V3KX-GPDYC1106

SC10U6D3V3KX-GP

12

DY

12

DY

C1107

SC10U6D3V3KX-GPDYC1107

SC10U6D3V3KX-GP

57mA 62mA 200mA

12

DY

+V1.05S_APLLOPI

C1110

SC10U6D3V3KX-GPDYC1110

SC10U6D3V3KX-GP

DY

1205 Add

R1103

0R3J-0-U-GP

C1124

SC10U6D3V3KX-GPDYC1124

SC10U6D3V3KX-GP

12

1 2

CAP need close to pin AC9

+V3.3A_PSUS3D3V_S5_PCH

12

C1108

C1108 SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

DY

L1103 IND-2D2UH-196-GP

1 2

68.2R21D.10R

C1111

SC1U6D3V2KX-GP

C1111

SC1U6D3V2KX-GP

12

DY

CAP need close to pin J18

12

+V1.05S_AXCK_DCB1D05V_S0

+V1.05S_AXCK_DCB

C1112

C1125

SC10U6D3V3KX-GPDYC1112

SC10U6D3V3KX-GP

12

DY

SC10U6D3V3KX-GPDYC1125

SC10U6D3V3KX-GP

X01 DY C1110 C1108 C1119 0410

1D05V_S0

C C

R1102

0R3J-0-U-GP

1 2

+V1.05S_APLLOPI

C1109

SC1U6D3V2KX-GP

C1109

SC1U6D3V2KX-GP

12

CAP need close to pin AA21

31mA 658mA 1.632A 1mA

1D05V_S0

IND-2 D2UH -196-G P

IND-2 D2UH -196-G P L1104

L1104

1 2

68.2R21D.10R

B B

+V1.05S_AXCK_LCPLL

C1113

SC1U6D3V2KX-GP

C1113

SC1U6D3V2KX-GP

C1114

12

DY

1D05V_S0

SC10U6D3V3KX-GPDYC1114

SC10U6D3V3KX-GP

R1104

0R3J-0-U-GP

1 2

C1116

SC1U6D3V2KX-GP

C1116

C1115

SC1U6D3V2KX-GP

SC10U6D3V3KX-GPDYC1115

SC10U6D3V3KX-GP

12

DY

1D05V_S0

12

R1105

0R5J-5-GP

1 2

SC1U6D3V2KX-GP

C1117

C1118

SC1U6D3V2KX-GP

C1118

SC1U6D3V2KX-GP

12

+V1.05S_CORE_PCH+1.05M_ASW

C1119

SC10U6D3V3KX-GPDYC1119

SC10U6D3V3KX-GP

12

DY

RTC_AUX_S5

C1121

SCD1U10V2KX-5GP

C1121

SCD1U10V2KX-5GP12C1122

SC1U6D3V2KX-GP

C1122

C1120

SCD1U10V2KX-5GPDYC1120

SCD1U10V2KX-5GP

12

SC1U6D3V2KX-GP

CAP need close to pin A20

A A

5

CAP need close to pin AE9

4

CAP need close to pin AE8 J11

3

CAP need close to pin AG10

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Latitude300 Haswell

1

X00

11 104Wednesday, April 10, 2013

X00

5

4

3

2

1

SSID = MEMORY

DM1

M_A_A[15:0]5

D D

M_A_BS25

M_A_BS05 M_A_BS15

M_A_DQ[63:0]5

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

12

C1202

12

C1206

C1216

SC1U6D3V2KX-GP

Layout Note:

Place these caps close to VREF_CA

SCD1U10V2KX-5GP

Layout Note:

Place these caps close to VREF_DQ

SCD1U10V2KX-5GP

Layout Note:

Place these caps close to VTT1 and VTT2.

M_A_DQS#[7:0]5

M_A_DQS[7:0]5

M_VREF_CA_DIMMA M_VREF_DQ_DIMMA

DDR3_DRAMRST#4,13

SCD1U10V2KX-5GPDYC1217

SCD1U10V2KX-5GP

M_VREF_CA_DIMMA

12

C1218

C1201

SCD1U10V2KX-5GP

C C

0D675V_S0

B B

Layout Note:

All VREF traces should have width=20mil; spacing=20 mil

M_VREF_DQ_DIMMA

12

DY

C1204

C1205

SCD1U10V2KX-5GP

12

C1215

C1214

DY

SC1U6D3V2KX-GP

M_A_DIMA_ODT0 M_A_DIMA_ODT1

C1217

12

DY

0D675V_S0

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ13 M_A_DQ8 M_A_DQ14 M_A_DQ10 M_A_DQ9 M_A_DQ12 M_A_DQ15 M_A_DQ11 M_A_DQ29 M_A_DQ28 M_A_DQ30 M_A_DQ31 M_A_DQ25 M_A_DQ24 M_A_DQ27 M_A_DQ26 M_A_DQ44 M_A_DQ41 M_A_DQ43 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ42 M_A_DQ46 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ7 M_A_DQ21 M_A_DQ20 M_A_DQ17 M_A_DQ16 M_A_DQ18 M_A_DQ19 M_A_DQ22 M_A_DQ23 M_A_DQ36 M_A_DQ33 M_A_DQ34 M_A_DQ38 M_A_DQ37 M_A_DQ32 M_A_DQ35 M_A_DQ39 M_A_DQ62 M_A_DQ58 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ59 M_A_DQ56 M_A_DQ57

M_A_DQS#1 M_A_DQS#3 M_A_DQS#5 M_A_DQS#6 M_A_DQS#0 M_A_DQS#2 M_A_DQS#4 M_A_DQS#7

M_A_DQS1 M_A_DQS3 M_A_DQS5 M_A_DQS6 M_A_DQS0 M_A_DQS2 M_A_DQS4 M_A_DQS7

close to dimm

A A

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35 22 24 34 36 39 41 51 53 40 42 50 52 57 59 67 69 56 58 68

70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10

27

45

62 135 152 169 186

12

29

47

64 137 154 171 188

116 120

126

1

30

203 204

EVENT# DQ11 DQ12

VDDSPD DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19

NC#/TEST DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA VREF_DQ

RESET#

VTT1 VTT2

DDR3-204P-119-GP-U

1st = 62.10024.R31

2nd = 62.10017.P61

3rd = 62.10017.N41

4th = 62.10017.P41

X01 0409

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

NC#1 NC#2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

SA0_DIMA

197

SA0

SA1_DIMA

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D35V_S3

M_A_RAS# 5 M_A_WE# 5 M_A_CAS# 5

M_A_DIMA_CS#0 5 M_A_DIMA_CS#1 5

M_A_DIMA_CKE0 5 M_A_DIMA_CKE1 5

M_A_DIMA_CLK_DDR0 5 M_A_DIMA_CLK_DDR#0 5

M_A_DIMA_CLK_DDR1 5 M_A_DIMA_CLK_DDR#1 5

PCH_SMBDATA 13,18,62,96 PCH_SMBCLK 13,18,62,96

C1203

SCD1U10V2KX-5GP

3D3V_S0

12

DY

1D35V_S3

Layout Note:

Place these Caps near SO-DIMMA.

DDR_PG_CTRL4

1 2

Q1201 Need check Vth=1V

X01 DY C1208 0410

12

DY

TC1201

DY

ST330U2VDM-4-GP

12

C1210

DY

SCD1U10V2KX-5GP

0R2J-2-GP

0R2J-2-GP R1205

R1205

DDR_PG_CTRL_R

C1211

SA0_DIMA SA1_DIMA

DY

C1207

SC10U6D3V5KX-1GP

SCD1U10V2KX-5GP

12

C1208

SC10U6D3V5KX-1GP

12

C1212

SC1U6D3V2KX-GP

12

R1202

R1201

0R2J-2-GP

12

C1220

C1209

SCD1U10V2KX-5GP

SC10U6D3V5KX-1GP

12

C1213

SC1U6D3V2KX-GP

1D35V_S3

G

DS

Q1201

Q1201 DMN5L06K-7-GP

DMN5L06K-7-GP

84.05067.031

2nd = 84.00301.A31

3rd = 84.2N702.W31

X01 0408

12

Note: SA0 DIM0 = 0 , SA1_DIM0 = 0 SO-DIMM A SPD Address is 0xA0 SO-DIMM A TS Address is 0x30

12

C1222

C1221

SCD1U10V2KX-5GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

5V_S5

X01 0408

12

R1208

R1208 200KR2F-L-GP

200KR2F-L-GP

DDR_VTT_PG_CTRL

12

R1204

R1204 2MR2-GP

2MR2-GP

DY

Layout Note:

Place Close SO-DIMMA.

DDR_WR_VREF015

1D35V_S3

D

Q1202

Q1202 2N7002K-2-GP

2N7002K-2-GP

S

G

M_A_B_DIMM_ODT

DDR_VTT_PG_CTRL 49

R1217

0R2J-2-GP

DY

2R2F-GP

2R2F-GP R1210

R1210

1 2

12

C1219

C1219 SCD022U16V2JX-GP

SCD022U16V2JX-GP

+V_VREF_PATH1

12

R1212

R1212 24D9R2F-L-GP

24D9R2F-L-GP

R1206 66D5R2F-GPR1206 66D5R2F-GP

R1207 66D5R2F-GPR1207 66D5R2F-GP

R1203 66D5R2F-GPR1203 66D5R2F-GP

R1209 66D5R2F-GPR1209 66D5R2F-GP

12

1D35V_S3DDR_VREF_S3

12

1 2

R1211

R1211 1K8R2F-GP

1K8R2F-GP

R1213

R1213 1K8R2F-GP

1K8R2F-GP

M_VREF_DQ_DIMMA

M_A_DIMA_ODT0

M_A_DIMA_ODT1

M_B_DIMB_ODT0 13

M_B_DIMB_ODT1 13

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, April 19, 2013

Friday, April 19, 2013 Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM1

Latitude300 Has well

1

12 104

X00

5

4

3

2

1

SSID = MEMORY

DM2

D D

M_VREF_CA_DIMMB

Layout Note:

EC1302

C1304

SC1U6D3V2KX-GP

5

SCD1U10V2KX-5GP

12

C1302

SCD1U10V2KX-5GP

12

C1306

SCD1U10V2KX-5GP

12

C1318

SC1U6D3V2KX-GP

Place these caps close to VREF_CA

12

C1301

SCD1U10V2KX-5GP

C C

M_VREF_DQ_DIMMB

12

DY

C1305

SC2D2U10V3KX-1GP

0D675V_S0

12

C1316

C1317

DY

B B

A A

C1317

SC1U6D3V2KX-GP

Layout Note:

All VREF traces should have width=20mil; spacing=20 mil

M_B_A[15:0]5

M_B_BS25

M_B_BS05 M_B_BS15

M_B_DQ[63:0]5

Layout Note:

Place these caps close to VREF_DQ

Layout Note:

Place these caps close to VTT1 and VTT2.

M_B_DQS#[7:0]5

M_B_DQS[7:0]5

M_B_DIMB_ODT012 M_B_DIMB_ODT112

M_VREF_CA_DIMMB M_VREF_DQ_DIMMB

DDR3_DRAMRST#4,12

close to dimm

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ8 M_B_DQ14 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ9 M_B_DQ13 M_B_DQ15 M_B_DQ28 M_B_DQ29 M_B_DQ26 M_B_DQ27 M_B_DQ25 M_B_DQ24 M_B_DQ30 M_B_DQ31 M_B_DQ40 M_B_DQ41 M_B_DQ46 M_B_DQ42 M_B_DQ45 M_B_DQ44 M_B_DQ47 M_B_DQ43 M_B_DQ56 M_B_DQ57 M_B_DQ59 M_B_DQ58 M_B_DQ61 M_B_DQ60 M_B_DQ63 M_B_DQ62 M_B_DQ4 M_B_DQ1 M_B_DQ3 M_B_DQ7 M_B_DQ5 M_B_DQ0 M_B_DQ2 M_B_DQ6 M_B_DQ32 M_B_DQ37 M_B_DQ38 M_B_DQ34 M_B_DQ33 M_B_DQ36 M_B_DQ39 M_B_DQ35 M_B_DQ17 M_B_DQ16 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ23 M_B_DQ22 M_B_DQ52 M_B_DQ49 M_B_DQ48 M_B_DQ53 M_B_DQ51 M_B_DQ55 M_B_DQ54 M_B_DQ50

M_B_DQS#1 M_B_DQS#3 M_B_DQS#5 M_B_DQS#7 M_B_DQS#0 M_B_DQS#4 M_B_DQS#2 M_B_DQS#6

M_B_DQS1 M_B_DQS3 M_B_DQS5 M_B_DQS7 M_B_DQS0 M_B_DQS4 M_B_DQS2 M_B_DQS6

C1319

SCD1U10V2KX-5GPDYC1319

SCD1U10V2KX-5GP

0D675V_S0

12

DY

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40 42 50 52 57 59 67 69 56 58 68

70 129 131 141 143 130 132 140 142 147 149 157 159 146 148 158 160 163 165 175 177 164 166 174 176 181 183 191 193 180 182 192 194

10

27

45

62 135 152 169 186

12

29

47

64 137 154 171 188

116 120

126

30

203 204

NC#/TEST DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31 DQ32 DQ33 DQ34 DQ35 DQ36 DQ37 DQ38 DQ39 DQ40 DQ41 DQ42 DQ43 DQ44 DQ45 DQ46 DQ47 DQ48 DQ49 DQ50 DQ51 DQ52 DQ53 DQ54 DQ55 DQ56 DQ57 DQ58 DQ59 DQ60 DQ61 DQ62 DQ63

DQS0# DQS1# DQS2# DQS3# DQS4# DQS5# DQS6# DQS7#

DQS0 DQS1 DQS2 DQS3 DQS4 DQS5 DQS6 DQS7

ODT0 ODT1

VREF_CA

1

VREF_DQ

RESET#

VTT1 VTT2

DDR3-204P-90-GP

1st = 62.10017.0A1

2nd = 62.10017.K11

3rd = 62.10017.P31

4th = 62.10017.N91

X01 0409

4

RAS#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

EVENT#

VDDSPD

NC#1 NC#2

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

SA0_DIMB

197

SA0

SA1_DIMB

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D35V_S3

M_B_RAS# 5 M_B_WE# 5 M_B_CAS# 5

M_B_DIMB_CS#0 5 M_B_DIMB_CS#1 5

M_B_DIMB_CKE0 5 M_B_DIMB_CKE1 5

M_B_DIMB_CLK_DDR0 5 M_B_DIMB_CLK_DDR#0 5

M_B_DIMB_CLK_DDR1 5 M_B_DIMB_CLK_DDR#1 5

PCH_SMBDATA 12,18,62,96 PCH_SMBCLK 12,18,62,96

C1303

SCD1U10V2KX-5GP

1D35V_S3

Note: SO-DIMM B SPD Address is 0xA4 SO-DIMM B TS Address is 0x34

3D3V_S0

12

DY

12

DY

12

DY

Layout Note:

Place these Caps near SO-DIMMA.

3

12

C1307

C1308

DY

SC10U10V5KX-2GP

12

C1314

C1313

SCD1U10V2KX-5GP

3D3V_S0

SA1_DIMB

SA0_DIMB

X01 DY C1311 0410

12

C1309

DY

SC10U6D3V5KX-1GP

12

C1315

SCD1U10V2KX-5GP

12

C1311

DY

C1310

SC10U6D3V5KX-1GP

EC1301

SCD1U10V2KX-5GP

12

C1312

SC10U6D3V5KX-1GP

R1301

R1301 10KR2J-3-GP

10KR2J-3-GP

R1302

0R2J-2-GP

Layout Note:

Place Close SO-DIMMA.

DDR_WR_VREF025

2

0R2J-2-GP

2R2F-GP

2R2F-GP R1305

R1305

1 2

12

C1321

C1321 SCD022U16V2JX-GP

SCD022U16V2JX-GP

+V_VREF_PATH2

12

R1310

R1310 24D9R2F-L-GP

24D9R2F-L-GP

DDR_VREF_S3 1D35V_S3

12

R1312

12

DY

12

R1306

R1306 1K8R2F-GP

1K8R2F-GP

R1303

R1303 1K8R2F-GP

1K8R2F-GP

M_VREF_DQ_DIMMB

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, April 19, 2013

Friday, April 19, 2013 Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

DDR3-SODIMM2

Latitude300 Has well

1

13 104

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

M3

Latitude300 Haswell

14 104Tuesday, March 26, 2013

1

X00

SSID = CPU

5

4

3

2

1

D D

HSW_ULT_DDR3L

eDP SIDEBAND

PCIE

HSW_ULT_DDR3L

DISPLAY

CPU1I

eDP_BKL T_CTRL53

RN1503

1 2 3

OPS

SRN10KJ-5-GP

C C

3D3V_S0

B B

R1509

SRN10KJ-5-GP

1 2

DY

RN1505

1 2 3 4 5

SRN10KJ-6-GP

DGPU_HOLD_RST#

4

DGPU_PWR_EN

DGPU_PWROK

10KR2J-3-GP

8 7 6

PIRQC# PIRQD#

PIRQB#

PIRQA#20

DGPU_PWR_EN82,83 DGPU_HOLD_RST#73 DGPU_PWROK82,83

SC1KP25V2JX-GP

CLK_PCIE_WLAN_REQ3# 18,58

TP1501TP1501

EC1501

TP1503TP1503 TP1502TP1502

eDP_BKL EN

1

eDP_VDD EN

1

PIRQB# PIRQC# PIRQD# PCI_PME#

1

12

B8 A9 C6

U6 P4 N4 N2

AD4

U7 L1 L3 R5 L4

EC1502

EC1502 SC1KP25V2JX-GP

SC1KP25V2JX-GP

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

PIRQA#/GPIO77 PIRQB#/GPIO78 PIRQC#/GPIO79 PIRQD#/GPIO80 PME#

GPIO55 GPIO52 GPIO54 GPIO51 GPIO53

HASWELL-6-GP

9 OF 19

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

DDPB_AUXN

DDPB_AUXP

1

TP1506TP1506

1

TP1508TP1508

PCH_DPB_AUXN 55

PCH_DPB_AUXP 55

3D3V_S0

1

23

4

RN1509

RN1509 SRN2K2J-1-GP

SRN2K2J-1-GP

CRT_PCH_HPD 55

EDP_HPD 53

PCH_CRT_CLK 55 PCH_CRT_DATA 55

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

PCH ( EDP/GPIO/DDI )

Latitude300 Haswell

15 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = PCH

PCIE Table

Port

1

D D

2

3

4

5(4lane)

6(4lane)

C C

B B

Device

TBD

WLAN

LAN

GPU

TBD

Share BUS

USB3.0_3

USB3.0_4

SATA0~3

CPU_RXN_C_dGPU_TXN073 CPU_RXP_C_dGPU_TXP073

dGPU_RXN_C_CPU_TXN073 dGPU_RXP_C_CPU_TXP073

CPU_RXN_C_dGPU_TXN173 CPU_RXP_C_dGPU_TXP173

dGPU_RXN_C_CPU_TXN173 dGPU_RXP_C_CPU_TXP173

CPU_RXN_C_dGPU_TXN273 CPU_RXP_C_dGPU_TXP273

dGPU_RXN_C_CPU_TXN273 dGPU_RXP_C_CPU_TXP273

CPU_RXN_C_dGPU_TXN373 CPU_RXP_C_dGPU_TXP373

dGPU_RXN_C_CPU_TXN373 dGPU_RXP_C_CPU_TXP373

PCIE_PRX_WLANTX_N358 PCIE_PRX_WLANTX_P358

PCIE_PTX_WLANRX_N3_C58 PCIE_PTX_WLANRX_P3_C58

PCIE_PRX_LANTX_N430 PCIE_PRX_LANTX_P430

PCIE_PTX_LANRX_N4_C30 PCIE_PTX_LANRX_P4_C30

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP C1606

C1606

1 2 1 2

C1605

C1605 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

OPS

OPS OPS

OPS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP C1608

C1608

1 2 1 2

C1607

C1607 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

OPS

OPS OPS

OPS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP C1610

C1610

1 2 1 2

C1609

C1609 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

OPS

OPS OPS

OPS

SCD1U10V2KX-5GP

SCD1U10V2KX-5GP C1612

C1612

1 2 1 2

C1611

C1611 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

OPS

OPS OPS

OPS

SCD1U10V2KX-5GP

C1601

1 2 1 2

C1602

C1602 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C1603

1 2 1 2

C1604

C1604 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+V1.05S_AUSB3PLL

Layout Note:

1. PCIE_RCOMP/ PCIE_IREF trace width=12~15mil

2. Isolation Spacing: 12mil

3. Total trace length<500mil

R1601

3KR2F-GP

1 2

dGPU_RXN_CPU_TXN0 dGPU_RXN_CPU_TXP0

dGPU_RXN_CPU_TXN1 dGPU_RXN_CPU_TXP1

dGPU_RXN_CPU_TXN2 dGPU_RXN_CPU_TXP2

dGPU_RXN_CPU_TXN3 dGPU_RXN_CPU_TXP3

PCIE_PTX_WLANRX_N3 PCIE_PTX_WLANRX_P3

PCIE_PTX_LANRX_N4 PCIE_PTX_LANRX_P4

PCIE_RCOMP

E10

C23 C22

B23 A23

H10 G10

B21 C21

B22 A21

G11

C29 B30

G13

B29 A29

G17

C30 C31

G15

B31 A31

E15 E13 A27 B27

CPU1K

F10

PERN5_L0 PERP5_L0

PETN5_L0 PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

PETN5_L1 PETP5_L1

PERN5_L2 PERP5_L2

PETN5_L2 PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

PETN5_L3 PETP5_L3

PERN3

F11

PERP3

PETN3 PETP3

F13

PERN4 PERP4

PETN4 PETP4

PERN1/USB3RN3

F17

PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

F15

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

RSVD#E15 RSVD#E13 PCIE_RCOMP PCIE_IREF

WLAN

LAN

HASWELL-6-GP

GPU

PCIE USB

HSW_ULT_DDR3L

11 OF 19

USB2N0 USB2P0

USB2N1 USB2P1

USB2N2 USB2P2

USB2N3 USB2P3

USB2N4 USB2P4

USB2N5 USB2P5

USB2N6 USB2P6

USB2N7 USB2P7

USB3RN1 USB3RP1

USB3TN1

USB3TP1

USB3RN2 USB3RP2

USB3TN2

USB3TP2

USBRBIAS#

USBRBIAS RSVD#AN10 RSVD#AM10

OC0/GPIO40# OC1/GPIO41# OC2/GPIO42# OC3/GPIO43#

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USB_PN3 USB_PP3

USB_COMP

USB_OC#0_1 USB_OC#2_3 USB_OC#4_5 USB_OC#6_7

PM_SUSWARN#_R17

USB_PN0 34 USB_PP0 34

USB_PN1 34 USB_PP1 34

USB_PN2 63 USB_PP2 63

USB_PN4 52 USB_PP4 52

USB_PN5 58 USB_PP5 58

USB_PN6 52 USB_PP6 52

USB_PN7 32 USB_PP7 32

R1602

R1602 22D6R2F-L1-GP

22D6R2F-L1-GP

MCP_GPIO7318

1 1

1 2

TP1601TP1601 TP1602TP1602

USB3_PRX_CTX_N0 34 USB3_PRX_CTX_P0 34

USB3_PTX_CRX_N0 34 USB3_PTX_CRX_P0 34

USB3_PRX_CTX_N1 34 USB3_PRX_CTX_P1 34

USB3_PTX_CRX_N1 34 USB3_PTX_CRX_P1 34

USB_OC#0_1 18,35 USB_OC#2_3 35

USB_OC#4_5 20

USB_OC#2_3 USB_OC#6_7

USB 2.0 Table

Pair

Device

USB3.0 port1

0

USB3.0 Port2

1

USB2.0 Port3

2

TBD

3

CAMERA

4

WLAN

5

Touch Panel

6

Card Reader

7

Layout Note:

1. USB_COMP using 50 ohm single-ended impedance

2. Isolation Spacing :15mil

3. Total trace length<500mil

RN1601

8 7 6

SRN10KJ-6-GP

3D3V_S5_PCH

1 2 3 45

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

PCH (PCIE/USB)

Latitude300 Haswell

16 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = PCH

RN1703

1

D D

R1717 10KR2J-3-GP

2 3

SRN10KJ-5-GP

12

DY

4

X01 2/26 Add PH 10K on XDP_DBRESET#

XDP_DBRESET#96

SYS_PWROK24,96 PCH_PWROK24,26,36

C C

PM_SUSWARN#_R16

PM_PWRBTN#24,96 AC_PRESENT24,76

BATLOW#20

3D3V_S5

RN1701

1

4

2 3

SRN10KJ-5-GP

B B

A A

SRN10KJ-5-GP

R1703 10KR2J-3-GPR1703 10KR2J-3-GP

1 2

3D3V_S5_PCH

1 2

DY

R1724 10KR2J-3-GP

12

EC1706

SC1KP25V2JX-GP

EC1702

SC1KP25V2JX-GP

12

5

EC1703

SC1KP25V2JX-GP

R1706 0R2J-2-GPR1706 0R2J-2-GP

MCP_GPIO12 AC_PRESENT

X01 2/26 modify PCH_WAKE# PU to 1K

PCH_WAKE#

PM_SUS_STAT#

12

EC1705

EC1704

SC1KP25V2JX-GP

3D3V_S0

12

1 2

PLT_RST#24,30,55,58,65,73,96

100KR2J-1-GP

MCP_GPIO12 20

XDP_DBRESET#

12

PM_RSMRST# PM_PCH_PWROK

SYS_PWROK

R1701

R1701 10KR2J-3-GP

10KR2J-3-GP

R1715

SYS_PWROK PLT_RST# PCH_PWROK KBC_DPWROK

1 2

TP1706TP1706 TP1705TP1705

12

DY

R1707

R1707 0R2J-2-GP

0R2J-2-GP

1 1

R1713

0R2J-2-GP

1 2

12

C1701

C1701 SC220P50V2KX-3GP

SC220P50V2KX-3GP

DY

EMI 12/20

PCH strap pin:

On Die DSW VR Enable

DSWODVREN

HSW_ULT_DDR3L

CPU1H

PM_SUSACK#_R XDP_DBRESET# PCH_DPWROK PM_RSMRST# SYS_PWROK

PM_PCH_PWROK

MPWROK PCI_PLTRST#

PM_RSMRST#

PM_SUSWARN#_R

PM_PWRBTN# AC_PRESENT BATLOW# PCH_SLP_S0# PCH_SLP_WLAN#

PCI_PLTRST#

AK2

SUSACK#

AC3

SYS_RESET#

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST#

AW6

RSMRST#

AV4

SUSWARN#/SUSPWRDNACK#/ GPIO30

AL7

PWRBTN#

AJ8

ACPRESENT/GPIO31

AN4

BATLOW#/GPI O72

AF3

SLP_S0#

AM5

SLP_WLAN#/GPI O29

HASWELL-6-GP

PM_SUSACK#24

PM_SUSWARN#24

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

RN1702

2 3

DS3

1

4

SRN0J-6-GP

3D3V_AUX_S5

R1726

R1726 10KR2J-3-GP

10KR2J-3-GP

1 2

3V_5V_POK#

SUS_STAT#/GPIO61

PM_SUSACK#_R PM_SUSWARN#_R

R1727

100KR2J-1-GP

1 2

Non DS3

Q1701

5

6

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

8 OF 19

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4# SLP_S3#

SLP_A# SLP_SUS# SLP_LAN#

34

2

1

AW7 AV5 AJ5

V5 AG4 AE6 AP5

AJ6 AT4 AL5 AP4 AJ7

PCH_DPWROK

PM_RSMRST#

3V_5V_POK_C

Low = Disable High = Enable (default)

*

DSWODVREN

PCH_WAKE#

PM_CLKRUN# PM_SUS_STAT# SUS_CLK PM_SLP_S5#

PM_SLP_S4# PM_SLP_S3# PM_SLP_A# PM_SLP_SUS# PM_SLP_LAN#

R1729

R1729 0R2J-2-GP

0R2J-2-GP

1

R1718 0R2J-2-GP

1 2

DS3

1KR2J-1-GP

1KR2J-1-GP R1702

R1702

1 2

R1728

1 2

NON DS3

0R2J-2-GP

1 2

DS3

NON DS3

0R2J-2-GP

0R2J-2-GP R1704

R1704

1 2 1 2

DY

R1705

X01 2/26 DY R1705 for OBFF disable

0R2J-2-GP

R1709 0R2J-2-GPR1709 0R2J-2-GP

1 2

TP1702TP1702

1 2

R1710

TP1703TP1703

0R2J-2-GP

TP1704TP1704

TP1707TP1707

R1725

R1725 100KR2F-L1-GP

100KR2F-L1-GP

DS3

1 2

RSMRST#_KBC 24

3V_5V_POK 45

PM_SLP_SUS#

X01 0408

4

3

2

DSWODVREN

PCIE_WAKE# 24,30

PM_CLKRUN#_EC 24

PCH_SUSCLK_KBC 24

PM_SLP_S4# 24,49

PM_SLP_S3# 24,36,48,49,51

PM_SLP_SUS# 24,38

KBC_DPWROK 24

PM_CLKRUN#

PCH_SUSCLK_KBC

Title

Size Document Number Rev

A3

Date: Sheet of

R1720

330KR2J-L1-GP

1 2

DY

R1721

330KR2J-L1-GP

R1714

8K2R2F-1-GP

1 2

RTC_AUX_S5

3D3V_S0

EC1701

DY

SC4D7P50V2CN-1GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

PCH (PM)

Latitude300 Haswell

DY

1 2

17 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = PCH

X01 Follow vendor's suggestion, change C1801 C1802 to 15p 0417

C1801

0R2J-2-GP

D D

3D3V_S0

RN1801

1 2 3 4 5

SRN10KJ-6-GP

CLK_PCIE_WLAN_REQ3#15,58

CLK_PCIE_WLAN_N358 CLK_PCIE_WLAN_P358

CLK_PCIE_LAN_REQ4#20,30

CLK_PCIE_LAN_N430

C C

B B

CLK_PCIE_LAN_P430

PEG_CLKREQ#73

CLK_PCIE_VGA#73 CLK_PCIE_VGA73

LPC_AD[3..0]24,65

MCP_GPIO76

8

PEG_CLKREQ#

7

CLK_PCIE_REQ#

6

LPC_AD[3..0]

LPC_FRAME#24,65

SPI_CLK_R24,25 SPI_CS0#_R24,25

SPI_SI_R24,25

SPI_SO_R24,25

SPI_WP#25 SPI_HOLD#25

LPC_AD0 LPC_AD2 LPC_AD1 LPC_AD3

3D3V_S5

1

23

RN1802

RN1802 SRN1KJ-11-GP-U

SRN1KJ-11-GP-U

4

MCP_GPIO76 20

BOARD_ID1 2 0

RN1806

8 7 6

SRN0J-7-GP

1203 R1806 change to 33R

PCH_SPI_DQ3 PCH_SPI_DQ2

1 2 3 45

R18010R2J-2-GP R18010R2J-2-GP

1 2

1 2 1 2

1 2 1 2 1 2 1 2

CLK_PCIE_REQ#

CLK_PCIE_WLAN_REQ3#

CLK_PCIE_LAN_REQ4#

PEG_CLKREQ#

CLK_PCIE_REQ#

LPC_LAD0_PCH LPC_LAD1_PCH LPC_LAD2_PCH LPC_LAD3_PCH LPC_LFRAME#_PCH

PCH_SPI_CLK

R180633R2J-2-GP R180633R2J-2-GP

PCH_SPI_CS0#

R18070R2J-2-GP R18070R2J-2-GP

PCH_SPI_SI

R18080R2J-2-GP R18080R2J-2-GP

PCH_SPI_SO

R18090R2J-2-GP R18090R2J-2-GP

PCH_SPI_DQ2

R18110R2J-2-GP R18110R2J-2-GP

PCH_SPI_DQ3

R18120R2J-2-GP R18120R2J-2-GP

CPU1F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0#/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1#/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2#/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3#/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4#/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5#/GPIO23

HASWELL-6-GP

CPU1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME#

AA3

SPI_CLK

Y7

SPI_CS0#

Y4

SPI_CS1#

AC2

SPI_CS2#

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

HASWELL-6-GP

HSW_ULT_DDR3L

WLAN

LAN

GPU

HSW_ULT_DDR3L

LPC

CLOCK

SIGNALS

SMBUS

C-LINKSPI

DIFFCLK_BIASREF

CLKOUT_ITPXDP#

CLKOUT_ITPXDP_P

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPI O73

SML1DATA/GPIO74

6 OF 19

XTAL24_IN

XTAL24_OUT

RSVD#K21 RSVD#M21

TESTLOW_C 35 TESTLOW_C 34 TESTLOW_AK 8 TESTLOW_AL 8

CLKOUT_LPC_0 CLKOUT_LPC_1

7 OF 19

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK/GPIO75

CL_CLK

CL_DATA

CL_RST#

XTAL24_IN

A25

XTAL24_OUT

B25

K21 M21

XCLK_BIASREF

C26

MCP_TESTLOW1

C35

MCP_TESTLOW2

C34

MCP_TESTLOW3

AK8

MCP_TESTLOW4

AL8

CLK_PCI_LPC_R

AN15

CLK_PCI_KBC_R

AP15

B35 A35

X01 change R1805 from 33 ohm to 0ohm 0410

MCP_GPIO11

AN2

SMB_CLK

AP2

SMB_DATA

AH1

CARD_PWR_EN

AL2

SML0_CLK

AN1

SML0_DATA

AK1

MCP_GPIO73

AU4

SML1_CLK

AU3

SML1_DATA

AH3

TP_CL_CLK

AF2 AD2 AF4

TP_CL_DATA TP_CL_RST#

1 1 1

+V1.05S_AXCK_LCPLL

R1803 3KR2F-GPR1803 3KR2F-GP

1 2

RN1803

1

4

SRN10KJ-5-GP

R1804 0R2J-2-GP

R1804 0R2J-2-GP R1805 0R2J-2-GPR1805 0R2J-2-GP

TP1803TP180 3 TP1804TP180 4 TP1805TP180 5

SMB_DATA

SMB_CLK

RN1804

23

4

LPC

1 2 1 2

SML0_CLK 53 SML0_DATA 53

MCP_GPIO73 16 SML1_CLK 24,26,5 3,76 SML1_DATA 24,26,53, 76

DY

EC1801

12

XTAL24_IN

XTAL24_OUT

23 1

SRN10KJ-5-GP

SC10P50V2JN-4GPDYEC1801

SC10P50V2JN-4GP

EC1802

12

DY

3D3V_S0

Q1801

6

5

2N7002KDW-GP

CLK_PCI_LPC 65 CLK_PCI_KBC 24

PCIE_CLK_XDP_N 9 6 PCIE_CLK_XDP_P 96

SC10P50V2JN-4GPDYEC1802

SC10P50V2JN-4GP

1

2

34

0R2J-2-GP

R1810

1 2

12

R1802

R1802 1MR2J-1-GP

1MR2J-1-GP

23

82.30004.891

2nd = 82.30004.841

3rd = 82.30023.A11

X01 0408

1128 Add EC1801 EC1802(DY)

SML1_CLK SML1_DATA SML0_DATA SML0_CLK

USB_OC#0_116,35

EC_SCI#20,24

CARD_PWR_EN

MCP_GPIO11

SMB_CLK SMB_DATA

RN1810

4

SRN10KJ-5-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

XTAL24_IN_R

4 1

23 1

PCH_SMBDATA 12,13,62, 96

PCH_SMBCLK 12,13,62 ,96

C1801

1 2

SC15P50V2JN-2-G P

X1801

X1801 XTAL-24MHZ-86- GP

XTAL-24MHZ-86- GP

C1802

1 2

SC15P50V2JN-2-G P

RN1807

8 7 6

SRN2K2J-4-GP

RN1809

SRN10KJ-6-GP

8 7 6

RN1811

4

SRN2K2J-3-GP

3D3V_S0

3D3V_S5_PCH

1 2 3 45

1 23

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (CLOCK/SMBUS/CL/LPC/SPI)

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

18 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = CPU

RTC_X1

1 2

R1915 10MR2J-L-GPR1915 10MR2J-L-GP

X1901

X01 3/7 Change value from test report

HDA_SDIN027

R1903

TP1902TP1902

TP1901TP1901

RTC_AUX_S5

12

HDA_BITCLK HDA_SYNC HDA_RST# HDA_SDIN0

HDA_SDOUT TP_HDA_DOCK_EN#

1

PCH_JTAG_TRST#

1

PCH_JTAG_TCK PCH_JTAG_TDI PCH_JTAG_TDO PCH_JTAG_TMS

XDP_TCK_JTAGX

R1901

R1901 1MR2J-1-GP

1MR2J-1-GP

RTC_X1 RTC_X2

SM_INTRUDER#

PCH_INTVRMEN SRTC_RST# RTC_RST#

C1903

SC15P50V2JN-2-GP

CPU1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER#

AV7

INTVRMEN

AV6

SRTCRST#

AU7

RTCRST#

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST#/I2S_MCLK#

AY10

HDA_SDI0/I2S0_RX D

AU12

HDA_SDI1/I2S1_RX D

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN#/I2S1_ TXD#

AV10

HDA_DOCK_RST#/I2S1 _SFRM#

AY8

I2S1_SCLK

AU62

PCH_TRST#

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD#AL11

AC4

RSVD#AC4

AE63

JTAGX

AV2

RSVD#AV2

HASWELL-6-GP

1 2

D D

RTC_AUX_S5

Q1901

RTCRST_ON24

R1902

10KR2J-3-GP

C C

G

12

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

D

C1901

21

12

G1901

GAP-OPEN

SC1U6D3V2KX-GP

GAP-OPEN

1

23

RN1901

RN1901 SRN20KJ-1-GP

SRN20KJ-1-GP

4

12

C1902

C1902 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

330KR2J-L1-GP

X01 0408

1203 R1907 change from 0R to 33R

R1907 33R2J-2-GPR1907 33R2J-2-GP

HDA_CODEC_BITCLK27

HDA_CODEC_SYNC27

HDA_CODEC_RST#27,29

Flash Descriptor Security Overide/ Intel ME De bug Mode

HDA_SDO UT

The internal pull-do wn is disabled af ter PLTRST# deasserts

B B

Low = Default High = Enable

R1913

1 2

DY

330KR2J-L1-GP

*

PCH_INTVRMEN

HDA_CODEC_SDOUT27

ME_UNLOCK24

1D05S_VCCST

Integrat ed SUS 1V VRM E nable

INTVRMEN

Low = External VRs High = Internal VRs

EC1901

HDA_CODEC_BITCLK

1 2

DY

SC10P50V2JN-L1-GP

*

1 2

R1908 0R2J-2-GPR1908 0R2J-2-GP

1 2

R1911 0R2J-2-GPR1911 0R2J-2-GP

1 2

R1912 33R2J-2-GPR1912 33R2J-2-GP

1 2

R1909 1KR2J-1-GPR1909 1KR2J-1-GP

1 2

X01 Change R1912 to 33ohm 0409

DY

DY DY

DY

1 2

DY

12

R1916 51R2J-2-GP

R1917 51R2J-2-GP

R1918 51R2J-2-GP

R1919 1KR2J-1-GP

R1920 51R2J-2-GP

HDA_BITCLK

HDA_SYNC

HDA_RST#

HDA_SDOUT

PCH_JTAG_TDI

PCH_JTAG_TDO

PCH_JTAG_TMS

XDP_TCK_JTAGX

PCH_JTAG_TCK

X1901

41

2 3

X-32D768KHZ-65-GP

82.30001.A41

2nd = 82.30001.841

X01 0408

HSW_ULT_DDR3L

RTC

AUDIO SATA

JTAG

RTC_X2

C1904

C1904 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

1 2

X01 3/7 Change value from test report

5 OF 19

RSVD#L11

RSVD#K10

SATALED#

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

EC_SMI#

V1 U1 V6 AC1

SATA_IREF

A12 L11 K10

SATA_RCOMP

C12

SATA_LED#

U3

SATA_ODD_PRSNT# EC_SMI#

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3

SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2

SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0 SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0

SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

SATA_RCOMP

SATA3_PRX_HDDTX_N0 56 SATA3_PRX_HDDTX_P0 56 SATA3_PTX_HDDRX_N0 56 SATA3_PTX_HDDRX_P0 56

SATA_PRX_ODDTX_N2 56 SATA_PRX_ODDTX_P2 56 SATA_PTX_ODDRX_N2 56 SATA_PTX_ODDRX_P2 56

EC_SMI# 24

SATA_ODD_PRSNT# 56

SATA_LED# 61

Layout Note:

4mil trace at break-out and 3 12-15mil trace with <0.2 ohms and length total <= 500mils.

RN1902

1 2 3

SRN10KJ-5-GP

1 2

3D3V_S0

4

HDD1

ODD

0114 Change

+V1.05S_ASATA3PLL

R1904

R1904 0R2J-2-GP

0R2J-2-GP

R1906

R1906 3KR2F-GP

3KR2F-GP

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (RTC/SATA/HDA/JTAG)

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

19 104Friday, April 19, 2013

1

X00

SSID = CPU

5

4

CPU1J

HSW_ULT_DDR3L

3

10 OF 19

2

1D05S_VCCST

12

R2018

R2018 1KR2J-1-GP

1KR2J-1-GP

1

MCP_GPIO7618

D D

3D3V_S5

RN2006

1 2 3

SRN10KJ-11-GP-U

3D3V_S5_PCH

X01 change R2013 from

12

0ohm to 10K 0417

R2013

R2013 10KR2J-3-GP

10KR2J-3-GP

X01 3/7 Add shotpad to 10K and R2013 to 0 ohm for power consumption

C C

MCP_R

3D3V_S5_PCH

4

1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2 1 2

RN2012

RN2012 SRN10KJ-6-GP

SRN10KJ-6-GP

1 2 3 4 5

BATLOW# MCP_GPIO27

R200110KR2J-3-GP R200110KR2J-3-GP R200210KR2J-3-GP R200210KR2J-3-GP R200410KR2J-3-GP R200410KR2J-3-GP R200910KR2J-3-GP R200910KR2J-3-GP R201510KR2J-3-GP R201510KR2J-3-GP R201610KR2J-3-GP R201610KR2J-3-GP R201710KR2J-3-GP R201710KR2J-3-GP R201910KR2J-3-GP R201910KR2J-3-GP R202010KR2J-3-GP R202010KR2J-3-GP R202110KR2J-3-GP R202110KR2J-3-GP R202210KR2J-3-GP R202210KR2J-3-GP R202310KR2J-3-GP R202310KR2J-3-GP

8 7 6

MCP_GPIO58 MCP_GPIO44

MCP_GPIO46 MCP_GPIO26

MCP_GPIO56

MCP_GPIO45 MCP_GPIO14

MCP_GPIO28 MCP_GPIO8 MCP_GPIO13 MCP_GPIO47 MCP_GPIO57

EC_SWI#

RTC_DET#

WLAN_PLT_RST#

BATLOW# 17

MCP_GPIO1217

SATA_ODD_DA#56 RTC_DET#25

3D3V_S0

USB_OC#4_5 16

BOARD_ID118

HSIOPC21

EC_SWI#24 EC_SCI#18,24

HDA_SPKR27

RN2011

RN2011 SRN10KJ-6-GP

SRN10KJ-6-GP

1 2 3 4 5

8 7 6

TP2002TP2002

TP2001TP2001

MCP_GPIO76 MCP_GPIO8 MCP_GPIO12 MCP_GPIO15

RTC_DET# MCP_GPIO27 MCP_GPIO28 MCP_GPIO26

MCP_GPIO56 MCP_GPIO57 MCP_GPIO58 WLAN_PLT_RST# MCP_GPIO44 MCP_GPIO47 BOARD_ID1 BOARD_ID2

HSIOPC MCP_GPIO13 MCP_GPIO14

CAMERA_PWR_EN

1

MCP_GPIO45 MCP_GPIO46

EC_SWI# EC_SCI# HDD_DEVSLP

1

HDA_SPKR

PIRQA# DBC_EN

BLUETOOTH_EN

P1

BMBUSY#/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO 71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO3 3

C4

SDIO_POWER_EN/ GPIO70

L2

DEVSLP1/GPIO3 8

N5

DEVSLP2/GPIO3 9

V2

SPKR/GPIO81

HASWELL-6-GP

PCH strap pin:

CLK_PCIE_LAN_REQ4# 18,30 PIRQA# 15

HDA_SPK R

The internal pull-do wn is disabled af ter PLTRST# deasserts

GPIO

NO REB OOT

Low = Disable (Default)

*

High = Enable

CPU/

CPU/ MISC

MISC

SERIAL IO

THRMTRIP#

RCIN#/GPIO8 2

SERIRQ

PCH_OPI_RCOMP

RSVD#AF20 RSVD#AB21

GSPI0_CS#/GPIO83

GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86

GSPI1_CS#/GPIO87

GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90

UART0_RXD/GPIO9 1

UART0_TXD/GPIO9 2 UART0_RTS#/GPIO 93 UART0_CTS#/GPIO 94

UART1_RXD/GPIO0

UART1_TXD/GPIO1 UART1_RST#/GPIO 2 UART1_CTS#/GPIO 3

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO6 4

SDIO_CMD/GPIO65

SDIO_D0/GPIO6 6 SDIO_D1/GPIO6 7 SDIO_D2/GPIO6 8 SDIO_D3/GPIO6 9

PCH_THERMTRIP

D60

H_RCIN#

V4

INT_ SERIRQ

T4

PCH_OPIRCOMP

AW15 AF20 AB21

R6 L6 N6

LPSS_GSPI0_MOSI_BBS0_R

L8 R7 L5 N7 K2 J1 K3 J2 G1 K4 G2 J3 J4

I2C0 _SDA

F2

I2C0 _SCL

F3

I2C1 _SDA

G4

I2C1 _SCL

F1 E3 F4

LPSS_SDIO_D0_CMNHDR

D3 E4 C3 E2

3D3V_S0

1KR2J-1-GP

1KR2J-1-GP R2006

R2006

1 2

DY

KB_DET# 62

DBC_EN 52

BLUETOOTH_EN 58

HDA_SPKR

1 2

R2003

R2003 49D9R2F-GP

49D9R2F-GP

SATA_ODD_PWRGT 56

SATA_ODD_DA#56

H_RCIN# 24

INT_ SERIRQ 24

Layout Note:

1.Referenced "continuous" VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3. Trace width: 12~15mil

4. Isolation Spacing: 12mil

5. Max length: 500mil

3D3V_S0

1 2 3 45

3D3V_S0

1 2 3 45

100KR2J-1-GP

H_RCIN#

INT_ SERIRQ KB_DET#

I2C0 _SCL I2C0 _SDA I2C1 _SCL I2C1 _SDA

HSIOPC

SRN10KJ-6-GP

8 7 6

SRN10KJ-6-GP

8 7 6

R2007

1 2

RN2002

RN2007

B B

BIOS strap pin:

BIOS UMA/DIS Strap pin

BOARD_ID2BOARD_ID1

UMA

DIS

A A

11

01

BOARD_ID2

3D3V_S0

12

OPS

12

UMA

R2005

R2005 10KR2J-3-GP

10KR2J-3-GP

R2008

R2008 10KR2J-3-GP

10KR2J-3-GP

Need SW double confirm if that's needed Top-Block swap

Top-Block Swap Override mode

SDIO_D0 / GPIO66

The internal pull-do wn is disabled af ter PLTRST# deasserts

High = Enable "Top-Block swap" mode (Default) Low = Disable "Top-Block swap" mode

*

TLS Confidentiality

Low = Disable Intel ME Crypto TLS

GPIO15

The internal pull-do wn is disabled af ter RSMRST# deasserts.

*

High = Enable Intel ME Crypto TLS

Boot BIOS Strap Bit BBS

Boot BIOS Destination

The internal pull-do wn is disabled af ter PLTRST# deasserts

*

Low = SPI High = LPC

Need double confirm, GPIO table set to GPI if that's needed PH or PL

5

4

3

3D3V_S0

12

R2011

DY

1KR2J-1-GP

LPSS_SDIO_D0_CMNHDR

3D3V_S5_PCH

12

R2014

DY

1KR2J-1-GP

3D3V_S0

12

R2012

DY

1KR2J-1-GP

LPSS_GSPI0_MOSI_BBS0_R

MCP_GPIO15

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (GPIO/CPU)

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

20 104Friday, April 19, 2013

1

X00

5

SSID = CPU

D D

1D05V_S0

DSW 20121019

3D3V_S5 3D3V_S0

C C

R2101 0R2J-2-GPR2101 0R2J-2-GP

1 2

1D05V_S0

1 2

0R2J-2-GP

0R2J-2-GP R2117

R2117

DY

12

+V3.3A_DSW_P

C2136

C2136 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

+V1.05S_SSCF100

C2137

SC1U6D3V2KX-GP

C2137

SC1U6D3V2KX-GP

4

+V1.05DX_MODPHY_PCH

0R2J-2-GP

0R2J-2-GP R2105

R2105

1 2

C2105

SC1U6D3V2KX-GPDYC2105

SC1U6D3V2KX-GP

12

DY

TP2102TP2102

+V3.3A_1.5A_HDA3D3V_S5_PCH

R2108

1 2

0R2J-2-GP

R2112 0R2J-2-GPR2112 0R2J-2-GP

1 2

TP2107TP2107

C2116

SC1U6D3V2KX-GP

C2116

SC1U6D3V2KX-GP

12

TP2108TP2108

TP2103TP2103 TP2104TP2104 TP2101TP2101

+V1.05DX_MODPHY_PCH

+V1.05S_AIDLE

+V1.05S_AUSB3PLL

+V1.05S_ASATA3PLL

TP_VCCAPLLOPI_VAL

1

+V1.05S_APLLOPI

+V1.05A_VCCUSB3SUS

1

+V3.3A_1.5A_HDA

+V1.05A_USB2SUS

1

+V3.3A_PSUS

+V3.3A_DSW_P

12

C2123

C2123 SC10U6D3V3KX-GP

SC10U6D3V3KX-GP

+V1.05S_AXCK_DCB

+V1.05S_AXCK_LCPLL

+V1.05S_SSCF100

+V1.05S_SSCFF

TP_V1.05S_SSCF100

1

TP_V1.05S_AXCK_DCB

1

TP_V1.05S_SSCFF

1

+V3.3A_PSUS

+V3.3S_PCORE

B18 B11

Y20

AA21

W21

AH14

AH13

AC9 AA9

AH10

K19 A20

R21

K18 M20

V21 AE20 AE21

L10

M9

N8 P9

J13

V8

W9

J18

J17

T21

CPU1M

K9

VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL

RSVD#Y20 VCCAPLL VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3

VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD#K18 RSVD#M20 RSVD#V21 VCCSUS3_3 VCCSUS3_3

3

2

1

DSW 20121019

3D3V_S5_PCH

R2102

R2102 0R2J-2-GP

1 2

12

C2109

C2109 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

RTC_AUX_S5

1 2

R2110

R2110 5D1R2F-GP

5D1R2F-GP

1 2

TP2106TP2106

1

12

0R2J-2-GP

PCH_VCCDSW_R+PCH_VCCDSW

3D3V_S0

TP2109TP2109

TP2105TP2105

C2135

SC1U6D3V2KX-GP

C2135

SC1U6D3V2KX-GP

12

C2147

C2147 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2114

C2114 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2128

SC1U6D3V2KX-GP

C2128

SC1U6D3V2KX-GP

12

3D3V_S5

1 2

1D05V_S0

HSIO

OPI

USB3

HDA

VRM

GPIO/LPC

LPT LP POWER

HSW_ULT_DDR3L

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

13 OF 19

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP#AG19 DCPSUSBYP#AG20

VCCASW

DCPSUS1#AD10

DCPSUS1#AD8

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO VCCSDIO

DCPSUS4

RSVD#AC20

VCC1_05

+3.3A_DSW_PRTCSUS

AH11 AG10

+VCCRTCEXT

AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8

+V1.05A_SUS_PCH

AD10 AD8

J15 K14 K16

U8 T9

+V1.05A_AOSCSUS

AB8

TP_V1.05S_APLLOPI

AC20 AG16 AG17

C2110

SCD1U10V2KX-5GP

1D05V_S0

+V1.05S_CORE_PCH

+1.05M_ASW

1

1D5V_S0

+V3.3S_1.8S_LPSS_SDIO

HASWELL-6-GP

1D05V_S0

B B

A A

0R2J-2-GP

0R2J-2-GP R2118

R2118

1 2

12

5

+V1.05S_SSCFF

C2138

SC1U6D3V2KX-GP

C2138

SC1U6D3V2KX-GP

+V1.05S_SSCFF

R2123

HSIOPC20

4

1 2

HSIO

0R2J-2-GP

5V_S5

1D05V_S0

HSIO

HSIOPC_R

12

C2141

C2141 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

X01 change U2101 from 74.22965.093 to 74.59147.093,dummy it. 0409

HASWELL-6-GP

9

U2101

ON

1

VDD

2

D#2

3

D#3 D#44S#5

HSIO

SLG59M1470VTR-GP

74.59147.093

R2122

R2122 0R5J-5-GP

0R5J-5-GP

1 2

Non-HSIO

8

GND

7

S#7

6

S#6

5

3

1D05V_HSIO1D05V_S0

HSIO_OUT

R2114

R2114 0R5J-5-GP

0R5J-5-GP

1 2

HSIO

1D05V_HSIO

HSIO

12

C2142

C2142 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

2

+V3.3S_1.8S_LPSS_SDIO

1 2

12

C2104

SC1U6D3V2KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (POWER2)

Latitude300 Haswell

0R2J-2-GP

0R2J-2-GP R2103

R2103

1

3D3V_S0

21 104Friday, April 19, 2013

X00

5

4

3

2

1

SSID = PCH

D D

HSW_ULT_DDR3L

CPU1Q

HSW_ULT_DDR3L

17 OF 19

DC_TEST_AY2_AW2

TP2201TP2201

TP2204TP2204

C C

B B

TP_DC_TEST_AY60

1

DC_TEST_AY61_AW61 DC_TEST_AY62_AW62

1

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

HASWELL-6-GP

CPU1R

AT2

RSVD#AT2

AU44

RSVD#AU44

AV44

RSVD#AV44

D15

RSVD#D15

F22

RSVD#F22

H22

RSVD#H22

J21

RSVD#J21

HASWELL-6-GP

HSW_ULT_DDR3L

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

18 OF 19

RSVD#N23 RSVD#R23

RSVD#T23

RSVD#U10

RSVD#AL1

RSVD#AM11

RSVD#AP7 RSVD#AU10 RSVD#AU15

RSVD#AW14

RSVD#AY14

DC_TEST_A3_B3

A3

TP_DC_TEST_A4DC_TEST_AY3_AW3

A4

TP_DC_TEST_A60

A60

DC_TEST_A61_B61

A61

TP_DC_TEST_A62TP_DC_TEST_B2

A62

TP_DC_TEST_AV1

AV1

TP_DC_TEST_AW1

AW1

DC_TEST_AY2_AW2

AW2

DC_TEST_AY3_AW3

AW3

DC_TEST_AY61_AW61DC_TEST_C1_C2

AW61

DC_TEST_AY62_AW62

AW62

TP_DC_TEST_AW63

AW63

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

TP2202TP2202

1

TP2203TP2203

1

TP2205TP2205

1

TP2206TP2206

1

TP2207TP2207

1

TP2208TP2208

1

Wistron Corporation

A A

Title

(Reserved)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

(Reserved)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

22 104Tuesday, March 26, 2013

1

X00

5

4

3

2

1

SSID = PCH

D D

HSW_ULT_DDR3L

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HSW_ULT_DDR3L

CPU1N

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

AA1 AA58 AB10 AB20 AB22

AB7

AC61 AD21

AD3

AD63

C C

B B

AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1

AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

HASWELL-6-GP

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

HSW_ULT_DDR3L

CPU1O

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HASWELL-6-GP

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

Latitude300 Haswell

23 104Tuesday, March 26, 2013

1

X00

SSID = KBC

www.vinaﬁx.vn

1D05V_S0

D D

Layout Note:

Need very close to EC

3D3V_S0

12

C2412

DY

SCD1U10V2KX-5GP

DY

X01 3/5 move WPAN_LED# from GPIO85 to GPIO93

C C

LCD_TST_EN52

Don't PD

ALL_SYS_PWRGD assert, delay 10ms; PCH_PWROK assert.

B B

ALL_SYS_PWRGD de-assert, delay 100ms; SYS_PWROK assert.

LVDS backlight Control from PS8625

eDP backlight Control from Travis Travis request response time < 1ms

LCD_TST52

L_BKLT_EN53

R2417 0R2J-2-GPR2417 0R2J-2-GP

5

EC_AGND

12

1 2

EC_VTT

12

C2401

C2414 SCD1U10V2KX-5GPC2414 SCD1U10V2KX-5GP

EC_FB_CLAMP_TGL_REQ#76

OVER_CURRENT_P8#76

TOUCH_PANEL_INTR#52

1 2

R2401

0R2J-2-GP

C2413

C2413 SC2D2U10V3KX-1GP

SC2D2U10V3KX-1GP

R2444 0R2J-2-GPR2444 0R2J-2-GP

VBAT

3D3V_AUX_KBC_VCC

12

C2405

C2404

DY

SCD1U10V2KX-5GP

SC2D2U10V3KX-1GP

SCD1U10V2KX-5GP

AD_IA44

1 2

CARD_WPAN_OUT#58

PM_SLP_SUS#17,38 BOOST_MON44 DIS_DTM44

FAN1_DAC_126

IMVP_P WR GD7,46

SML1_DATA18,26,53,76

PM_LAN_ENABLE30

RTCRST_ON19

EC_FB_CLAMP75,76,83

ALL_SYS_PWRGD36

PWR_CHG_AD_OFF42

AD_IA_HW244

FAN_TACH126 PM_PWRBTN#17,96 WLAN_LED#61

PM_SLP_S3#17,36,48,49,51

EC_BRIGHTNESS52

AC_IN_KBC#42

CHG_AMBER_LED#61

KBC_DPWROK17

PCH_PWROK17,26,36

USB_PWR_EN#35

AC_PRESENT17,76

SYS_PWROK17,96

CARD_WLAN_OUT#58

WIFI_RF_EN58

PM_SUSWARN#17

PM_CLKRUN#_EC17

AMP_MUTE#27

EC_AGND

EC_VTT

PSID_EC42

AD_IA_HW44

BAT_SCL43,44 BAT_SDA43,44

SML1_CLK18,26,53,76

TPDATA62

BLON_OUT52

PWRLED#61

KBC_BEEP27

E51_TxD58

PCB_VER_AD

MODEL_ID_DET

BAT_SCL BAT_SDA

PROCHOT_EC LCD_TST_EN

ECSWI#_KBC

TPCLK62

L_BKLT_EN_EC

12

C2406

SCD1U10V2KX-5GP

KBC24

19

VCC

46

VCC

76

VCC

88

VCC

115

VCC

102

AVCC

4

VDD

12

VTT

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2

100

GPIO93/AD3

108

GPIO5/AD4

96

GPIO4/AD5

95

GPIO3/EXT_PURST#/AD6

94

GPIO7/AD7/VD_IN2

101

GPIO94/DA0

105

GPIO95/DA1

106

GPIO96/DA2

107

GPIO97/DA3

70

GPIO17/SCL1/N2TCK

69

GPIO22/SDA1/N2TMS

67

GPIO73/SCL2/N2TCK

68

GPIO74/SDA2/N2TMS

119

GPIO23/SCL3/N2TCK

120

GPIO31/SDA3/N2TMS

24

GPIO47/SCL4/N2TCK

28

GPIO53/SDA4/N2TMS

26

GPIO51/TA3/N2TCK

123

GPIO67/N2TMS

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27/PSDAT2

25

GPIO50/PSCLK3/TDO

27

GPIO52/PSDAT3/RDY#

31

GPIO56/TA1

117

GPIO20/TA2/IOX_DIN_DI O

63

GPIO14/TB1

64

GPIO1/TB2

32

GPIO15/A_PWM

118

GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM/1_WIRE

81

GPIO66/G_PWM

66

GPO33/H_PWM/VD1_EN#

104

GPIO80/VD_IN1

110

GPIO82/IOX_LDSH/VD_OUT1

112

GPIO84/IOX_SCLK/VD_OUT2

84

GPIO77/SPI_MISO

83

GPIO76/SPI_MOSI

82

GPIO75/SPI_SCK

79

GPIO2/SPI_CS#

124

GPIO10/LPCPD#

121

GPIO85/GA20

111

GPIO83/SOUT_CR

9

GPIO65/SMI#

8

GPIO11/CLKRUN#

30

GPIO55/CLKOUT/IOX_DIN_ DIO

NPCE985PA0DX-1-GP

71.00985.C0G

EC_GPIO47 High Active

R2438

R2438 0R2J-2-GP

0R2J-2-GP

1 2

DY

Q2401

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

R2442

100KR2J-1-GP

PROCHOT_EC

12

DY

A A

5

4

0R3J-0-U-GP

12

C2408

C2407

DY

SCD1U10V2KX-5GP

KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS

KBSOUT0/GPOB0/SOUT_CR/JEN K#

KBSOUT1/GPIOB1/TCK

KBSOUT2/GPIOB2/TMS

KBSOUT3/GPIOB3/TDI

KBSOUT4/GPOB4/JEN0#

KBSOUT5/GPIOB5/TDO

KBSOUT6/GPIOB6/RDY#

KBSOUT9/GPOC1/SDP_VIS# KBSOUT10/P80_CLK/GPIOC2 KBSOUT11/P80_DAT/GPIOC3

KBSOUT12/GPO64/TEST#

KBSOUT13/GPI/O63/TRIST# KBSOUT14/GPI/O62/XORTR#

KBSOUT15/GPIO61/XOR_OUT

GPIO81/F_WP#/F_SDIO2 GPIO0/EXTCLK/F_SDIO3

PSL_IN2#/GPI6/EXT_PURST#

GPIO46/CIRRXM/TRST #

GPIO87/CIRRXM/SIN_C R

H_PROCHOT#_EC

D

4

R2402

12

2D2R3-1-U-GP

12

C2409

C2410

DY

SCD1U10V2KX-5GP

KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7

KBSOUT7/GPIOB7 KBSOUT8/GPIOC0

GPIO60/KBSOUT16 GPIO57/KBSOUT17

LAD0/GPIOF1 LAD1/GPIOF2 LAD2/GPIOF3 LAD3/GPIOF4 LCLK/GPIOF5

LFRAME#/GPIOF6

LRESET#/GPIOF7

F_CS0#

F_SCK GPIO30/F_WP# GPIO41/F_WP#

F_SDIO/F_SDIO0

F_SDI/F_SDIO1

PSL_IN1#/GPI70

PSL_OUT#/GPIO71

ECSCI#/GPIO54

EXT_RST#

KBRST#/GPIO86

VSBY

VBKUP

VCORF

SERIRQ/GPIOF0

GPIO24

GPIO36/TB3

GPIO44/TDI

GPIO43/TMS

GPIO42/TCK

GPIO34/CIRRXL

AGND

1 2

R2440

0R2J-2-GP

3D3V_AUX_KBC

R2403

12

SC2D2U10V3KX-1GP

PECI

GND GND GND GND GND GND

X01 change R2404 to 20K for PCB version change 0409

1 2

PCB_VER_AD

C2402

12

SCD1U10V2KX-5GP

C2411

KROW0

54

KROW1

55

KROW2

56

KROW3

57

KROW4

58

KROW5

59

KROW6

60

KROW7

61

KCOL0

53

KCOL1

52

KCOL2

51

KCOL3

50

KCOL4

49

KCOL5

48

KCOL6

47

KCOL7

43

KCOL8

42

KCOL9

41

KCOL10

40

KCOL11

39

KCOL12

38

KCOL13

37

KCOL14

36

KCOL15

35

KCOL16

34 33

LPC_AD0

126

LPC_AD1

127

LPC_AD2

128

LPC_AD3

1 2 3

PLT_RST#_EC

7

EC_SPI_CS#_C

90

EC_SPI_CLK_C

92 109

BAT_IN#

80

EC_SPI_DI_C

87

EC_SPI_DO_C

86 91 77

PSL_IN1#

73

PSL_IN2#

93

PSL_OUT#

74

ECSCI#_KBC

29

ECRST#

85 122

75

EC_VBKUP

114

KBC_VCORF

44

PECI

13 125

ECSMI#_KBC

6 15

21 20 17 23

113 14

5 18 45 78 89 116

103

EC_AGND

12

C2421

C2421 SC47P50V2JN-3GP

SC47P50V2JN-3GP

DY

VBAT

12

DY

1 2

EC_AGND

KROW[0..7] 62

KCOL[0..16] 62

LPC_AD[3..0] 18,65

CLK_PCI_KBC 18 LPC_FRAME# 18,65

R2422 33R2J-2-GPR2422 33R2J-2-GP R2423 33R2J-2-GPR2423 33R2J-2-GP

H_RCIN# 20

R2428 0R2J-2-GPR2428 0R2J-2-GP

1 2

INT_S ERIRQ 20

BATT_WHITE_LED# 61

PM_SLP_S4# 17,49 RSMRST#_KBC 17 LID_CLOSE# 64 ME_UNLOCK 19

PCIE_WAKE# 17,30 S5_ENABLE 36

R2435

R2435 0R2J-2-GP

0R2J-2-GP

1 2

Layout Note:

Connect GND and AGND planes via either 0R resistor or connect directly.

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

R2404

R2404 20KR2F-L-GP

20KR2F-L-GP

R2406

R2406 100KR2F-L1-GP

100KR2F-L1-GP

Reserved

Reserved 100.0K 215.0K 1.048V

33R2J-2-GPR2419 33R2J-2-GPR2419

12

33R2J-2-GPR2420 33R2J-2-GPR2420

12

12 12

Layout Note:

Need very close to EC

X01 change PCIE_WAKE# to GPIO87 0409

SPI_CS0#_R 18,25 SPI_CLK_R 18,25 CAP_LED# 62 BAT_IN# 42,43,44 SPI_SI_R 18,25 SPI_SO_R 18,25

PM_SUSACK# 17

PCH_SUSCLK_KBC 17

3D3V_AUX_S5 RTC_AUX_S5

1 2

C2422

SC100P50V2JN-3GPDYC2422

SC100P50V2JN-3GP

12

DY

PURE_HW_SHUTD OWN#26,36,76H_PROCHOT# 4,42,44,46

X01

X02

X03

A00

R2429

R2429 43R2J-GP

43R2J-GP

3

SC1U25V3KX-1-GP

SC1U25V3KX-1-GP C2416

C2416

1 2

3

100.0KX00

100.0K

100.0K 1.358V

R2416

0R2J-2-GP

1 2

C2415

DY

SC220P50V2KX-3GP

1 2

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

143.0K

174.0KReserved 100.0K

PLT_RST# 17,30,55,58,65,73,96

Power Switch Logic(PSL)

KBC_PWRBTN#61

H_PECI 4

Layout Note:

Need very close to EC C2422 PDG is 47p

3D3V_AUX_S5

R2424

0R2J-2-GP

12

1 2

DY

R2439

R2439 10KR2J-3-GP

10KR2J-3-GP

Q2404

MMBT3906-4-GP

84.T3906.A11

2nd = 84.03906.F11

3rd = 84.03906.P11

X01 0408

B

AC_IN#44

C2418

12

E

DY

C

ECRST#

SC1U6D3V2KX-GP

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65VReserved

1.204V

1 2

R2427

0R2J-2-GP

1 2

R2430

0R2J-2-GP

PSL_OUT#

2

64K9R2F-1-GP

MODEL_ID_DET

SCD1U10V2KX-5GP

3D3V_AUX_S5

1 2

R2432

1 2

1KR2J-1-GP

2

R2446

N14P-GV2

C2403

DY

R2425

R2425 330KR2J-L1-GP

330KR2J-L1-GP

PSL_IN2#

PSL_IN1#

KBC_ON#_GATE_L

12

1 2

EC_AGND

VBAT

12

MODEL_ID_DET(GPIO07)

UMA

R2405

R2405 10KR2F-2-GP

10KR2F-2-GP

UMA

R2407

R2407 100KR2F-L1-GP

100KR2F-L1-GP

TBD TBD TBD 2.702V TBD TBD TBD TBD

DIS

N14M-GE N14P-GV2

TBD TBD TBD TBD TBD TBD TBD TBD TBD

ECSCI#_KBC

ECSMI#_KBC

ECSWI#_KBC

0111 Add

3D3V_AUX_S5 3D3V_AUX_S5

R2431

R2431 330KR2J-L1-GP

330KR2J-L1-GP

1 2

KBC_ON#_GATE

1 2

R2433

R2433 20KR2F-L-GP

20KR2F-L-GP

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

BAT_SCL BAT_SDA

ECRST#

X01 Modify R2414 from 100K to 10K 0409

AC_IN# BAT_IN#

AC_IN_KBC#

FAN_TACH1

TOUCH_PANEL_INTR#

LID_CLOSE#

C2417

C2417 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

1 2

G

Q2402

Q2402 DMP2130L-7-GP

DMP2130L-7-GP

84.02130.031

2nd = 84.00102.031

3rd = 84.03413.B31

X01 0408

Q2403

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Date: Sheet of

1

100.0K 3.0V

100.0K

S

G

D

Latitude300 Haswell

Friday, April 19, 2013

10.0K(64.10025.6DL)

13.7K(64.13725.6DL)

17.8K(64.17825.6DL)

22.1K(64.22125.6DL)

27.0K(64.27025.6DL)

32.4K(64.32425.6DL)

37.4K(64.37425.6DL)

43.2K(64.43225.6DL)

57.6K(64.57625.6DL)

64.9K(64.64925.6DL)

73.2K(64.73225.6DL) 1.905V

82.5K(64.82525.6DL) 1.808V

93.1K(64.93125.6DL) 107K(64.10735.6DL) 120K(64.12035.6DL) 137K(64.13735.6DL) 154K(64.15435.6DL) 200K(64.20035.6DL) 1.099V 232K(64.23236.6DL)

R24080R2J-2- GP R24080R2J- 2-GP

12

R24090R2J-2- GP R24090R2J- 2-GP

12

R24100R2J-2- GP R24100R2J- 2-GP

12

3D3V_AUX_KBC

RN2401

23 1

4

SRN4K7J-8-GP

R2418 10KR2J-3-GPR2418 10KR2J-3-GP

1 2

R2413 100KR2J-1-GP

R2413 100KR2J-1-GP R2414 10KR2J-3-GPR2414 10KR2J-3-GP

R2426 100KR2J-1-GPR2426 100KR2J-1-GP

R2415 10KR2J-3-GPR2415 10KR2J-3-GP R2443 10KR2J-3-GPR2443 10KR2J-3-GP

D

3D3V_AUX_KBC

1 2

DY

1 2

3D3V_S0

1 2 1 2

3D3V_S5

R2421 100KR2J-1-GP

1 2

DY

R2434

DY

0R2J-2-GP

1 2

3D3V_AUX_KBC

KBC Nuvoton NPCE885

3D3V_AUX_KBC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

24 104

EC_SWI# 20

1

2.902V

2.801V

2.598V

2.492V

2.402V

2.304V

2.201V49.9K (64.49925.6DL)

2.093V

2.001V

1.709V

1.594V

1.499V

1.392V

1.299V

0.994V

EC_SCI# 18,20

EC_SMI# 19

12

R2436

R2436 10KR2J-3-GP

10KR2J-3-GP

S5_ENABLE

X00

5

SSID = Flash.ROM

4

3

2

1

R2501

4K7R2J-2-GP

12

DY

3D3V_S5

1 2

1203 RN2501 DY

4

RN2501

RN2501 SRN4K7J-8-GP

SRN4K7J-8-GP

DY

1

2 3

SPI25

1

CS#

2

DO/IO1

3 4

HOLD#/IO3 WP#/IO2 GND

W25Q64FVSSIQ-GP

72.25Q64.K01

2nd = 72.25647.00A

8

VCC

7 6

CLK

5

DI/IO0

SC4D7P50V2CN-1GP

SC10U6D3V5KX-1GP

3D3V_S5

12

EC2501

DY

C2501

12

DY

SPI Flash ROM(8M) for PCH

D D

SPI_CS0#_R18,24

SPI_SO_R18,24

SPI_WP#18

EC2502

SC4D7P50V2CN-1GP

EC2502

3D3V_S5

12

DY

SPI_HOLD# 18 SPI_CLK_R 18,24 SPI_SI_R 18,24

EC2503

EC2503 SC10P50V2JN-4GP

SC10P50V2JN-4GP

12

C2502

C2502 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Single SPI shared flash connection (SPI Quad I/O mode)

X01 0408

C C

SPI_CS0#_R SPI_SO_R SPI_WP#

SKT25

1

8

2

7

DY

3 6 4

5

SKT-G6179HT0321-001-GP

62.10089.011

3D3V_S5

SPI_HOLD# SPI_CLK_R SPI_SI_R

72.25Q64.K01

72.25Q64.F01

72.25Q64.D01

QUAD/DUAL fast read DUAL fast readSource

O

Refer to "NCPE985x/ NPCE995x board design reference guide"

O

SSID = RBATT

B B

TP2502TPAD14-OP-GP TP2502TPAD14-OP-GP

RTC1

PWR

GND

NP1 NP2

BAT-060003HA002M213ZL-GP-U1

62.70014.001

2nd = 62.70001.061

3rd = 20.F2316.002

1 2 NP1 NP2

+RTC_VCC

1

R2502

1KR2J-1-GP

TP2501

TPAD14-OP-GP

12

RTC_PWR

D2501

1

2

BAS40-05-7-F-1-GP

75.00040.A7D

2nd = 83.00040.E81

X01 0408

Q2505

A A

5

4

12

R2504

R2504 10MR2J-L-GP

10MR2J-L-GP

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

D

RTC_AUX_S5+RTC_VCC 3D3V_AUX_S5

3

C2503

SC1U6D3V2KX-GP

1 2

RTC_DET# 20

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

3

2

Date: Sheet of

Flash/RTC

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

25 104

1

X00

5

4

3

2

1

SSID = Thermal

Fan controller1

FAN1

3 2

1

AFTP2803AFTP2803

5V_S0

12

C2605

C2611

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

5

4

1

FAN261

R2605

0R2J-2-GP

1 2

5V_S0

FAN_TACH124

SC4D7U6D3V3KX-GP

12

EC2602

SC10P50V2JN-L1-GP

DY

FAN_VCC1

C2604

12

DY

FAN_TACH1

FAN_VCC1

12

EC2601

DY

6

5

8 7

ALERT#

6 5

3D3V_S0 3D3V_S0

1

2

34

Q2601

Q2601 2N7002KDW-GP

2N7002KDW-GP

Q2602

G

D

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

1

23

RN2602

RN2602 SRN2K2J-1-GP

SRN2K2J-1-GP

4

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

12

DY

C2608

SCD1U10V2KX-5GP

12

C2610

DY

SCD1U10V2KX-5GP

THM_SML1_DATA

THM_SML1_CLK

THM_SML1_CLK THM_SML1_DATA

12

C2609

SCD1U10V2KX-5GP

Layout Note:

Signal Routing Guideline: Trace width = 15mil

PURE_HW_SHUTDOW N# 24,36,76

FAN1_DAC_124

Layout Note:

Need 10 mil trace width.

D D

3D3V_S0

SML1_DATA18,24,53,76

12

X01 DY C2601 0410

DY

12

X01 0408

84.03904.L06

2nd = 84.03904.P11

3rd = 84.03904.T11

C C

2.System Sensor, Put on palm rest

3D3V_S0

B B

3rd = 84.03904.T11

3

Q2603

PMBS3904-1-GP

2

R2603 18K7R2F-GPR2603 18K7R2F-GP

R2604 2KR2F-3-GPR2604 2KR2F-3-GP

12

C2606

DY

1 2

C2606 SC470P50V3JN-2GP

SC470P50V3JN-2GP

1

Layout Note:

Both DXN and DXP routing 10 mil trace width and 10 mil spacing.

C2602

C2601

SC10U6D3V3KX-GP

SCD1U10V2KX-5GP

NCT7718_DXP

12

NCT7718_DXN

Layout Note:

C2812 close U2801

ALERT#

T_CRIT#

C2607

C2607 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

12

T_CRIT#

R2601

R2601 0R2J-2-GP

0R2J-2-GP

SML1_CLK18,24,53,76

THM26

1

VDD

2

D+

3

DT_CRIT#4GND

NCT7718W-GP

74.07718.0B9

SCL SDA

ALERT#

1203 change to ALL_SYS_PWRGD

PCH_PWROK17,24,36

THERM_SYS_SHDN#

FAN261

FON#

1

FSM#

2

VIN

3

VOUT VSET4GND

APL5606AKI-TRG-GP

74.05606.A71

2nd = 74.03940.A71

3rd = 74.02113.0E1

X01 0410

R2606

0R2J-2-GP

1 2

21

D2601

DY

CH551H-30PT-GP

83.R5003.C8F

2nd = 83.R5003.H8H

3rd = 83.5R003.08F

SCD1U10V2KX-5GP

GND GND GND

FAN_TACH1_C

FAN_VCC1

12

C2603

DY

SC2200P50V2KX-2GP

8 7 6 5

AFTP2802AFTP2802 AFTP2801AFTP2801

ETY-CON3-8-GP

20.F1841.003

2nd = 20.F1295.003

X01 0408

FAN_TACH1_C

1

FAN_VCC1

1

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

Reserved

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

26 104

1

X00

SSID = AUDIO

5

4

3

2

1

12

C2702

C2702 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

LDO1_CAP

25

26

27

AVSS1

AVDD1

LDO1_CAP

LINE2_L

LINE2_R

LINE1_L

LINE1_R

CPVREF

MIC_CAP

MIC2_R/SLEEVE

MIC2_L/RING2

MONO_OUT

SENSE_B

SENSE_A

12

AUD_PC_BEEP

MIC2_VREFO 29

AUD_AGND

+5V_AVDD

AUD_AGND

JDREF

+3V_AVDD

24

23

22

21

20

19

18

17

16

15

14

13

MIC_CAP

JDREF

AUD_SENSE_A

12

C2710

C2711

SCD1U10V2KX-5GP

AUD_AGND

SC4D7U6D3V3KX-GP

LINE1_L 29

LINE1_R 29

C2713 SC10U6D3V3KX-GPC2713 SC10U6D3V3KX-GP

1 2

SLEEVE 29

RING2 29

R2707 20KR2F-L-GPR2707 20KR2F-L-GP

1 2

AUD_SENSECOMBO-GPI

1 2

R2709

39K2R2F-L-GP

Layout Note:

Place close to Pin 13

HDA_SPKR20

KBC_BEEP24

5V_S0+5V_AVDD

R2703

1 2

0R3J-0-U-GP

Layout Note:

Place close to Pin 26

AUD_AGND

Layout Note:

Width>40mil, to improve Headpohone Crosstalk noise

AUD_AGND

AUD_SENSE 29

RN2701

2 3 1

4

SRN0J-6-GP

AUD_AGND

HDA_SPKR_R

KBC_BEEP_R

EC2707 SC1KP25V2JX-GPEC2707 SC1KP25V2JX-GP

1 2

EC2706 SC1KP25V2JX-GPEC2706 SC1KP25V2JX-GP

1 2

EC2705 SC1KP25V2JX-GPEC2705 SC1KP25V2JX-GP

1 2

EC2704 SC1KP25V2JX-GPEC2704 SC1KP25V2JX-GP

1 2

EC2703 SC1KP25V2JX-GPEC2703 SC1KP25V2JX-GP

1 2

R2706

1 2

0R5J-6-GP

Layout Note:

Tied at point only under Codec or near the Codec

BAT54CPT-2-GP

2

AUD_PC_BEEP_C

3

1

D2701

75.00054.K7D

2nd = 75.00054.J7D

3rd = 75.00054.A7D

X01 0408

SCD1U10V2KX-5GP

C2720

1 2

12

R2717

R2717 1KR2J-1-GP

1KR2J-1-GP

AUD_PC_BEEP

SC1U10V2KX-1GP

SC10U6D3V3KX-GP

+3V_1D5V_AVDD

+5V_PVDD

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R-

AUD_SPK_R+

+5V_PVDD

1

SC4D7U6D3V3KX-GP

LINE1_VREFO_R29

LINE1_VREFO_L29

AUD_HP1_JACK_L29

AUD_HP1_JACK_R29

12

C2703

HDA27

CBP

37

CBP

38

AVSS2

LDO2_CAP

39

LDO2_CAP

40

AVDD2

41

PVDD1

42

SPK_L+

43

SPK_L-

44

SPK_R-

45

SPK_R+

46

PVDD2

EAPD#

47

PDB

48

SPDIFO/GPIO2

49

GND

ALC3223-CG-GP

+3V_AVDD

12

C2716

C2717

1 2

R2714 0R2J-2-GPR2714 0R2J-2-GP

1 2

R2716 0R2J-2-GPR2716 0R2J-2-GP

1 2

R2719 0R2J-2-GPR2719 0R2J-2-GP

1 2

R2720 0R2J-2-GPR2720 0R2J-2-GP

1 2

R2718 0R2J-2-GPR2718 0R2J-2-GP

HDA_CODEC_SYNC

HDA_CODEC_RST#

SC1U10V2KX-1GP

SC1U10V2KX-1GP C2704

C2704

1 2

+3V_AVDD

CPVEE

CBN

31

32

33

34

35

36

CBN

CPVEE

CPVDD

HP_OUT_L

HP_OUT_R

LINE1_VREFO_L

DVDD1GPIO0/DMIC_DATA2GPIO1/DMIC_CLK3DVSS4SDATA_OUT5BIT_CLK6LDO3_CAP7SDATA_IN8DVDD_IO9SYNC10RESET#11PCBEEP

12

SCD1U10V2KX-5GP

DMIC_DATA_R

DMIC_CLK_R

CODEC_SDOUT_R

CODEC_BITCLK_R

HDA_CODEC_SDIN0

LDO3_CAP

C2705

12

SC2D2U6D3V2MX-GP

AUD_VREF

28

29

30

VREF

MIC2_VREFO

LINE1_VREFO_R

C2718SC4D7U6D3V3KX-GP C2718SC4D7U6D3V3KX-GP

12

C2719SCD1U10V2KX-5GP C2719SCD1U10V2KX-5GP

D D

3D3V_S0 +3V_AVDD

25mA

R2701 0R2J-2-GPR2701 0R2J-2-GP

1 2

1.5A

5V_S0 +5V_PVDD

R2702

0R5J-5-GP

12

R2704

0R5J-5-GP

12

C C

3D3V_S0

1D5V_S0

R2705 0R2J-2-GPR2705 0R2J-2-GP

1 2

R2710 0R2J-2-GP

1 2

DY

Add R2710 DY(3D3V_S0)

Azalia I/F EMI

EC2708

12

DY

SCD1U10V2KX-5GP

B B

Layout Note:

Close pin41

HDA_CODEC_SDOUT HDA_CODEC_BITCLK

EC2709

12

DY

SCD1U10V2KX-5GP

AUD_AGND

C2706

12

SC4D7U6D3V3KX-GP

12

C2701

SC4D7U6D3V3KX-GP

Close pin36

C2707

C2708

12

SCD1U10V2KX-5GP

Layout Note:

Close pin46

+3V_1D5V_AVDD

12

C2715

C2715 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

AUD_AGND

C2709

12

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

Close pin40

AUD_AGND

AMP_MUTE#24

C2712

AUD_SPK_L+29

AUD_SPK_L-29

AUD_SPK_R-29

AUD_SPK_R+29

1 2

R2708 0R2J-2-GPR2708 0R2J-2-GP

1 2

remove D2702 R2710 R2711 Add R2708_0R(PDB pin)

TP2702TP2702

DMIC_CLK52

SC22P50V2JN-4GP

Close pin3

C2723

DY

1 2

DMIC_DATA52

HDA_CODEC_SDOUT19

HDA_CODEC_BITCLK19

HDA_SDIN019

HDA_CODEC_SYNC19

HDA_CODEC_RST#19,29

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Audio Codec ALC3221

Latitude300 Has well

1

27 104Friday, April 19, 2013

X00

5

D D

4

3

2

1

(Blanking)

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

28 104Tuesday, March 26, 2013

X00

5

4

3

2

1

SSID = AUDIO

Speaker

SPK1

AUD_SPK_R+_C

R29040R3J-0-U-GP R29040R3J-0-U-GP

D D

AUD_SPK_R+27

AUD_SPK_R-27 AUD_SPK_L+27 AUD_SPK_L-27

12

DY

EC2902

EC2903

EC2901

SC2K2P50V3KX-GP

EC2903

SC2K2P50V3KX-GP

DY

12

DY

EC2904

SC2K2P50V3KX-GP

12

R29030R3J-0-U-GP R29030R3J-0-U-GP

12

R29020R3J-0-U-GP R29020R3J-0-U-GP

12

R29010R3J-0-U-GP R29010R3J-0-U-GP

12

AUD_SPK_R-_C AUD_SPK_L+_C AUD_SPK_L-_C

2nd = 20.F1639.004

3rd = 20.F1804.004

AUD_SPK_L-_C AUD_SPK_L+_C AUD_SPK_R-_C

AUD_SPK_R+_C

5

1

2 3 4

6

ACES-CON4-7-GP-U

20.F0772.004

X01 0408

1 1 1 1

AFTP5801AFTP5801 AFTP5802AFTP5802 AFTP5803AFTP5803 AFTP5804AFTP5804

CONN Pin

Pin1

Pin2

Pin3

Pin4

Net name

SPK_R+

SPK_R-

SPK_L+

SPK_L_

C C

RN2901

1

MIC2_VREFO27

RING227

AUD_HP1_JACK_L27

LINE1_L27

LINE1_VREFO_L27

AUD_SENSE27

AUD_HP1_JACK_R27

LINE1_R27

LINE1_VREFO_R27

SLEEVE27

C2907

C2907 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

C2908

C2908 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1 2

LINE1-L_C

LINE1-L_R

4

2 3

SRN2K2J-3-GP

R2908 10R2F-L-GPR2908 10R2F-L-GP

1 2

R2922 1KR2J-1-GPR2922 1KR2J-1-GP

1 2

R2912 2K2R2J-2-GPR2912 2K2R2J-2-GP

1 2

R2910 10R2F-L-GPR2910 10R2F-L-GP

1 2

R2921 1KR2J-1-GPR2921 1KR2J-1-GP

1 2

R2913 2K2R2J-2-GPR2913 2K2R2J-2-GP

1 2

AUD_HP1_JACK_L1

AUD_HP1_JACK_R1

EC2908

SC100P50V2JN-3GPDYEC2908

SC100P50V2JN-3GP

R2920

10KR2J-3-GP

R2920

10KR2J-3-GP

12

DY

EC2907

SC100P50V2JN-3GPDYEC2907

SC100P50V2JN-3GP

12

SC100P50V2JN-3GPDYEC2906

SC100P50V2JN-3GP

R2919

10KR2J-3-GP

R2919

10KR2J-3-GP

12

DY

EC2906

DY

AUD_AGND

EC2905

SC100P50V2JN-3GPDYEC2905

SC100P50V2JN-3GP

12

DY

AUD_PORTA_L_R_B AUD_PORTA_R_R_B

AUD_SENSE

R29060R3J-0-U-GP R29060R3J-0-U-GP

12

R29070R3J-0-U-GP R29070R3J-0-U-GP

12

R29090R3J-0-U-GP R29090R3J-0-U-GP

12

R29110R3J-0-U-GP R29110R3J-0-U-GP

12

AFTP2906AFTP2906

1

AFTP2907AFTP2907

1

AFTP2908AFTP2908

1

AFTP2909AFTP2909

1

RING2_R

AUD_PORTA_L_R_B

AUD_PORTA_R_R_B

SLEEVE_R

Combo Jack

AUD_AGND

HPMIC1

3 1

5 6 2 4 7

AUDIO-JK363-GP

22.10270.P81

2nd = 22.10270.P91

X01 0408

B B

AUD_AGND AUD_AGND

1227 modify

AUD_PORTA_R_R_B

AUD_PORTA_L_R_B

RING2_R

AUD_SENSE

SLEEVE_R

AZ2025-01H-R7G-GP

ED2901

A A

DY

1 2

AUD_AGND AUD_AGND AUD_AGND AUD_AGNDAUD_AGND

5

DY

AZ2025-01H-R7G-GP

ED2902

1 2

DY

AZ2025-01H-R7G-GP

ED2903

1 2

DY

AZ2025-01H-R7G-GP

ED2904

ED2905

DY

1 2

4

12

R2915

R2915 470KR2J-2-GP

470KR2J-2-GP

AUD_AGND

U2901

S

G

5

D

6

DMN66D0LDW-7-GP

84.DMN66.03F

R2918

100KR2J-1-GP

D

34

G

MUTE_CTRLSLEEVE_CTRL

2

S

1

3

+3V_AVDD5V_PWR_2

12

DY

R2917 0R2J-2-GPR2917 0R2J-2-GP

1 2

12

C2901

C2901 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

DY

HDA_CODEC_RST# 19,27

SLEEVE 27

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Thermal NCT7718W/Fan Controllor P2793

Size Document Number Rev

Size Document Number Rev A3

A3

Latitude300 Haswell

Friday, April 19, 2013

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

29 104

1

X00

5

4

3

2

1

10/100 Need Only need C3021, C3022, C3023, C3024 in Pin3, 8, 22, 30

L3010

REGOUT

D D

L3010

1 2

IND-4 D7UH -242-G P

68.4R71E.10G

2nd = 68.4R790.201

X01 0408

12

C3012

12

SC4D7U6D3V3KX-GP

C3019

SCD1U16V2ZY-2GP

VDD10

12

C3022

C3021

SCD1U10V2KX-4GP

12

C3023

C3024

SCD1U10V2KX-4GP

C3024

SCD1U10V2KX-4GP

LAN CHIP

R3032

R3032 2K49R2F-GP

2K49R2F-GP

1 2

LAN_TXP_C_PCH_RXP4 LAN_TXN_C_PCH_RXN4

PCIE_PTX_LANRX_P4_C PCIE_PTX_LANRX_N4_C

C3014 SCD1U10V2KX-5GPC3014 SCD1U10V2KX-5GP

1 2 1 2

C3016 SCD1U10V2KX-5GPC3016 SCD1U10V2KX-5GP

PCIE_PRX_LANTX_P4 16 PCIE_PRX_LANTX_N4 16

PCIE_PTX_LANRX_P4_C 16 PCIE_PTX_LANRX_N4_C 16

CLK_PCIE_LAN_P4 18 CLK_PCIE_LAN_N4 18

X5R

LED0

TP3003 TPAD14-OP-GPTP3003 TPAD14-OP-GP

1

LED1

TP3002 TPAD14-OP-GPTP3002 TPAD14-OP-GP

RSET

LANXOUT

VDD10

3D3V_LAN_S5

29

30

31

GND

MDIP0 MDIN0 AVDD10 MDIP1 MDIN1 MDIP2 MDIN2 AVDD10

32

RSET

AVDD10

AVDD33

MDIP39MDIN310AVDD3311CLKREQB12HSIP13HSIN14REFCLK_P15REFCLK_N

LOM30

40 mils

C C

B B

3D3V_LAN_S5 VDDREG

R3006

1 2

0R3J-0-U-GP

3D3V_LAN_S5

1

23

DY

4

Q402_1

1

2

DY

Q3003

Q3003 PMBS3904-1-GP

PMBS3904-1-GP R3016

R3016

0R2J-2-GP

SCD1U10V2KX-5GP

0R3J-0-U-GP

RN3001

SRN10KJ-5-GP

3

12

R3021

R3021 10KR2J-3-GP

10KR2J-3-GP

R3022

R3022 20KR2F-L-GP

20KR2F-L-GP

1 2

PLT_RST#_LAN

84.02130.031

2nd = 84.00102.031

3rd = 84.03413.B31

PM_LAN_ENABLE_R

12

C3009

SCD1U16V2ZY-2GP

12

EC3001

DY

C3015

12

SC1U10V2KX-1GP

12

C3010

SC4D7U6D3V3KX-GP

12

DY

SCD1U16V2KX-3GP

251mA

DMP2130L-7-GP

S

12

2nd = 84.03904.P11

3rd = 84.03904.T11

PLT_RST#17,24,55,58,65,73,96

12

C3008

C3007

SCD1U10V2KX-4GP

84.03904.L06

X01 0408

3D3V_S5

SCD1U10V2KX-4GP

C3013

12

LAN_MDI0P31 LAN_MDI0N31

LAN_MDI1P31

LAN_MDI1N31 LAN_MDI2P31 LAN_MDI2N31

LAN_MDI0P LAN_MDI0N LAN_MDI1P LAN_MDI1N

12

EC3003

EC3002

DY

SCD1U16V2KX-3GP

X01 Q3004 change main source to 84.02130.031 0409

Q3004

D

G

DY

D

EC3004

SCD1U16V2KX-3GP

3D3V_LAN_S5

main: 84.00102.031 2nd: 84.03403.031

12

DY

C3017

LAN_MDI3P31 LAN_MDI3N31

SCD1U10V2KX-4GP

R3024 0R2J-2-GPR3024 0R2J-2-GP

12

R3025 0R2J-2-GPR3025 0R2J-2-GP

12

R3026 0R2J-2-GPR3026 0R2J-2-GP

12

R3027 0R2J-2-GPR3027 0R2J-2-GP

12

R3028 0R2J-2-GPR3028 0R2J-2-GP

12

R3029 0R2J-2-GPR3029 0R2J-2-GP

12

R3030 0R2J-2-GPR3030 0R2J-2-GP R3031 0R2J-2-GPR3031 0R2J-2-GP

X00 3/7 Change value from test report

LANXOUT

LANXIN

LAN_MDI0P_1 LAN_MDI0N_1 VDD10 LAN_MDI1P_1 LAN_MDI1N_1 LAN_MDI2P_1 LAN_MDI2N_1 VDD10

RTL8111GUS-CGT-GP

71.08111.X03

12 12

41

33

1 2 3 4 5 6 7 8

LAN_MDI3P_1 LAN_MDI3N_1

3D3V_LAN_S5 CLK_LAN_REQ4#_R PCIE_PTX_LANRX_P4_C PCIE_PTX_LANRX_N4_C CLK_PCIE_LAN_P4 CLK_PCIE_LAN_N4

C3011

1 2

SC15P50V2JN-2-GP

X3001

X3001 XTAL-25MHZ-155-GP

XTAL-25MHZ-155-GP

82.30020.D41

2 3

2nd = 82.30020.K51

3rd = 82.30020.G71

4th = 82.30020.G61

X01 0408

C3001

1 2

SC15P50V2JN-2-GP

1

LANXIN

LED2

TP3001 TPAD14-OP-GPTP3001 TPAD14-OP-GP

1

25

26

27

LED2

LED0

CKXTAL128CKXTAL2

LED1/GPO

LANWAKE#

ISOLATE#

16

REGOUT VDDREG

DVDD10

PERST#

HSON HSOP

REGOUT

24

VDDREG

23

VDD10

22

PCIE_WAKE#

21

ISOL ATE#

20

PLT_RST#_LAN

19

LAN_TXN_C_PCH_RXN4

18

LAN_TXP_C_PCH_RXP4

17

PCIE_WAKE#

CLK_PCIE_LAN_REQ4#18,20

C3018

1 2

SC1U10V2KX-1GP

C3025

R3033

1 2

10KR2J-3-GP

SC1U10V2KX-1GP

1 2

SCD1U10V2KX-4GP

PCIE_WAKE# 17,24

12

R3015

15KR2F-GP

X01 0405 change PCIE_WAKE# power to 3D3V_S5

3D3V_S5

3D3V_LAN_S5

12

R3003

10KR2J-3-GP

CLK_LAN_REQ#_EN

DY

Q3002

0R2J-2-GP

DY

312

R3005

12

X01 0408

84.03904.L06

2nd = 84.03904.P11

3rd = 84.03904.T11

PMBS3904-1-GP

3D3V_S0

12

R3014

R3014 1KR2J-1-GP

1KR2J-1-GP

12

R3004

R3004 10KR2J-3-GP

10KR2J-3-GP

DY

CLK_LAN_REQ4#_R

Q3001

12

5

Q3001

G

S

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

LAN_ENABLE_R_C

D

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

LOM

1

30 104Friday, April 19, 2013

X00

A A

PM_LAN_ENABLE24

R3023

100KR2J-1-GP

5

4

3

2

1

SSID = LOM

D D

C C

100/GIGA LAN TransFormer

XF3101

1CT:1CT

LOM_TCT

12

C5902

C5902 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

LAN_MDI3N30

LAN_MDI3P30

LAN_MDI2N30

LAN_MDI2P30

LAN_MDI1N30

LAN_MDI1P30

LAN_MDI0N30

LAN_MDI0P30

2

1

3

1CT:1CT

5

4

6

1CT:1CT

8

7

9

1CT:1CT

11

10

12 13

XFORM-24P-19-GP

68.IH601.301

2nd = 68.89246.301

X01 0411

23

MCT3

24

22

20

MCT2

21

19

17

MCT1

18

16

14

MCT0

15

MDO3-MDO3-MDO3-MDO3-MDO3-MDO3-MDO3-MDO3-MDO3-MDO3-

MDO3+MDO3+MDO3+MDO3+MDO3+MDO3+

MDO2-MDO2-MDO2-MDO2-MDO2-MDO2-MDO2-MDO2-MDO2-MDO2-

MDO2+MDO2+MDO2+MDO2+MDO2+MDO2+

MDO1-MDO1-MDO1-MDO1-MDO1-MDO1-

MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+MDO1+

MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-MDO0-

MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+MDO0+

B B

U3103

1

2

3 4

1

2

A A

3 4

5

6

5

DY

SRV05-4ATCT-GP

83.00005.FAE

U3104

6

5

DY

SRV05-4ATCT-GP

83.00005.FAE

LAN_MDI0NLAN_MDI0P

LAN_MDI1NLAN_MDI1P

LAN_MDI2NLAN_MDI2P

LAN_MDI3NLAN_MDI3P

4

RJ45 CONN

MDO0+

MDO0MDO1+ MDO2+ MDO2MDO1MDO3+ MDO3-

9 1

2 3 4 5 6 7 8

10

MDO1+ MDO1MDO0+ MDO0MDO2+ MDO2MDO3+ MDO3-

RJ45

CHASSIS#9 MDO0+

MDO0MDO1+ MDO2+ MDO2MDO1MDO3+ MDO3CHASSIS#10

RJ45

RJ45-8P-129-GP-U

22.10019.201

2nd = 22.10019.161

3rd = 22.10019.191

X01 0408

AFTP3101AFTP3101

1

AFTP3104AFTP3104

1

AFTP3107AFTP3107

1

AFTP3108AFTP3108

1

AFTP3102AFTP3102

1

AFTP3105AFTP3105

1

AFTP3109AFTP3109

1

AFTP3110AFTP3110

1

3

MCT0

MCT1

RN3101

SRN75J-1-GP

678

123

4 5

MCT

12

C3101

C3101 SC100P3KV8JN-2-GP

SC100P3KV8JN-2-GP

78.1013N.1AL

MCT2

MCT3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

XFOM&RJ45

31 104Friday, April 19, 2013

1

X00

5

4

3

2

1

0R3J-0-U-GP

1121 remove Switch(No support D3 cold)

USB_PP716

3D3V_S0 3D3V_CARD_S0

D D

R3215

R3215 0R3J-0-U-GP

0R3J-0-U-GP

1 2

12

C3201

C3202

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

USB_PN716

0R3J-0-U-GP R3213

R3213

1 2

DY

FILTER-4P-6-GP

1 2

TR3201

69.10103.041

2nd = 68.00201.141

1 2

DY

R3214

R3214 0R3J-0-U-GP

0R3J-0-U-GP

34

USB_DP7_R

USB_DN7_R

Pin name

SD_DAT1

SP1

SP2

SP3

SP4

SP5

SP6

SP7

SP8

SP9

SP10

Net name

SD_MMC_DAT1

SD_WP/MS_DATA1

SD_MMC_DATA0/MS_DATA5

MMC_DATA7/MS_DATA4

MMC_DATA6/MS_DATA0

SD_MMC_CLK/MS_DATA2

MMC_DATA5/MS_DATA6

SD_MMC Command/MS_DATA3

MMC_DATA4/MS_DATA7

SD_MMC_DATA3/MS_CLK

SD_MMC_DATA2/MS_BS

X01 stuff TR3201,DY R3213,R3214 0415

C C

CARD32

USB_DP7_R USB_DN7_R

SD_CD#33

SD_MMC_DAT133

MS_INS#33

B B

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP C3204

C3204

1 2

R3201

1 2

C3205

SC1U6D3V2KX-GP

C3203

SD_CD# SD_MMC_DAT1

CARD_AV18 CARD_RREF

6K2R2F-GP

MS_INS# SDREG 12MHZ_IN

12

DY

4 3

10 12

1 2

9 15 16 24

25

DP DM

SD_CD# SD_DAT1

AV18 RREF GPIO MS_INS# SDREG 48MHZ_IN

GND

RTS5176E-GRT-GP

3V3_IN 3V3_IN 3V3_IN

CARD_3V3

SP1 SP2 SP3 SP4 SP5 SP6 SP7 SP8 SP9

SP10

5 6 8

7

SD_WP/MS_DATA1

11

SD_MMC_DATA0/MS_DATA5

13

TP_MMC_DATA7/MS_DATA4

14 17

SP5

18

TP_MMC_DATA5/MS_DATA6

19

SD_MMC_CMM/MS_DATA3

20

TP_MMC_DATA4/MS_DATA7

21

SD_MMC_DATA3/MS_CLK

22

SD_MMC_DATA2/MS_BS

23

3D3V_CARD_S0

3D3V_CARD

R3202

TP3201TP3201

1

1 2

TP3202TP3202

1

TP3203TP3203

1

0R2J-2-GP

SD_WP/MS_DATA1 33 SD_MMC_DATA0/MS_DATA5 33

MMC_DATA6/MS_DATA0 33 SD_MMC_CLK/MS_DATA2 33

SD_MMC_CMM/MS_DATA3 33

SD_MMC_DATA3/MS_CLK 33 SD_MMC_DATA2/MS_BS 33

SCD1U10V2KX-5GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

A A

Title

Card Reader-RTS5176

Size Document Number Rev

A4

Date: Sheet of

5

4

3

2

Card Reader-RTS5176

Latitude300 Haswell

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

32 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = SDIO

SD/MS/MMC Card Connector

D D

C C

3D3V_CARD

12

X01 DY C3302 0410

12

C3301

SCD1U10V2KX-5GP

Layout Note:

Close to Card Reader CONN

12

C3311

C3310

C3311

DY

SCD1U10V2KX-5GP

SCD01U16V2KX-3GP

C3302

SC10U6D3V3KX-GPDYC3302

SC10U6D3V3KX-GP

12

C3312

DY

SC4D7U6D3V3KX-GP

SD_CD#32

R3301 0R2J-2-GPR3301 0R2J-2-GP

SD_MMC_DATA3/MS_CLK32

SD_MMC_CLK/MS_DATA232

SD_MMC_CMM/MS_DATA332

SD_MMC_DATA0/MS_DATA532

SD_MMC_DAT132

SD_MMC_DATA2/MS_BS32

SD_WP/MS_DATA132

1 2

3D3V_CARD

CARD1

11

SD_VDD/MMC_VDD

4

MS_VCC

20

SD_CD

3

SD_CD/DAT3/MMC_RSV

14

SD_CLK/MMC_CLK

6

SD_CMD/MMC_CMD

18

SD_DAT0/MMC_DAT

19

SD_DAT1

1

SD_DAT2

22

SD_WP/SW

NP1

NP2

SKT-CARDREADER26-GP-U

62.10051.C21

2nd = 62.10051.C61

MS_DATA0 MS_DATA1 MS_DATA2 MS_DATA3

MS_INS

MS_BS

MS_SCLK

SD_GND

MS_VSS MS_VSS

SD_VSS/MMC_VSS1 SD_VSS/MMC_VSS2

12 13 10 7

8 15 5

23

24

21

16 2

9 17

MMC_DATA6/MS_DATA0 32 SD_WP/MS_DATA1 32 SD_MMC_CLK/MS_DATA2 32 SD_MMC_CMM/MS_DATA3 32

MS_INS# 32 SD_MMC_DATA2/MS_BS 32 SD_MMC_DATA3/MS_CLK 32

X01 0408

For EMI Reserved

SD_WP/MS_DATA1

B B

A A

1203 modify 10P change to 4.7P

SD_MMC_DATA0/MS_DATA5

SD_MMC_CLK/MS_DATA2

SD_MMC_CMM/MS_DATA3

SD_MMC_DATA3/MS_CLK

SD_MMC_DATA2/MS_BS

SD_MMC_DAT1

MMC_DATA6/MS_DATA0

X01 EC3301,EC3302,EC3303,EC3304, EC3305,EC3306,EC3308 stuff 4.7pF 0415

5

EC3303

SC4D7P50V2BN-GP

EC3303

SC4D7P50V2BN-GP12EC3304

SC4D7P50V2BN-GP

EC3304

EC3308

SC4D7P50V2BN-GP

EC3308

SC4D7P50V2BN-GP

EC3301

SC4D7P50V2BN-GP

EC3301

SC4D7P50V2BN-GP

EC3302

SC4D7P50V2BN-GP

EC3302

SC4D7P50V2BN-GP

12

SC4D7P50V2BN-GP

12

Layout Note:

please close U3201

EC3305

SC4D7P50V2BN-GP

EC3305

SC4D7P50V2BN-GP12EC3306

SC4D7P50V2BN-GP

EC3306

EC3307

SC4D7P50V2BN-GP

EC3307

SC4D7P50V2BN-GP

12

4

SC4D7P50V2BN-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

SD/XD/MS/MMC Card CONN

Size Document Number Rev

A3

Date: Sheet of

3

2

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

33 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = USB

8 7 6 5

TR3403

TR3403 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

USB30_VCCA

USB3_PTX_CRX_P1_C USB3_PTX_CRX_N1_C

USB3_PRX_CTX_P1_CUSB3_PTX_CRX_P1_C

USB3_PRX_CTX_N1_C

USB30_VCCA

USB3_PRX_CTX_N1_C USB3_PRX_CTX_P1_C

USB3_PTX_CRX_N1_C USB3_PTX_CRX_P1_C

U3401

1

I/O_1

2 3

VDD

I/O_2

GND

I/O_3

I/O_6

I/O_44I/O_5

TVWMSOP06AD0-GP

83.00060.0AJ

2nd = 83.01065.0AJ

X01 0408

1 2

R3406

0R2J-2-GP

1

DY

2

1 2

R3407

0R2J-2-GP

X01 0408

USB_PP1_C

TR3402

TR3402 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

USB3_PTX_CRX_N1_C

USB_PN1_C

USB_PP1_C USB3_PRX_CTX_P1_C USB3_PRX_CTX_N1_C

USB3_PRX_CTX_P116

USB3_PRX_CTX_N116

1 2

DY

USB_PN116

D D

USB_PP116

C3401

USB3_PTX_CRX_P1_R

USB3_PTX_CRX_P116

C C

USB3_PTX_CRX_N116

1 2

SCD1U10V2KX-5GP

C3402

USB3_PTX_CRX_N1_R

1 2

SCD1U10V2KX-5GP

DY

R3402

0R3J-0-U-GP

TR3401

1 2

DY

R3403

0R3J-0-U-GP

1 2

R3404

0R2J-2-GP

1

DY

2

1 2

R3405

0R2J-2-GP

34

3 4

FILTER-4P-6-GP

69.10103.041

2nd = 68.00201.141

USB3.0 Port1

X00 0320

USB1

1

VBUS

5

STDA_SSRX-

6

STDA_SSRX+

8

STDA_SSTX-

9

STDA_SSTX+

12

CHASSIS#12

13

CHASSIS#13

SKT-USB13-18-GP-U

22.10339.331

2nd = 22.10341.D61

3rd = 22.10339.S31

4th = 22.10339.S21

X01 0408

USB_PN1_C USB30_VCCA USB_PP1_C

GND_DRAIN

GND GND GND

AFTP6218AFTP6218

AFTP6204AFTP6204

1

AFTP6205AFTP6205

1

AFTP6209AFTP6209

1

USB_PN1_C

2

D-

USB_PP1_C

3

D+

7

10 11 4

1

USB3.0 Port2

R3408

1 2

DY

USB_PN016

B B

USB_PP016

C3404

USB3_PTX_CRX_P016

1 2

SCD1U10V2KX-5GP

DY

0R3J-0-U-GP

TR3404

1 2

FILTER-4P-6-GP

R3409

1 2

DY

0R3J-0-U-GP

1 2

R3410

0R2J-2-GP

1

DY

USB_PN0_C

69.10103.041

34

2nd = 68.00201.141

X01 0408

USB_PP0_C

USB3_PTX_CRX_P0_CUSB3_PTX_CRX_P0_R

TR3405

TR3405 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

USB30_VCCB USB_PN0_C USB_PP0_C

U3402

USB_PN0_C

USB_PP0_C

USB3_PRX_CTX_P0_C USB3_PRX_CTX_N0_C

1

I/O_1

2 3

VDD

I/O_2

GND

I/O_3

I/O_6

I/O_44I/O_5

TVWMSOP06AD0-GP

83.00060.0AJ

2nd = 83.01065.0AJ

X01 0408

USB3_PRX_CTX_P016

1 2

R3412

0R2J-2-GP

1

DY

USB30_VCCB

8 7

USB3_PTX_CRX_P0_C

6

USB3_PTX_CRX_N0_C

5

USB3_PRX_CTX_P0_C

TR3406

TR3406 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

USB30_VCCB

X00 0320

USB3_PRX_CTX_N0_C USB3_PRX_CTX_P0_C

USB3_PTX_CRX_N0_C USB3_PTX_CRX_P0_C

USB2

1

VBUS

5

STDA_SSRX-

6

STDA_SSRX+

8

STDA_SSTX-

9

STDA_SSTX+

12

CHASSIS#12

13

CHASSIS#13

SKT-USB13-18-GP-U

22.10339.331

2nd = 22.10341.D61

3rd = 22.10339.S31

4th = 22.10339.S21

X01 0408

GND_DRAIN

GND GND GND

AFTP6217AFTP6217

USB_PN0_C

2

D-

USB_PP0_C

3

D+

7

10 11 4

1

AFTP6210AFTP6210

1

AFTP6211AFTP6211

1

AFTP6212AFTP6212

1

3 4

A A

USB3_PTX_CRX_N016

1 2

5

C3403

USB3_PTX_CRX_N0_R

SCD1U10V2KX-5GP

2

1 2

R3411

0R2J-2-GP

USB3_PTX_CRX_N0_C

4

USB3_PRX_CTX_N016

2

1 2

R3401

0R2J-2-GP

3

3 4

USB3_PRX_CTX_N0_C

Title

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

USB 3.0

34 104Friday, April 19, 2013

1

X00

5

4

3

2

USB30_VCCA

1

2A

5V_S5

D D

12

C3502

SC1U10V3KX-3GP

C C

C3502

USB_PWR_EN#24

U3502

1

GND

2

IN

3

EN1# EN2#4FLG2

AP2182SG-13-GP

74.02182.071

2nd = 74.00546.A7D

3rd = 74.02062.079

FLG1 OUT1 OUT2

X01 0408

8 7 6 5

USB_OC#0_1 16,18

USB30_VCCB USB30_VCCA

77.52271.09L

2nd = 77.52271.16L

12

TC3503

12

SE220U6D3VM-30-GP

C3506

SC1U10V3KX-3GP

12

C3503

SCD1U10V2KX-4GP

USB3.0 Port1

X01 0408

USB30_VCCB

2A

C3505

SCD1U10V2KX-4GP

C3505

C3504

SC1U10V3KX-3GP

C3504

SC1U10V3KX-3GP

12

SCD1U10V2KX-4GP

12

TC3502

12

SC100U6D3V6MX-GP

78.10710.52L

USB3.0 Port2

Right USB Power x1

5V_S5

at least 80 mil

12

C3501

B B

C3501

SCD1U10V2KX-5GP

USB_PWR_EN#24 USB_OC#2_3 16

Support 2A

U3501

1

GND

2

IN#2

3

IN#3

4

EN#

AP2301M8G-13-GP

74.02301.079

2nd = 74.06288.A79

NC#8 OUT#7 OUT#6

FLG#

at least 40 mil

8 7 6 5

+5V_USB1

12

DY

2A

C3507

R3501

100KR2J-1-GP

C3507

12

SCD1U10V2KX-5GP

C3508

12

TC3501

12

SC100U6D3V6MX-GP

78.10710.52L

DY

SC1U10V3KX-3GP

X01 0618

X01 0408

X01 DY TC3501(Reserved in IO Board) 0409

Wistron Corporation

A A

Title

USB Power SW

Size Document Number Rev

Date: Sheet of

5

4

3

Date: Sheet of

2

USB Power SW

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X00

35 104Friday, April 19, 2013

1

5

SSID = Reset.Suspend

4

3

2

1

Power Good

D D

3D3V_S0

ROSA Run Power

12

R3601

R3601 1KR2J-1-GP

1KR2J-1-GP

1D35V_VTT_PWRGD49

5V_S5

1D05V_VTT_PWRGD7,48

5V_S5

U3601

1

VIN1#1

2

VIN1#2

3

ON1

4

VBIAS

5

ON2

6

VIN2#6

7

VIN2#7

TPS22966DPUR-GP

74.22966.093

2nd = 74.03523.A73

3D3V_AUX_S5

1 2

DY

R3607

100KR2J-1-GP

C C

PS_S3CNTRL

DG

6

1

S

DY

G

S

5

Q3601

Q3601 2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

2

3 4

D

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

PM_SLP_S3#17,24,48,49,51

PCH_PWROK17,24,26

B B

R3609 0R2J-2-GPR3609 0R2J-2-GP

12

3D3V_S5

R3610 0R2J-2-GPR3610 0R2J-2-GP

R3611 0R2J-2-GPR3611 0R2J-2-GP

GND VOUT1#14 VOUT1#13

CT1

GND

CT2 VOUT2#9 VOUT2#8

X01 0408

15 14 13 12 11 10 9 8

12

3V5V_CT13V5V_S0_ON

3V5V_CT2

ALL_SYS_PWRGD 24

5V_S0

12

3D3V_S0

C3605

SC10U6D3V5KX-1GP

C3605

C3601

SC470P50V2KX-3GP

C3601

SC470P50V2KX-3GP

C3602

12

C3602

12

SC10U6D3V5KX-1GP

SC470P50V2KX-3GP

12

5V_S0

5V_S0 Comsumption

C3603

SC10U6D3V5KX-1GP

C3603

SC10U6D3V5KX-1GP

Peak current 6A

3D3V_S0

3D3V_S0 Comsumption Peak current 2.5A

D3602

D3602 BAS16-6-GP

BAS16-6-GP

2

3

3V_5V_EN45

12

R3602

DY

200KR2F-L-GP

A A

5

4

200KR2F-L-GP

1

1 2

R3603

1KR2J-1-GP

83.00016.K11

2nd = 83.00016.F11

3

PURE_HW_SHUTDOWN# 24,26,76

X01 0408

S5_ENABLE 24

Title

Size Document Number Rev

Size Document Number Rev A4

A4

Friday, April 19, 2013

Date: Sheet of

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Power Plane Enable

Latitude300 Haswell

36 104

1

X00

5

4

3

2

1

D D

Layout Note:

Place Close SO-DIMM

DDR_VREF_S3 1D35V_S3

SA_DIMM_VREFDQ

SODIMM1

C C

M_VREF_CA_DIMMA

0R2J-2-GP

0R2J-2-GP R3709

R3709

1 2

DY

12

0R2J-2-GP

0R2J-2-GP R3705

R3705

12

+V_SM_VREF_CNT5

R3706

R3706 1K8R2F-GP

1K8R2F-GP

R3703

R3703 1K8R2F-GP

1K8R2F-GP

2R2F-GP

2R2F-GP R3708

R3708

1 2

12

C3701

C3701 SCD022U16V2JX-GP

SCD022U16V2JX-GP

+V_VREF_PATH3

12

R3707

R3707 24D9R2F-L-GP

24D9R2F-L-GP

SB_DIMM_VREFDQ

SODIMM2

B B

A A

5

M_VREF_CA_DIMMB

4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

S3 Reduction Circuit

Size Document Number Rev

Size Document Number Rev A4

A4

Date: Sheet of

3

Date: Sheet of

2

Latitude300 Haswell

Friday, April 19, 2013

S3 Reduction Circuit

37 104

1

X00

5

4

3

2

1

3D3V_S5 3D3V_S5_PCH

D D

3D3V_S5

C3801

12

SC1U10V2KX-1GP

DS3

C C

PM_SLP_SUS#17,24

DS3

1 2

R3802

R3802 0R2J-2-GP

0R2J-2-GP

DS3_PWRCTL

0R3J-0-U-GP

0R3J-0-U-GP R3801

R3801

1 2

Non DS3

U3801

DS3

1 2 3

DS3

GND

OUT#8

IN#2

OUT#7

IN#3

OUT#6

EN/EN#4OCB

SY6288CCAC-GP

74.06288.079

2nd = 74.02001.079

3rd = 74.02311.079

3D3V_S5_PCH

8 7 6 5

12

DS3

C3802

SC1U10V2KX-1GP

X01 0408

1210 change power switch (RdsON:100m ohm)

B B

Wistron Corporation

A A

Title

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DSW

38 104Friday, April 19, 2013

1

X00

5

4

3

2

1

SSID = CPU

D D

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (POWER1)

Latitude300 Haswell

39 104Tuesday, March 26, 2013

1

X00

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Latitude300 Haswell

40 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

41 104Tuesday, March 26, 2013

X00

5

SSID = PWR.Support

4

3

5V_S5

2

1

X01 0408

84.03904.L06

2nd = 84.03904.P11

PR4202

15KR2F-GP

D D

100KR2J-1-GP

PR4217

PS_ID_R

Layout Note:

PSID Layout width > 25mil

JGND

R4202

0R0J-GP

1 2

L4202

L4202 BLM41PG600-GP

+DC_IN_C

12

JGND

BLM41PG600-GP

1 2

DY

1

EC4201

SC10U25V5KX-GP

JGND

AFTP3803AFTP3803

L4201 BLM41PG600-GP

12

EC4202

SC1KP50V2KX-1GP

DCIN1

NP2

C C

NP1

ACES-CON7-3-GP-U1

7 6 5 4 3 2

1

20.F1643.007

2nd = 20.F1718.007

3rd = 20.F1783.007

4th = 20.F1763.007

X01 0408

B B

AC_IN_KBC#24

60ohm@100MHz DCR=0.02 ohm Max current = 6000mA

1 2

DY

R4203

0R0J-GP

1 2

12

AC_IN#_G

PR4213

PR4213 100KR2J-1-GP

100KR2J-1-GP

12

PR4212

PR4212 100KR2J-1-GP

100KR2J-1-GP

PR4217

1 2

0R3J-0-U-GP

PQ4206

3 4

2

1

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

PS_ID_R2

1

2

PD4204

DY

PESD24VS2UT-GP

3

12

PR4214

3K3R6J-GP

PQ3809_D

5

6

1 2

PR4210

1KR2J-1-GP

PR4209

1 2

PQ3802_1

1 2

FDV301N-NL-GP

D

B

PDTC124EU-1-GP

84.00124.H1K

2nd = 84.05124.011

X01 0408 X01 0408

2

1

3

G

PQ4201

PR4206

1 2

DY

33R2J-2-GP

KA

PD4201

PD4201 1SMB22AT3G-GP-U1

1SMB22AT3G-GP-U1

2nd = 83.P6SBM.AAG

X01 0408

PQ4204

R1

R2

2nd = 84.03904.P11

3rd = 84.03904.T11

PMBS3904-1-GP

PMBS3904-1-GP PQ4202

PQ4202

PSID_DISABLE#_R_C

SD

84.00301.A31

2nd = 84.3K329.031

3rd = 84.27002.I31

X01 0408

83.22R03.03G

AD_OFF_L

C

E

DT MODE

PWR_CHG_AD_OFF24

PWR_CHG_AD_OFF_R

12

PR4203

PR4203 10KR2J-3-GP

10KR2J-3-GP

PS_ID

12

PC4202

PC4202 SCD1U25V3KX-GP

SCD1U25V3KX-GP

PQ4205

R2

B

R1

PDTA124EU-1-GP

84.00124.K1K

2nd = 84.05124.A11

E

C

PR4205

1 2

33R2J-2-GP

AD_OFF_R

3D3V_S5

DY

47KR3J-L-GP

PR4211

PR4211 10KR2J-3-GP

10KR2J-3-GP

1 2

3D3V_S5

1

2

PD4203

PD4203 BAV99-12-GP

BAV99-12-GP

75.00099.E7D

3

2nd = 75.03101.07D

3rd = 75.00099.B7D

X01 0411

84.07121.037

2nd = 84.07403.037

+DC_IN AD+

12

PC4201

PR4207

SC1U25V5KX-1GP

12

PR4208

X01 0408

PU4201

S

1

S

2

S

3

GD

4 5

SI7121DN-T1-GE3-GP

240KR3-GP

SI7121DN-T1-GE3-GP

Id=-9.6A Qg=-25nC Rdson=18~30mohm

12

PC4208

PQ3808D

SC1U25V3KX-1-GP

3D3V_S5

D

8

D

7

D

6

12

PQ4208

D

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

PC4205

G

S

12

PR4204

PR4204 2K2R2J-2-GP

2K2R2J-2-GP

12

SCD01U50V2KX-1GP

PC4203

PQ3808G

12

SCD01U50V2KX-1GP

1 2

1KR2J-1-GP

12

PC4209

PSID_EC 24

PC4204

SCD01U50V2KX-1GP

PR4215

SCD01U50V2KX-1GP

12

PC4206

SC10U25V5KX-GP

AFTP3801AFTP3801 AFTP3802AFTP3802

A A

5

+DC_IN_C

1

PS_ID_R

1

PR4216

12

DY

100KR2J-1-GP

H_PROCHOT#4,24,44,46

4

3

PQ4203

1

6

2

5

3 4

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

2

PQ4203_5

PC4210

12

PR4218

PR4218 100KR2J-1-GP

100KR2J-1-GP

1 2

SCD47U6D3V2KX-GP

Title

Size Document Number Rev

A3

Date: Sheet of

BAT_IN#

BAT_IN# 24,43,44

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

DCIN

Latitude300 Haswell

1

X00

42 104Friday, April 19, 2013

X00

5

4

3

2

1

SSID = PWR.Support

BT+

D D

12

PD4302

DY

12

PD4302 SMF18AT1G-GP

SMF18AT1G-GP

A K

4 5 3 2 1

EC4305

DY

1 2

RN4301

SRN33J-4-GP

SC10P50V2JN-4GP

6 7 8

AFTP3901AFTP3901

BAT_IN# 24,42,44

Batt Connecter

PBAT_SMBCLK1 PBAT_SMBDAT1 PBAT_PRES1#

BAT_ALERT

1

BATT1

10

1

2 3 4 5 6 7 8 9

11

ALP-CON9-6-GP-U

20.81925.009

AFTP3906AFTP3906

1

2nd = 20.81928.009

EC4303

EC4304

SCD1U50V3KX-GP

C C

EC4304

BAT_SCL24,44 BAT_SDA24,44 BAT_IN#24,42,44

EC4303 SC2200P50V2KX-2GP

SC2200P50V2KX-2GP

EC4301

EC4302

SC10P50V2JN-4GP

DY

SC10P50V2JN-4GP

12

PBAT_PRES1# PBAT_SMBDAT1 PBAT_SMBCLK1

BT+

1 1 1 1

AFTP3902AFTP3902 AFTP3903AFTP3903 AFTP3904AFTP3904 AFTP3905AFTP3905

X01 0408

Placement: Close to Batt Connector

BAT_IN#

B B

3

D4302

D4302 DA3X101F0L-1-GP

DA3X101F0L-1-GP

1

2

75.03101.07D

A A

75.03101.07D

2nd = 75.00099.B7D

3rd = 75.00099.E7D

75.03101.07D

2nd = 75.00099.B7D

3rd = 75.00099.E7D

BAT_SDA

3

D4303

D4303 DA3X101F0L-1-GP

DA3X101F0L-1-GP

1

2

X01 0408 X01 0408

5

4

BAT_SCL

3

D4301

D4301 DA3X101F0L-1-GP

DA3X101F0L-1-GP

1

2

75.03101.07D

2nd = 75.00099.B7D

3rd = 75.00099.E7D

X01 0408

3

3D3V_AUX_KBC

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

BATT CONN

Size Document Number Rev

A4

Date: Sheet of

2

Latitude300 Haswell

BATT CONN

43 104Friday, April 19, 2013

1

X00

5

SSID = Charger

D D

AD+

PD4405 1PS76 SB40-GP-U

KA

83.1PS76.01F

2nd = 83.R0304.D8F

X01 0408

AD+

12

VacDET=2.4V

PR4444

Acok setting=2.4*((PR4444+PR4411)/PR4411)

309KR2F-GP

Setting=18.178v

PC4402

SCD01U50V2KX-1GP

BQ24717_AGND

3D3V_AUX_S53D3V_S5

12

DY

ACAV_IN H=ACIN L=UNAC

PR4452

100KR2J-1-GP

AC_IN#24

PQ4412_2

BAT_IN# 24,42,43

H_PROCHOT# 4,24,42,46

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

5

6

PR4450

10KR2F-2-GP

3D3V_S5

12

PR4411

PR4411 47KR2F-GP

47KR2F-GP

12

PR4414

PR4414 3K3R2J-3-GP

3K3R2J-3-GP

DY

ACAV_IN

3D3V_AUX_S5

12

PR4412

2N7002KDW-GP

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

PWR_CHG_ACOK: PWR_CHG_REGN=6V V+=6*(PR4404/(PR4410+PR4404))=3.27V

BATTERY MON

BOOST_MON24

PQ4405_5

PC4404

SC1U25V3KX-1-GPDYPC4404

SC1U25V3KX-1-GP

12

X01 remove the PROCHOT#

DY

HW control circuit 0412

PQ4405_6

PR4405

PR4405 100KR2F-L1-GP

100KR2F-L1-GP

DY

12

1 2

DY

12

DY

3D3V_S5

DY

PR4463

PR4463 0R2J-2-GP

0R2J-2-GP

1 2

BQ24717_AGND

1 2

PC4409

SC1U25V3KX-1-G P

100KR2F-L1-GP

12

PR4431

DY

12

PC4414

DY

SCD47U6D3V2 KX-1-GP

PQ4406_G

G

PR4455

PR4455 0R2J-2-GP

0R2J-2-GP

DY

1 2

PQ4405_3

PQ4405_2

DY

3K3R2J-3-GP

BAT_SDA24,43

BAT_SCL24,43

12

DY

PQ4405

3 4

2

1

2N7002KDW-GP

PR4432

PR4429

PR4429 100KR2J-1-GP

100KR2J-1-GP

DY

KBC FOR DT MODE CHECK EE PULL HIGH

3D3V_AUX_S5

150KR2F-L-GP

PWR_CHG_ REGN

PR4434

C C

B B

PR4434

12

PR4419

100KR2F-L1-GPDYPR4419

100KR2F-L1-GP

DY

12

PR4415

33KR2F-GPDYPR4415

33KR2F-GP

DY

DIS_DTM: H= cell is plus to GND. (reset charger ic) L=nornal

12

PR4408

PR4408 100KR2F-L1-GP

100KR2F-L1-GP

DIS_DTM24

CHECK EE

PQ4406

PQ4406 2N7002K-1-GP

2N7002K-1-GP

84.2N702.031

AD+

DY

12

B

DY

5

PQ4406_D

12

PR4416

100KR2J-1-GP

84.T3906.A11

2nd = 84.03906.F11

3rd = 84.03906.P11

PQ4408_E

X01 0408

E

MMBT3906-4-GP

MMBT3906-4-GP PQ4408

PQ4408

C

PQ4408_C

PR4462

PR4462 0R2J-2-GP

0R2J-2-GP

1 2

DY

12

PR4451

PR4451 680KR2J-GP

680KR2J-GP

84.2N702.031

D S

PWR_CHG_ ACOK

H_PROCHOT#4,24,42,46

X01 Remove 15V_S0, dummy the related parts 0409

15V_S5

PR4459

0R2J-2-GP

DY

PR4458

A A

PR4458

0R2J-2-GP

DY

DCBATOUT

CHECK EE follow custormer circuits.

1MR2J-1-GP

1 2

PD4403

1N4148WS-7-F-GP

K A

DY

PD4403_K

83.04148.D1H

2nd = 83.00355.F1F

X01 0408

1 2

DY

1 2

PR4456

PR4456 0R2J-2-GP

0R2J-2-GP

PR4433

PD4403_A

DY

4

PWR_CHG_ 1

PG4401 GAP-CLOSE-PW R-3-GPPG4401 G AP-CLOSE-PWR-3 -GP

12

PG4408 GAP-CLOSE-PW R-3-GPPG4408 G AP-CLOSE-PWR-3 -GP

12

PR4430 0R2 J-2-GPPR4430 0R2J- 2-GP

12

PR4413

AD_IA24

0R2J-2-GP

5

CHARGER_CELL_PIN

6

1 2

PR4445

0R2J-2-GP

4

0R2J-2-GP

PWR_CHG_ REGN

100KR2F-L1-GP

PQ4412

3 4

2

1

84.2N702.A3F

PC4432

SC1U25V3KX-1-G P

BQ24717_AGND

+SDC_IN

12

PR4439

PR4439 4K02R2F-GP

4K02R2F-GP

PWR_CHG_ CMSRC

PWR_CHG_ ACDET

CHARGER_CELL_PIN

12

PR4410

PR4410 100KR2F-L1-GP

100KR2F-L1-GP

PWR_CHG_ ACOK

12

PR4404

PR4404 120KR2J-GP

120KR2J-GP

BOOST_MON_1

PC4417

12

PR4403 10R 5J-GPPR4403 10R5J-G P

12

DY

PWR_SDA

PWR_SCL

PWR_CHG_ ACOK

BQ24715_IOUT_1

12

PR4424

1 2

SC1U25V3KX-1-GP

20KR2F-L-GP

1 2

PWR_CHG_ACN

PWR_CHG_ACP

10

SC100P50V2JN-3GP

12

PU4401_6

1

2

3

4

6

8

9

5

7

PU4404

BQ24717RGRR -GP

ACN

ACP

CMSRC

ACDRV

ACDET

CELL

SDA

SCL

ACOK

IOUT

PC4423

BQ24717_AGND

Close PR4443

DCBATOUT

GAP-CLOSE-PWR-3-GP

PG4404

1 2

DCBATOUT_R

12

PR4446

PR4446 0R2J-2-GP

0R2J-2-GP

1 2

PR4407

6D8R2F-GP

1 2

PU4401_5

PC4415

SCD1U25V2KX-GP

5

6

PU4401

-

+

-

+

INA199A1-G P

123 4

PC4408

SC1U25V3KX-1-GP

PC4408

SC1U25V3KX-1-GP

12

PR4418

PR4418 3KR5J-GP

3KR5J-GP

PWR_CHG_ VCC

VCC

BATDRV#

REGN

BTST

HIDRV

PHASE

LODRV

GND

SRP

SRN

GND

21

PR4406 0R2 J-2-GPPR4406 0R2J- 2-GP

20

PWR_CHG_ BATDRV

11

PWR_CHG_ REGN

16

PWR_CHG_ BTST

17

PWR_CHG_ HIDRV

18

PWR_CHG_ PHASE

19

PWR_CHG_ LODRV

15

14

PWR_CHG_ SRP

13

PWR_CHG_ SRN

12

1 2

PC4410

12

BQ24717_AGND

SC1U25V3KX-1-GP

PR4438 0R2 J-2-GPPR4438 0R2J- 2-GP

PR4417 0R2 J-2-GPPR4417 0R2J- 2-GP

BQ24717_AGND

+VCHGR+VCHGR_R

GAP-CLOSE-PWR-3-GP

PG4405

1 2

CHECK PM BATTERY TYPE CHECK CELL for DT mode

12

PR4448

PR4448 10R2F-L-GP

10R2F-L-GP

PU4401_4

DCBATOUT

DIS_DTM_HW: 5V_S5 V+=5*(PR4440/(PR4460+PR4440))=2.73V Setting=2.73*((PR4442+PR4447)/PE4447)=9V

3

X01 PU4405 change main source to 84.07121.037,

AD+

2nd source to 84.07403.037 0409

PU4405

S

D

S

D

1

8

S

D

S

D

2

7

SGDD

3

6

SI7121DN-T1-G E3-GP

12

DC_IN_D

12

PC4433

PC4433 SCD1U25V2KX-2- GP

SCD1U25V2KX-2- GP

X01 3/07 Power modify

PU4406 and PU4407: main source: 84.03660.037

BATDRV

PWR_CHG_ REGN

PR4409

4K02R2F-GP

PR4409

4K02R2F-GP

12

PR4425

PWR_CHG_ BTST1

1 2

0R3J-0-U-GP

1 2

PWR_CHG_CMPIN: V-=3.3*(PR4402/(PR4428+PR4402))=2.2378V

5V_S5 5V_S5PWR_CHG_ REGN

3

45

84.07121.037

2nd = 84.07403.037

PQ4407

3 4

ACAV_IN

2

1

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

PC4422

1 2

SC1U25V3KX-1-G P

PD4401

PD4401 1PS76SB40-GP-U

1PS76SB40-GP-U

83.1PS76.01F

2nd = 83.R0304.D8F

K A

X01 0408

PC4421

1 2

SCD047U25V3KX- 3-GP

X01 PR4402 change

12

to 316Kohm 0408

PR4422

PR4422 1M8R2J-L-GP

1M8R2J-L-GP

1 2

316KR2F-GP

X01 3/1 Power modify

12

PR4460

PR4460 100KR2F-L1-GP

100KR2F-L1-GP

PR4441

DY

100KR2F-L1-GP

PU4402_1IN+

12

PR4440

PR4440 120KR2J-GP

120KR2J-GP

AD+_G_2

5

6

FDMS3600-02-RJK0215-COLAY-GP

1

9

8

1st = 84.03660.037

2nd = 84.00031.B37

X01 0408

3D3V_AUX_S5

PR4402

BQ24715_IOUT_1

5

2IN+

PU4402

LM393PWR-GP

4

BT+

412KR2F-GP

12

PR4442

12

PR4447

PR4447 180KR2F-GP

180KR2F-GP

12

PR4435

100KR2J-1-GP

PR4423

AD+_G_1

1 2

10KR2F-2-GP

1 2

BQ24717_AGND

PU4406

PR4428

12

PWR_CHG_CMPIN

6

2IN-

150KR2F-L-GP

5V_S5

8

7

2OUT

2 3 4 10

7 6 5

PWR_CHG_ SRP_R

PWR_CHG_ SRN_R

PWR_CHG_ CMPOUT

VCC

1OUT11IN-21IN+3GND

PWR_CHG_ REGN

DIS_DTM_CELL

DY

FDMS3600-02-RJK0215-COLAY-GP

Follow custormer circuits

12

PC4426

12

PR4449

100KR2F-L1-GP

X01 3/4 Power modify

PU4402_1IN-

+SDC_IN

PR4426

1 2

D01R3721F-GP-U

12

PG4406

PG4406 GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

PR4421 0R2 J-2-GP

12

DY

PC4428

PWR_CHG_ACP

SCD1U25V2KX-GP

PC4418

1

9

8

1st = 84.03660.037

2nd = 84.00031.B37

X01 0408

12

PC4419

SC100P50V2JN-3GP

12

SCD1U25V2KX-GP

PU4407

2 3 4 10

7

DY

6 5

PL4401

PL4401 COIL-2D2UH-11-GP

COIL-2D2UH-11-GP

1 2

PR4427

2D2R5F-2-GPDYPR4427

2D2R5F-2-GP

68.2R210.20C

2nd = 68.2R21B.10I

12

X01 0408

DY

DCBATOUT_SNUB

12

DY

PC4406

SC330P50V3KX-GP

SCD1U25V2KX-GP

PWR_CHG_ CMPOUT PQ4 413_5

SCD01U25V2KX-3GP

X01 change PR4453 to 10Kohm for rising PQ4413 gate voltage level 0409

12

CHECK PM ADAPTER TYPE

PR4453

PR4453 10KR2F-2-GP

10KR2F-2-GP

And setting adapter type

X01 3/1 Power modify

(AD_IA_HW)

2

CHARGER_SRC

12

PG4402

PG4402 GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

SCD1U25V2KX-GP

DY

1 2

PC4416

PWR_CHG_ACN

BQ24717_AGND

PC4425

SC10U25V5KX-GP

PC4425

SC10U25V5KX-GP

12

DCBATOUT

PC4403

SC10U25V5KX-GP

PC4403

SC10U25V5KX-GP

12

1 2

PR4443

D01R2512F-3-GP

GAP-CLOSE-PWR-3-GP

PG4407

1 2

PC4429

1 2

12

SCD1U25V2KX-GP

PC4401

BQ24717_AGND BQ24717_AGND

5V_S5

12

PR4437

PR4437 100KR2J-1-GP

100KR2J-1-GP

PR4436

1 2

20KR2F-L-GP

PC4405

SCD01U50V3J X-1GP

CHARGER_CELL_PIN

X01 change PR4401 to

357Kohm 0408

PR4401

PQ4411_D1PWR _CHG_CMPIN

1 2

357KR2F-GP

AD_IA_HW224

90W

65W

AD_IA_HW AD_IA_HW_2

L

HL

ADAPTER TYPE

45W

2

CHARGER_SRC

PC4411

SC10U25V5KX-GP

PC4411

SC10U25V5KX-GP

12

PG4403

1 2

12

PC4412

PC4412 SCD1U25V2KX-GP

SCD1U25V2KX-GP

12

3 4

2

1

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

GAP-CLOSE-PWR-3-GP

PC4407

SC10U25V5KX-GP

PC4407

SC10U25V5KX-GP

PC4427

SC10U25V5KX-GP

PC4427

SC10U25V5KX-GP

PC4413

12

PC4430

SC10U25V5KX-GP

PC4430

SC10U25V5KX-GP

+VCHGR

PC4420

DY

SC1U25V3KX-1-G P

1 2

BATDRV

PQ4413

PQ4413 2N7002KDW-GP

2N7002KDW-GP

PQ4413_6

6

12

84.2N702.A3F

PR4454

2nd = 75.00601.07C

3rd = 84.2N702.E3F

0R2J-2-GP

4th = 84.DMN66.03F

X01 0408

PQ4411

5

6

SETTING

LL1.099V

0.862329V

0.659648V

H

SCD1U25V2KX-GP

83.8R010.A87

2nd = 83.8R010.087

3rd = 83.10R10.087

PD4402

1

3

2

V8P10-5300M3- 86A-GP

PU4403

S

D

S

D

1

8

S

D

S

D

2

7

S

D

S

D

3

6

GD

4 5

FDMC6675BZ-GP-U

84.06675.030

2nd = 84.07401.037

X01 0408

1 2

PR4457

PR4457 0R2J-2-GP

0R2J-2-GP

PQ4413_3

PQ4413_2

2345

1

1 2

147KR2F-GP

X01 change PR4420 to 147Kohm 0408

AD_IA_HW 24

PWR_CHG_ CMPINPQ4411_D 2

PR4420

(AD_IA_HW_2)

1 2

12

PR4461

PR4461 100KR2F-L1-GP

100KR2F-L1-GP

X01 stuff PR4461 0408

1

X01 change PD4402 main source to 83.8R010.A87 0409

BT+

12

DY

PC4424

SCD01U25V2KX-3GP

H_PROCHOT# 4,24,42,46

DIS_DTM_CELL

PC4431

PC4431 SC1U25V3KX-1-G P

SC1U25V3KX-1-G P

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CHARGER BQ24717

Latitude300 Haswell

1

44 104Friday, April 19, 2013

X00

A

B

C

D

E

SSID = PWR.Plane.Regulator_5v3p3v

X01 Remove 15V_S0, dummy the related parts 0409

PWR_5V_VCLK

3D3V_AUX_S5

4 4

0R2J-2-GP

DCBATOUT

Design Current=3.3A

3 3

2 2

5.17A<OCP>6.11A

3D3V_PWR

3D3V_S5

PG4526

12

GAP-CLOSE-PWR

PG4517

12

GAP-CLOSE-PWR

PG4528

12

GAP-CLOSE-PWR

PG4522

12

GAP-CLOSE-PWR

PG4529

12

GAP-CLOSE-PWR

PG4539

12

GAP-CLOSE-PWR

PG4546

12

GAP-CLOSE-PWR

PG4547

12

GAP-CLOSE-PWR

PG4525

GAP-CLOSE-PWR

PG4521

GAP-CLOSE-PWR

PG4524

GAP-CLOSE-PWR

PG4531

GAP-CLOSE-PWR

3D3V_PWR

PC4517

SCD1U10V2KX-4GP

12

DY

2nd = 77.52271.16L

PWR_DCBATOUT _3D3V

12

X01 0408

PT4102

12

SE220U6D3VM-30-GP

77.52271.09L

X01 0408

PR4512

6K65R2F-GP

PR4523

10KR2F-2-GP

PC4528

PC4525

SCD1U50V3KX-GP

12

84.00412.037

2nd = 84.08067.A37

2nd = 68.3R31A.10V

68.3R310.20A

PL4503

1 2

IND- 3D3U H-57G P

2D2R5F-2-GP

PG4535

12

GAP-CLOSE-PW R-3-GP

3V_FEEDBACK

SC330P50V3KX-GP

12

PR4535

PR4535 0R2J-2-GP

0R2J-2-GP

DY

12

PC4523

PC4523 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

DY

12

SC10U25V5KX-GP

PR4533

PC4520

PC4509

12

PWR_DCBATOUT _3D3V

SC10U25V5KX-GP

SIS412DN-T1-GE3-GP

DDD

SSS

123

12

DY

8

SIS780DN-T1-GE3-GP

D

SSS

123

PWR_3D3V_SNUB

12

DY

678

PU4104

PC4535

GD

4 5

SCD1U25V3KX-GP

567

PU4105

DDD

G

4

84.00780.037

2nd = 84.08065.B37

X01 0408

3V_5V_POK17

3V_5V_EN36

PWR_3D3V_VBST2_1

12

3D3V_S5

12

DY

1 2

1D5R3-GP

12

PR4517

PR4517 45K3R2F-L-GP

45K3R2F-L-GP

PR4534

PR4534 100KR2J-1-GP

100KR2J-1-GP

PR4528

PWR_3D3V_DRVH2

PWR_3D3V_LL2

PWR_3D3V_DRVL2

3D3V_PWR_2

PWR_3D3V_VBST2

PWR_3D3V_FB2

PWR_3D3V_EN2

PWR_3D3V_CS2

Close to VFB Pin (pin5)

PR4501

0R2J-2-GP

PR4530

12

DY

PR4515

0R2J-2-GP

3D3V_PWR_2

SC4D7U6D3V3KX-GP

PR4532

0R2J-2-GP

12

DY

PWR_5V_EN1_R

1 2

PU4503

9

VBST2

10

DRVH2

8

SW2

11

DRVL2

4

VFB2

6

EN2

5

CS2

7

PGOOD

TPS51225RUKR-GP

PC4526

3D3V_AUX_S5

12

DCBATOUT

PC4519

12

VIN

VREG3

3

12

PR4504

1 2

0R2J-2-GP

PR4506

1 2

0R2J-2-GP

SC10U25V5KX-GP

12

DY

17

VBST1

16

DRVH1

18

SW1

15

DRVL1

14

VO1

2

VFB1

20

EN1

1

CS1

19

VCLK

21

GND

VREG5

13

12

PC4524

PC4524 SC1U6D3V3KX-2GP

SC1U6D3V3KX-2GP

PC4531

12

PWR_5V_VBST1

PWR_5V_DRVH1

PWR_5V_LL1

PWR_5V_DRVL1

PWR_5V_VO1

PWR_5V_FB1

PWR_5V_EN1

PWR_5V_CS1

PWR_5V_VCLK

5V_PWR_2

PWR_5V_EN1

PWR_3D3V_EN2

SCD01U50V2KX-1GP

PR4524

1 2

1D5R3-GP

DCBATOUT

PWR_5V_VBST1_1

12

PR4531

PR4531 137KR2F-1-GP

137KR2F-1-GP

PWR_DCBATOUT _5V

PG4520

GAP-CLOSE-PWR

PG4536

GAP-CLOSE-PWR

PG4518

GAP-CLOSE-PWR

PG4534

GAP-CLOSE-PWR

PG4542

GAP-CLOSE-PWR

PG4543

GAP-CLOSE-PWR

SCD1U25V3KX-GP

SCD1U25V3KX-GP PC4516

PC4516

12

1 2

84.00412.037

2nd = 84.08067.A37

X01 0408X01 0408

84.00780.037

2nd = 84.08065.B37

X01 0408

SC1KP50V2KX-1GP

SCD1U25V3KX-GP

PU4101

GD

4 5

567

DDD

PU4102

G

4

PC4521

2nd = 75.00054.M7D

PC4515

678

DDD

SSS

123

8

D

SSS

123

12

DY

75.00054.C7D

X01 0408

5V_PWR

12

DY

SCD1U25V3KX-GP

PWR_DCBATOUT _5V

PC4530

SIS412DN-T1-GE3-GP

SCD1U50V3KX-GP

12

SIS780DN-T1-GE3-GP

DY

PWR_5V_SNUB

12

DY

SC18P50V2JN-1-GP

PC4514

SCD1U25V3KX-GP

DY

1

PC4534

PC4527

PC4529

SC10U25V5KX-GP

12

X01 0408

2nd = 68.2R21B.10J

68.2R210.20B

PL4101

1 2

IND- 2D2U H-46- GP-U

PR4529

PR4529 2D2R5F-2-GP

2D2R5F-2-GP

PC4536

PC4536 SC560P50V-GP

SC560P50V-GP

PR4525

0R2J-2-GP

PC4522

12

BST15V_1

3

DY

SC10U25V5KX-GP

12

DY

PWR_5V_FB1_RPWR_3D3V_FB2_R

12

DY

PD4503

PD4503 BAT54SPT-1-GP

BAT54SPT-1-GP

2

BOOST_10V

12

SC1U25V3KX-1-GP

PC4533

PG4532

GAP-CLOSE-PW R-3-GP

12

PR4527

PR4527 15KR2F-GP

15KR2F-GP

12

PR4526

PR4526 9K76R2F-1-GP

9K76R2F-1-GP

1

12

PC4532

DY

SCD1U25V3KX-GP

BST15V_2

3

PD4502

PD4502 BAT54SPT-1-GP

BAT54SPT-1-GP

75.00054.C7D

DY

2nd = 75.00054.M7D

2

X01 0408

GAP-CLOSE-PWR-3-GP

15V_PWR

12

DY

Design Current=8.3A

12.98A<OCP>15.34A

PC4518

12

SCD1U10V2KX-4GP

DY

X01 change PR4120 to 9.76K to solve 5V voltage fall issue while on heavy loading

PG4530

PD4501

BZT52C15S-GP

A K

5V_PWR

77.52271.09L

2nd = 77.52271.16L

X01 0408

PT4101

12

SE220U6D3VM-30-GP

15V_S5

12

Close to VFB Pin (pin2)

5V_PWR

GAP-CLOSE-PWR

PG4527

PG4519

PG4538

PG4537

PG4533

PG4523

PG4541

PG4540

PG4545

PG4544

5V_S5

12

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP IND 3.3UH PCMC063T-3R3MN Cyntec 28mohm/30mohm Isat =13.5Arms 68.3R310.20A O/P cap:CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuki/ 17mOhm / 77.52271.09L H/S:SIS412 / 24mOhm/[email protected] / 84.00412.037 L/S:SIS780 / 14.5mOhm/[email protected] / 84.00780.037

1 1

A

B

TPS51225 & TPS51285 Co-lay

TPS51225 TPS51285

PR4510

PR4511

110K

9.09K45.3KK

22.1K

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18mohm/20mohm Isat =14Arms 68.2R210.20B O/P cap:CHIP CAP POL 220U 6.3V M 6.3*4.5 /Matsuki/ 17mOhm / 77.52271.09L H/S:SIS412 / 24mOhm/[email protected] / 84.00412.037 L/S:SIS780 / 14.5mOhm/[email protected] / 84.00780.037

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

Date: Sheet of

C

D

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

3V/5V TPS51225

Latitude300 Has well

E

X00

45 104Friday, April 19, 2013

X00

5

4

3

2

1

SSID = CPU.Regulator

PR4614

PWR_VCC_PRGM1

12

113KR2F-1-GP

D D

1D05S_VCCST

C C

H_VR_ENABLE7

H_PROCHOT#4,24,42,44

B B

IMVP _PWR GD7,24

130R2F-1-GP

54D9R2F-L1-GP

1 2

75R2F-2-GP

12

PC4606

PC4606 SCD1U16V2JX-1-GP

SCD1U16V2JX-1-GP

1D05V_S0

3D3V_S0

PR4630

PR4620

PR4601

DY

12

PR4602

1 2

DY

R4622

2KR2F-3-GP

1 2

PWR_VCC_SDA

PWR_VCC_SCLK

PWR_VCC_ALERT#

499R2F-2-GP

PC4611

12

SC6800P50V3KX-GP

H_CPU_SVIDDAT7

VR_SVID_ALERT#7

H_CPU_SVIDCLK7

PC4604

PC4604 SC1U10V3KX-3GP

SC1U10V3KX-3GP

PR4621

0R2J-2-GP

12

PR4610

105KR2F-1-GP

12

PC4609

12

SC2200P50V2KX-2GP

PR4624

0R2J-2-GP

12

PWR_VCC_COMP_RC

PC4610

PR4628

PR4617

27K4R2F-GP

PR4622

NTC-470K-2-GP

B=4500K

12

DY

SCD1U16V2JX-1-GP

0R2J-2-GP

12

5V_S0

12

PR4613

12

8K06R2F-GP

PWR_VCC_NTC_R

X01 PR4615 change to

69.60011.101

2nd = 69.60013.221

X01 0408

1.82Kohm 0408

PR4619 0R2J-2-GPPR4619 0R2J-2-GP

12

PR4618 0R2J-2-GPPR4618 0R2J-2-GP

12

PR4616 0R2J-2-GPPR4616 0R2J-2-GP

12

PWR_VCC_EN

PWR_VCC_IMON

PWR_VCC_VRHOT#

PWR_VCC_COMP

PR4615

1 2

1K82R2F-1-GP

PWR_VCC_SDA

PWR_VCC_ALERT#

PWR_VCC_SCLK

PU4601

12

VCC

1

VR_ON

3

IMON

4

VRHOT#

6

COMP

21

GND

PWR_VCC_POK

PWR_VCC_NTC

close to H/S MOSFET

113KR2F-1-GP

PR4607

49K9R2F-L-GP

20

19

SCLK

PGOOD

2

5

PR4604

10R2F-L-GP

PC4612

SC1KP25V2JX-GP

PWR_VCC_PRGM2

12

18

SDA

ALERT#

ISL9 5813-R EV1D 1-GP

NTC

RTN

8

12

11

17

PRGM2

PRGM1

PWR_VCC_BOOT

13

BOOT

PWR_VCC_UG

14

UG

PWR_VCC_PHASE

15

PHASE

PWR_VCC_LG

16

LG

PWR_VCC_FB

7

FB

PR4606

1 2

DY

0R2J-2-GP

ISUMP

ISUMN

9

10

0R2J-2-GP

PWR_VCC_ISUMP

PWR_VCC_ISUMN

PWR_VCC_BOOT 47

PWR_VCC_UG 47

PWR_VCC_PHASE 47

PWR_VCC_LG 47

PR4603

12

1K37R2F-GP

PWR_VCC_FB_RC

SCD1U16V2JX-1-GP

PWR_VCC_ISUMP 47

PWR_VCC_ISUMN 47

VSS_SENSE 9

PC4601

LL=2mohm

1 2

DY

PC4613

12

DY

SC1KP25V2JX-GP

VCC_SENSE 7

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

TPS51622_CPUCORE(1/2)

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

46 104Friday, April 19, 2013

1

X00

5

D D

C C

B B

PWR_VCC_UG46

PWR_VCC_BOOT46

PWR_VCC_LG46

PR4701

0R3J-0-U-GP

1 2

PWR_VCC_PHASE46

PWR_VCC_BOOT_RC

4

PC4706

1 2

SCD22U25V3KX-GP

PU4701

1

9

8

FDMS3600-02-RJK0215-COLAY-GP

1st = 84.03664.037

2nd = 84.00033.037

X01 0408

PWR_VCC_PHASE

2 3 4 10

7 6 5

3K65R2F-1-GP

PR4707

PR4707 4M3R2J-GP

4M3R2J-GP

DY

PR4702

12

3

12

PC4701

SC10U25V5KX-GP

Cyntec 7.2x6.8x3 DCR=2.5~2.8mohm Idc=23A

2nd = 68.R2210.10W

PG4701

PG4701 GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

1 2

PHASE1G

12

2nd = 68.R2210.10W

PR4703

1 2

2K61R2F-1-GP

12

PC4702

SC10U25V5KX-GP

PL4701

1 2

IND-D 22UH -37-GP

68.R2210.10V

X01 0408

close to CHOKE

PHASE_R_R

PR4708

1 2

11KR2F-L-GP

PC4707

1 2

SCD047U16V2KX-1-GP

PC4708

1 2

DY

DCBATOUT

12

PC4703

PC4704

SC10U25V5KX-GP

PR4704

1 2

NTC-10K-26-GP

B=3370K

SCD1U16V2JX-1-GP

SCD1U25V3KX-GP

VCC_CORE

PG4702

PG4702 GAP-CLOSE-PWR-3-GP

GAP-CLOSE-PWR-3-GP

1 2

ISUM_R_C

69.60037.011

2nd = 69.60013.131

X01 0408

OCP=41.6A

PC4709

1 2

DY

SCD1U16V2JX-1-GP

PR4705

1 2

1K2R2F-1-GP

ISUM _R_R

2

PR4706

1 2

DY

0R2J-2-GP

1

Shark Bay ULT 15W CPU IccMAX=32A TDC=10A

35.2A<OCP<41.6A Frequency=750KHZ LL=-2.0 mV/A

PWR_VCC_ISUMN 46

PWR_VCC_ISUMP 46

12

PC4732

SC22U6D3V5MX-2GP

VCC_CORE

12

PC4733

SC22U6D3V5MX-2GP

12

PC4734

SC22U6D3V5MX-2GP

12

PC4736

SC22U6D3V5MX-2GP

12

PC4741

SC22U6D3V5MX-2GP

DY

12

PC4721

SC22U6D3V5MX-2GP

DY

3

12

PC4722

SC22U6D3V5MX-2GP

12

X01 3/1 Power for pass transient spec

12

PC4724

SC22U6D3V5MX-2GP

DY

12

PC4727

SC22U6D3V5MX-2GP

DY

12

PC4728

SC22U6D3V5MX-2GP

DY

PC4735

SC22U6D3V5MX-2GP

DY

12

PC4737

SC22U6D3V5MX-2GP

DY

12

PC4738

SC22U6D3V5MX-2GP

2

12

PC4739

SC22U6D3V5MX-2GP

12

PC4740

SC22U6D3V5MX-2GP

12

PC4743

PC4742

SC22U6D3V5MX-2GP

DY

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

TPS51622_CPUCORE(2/2)

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

47 104Friday, April 19, 2013

1

X00

22uF/6.3V/0805*13 330uF/2.5V/6.3*4.5/12mohm*1

12

PC4730

SC22U6D3V5MX-2GP

PC4720

SC22U6D3V5MX-2GP

12

PC4731

SC22U6D3V5MX-2GP

PC4744

SC22U6D3V5MX-2GP

PC4723

PC4725

PC4726

PC4729

SC22U6D3V5MX-2GP

12

PT4701

A A

PT4701

SE330U2D5VM-8-GP

77.53371.18L

2nd = 77.53371.26L

DY

12

PC4717

SC22U6D3V5MX-2GP

12

SC22U6D3V5MX-2GP

PC4718

SC22U6D3V5MX-2GP

DY

12

PC4729

SC22U6D3V5MX-2GP

PC4719

SC22U6D3V5MX-2GP

X01 0408

Don't need POSCAP If space concern

5

4

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p05v

DCBATOUT PWR_DCBATOUT_1D05V

PG4838

GAP-CLOSE-PWR

GAP-CLOSE-PWR-3-GP

1 2

12

PR4822

PG4838

12

PG4837

12

PG4834

12

PG4827

12

Design Current =6.7A

10.56A<OCP<12.48A

1D05V_PWR

SCD1U10V2KX-4GP

PC4824

12

PG4832

2nd = 77.53371.26L

12

PC4823

DY

SC18P50V2JN-1-GP

PT4803

SE330U2D5VM-8-GP

12

77.53371.18L

X01 0408

1D05V_PWR 1D05V_S0

PG4828

12

GAP-CLOSE-PWR

PG4830

12

GAP-CLOSE-PWR

PG4831

12

GAP-CLOSE-PWR

PG4826

12

GAP-CLOSE-PWR

PG4824

12

GAP-CLOSE-PWR

PG4825

12

GAP-CLOSE-PWR

D D

PU4808

84.00412.037

PR4821

1D05V_VTT_PWRGD7,36

PR4817

127KR2F-GP

1 2

PR4819

PM_SLP_S3#17,24,36,49,51

C C

1 2

0R2J-2-GP

PC4821

SC1KP50V2KX-1GP

DY

12

PU4806

PWR_1D05V_PW RGD PWR_1D05V_TRIP

PWR_1D05V_FB PWR_1D05V_PHASE PWR_1D05V_CCM

12

PR4824

PR4824 470KR2F-GP

470KR2F-GP

1

PGOOD

2

CS

3

EN

4

FB

5

RF

RT8237CZQW-2-GP

GND

BOOT UGATE PHASE

VCC

LGATE

11 10

PWR_1D05V_UGATEPWR_1D05V_EN

9 8 7

PWR_1D05V_LGATE

6

PWR_1D05V_BOOT

PR4820

2D2R3-1-U-GP

1 2

PWR_1D05V_BOOT_R

12

PC4815

SC1U10V2KX-1GP

84.00412.037

2nd = 84.08067.A37

X01 0408

SCD1U25V3KX-GP

5V_S5

84.00780.037

2nd = 84.08065.B37

X01 0408

PC4822

12

PU4805

G

4

678

GD

4 5

567

DDD

SSS

123

8

D

SSS

123

PWR_DCBATOUT_1D05V

SC10U25V5KX-GP

PC4826

12

PR4837

PR4837 2D2R5F-2-GP

2D2R5F-2-GP

PWR_1D05V_SNUB

12

PC4838

PC4838 SC560P50V-GP

SC560P50V-GP

12

1 2

IND-2 D2UH -46-GP -U

SIS412DN-T1-GE3-GP

DY

SIS780DN-T1-GE3-GP

DY

SCD1U50V3KX-GP

PC4825

PC4814

12

X01 0408

2nd = 68.2R21B.10J

68.2R210.20B

PL4801

PWR_1D05V_PW R

10KR2F-2-GP

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP CHOKE 2.2U PCMC063T-2R2MN 18~20mohm Isat =14Arms 68.2R210.20B O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L H/S:SIS412DN-T1-GE3 / 24mOhm/[email protected] / 84.00412.037

B B

L/S:SIS780DN-T1-GE3 / 14.5mOhm/[email protected] / 84.00780.037

PWR_1D05V_FB

PR4823

PR4823 21KR2F-GP

21KR2F-GP

Vout=0.704V*(R1+R2)/R2

12

X01 3/1 Powermodifyc

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

TPS51367_1D05V

Taipei Hsien 221, Taiwan, R.O.C.

48 104Friday, April 19, 2013

1

X00

5

SSID = PWR.Plane.Regulator_1p35v0p675v

4

3

2

1

PG4903

1 2

GAP-CLOSE-PWR-3-GP

PG4904

1 2

GAP-CLOSE-PWR-3-GP

PG4905

1 2

GAP-CLOSE-PWR-3-GP

PG4906

1 2

GAP-CLOSE-PWR-3-GP

PU4901

PGOOD

VTTEN

EN/PSV

VREF

REFIN

MODE

TRIP

VTTREF

GND

TPS51216RUKR-GP

74.51216.073

+0D675V_DDR_P

PG4901

1 2

GAP-CLOSE-PWR-3-GP

PG4902

1 2

GAP-CLOSE-PWR-3-GP

+PWR_SRC_1D35V

12

V5IN

15

VBST

14

DRVH

13

SW

11

DRVL

10

PGND

9

VDDQS

2

VTTIN

3

VTT

1

VTTS

4

VTTGND

0D675V_S0

5V_S5

12

PWR_1D35V_VBST

PWR_1D35V_DRVH

PWR_1D35V_SW

PWR_1D35V_DRVL

PWR_1D35V_VDDQS

12

PC4915

SCD1U10V2KX-5GP

PWR_1D35V_VTTREF

PC4901

SC1U10V3KX-3GP

PR4905

1 2

2D2R3-1-U-GP

PC4916

12

SC10U6D3V5KX-1GP

1 2

0R3J-0-U-GP

2nd = 84.08067.A37

PC4919

PC4919 SCD1U25V3KX-GP

SCD1U25V3KX-GP

PR4605_2

1 2

+0D675V_DDR_P

12

DY

PC4917

SC10U6D3V5KX-1GP

DDR_VREF_S3

PR4911

678

DDD

PU4902

84.00412.037

GD

PU4903

GD

4 5

567

DDD

G

4

X01 0408

X01 3/1 A84.SSA12.A37

84.SSA12.A37

2nd = 84.08062.A37

X01 0408

1D35V_PWR

12

PC4904

SC1U10V3KX-3GP

1D35V_PWR 1D35V_S3

PG4908

1 2

GAP-CLOSE-PWR-3-GP

PG4909

1 2

GAP-CLOSE-PWR-3-GP

PG4910

+PWR_SRC_1D35V

12

PC4909

SIS412DN-T1-GE3-GP

SC10U25V5KX-GP

SSS

123

8

D

SISA12ADN-T1-GE3-GP

12

DY

SSS

123

DY

12

TPS51216_PHS_SET

12

PC4912

PC4911

SC10U25V5KX-GP

X01 0409

68.1R010.20I

2nd = 68.1R01B.10K

PL4902

1 2

COIL-1UH-63-GP

PR4912

PR4912 2D2R5F-2-GP

2D2R5F-2-GP

PC4922

PC4922 SC330P50V2KX-3GP

SC330P50V2KX-3GP

PM_SLP_S4#17,24

PC4913

1 2

PWR_1D35V_VDDQS

PR4907

1 2

0R2J-2-GP

12

PC4914

SCD1U50V3KX-GP

SC4D7U25V5KX-GP

Design Current=9.8A

15.3A<OCP>18.1A

1D35V_PWR

SE330U2D5VM-8-GP

12

PC4921

PC4920

PG4907

PC4920

SCD1U10V2KX-5GP

SC4D7U6D3V5KX-3GP

GAP-CLOSE-PWR-3-GP

SC4D7U6D3V5KX-3GP

77.53371.18L

2nd = 77.53371.26L

X01 0408

12

PC4906

PC4906 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

DY

12

PT4903

PWR_1D35V_EN

12

DY

EC4601

SCD1U50V3KX-GP

PG4910

1 2

GAP-CLOSE-PWR-3-GP

PG4911

1 2

GAP-CLOSE-PWR-3-GP

PG4912

1 2

GAP-CLOSE-PWR-3-GP

PG4913

1 2

GAP-CLOSE-PWR-3-GP

PG4914

1 2

GAP-CLOSE-PWR-3-GP

PG4915

1 2

GAP-CLOSE-PWR-3-GP

PG4916

1 2

GAP-CLOSE-PWR-3-GP

PG4917

1 2

GAP-CLOSE-PWR-3-GP

PC4918

PC4918 SCD22U10V2KX-1GP

SCD22U10V2KX-1GP

DCBATOUT

20

17

16

6

8

19

18

5

21

7

D D

3D3V_S0

12

PR4904

PR4904 20KR2F-L-GP

20KR2F-L-GP

DY

12

30K1R2F-L-GP

PR4901

PR4601_1

12

PR4908

200KR2F-L-GP

PR4908

200KR2F-L-GP

1 2

PR4906

0R2J-2-GP

X01 3/4 Power Modify

DY

DDR_VTT_PG_CTRL_RDDR_VTT_PG_CTRL_RDDR_VTT_PG_CTRL_RDDR_VTT_PG_CTRL_R

PWR_1D35V_EN

PWR_1D35V_VREF

PWR_1D35V_REFIN

PWR_1D35V_MODE

PWR_1D35V_TRIP

12

PWR_1D35V_VTTREF

12

PR4902

64K9R2F-1-GP

C C

B B

1D35V_VTT_PWRGD36

DDR_VTT_PG_CTRL12

PM_SLP_S3#17,24,36,48,51

R4909 0R2J-2-GPR4909 0R2J-2-GP

R4910 0R2J-2-GP

DY

12

PR4903

PR4903 10KR2F-2-GP

10KR2F-2-GP

12

PC4903

PC4902

SCD1U10V2KX-4GP

SCD01U16V2KX-3GP

X01 change PR4902 to 64.9kohm for OCP setting 0419

State S3 S5 VDDR VTTREF VTT

S3S0Lo

S4/S5

MODE

PR4608

200k ohm

100k ohm

68k ohm

47k ohm

A A

5

HiLoOnOnOn

Hi

On

Off

Frequency Discharge Mode

400kHz

300kHz

400kHz

Non-tracking Discharge

On

Off(Hi-Z)

Off

OffLo

Tracking Discharge

4

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP IND 0.1UH M PCMC063T-R10MN 1.5~1.7mohm Isat =60Arms 68.R1010.10T O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L H/S MOS: FET MOS SIS412DN-T1-GE3 NC 8P / 84.00412.037 / Rds(on)=24~30mohm @Vgs=4.5V L/S MOS: FET MOS SIS780DN-T1-GE3 NC POWERPAK 121 / 84.00780.037 / Rds(on)=14.5~17.5mohm @Vgs=4.5V

3

2

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu Rd., Hsic hih,

21F, 88, Sec.1, H sin Tai Wu Rd., Hsic hih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

TPS51367+51206_1D35V & 0D675V

Size Document Number Rev

Size Document Number Rev C

C

Friday, April 19, 2013

Friday, April 19, 2013 Date: Sheet of

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

1

49 104

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Date: Sheet of

A3

Reserved

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

50 104Tuesday, March 26, 2013

1

X00

5

SSID = PWR.Plane.Regulator_1p5v

4

3

2

1

D D

12

PC5113

SC4D7U25V5KX-L2-GP

DY

PR5110 0R2J-2-GPPR5110 0R2J-2-GP

TP5101TP5101

PWR_VRAM_PW R_ILIM

PWR_VRAM_PW R_EN

12

PR5104

PR5104 1MR2J-L3-GP

1MR2J-L3-GP

4

PM_SLP_S3#17,24,36,48,49

C C

DCBATOUT

B B

A A

PWR_DCBATOUT_VRAM_PW R

PG5101

1 2

GAP-CLOSE-PWR

PG5102

1 2

GAP-CLOSE-PWR

PG5103

1 2

GAP-CLOSE-PWR

1D35V_VGA_EN83

5

PWR_DCBATOUT_VRAM_PW R

12

PC5115

SC4D7U25V5KX-L2-GP

PR5111

470KR2F-GP

1 2

PR5114

PR5114 0R2J-L-GP

0R2J-L-GP

12

3D3V_S5

12

SY8208D for 1D35V_VGA_S0(1D5V)

PU5102

8

IN

1

2

PG

3

ILMT

1

EN

9

GND

SY8208DQNC-GP-U

TLV70215 for 1D5V_S0

PC5119

SC1U6D3V2KX-GP

PC5119

SC1U6D3V2KX-GP

12

PU5101

PWR_1D5V_EN

BYP

LDO

BS

LX

FB

1 2

VRAM_PWR_BS

6

VRAM_PWR_PH

10

VRAM_PWR_FB

4

VRAM_PWR_BYP

7

VRAM_PWR_LDO

5

IN GND EN3NC#4

TLV70215DBVR-GP

PC5112

5

OUT

4

12

SC2D2U6D3V2MX-GP

Design Current = 150mA

1D5V_PWR 1D5V_S0

PC5120

12

PR5102

1 2

0R3J-L1-GP

VRAM_PWR_BS_R

PL5101

1 2

68.1R01E.10U

IND-1 UH-20 6-GP

2nd = 68.1R010.20I

PR5112

1 2

0R2J-L-GP

PC5109

SC1U6D3V2KX-GP

X01 0409

3D3V_S5

12

SC1U6D3V2KX-GP

PG5105

1 2

GAP-CLOSE-PWR

PC5110

1 2

SCD1U25V3KX-L-GP

Vo=0.6x(1+R1/R2) =0.6x(1+150/100) =1.5V

3

GAP-CLOSE-PWR-3-GP

PG5104

1 2

VRAM_PWR_FBH

12

PR5113

PR5113 150KR2F-L-GP

150KR2F-L-GP

12

PR5103

PR5103 100KR2F-L3-GP

100KR2F-L3-GP

Design Current=3.4A OCP=8A

12

PC5101

SC22U6D3V5MX-L3-GP

DY

12

PC5111

PC5111 SC220P50V2KX-3GP

SC220P50V2KX-3GP

2

1D35V_VGA_S0

12

PC5116

PC5117

PC5108

SC22U6D3V5MX-L3-GP

Title

Size Document Number Rev

Date: Sheet of

PC5117

SC22U6D3V5MX-L3-GP

DY

RT9198_1D5V/SY8208D_1D5V(VGA)

A3

12

PC5114

PC5118

SC22U6D3V5MX-L3-GP

SCD1U50V3KX-L-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

1

51 104Friday, April 19, 2013

X00

5

R5224

R5224 0R2J-2-GP

0R2J-2-GP

DBC_EN_R

1 2

LCD1

41

1

2 3 4 5 6 7 8 9 10

D D

C C

B B

A A

11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

42

ACES-CON40-10-GP

20.K0617.040

2nd = 20.K0568.040

LCD_BRIGHTNESS BLON_OUT_C LCD_TST_C LVDS_DDC_CLK LVDS_DDC_DAT A

LVDSA_DATA0#_C LVDSA_DATA0_C LVDSA_DATA1#_C LVDSA_DATA1_C LVDSA_DATA2#_C LVDSA_DATA2_C LVDSA_CLK#_C LVDSA_CLK_C

LVDSB_DATA0#_C LVDSB_DATA0_C LVDSB_DATA1#_C LVDSB_DATA1_C LVDSB_DATA2#_C LVDSB_DATA2_C LVDSB_CLK_C LVDSB_CLK#_C

DMIC_CLK_C DMIC_DATA_C USB_CAMERA# USB_CAMERA

3D3V_CAMERA_S0_R

LVDSB_CLK#_C

LVDSB_CLK_C

LVDSA_CLK_C

1

LCD_TST_C LVDS_DDC_CLK LVDS_DDC_DAT A LVDSA_DATA0#_C LVDSA_DATA0_C

LVDSA_DATA1#_C LVDSA_DATA1_C

LVDSA_DATA2#_C LVDSA_DATA2_C

LVDSA_CLK#_C LVDSA_CLK_C

LVDSB_DATA0#_C LVDSB_DATA0_C DMIC_CLK_C LVDSB_DATA1#_C LVDSB_DATA1_C DMIC_DATA_C LVDSB_DATA2#_C LVDSB_DATA2_C

LVDSB_CLK#_C LVDSB_CLK_C

USB_CAMERA# USB_CAMERA 3D3V_CAMERA_S0_R LCD_BRIGHTNESS BLON_OUT_C

1

X01 0408

AFTP5203AFTP5203

1

AFTP5205AFTP5205

1

AFTP5207AFTP5207

1

AFTP5206AFTP5206

1

AFTP5208AFTP5208

1

AFTP5213AFTP5213

1

AFTP5210AFTP5210

1

AFTP5211AFTP5211

1

AFTP5212AFTP5212

1

AFTP5209AFTP5209

1

AFTP5215AFTP5215

1

AFTP5216AFTP5216

1

AFTP5214AFTP5214

1

AFTP5220AFTP5220

1

AFTP5217AFTP5217

1

AFTP5218AFTP5218

1

AFTP5221AFTP5221

1

AFTP5219AFTP5219

1

AFTP5223AFTP5223

1

AFTP5224AFTP5224

1

AFTP5229AFTP5229

1

AFTP5222AFTP5222

1

AFTP5228AFTP5228

1

AFTP5225AFTP5225

1

AFTP5226AFTP5226

1

AFTP5227AFTP5227

1

R5216

R5216 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5221

R5221 0R2J-2-GP

0R2J-2-GP

R5226

R5226 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5219

R5219 0R2J-2-GP

0R2J-2-GP

AFTP5202AFTP5202

1

3D3V_LCD_ROM

AFTP5204AFTP5204

TR5201

TR5201 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

TR5204

TR5204 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

AFTP5201AFTP5201

DCBATOUT_LCD

BKLT_CTRL

LCD_TST_C LCD_BRIGHTNESS BLON_OUT_C

5

DBC_EN 20

LCDVDD

12

C5206

C5201

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

1 2

DMIC_CLK_C DMIC_DATA_C

R5227 0R2J-2-GPR5227 0R2J-2-GP

1 2

R5222 0R2J-2-GP

1 2

3

BAT54CPT-2-GP

2nd = 75.00054.J7D

3rd = 75.00054.A7D

SRN100J-4-GP

LVDSB_CLK# 53

LVDSA_CLK# 53

LVDSA_CLK 53

R5228

0R3J-0-U-GP

1 2

R5238

LDO_DY

0R3J-0-U-GP

1 2

LDO_DY

DY

D5202

75.00054.K7D

X01 0408

RN5203

1 2 3

SRN100KJ-6-GP

RN5201

1 2 3 4 5

LVDS_VDD_EN 53

LVDS_DDC_DAT A_R

RN5204

RN5204 SRN33J-5-GP-U

SRN33J-5-GP-U

23 1

4

RN5202

2 3 1

SRN33J-5-GP-U

3D3V_CAMERA_S0

1

2

BKLT_CTRL

4

BLON_OUT_C

8

BKLT_CTRL

7 6

LVDSB_DATA2#_C

LVDSB_DATA2_C LVDSB_DATA1_C

LVDSA_DATA2#_C

LVDSA_DATA2_C

LVDS_DDC_CLK_R

4

12

EC5205

SC6D8P50V2DN-GP

L_BKLT_CTRL 53

EC_BRIGHTNESS 24

LCD_TST 24

BLON_OUT 24

R5212

R5212 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5215

R5215 0R2J-2-GP

0R2J-2-GP

R5218

R5218 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5225

R5225 0R2J-2-GP

0R2J-2-GP

12

TR5202

TR5202 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

TR5205

TR5205 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

4

RN5205

1

4

23

3D3V_S0

EC5206

SC6D8P50V2DN-GP

SRN4K7J-8-GP

LVDS_DDC_CLK_R 53

LVDS_DDC_DAT A_R 53

DMIC_CLK 27 DMIC_DATA 27

INVERTER POWER

EC5210

800mA

SCD1U50V3KX-GP

3D3V_CAMERA_S03D3V_S0

12

DY

R5207

R5207 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5208

R5208 0R2J-2-GP

0R2J-2-GP

R5203

R5203 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5204

R5204 0R2J-2-GP

0R2J-2-GP

C5205

12

C5207

C5207 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

TR5210

TR5210 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

TR5206

TR5206 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

F5201

POLYSW-1D1A24V-GP-U

1 2

69.50007.A31

2nd = 69.60040.001

3rd = 69.50007.A41

X01 0408

R5229

1 2

0R3J-0-U-GP

SC33P50V2JN-3GP

3D3V_S0 3D3V_LCD_ROM

R5201 0R3J-0-U-GPR5201 0R3J-0-U-GP

1 2

F5202 FUSE-2A32V-16-GP

1 2

DY

LVDSB_DATA2# 53 LVDSB_DATA1# 53

LVDSB_DATA2 53

LVDSA_DATA2# 53

LVDSA_DATA2 53

4

LVDSA_DATA1#_CLVDSA_CLK#_C

LVDSA_DATA1_C

3

DCBATOUT_LCDDCBATOUT

12

C5202

SC1KP50V2KX-1GP

DY

1 2

Close to LCD connector

USB_CAMERA#

USB_CAMERA

TR5208

3 4

12

FILTER-4P-6-GP

69.10103.041

2nd = 68.00201.141

USB_PN4 16

USB_PP4 16

X01 0408

R5209

R5209 0R2J-2-GP

LVDSB_DATA0#_CLVDSB_DATA1#_C

LVDSB_DATA1 53LVDSB_CLK 53

LVDSB_DATA0_C

LVDSA_DATA0#_C

LVDSA_DATA0_C

3

0R2J-2-GP

1 2

1

DY

2

1 2

R5211

R5211 0R2J-2-GP

0R2J-2-GP

R5205

R5205 0R2J-2-GP

0R2J-2-GP

1 2

1

DY

2

1 2

R5206

R5206 0R2J-2-GP

0R2J-2-GP

TR5203

TR5203 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

TR5207

TR5207 FILTER-4P-70-GP

FILTER-4P-70-GP

68.02002.021

3 4

LVDSB_DATA0# 53

LVDSB_DATA0 53

LVDSA_DATA0# 53LVDSA_DATA1# 53

LVDSA_DATA0 53LVDSA_DATA1 53

2

TPNL

X01 0408

20.F1876.006

2nd = 20.F1633.006

TPNL1

7

1

2 3 4 5 6

8

ETY-CON6-21-GP

LCDVDD

LVDS_VDD_EN53

LCD_TST_EN24

Layout Note:

Trace width = 80mil

2

TPAN_VDD

USB_PN6_TPNL USB_PP6_TPNL

TOUCH_PANEL_INTR# 24

12

C5208

DY

SC10P50V2JN-L1-GP

D5201

1

LDO

2

BAT54CPT-2-GP

75.00054.K7D

2nd = 75.00054.J7D

3rd = 75.00054.A7D

X01 0408

3

R5202

R5202 100KR2J-1-GP

100KR2J-1-GP

LDO

1 2

C5203

SC4D7U6D3V3KX-GP

1

5V_S03D3V_S0

X01 0408

12

R5231

0R3J-0-U-GPDYR5231

0R3J-0-U-GP

DY

TPAN_VDD_F

USB_PN6_TPNL

USB_PP6_TPNL

LCDVDD_EN

LCDVDD

12

EC5201

EC5201 SCD1U25V2KX-GP

SCD1U25V2KX-GP

LDO

DY

Title

Size Document Number Rev

A2

Date: Sheet of

69.50007.A31

R5230

2nd = 69.60040.001

0R3J-0-U-GP

3rd = 69.50007.A41

F5203

POLYSW-1D1A24V-GP-U

1 2

DY

R5232 0R3J-0-U-GPR5232 0R3J-0-U-GP

12

R5223

0R3J-0-U-GP

TR5209

3 4

DY

FILTER-4P-6-GP

12

R5220

0R3J-0-U-GP

12

600mA

U4901

1

EN

VIN#5

2

GND

LDO

3

VOUT

VIN#4

RT9724GB-GP

74.09724.09F

2nd = 74.03514.07F

3rd = 74.06288.B7F

X01 0408

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

Latitude300 Has well

1

TPAN_VDD

69.10103.041

2nd = 68.00201.141

X01 0408

3D3V_S0

5

4

12

C5204

C5204 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

LDO

52 104Friday, April 19, 2013

USB_PN6 16

USB_PP6 16

X00

5

3D3V_S0

D D

X01 Change L5301 L5302 to 0ohm resistor,DY C5301 0410

3D3V_S0

12

DY

C C

0R3J-0-U-GP

1 2

0R3J-0-U-GP

1 2

C5313

SCD1U10V2KX-4GP

Travis_SW

IND-4 D7UH -300-G P

1 2

68.4R71G.10G

1 2

0R3J-0-U-GP

Travis_LDO

L5301

L5302

L5303

R5314

DY

SWR_V12SWR_LX

12

C5305

C5301

SC10U6D3V3KX-GP

C5302

SC10U6D3V3KX-GP

SC10U10V5KX-2GP

DP_AVCC33

12

C5303

SCD1U10V2KX-4GP

DP_DVCC33

12

C5304

SCD1U10V2KX-4GP

12

C5306

SCD1U10V2KX-4GP

1206 modify

B B

3D3V_S0

1

23

CIICSDA1

CIICSCL1

A A

4

5

3D3V_S0

RN5301

RN5301 SRN4K7J-8-GP

SRN4K7J-8-GP

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

Q5301

1

2

3 4

6

5

EDP_HPD15

EDP_AUX_DN8 EDP_AUX_DP8

EDP_TX0_DP8 EDP_TX0_DN8 EDP_TX1_DP8 EDP_TX1_DN8

1 2 3 4 5

SML_DATA_R

SML_CLK_R

RN5302

8 7 6

SRN100KJ-4-GP

LDO_DY

R5310 0R2J-2-GP

R5309 0R2J-2-GPR5309 0R2J-2-GP

R5312 0R2J-2-GP

R5311 0R2J-2-GPR5311 0R2J-2-GP

4

R5302

1KR2J-1-GP

1 2

R5303

R5303 100KR2J-1-GP

100KR2J-1-GP

1 2

C5320 SCD1U10V2KX-5GPC5320 SCD1U10V2KX-5GP

1 2

C5321 SCD1U10V2KX-5GPC5321 SCD1U10V2KX-5GP

1 2

C5312

C5316

1 2

SCD1U10V2KX-5GP

C5317

1 2

C5318

SCD1U10V2KX-5GP

1 2

SCD1U10V2KX-5GP

C5319

1 2

SCD1U10V2KX-5GP

12

L_BKLT_EN TEST_MODE eDP_BKL T_CTRL LVDS_VDD_EN

12

C5315

C5315 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

1 2

DY

1 2

DY

1 2

4

DP_HPD

L_BKLT_EN24 LVDS_DDC_DATA_R52 LVDS_DDC_CLK_R52

DP_HPD

TEST_MODE

EDP_AUX_DN_C EDP_AUX_DP_C DP_AVCC33

12

SCD1U10V2KX-4GP

EDP_TX0_DP_C EDP_TX0_DN_C EDP_TX1_DP_C EDP_TX1_DN_C SWR_V12 DP_REXT

12

C5310

R5301

R5301 12KR2F-L-GP

12KR2F-L-GP

SCD1U10V2KX-4GP

L_BKLT_CTRL52 LVDS_VDD_EN52

eDP_BKL T_CTRL15

SML0_DATA 18

SML1_DATA 18,24,26,76

SML0_CLK 18

SML1_CLK 18,24,26,76

1 2 3 4 5 6 7 8

9 10 11 12

PCH KBC

Slave Address: 0x94 & 0x6A

LVDS_DDC_DATA_R LVDS_DDC_CLK_R EEPROM_SDA0 EEPROM_SCL0

46

48

49

U5301

GND

HPD TEST AUX_N AUX_P DP_V33 DP_GND LANE0_P LANE0_N LANE1_P LANE1_N DP_V12 DP_REXT

RTD2136R-CGT-GP

CIICSCL1 CIICSDA1

MODE_CFG047MODE_CFG1

CIICSCL13CIICSDA14SWR_VCCK15SWR_GND16SWR_LX17SWR_VDD18PWM_OUT19PANEL_VCC20PWM_IN21PVCC22TXE3+23TXE3-

SWR_V12

DP_DVCC33

12

C5308

SCD1U10V2KX-4GP

X01 DY C5307 0410

PCH KBC

3

SWR_V12

SCD1U10V2KX-4GP

42

43

44

45

VCCK

BL_EN

MIICSCL

MIICSDA

SWR_LX

12

C5307

DY

3

C5311

12

37

38

39

40

41

TXO2-

TXO1-

TXO0-

TXO2+

TXO1+

TXO0+

24

DP_DVCC33

SC22U6D3V5MX-2GP

Close to PIN13

TXOC-

TXOC+

TXO3-

TXO3+

TXE0-

TXE0+

TXE1-

TXE1+

TXE2TXE2+ TXEC-

TXEC+

12

C5309

SCD1U10V2KX-4GP

LVDSA_DATA0# 52 LVDSA_DATA0 52 LVDSA_DATA1# 52 LVDSA_DATA1 52 LVDSA_DATA2# 52 LVDSA_DATA2 52

36 35 34 33 32 31 30 29 28 27 26 25

71.02136.B03

EEPROM

EEPROM_SDA0 LVDS_DDC_CLK_R LVDS_DDC_DATA_R

2

LVDSA_CLK# 52 LVDSA_CLK 52

LVDSB_DATA0# 52 LVDSB_DATA0 52 LVDSB_DATA1# 52 LVDSB_DATA1 52 LVDSB_DATA2# 52 LVDSB_DATA2 52 LVDSB_CLK# 52 LVDSB_CLK 52

R5304 0R2J-2-GP

1 2

R5305 0R2J-2-GP

1 2

R5316 0R2J-2-GP

1 2

DY

R5315 0R2J-2-GP

1 2

DY

DY DY

DY

2

1

3D3V_S0

R5317

R5306

12

4K7R2J-2-GP

DY

EEPROM_SCL0 EEPROM_SDA0

EEPROM_SCL0_REEPROM_SCL0 EEPROM_SDA0_R

C5314

Title

Size Document Number Rev

A3

Date: Sheet of

12

R5318

R5307

4K7R2J-2-GP

DY

3D3V_S0

12

SCD1U10V2KX-4GP

DY

Latitude300 Haswell

4K7R2J-2-GP

U5302

8 7 6 5

M24C64-WDW6P-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

LVDS_Switch

E0

VCC

E1

WC#

E2

SCL

VSS

SDA

DY

72.24C64.B0Q

2nd = 72.24C64.D0Q

1

1 2 3 4

53 104Friday, April 19, 2013

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

HDMI Level Shifter/Connector

Size Document Number Rev

Size Document Number Rev A3

A3

Tuesday, March 26, 2013

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

54 104

1

X00

5

4

3

2

1

5V_CRT_S0_R

9

12

CRT_DDCDATA_CON

C5502

CRT_DDCCLK_CON

CRT_R CRT_G

D D

CRT_B

SCD01U16V2KX-L1-GP

CRT_VSYNC_CON CRT_HSYNC_CON

12 15

1 2 3

14 13

CRT DDCDATA & DDCCLK level shift

CRT1

4

VCC_CRT

DDCDATA_ID1 DDCCLK_ID3

CRT_RED CRT_GREEN CRT_BLUE

VSYNC HSYNC

D-SUB-15-174-GP

20.21019.015

2nd = 20.20961.015

NC#4

NC#11

GND GND GND GND GND GND GND

11

5 6 7 8 10 16 17

0314 X00

5V_CRT_S0_R 5V_S05V_CRT_S0

F5501

1 2

POLYSW-1D1A8V-5-GP

69.50007.691

2nd = 69.50007.771

3rd = 69.60040.011

X01 0408

D5502

2 1

CH551H-30PT-GP

CRT_DDCDATA_CON

CRT_DDCCLK_CON

5V_CRT_S0

4

1

2 3

RN5501

RN5501 SRN2K2J-1-GP

SRN2K2J-1-GP

X01 0409

CRT_DDCDATA_CON

BLM18BB220SN-GP

L5501

68.00084.A11

DP_CRT_R

DP_CRT_G

C C

VBUCK_1D5V

VDDA33_DP

SCD1U10V2KX-L1-GP

DP_RRX

12

C5535

PTN3355

R5520 0R2J-L-GP

1 2

PTN3393

1 2

R5511

R5511 12KR2F-L-GP

12KR2F-L-GP

B B

A A

DP_CRT_B

R5527 0R2J-L-GP

1 2

PTN3355

R5521

1 2

0R2J-L-GP

PTN3393

R5529 0R2J-L-GP

1 2

PTN3355

DP_VDDD

CRT_RRX_AUX

1 2

12

C5526

SC2D2U10V3KX-L-GP

5

R550375R2F-2-GP R550375R2F-2-GP

12

SCD1U10V2KX-L1-GP

PTN3393

R5513

R5513 0R2J-L-GP

0R2J-L-GP

PTN3355

R550575R2F-2-GP R550575R2F-2-GP

R550475R2F-2-GP R550475R2F-2-GP

12

C5531

DP_VDDD

PCH_DPB_N08 PCH_DPB_P08 PCH_DPB_N18

PCH_DPB_P18 PCH_DPB_AUXN15 PCH_DPB_AUXP15

DP_LDOCAP_AUX

12

R5516

10KR2J-L-GP

C5501

SC10P50V2JN-4GP

C5501

SC10P50V2JN-4GP

12

DP_VDDDVDDD33_CORE

R5523

1 2

0R2J-L-GP

PTN3393

PCH_CRT_CLK 15

C5517 SCD1U10V2KX-L1-GPC5517 SCD1U10V2KX-L1-GP C5516 SCD1U10V2KX-L1-GPC5516 SCD1U10V2KX-L1-GP C5519 SCD1U10V2KX-L1-GPC5519 SCD1U10V2KX-L1-GP C5518 SCD1U10V2KX-L1-GPC5518 SCD1U10V2KX-L1-GP C5522 SCD1U10V2KX-L1-GPC5522 SCD1U10V2KX-L1-GP C5520 SCD1U10V2KX-L1-GPC5520 SCD1U10V2KX-L1-GP

12

C5536

SCD01U50V2KX-L-GP

LDOCAP_DIG

C5507

SC10P50V2JN-4GP

C5507

SC10P50V2JN-4GP

1 2 1 2 1 2 1 2 1 2 1 2

SCD1U10V2KX-L1-GP

1 2

12

68.00084.A11

1 2

BLM18BB220SN-GP

L5502

68.00084.A11

1 2

BLM18BB220SN-GP

L5503

68.00084.A11

1 2

C5508

SC10P50V2JN-4GP

C5508

SC10P50V2JN-4GP

12

CRT_S0

CRT_S2

CRT_S3

DP_VDDD

C5525

12

SCD1U10V2KX-L1-GP

CRT_PCH_HPD

DP_CRT_B DP_CRT_G DP_CRT_R

R5515

1K2R2F-1-GP

PTN3355

R5526 0R2J-L-GP

1 2

SC2D2U10V3KX-L-GP

12

C5530

C5529

PTN3393

12

R5518

1 2

COIL-4D7UH-31-GP

VDDD33_CORE DP_VDDA VDDA33_DP

DP_VDD_DAC DP_LDOCAP_AUX LDOCAP_DIG

PCH_DPB_N0_U PCH_DPB_P0_U PCH_DPB_N1_U PCH_DPB_P1_U PCH_DPB_AUXN_U PCH_DPB_AUXP_U

DP_RSET

DP_CRT_HSYNC_CON DP_CRT_VSYNC_CON

CRT_DDCCLK_CON CRT_DDCDATA_CON

VBUCK_1D5V

4

C5509

SC10P50V2JN-4GP

C5509

SC10P50V2JN-4GP

L5505

R5524 0R2J-L-GP

1 2

PTN3355

C5510

12

PTN3355

36

1 14 21 27

2 35

7

6 10

9

4

3 13

26 28 31 30

25 24

20 22

CRT_R

CRT_G

CRT_B

C5511

SC10P50V2JN-4GP

12

PTN3355

12

10KR2J-L-GP

U5502

VDDD33_CORE VDDA33_AUX VDDA33_DP VDDD33_IO VDDA33_DAC LDOCAP_AUX LDOCAP_DIG

ML0_N ML0_P ML1_N ML1_P AUX_N AUX_P HPD

BLU GRN RED RSET

HSYNC VSYNC

SCL SDA

PTN3393BS-GP

SC10P50V2JN-4GP

VBUCK_1D5V

C5503

SC100P50V2JN-L-GPDYC5503

SC100P50V2JN-L-GP

12

DY

12

C5540

C5540 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

S0 S1 S2 S3

RRX

RESET#

CLK_O

OSC_IN

OSC_OUT

TCK TDO TMS

TRST#

TDI

NC#8 NC#23 NC#29 NC#32

GND

C5504

12

DY

CRT_S0

37

CRT_S1

38

CRT_S2

39

CRT_S3

40

DP_RRX

5

DP_PLT_RST#

11

12 33 34

15 16 17 18 19

VBUCK_1D5V_C

8 23 29 32

41

CRT_HSYNC_CON

CRT_VSYNC_CON

SC18P50V2JN-1-GPDYC5504

SC18P50V2JN-1-GP

C5505

SC18P50V2JN-1-GPDYC5505

SC18P50V2JN-1-GP

12

DY

5V_S0

R5506

PTN3393

R5507

PTN3393

R5508

PTN3393

R5510

PTN3393

1 2

C5521 SC1U6D3V2KX-L-1-GP

PTN3393

DP_27M_IN DP_27M_OUT

PCH_CRT_DATA_C

C5534

PTN3355

PTN3393

U_TCK

R5531 10KR2J-L-GP

U_TDO

R5517

12

C5537

12

SC2D2U10V3KX-L-GP

3

Hsync & Vsync level shift

CRT_DDCCLK_CON

12

C5506

C5506 SC100P50V2JN-L-GP

SC100P50V2JN-L-GP

DP_CRT_HSYNC_CON

DP_CRT_VSYNC_CON

U5503

1

DY

IN

2

GND

3

EN

C5524

SC1U10V2KX-1GP

C5524

SC1U10V2KX-1GP

12

1 2

R5530 0R2J-L-GP

1 2

PTN3355

SCD01U50V2KX-L-GP

DP_VDDD

12

10KR2J-L-GP

12

10KR2J-L-GP

12

10KR2J-L-GP

12

10KR2J-L-GP

DY

12

PTN3355

R5525 0R2J-L-GP

1 2

PTN3355

12

C5533

SCD1U10V2KX-L1-GP

PTN3355

TLV70233DBVR-GP

74.70233.03F

2nd = 74.08818.B3F

1MR2J-1-GP

5 6

5

OUT

4

NC#4

DP_VDDD

PCH_CRT_DATA 15

VBUCK_1D5V

U_TDO

14

4

U5504B

DY

TC74VHCT125AFTQK2M-GP

7

C5538

SC1U6D3V2KX-L-1-GP

C5538

SC1U6D3V2KX-L-1-GP

12

C5541

SC1U6D3V2KX-L-1-GP

C5541

SC1U6D3V2KX-L-1-GP

12

5V_CRT_S0

12

DY

C5542

SCD01U16V2KX-3GP

14

1

U5504A

2 3

DY

TC74VHCT125AFTQK2M-GP

7

R5002 33R2J-2-GPR5002 33R2J-2-GP R5003 33R2J-2-GPR5003 33R2J-2-GP

DP_VDDD

C5539

SC10U6D3V3MX-L-GP

C5539

SC10U6D3V3MX-L-GP

12

C5532

SC2D2U10V3KX-L-GP

2

HSYNC_5

VSYNC_5 CRT_VSYNC_CON

1 2 1 2

12

C5513

R5522

1 2

0R2J-L-GP

PTN3393

12

R5519

0R5J-5-GP

DP_VDDA

12

C5527

DY

SC10U6D3V3MX-GP

RN5011

2 3 1

DY

SRN0J-6-GP

L5504

BLM15BD121SN1D-GP

12

C5514

SCD1U10V2KX-L1-GP

SC10U6D3V3MX-GP

DP_VDD_DAC

12

C5523

SCD1U10V2KX-L1-GP

12

C5528

SCD1U10V2KX-L1-GP

DP_PLT_RST#

Title

Size Document Number Rev

A3

Date: Sheet of

CRT_HSYNC_CON

4

3D3V_S0

12

DP_27M_IN

R5509

1MR2J-1-GP

DP_27M_OUT

CRT_PCH_HPD

R5512

1 2

DY

Latitude300 Haswell

5V_CRT_S0

14

13

U5504D

12 11

DY

TC74VHCT125AFTQK2M-GP

7

5V_CRT_S0

14

10

U5504C

9 8

DY

TC74VHCT125AFTQK2M-GP

7

X01 change X5501 to

82.30034.A61 0415

C5512

SC15P50V2JN-2-GP

X5501

2 3

1 2

XTAL-27MHZ-137-GP

82.30034.A61

2nd = 82.30034.351

3rd = 82.30034.B91

0R2J-L-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

LVDS_Switch

SC15P50V2JN-2-GP

41

C5515

SC15P50V2JN-2-GP

12

R5514

R5514 100KR2J-4-GP

100KR2J-4-GP

PLT_RST# 17,24,30,58,65,73,96

55 104Friday, April 19, 2013

1

12

CRT_PCH_HPD 15

X00

SSID = SATA

SATA3_PTX_HDDRX_P019 SATA3_PTX_HDDRX_N019

SATA3_PRX_HDDTX_P019 SATA3_PRX_HDDTX_N019

SATA HDD Connector

HDD1

1 2 1 2

P1

V33

P2

V33

P3

V33

5V_S0

SATA_TXP0_R

C5602SCD01U16V2KX-3GP C5602SCD01U16V2KX-3GP

12

SATA_TXN0_R

C5603SCD01U16V2KX-3GP C5603SCD01U16V2KX-3GP

12

SATA_RXP0_R

C5615SCD01U16V2KX-3GP C5615SCD01U16V2KX-3GP

SATA_RXN0_R

C5616SCD01U16V2KX-3GP C5616SCD01U16V2KX-3GP

P7

V5

P8

V5

P9

V5

P13

V12

P14

V12

P15

V12

S2

A+

S3

A-

S6

B+

S5

B-

SKT-SATA7P-15P-27-GP-U

22.10300.991

2nd = 22.10300.891

3rd = 22.10300.I11

X01 0408

NP1 NP2

GND GND GND GND GND GND GND GND

DAS/DSS

23

24

NP1 NP2

S1 S4 S7 P4 P5 P6 P10 P12

P11

1A

5V_S0

12

C5606

C5605

DY

SC10U10V5KX-2GP

SCD1U10V2KX-5GP

X01 DY C5605 0410

Close to HDD1

ODD Connector

ODD1

14 NP1

6 5

SATA_ODD_DA#_C

4 3 2

1

S7

SATA_RXP2_R

S6

SATA_RXN2_R

S5 S4

SATA_TXN2_R

S3

SATA_TXP2_R

S2 S1

NP2 15

SKT-SATA7P+6P-57-GP-U

20.81152.013

2nd = 22.10300.731

X01 ODD1 change main source to 20.81152.013 0411

SATA_ODD_PRSNT#

C5608 SCD01U16V2KX-3GPC5608 SCD01U16V2KX-3GP C5607 SCD01U16V2KX-3GPC5607 SCD01U16V2KX-3GP

ODD_PWR_5V

R5602

1 2

0R2J-2-GP

1 2 1 2

C5611 SCD01U16V2KX-3GPC5611 SCD01U16V2KX-3GP

1 2

C5612 SCD01U16V2KX-3GPC5612 SCD01U16V2KX-3GP

1 2

SATA_ODD_DA# 20

SATA_ODD_PRSNT# 19

SATA_PRX_ODDTX_P2 19

SATA_PRX_ODDTX_N2 19

SATA_PTX_ODDRX_N2 19

SATA_PTX_ODDRX_P2 19

12

R5604

R5604 10KR2J-3-GP

10KR2J-3-GP

DY

R5607

SATA_ODD_PWRGT

R5607

100KR2J-1-GP

follow CKL1.5

SUPPORT ZERO SATA ODD

12

3D3V_S0

SATA_ODD_PWRGT20

5V_S0

12

C5609

C5609 SC10U6D3V5KX-1GP

SC10U6D3V5KX-1GP

DY

X01 DY C5609 0410

SATA Zero Power ODD

U5601

U5601 SY6288CCAC-GP

SY6288CCAC-GP

EN/EN#4OCB

3

IN#3

2

IN#2

1

GND

74.02001.079

2nd = 74.06288.079

3rd = 74.02311.079

X01 0408

Current limit Active High typ =>2.5A

5

ODD_PWR_5V

6

OUT#6

7

OUT#7

8

OUT#8

SC10U6D3V5KX-1GP

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet of

Latitude300 Haswell

Friday, April 19, 2013

2.5A

ODD_PWR_5V

C5610

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

HDD/ODD

100 mil

12

56 104

X00

5

4

3

2

1

SSID = ESATA

D D

C C

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

ESATA

57 104Tuesday, March 26, 2013

1

X00

5

4

3

2

1

SSID = Wireless

D D

5V_S0

SC10U6D3V5KX-1GP

12

E51_TXD24

1 2

R5805 0R2J-2-GPR5805 0R2J-2-GP

1 2

DY

R5801 0R2J-2-GP

12

C5804

SCD1U10V2KX-5GP

WLAN_ACT

DY

CARD_WLAN_OUT#24 CARD_WPAN_OUT#24

WIFI_RF_EN24

R5806

0R2J-2-GP

C C

BT_ACT

BLUETOOTH_EN20

1 2

DY

3D3V_S0

1.1A

B B

A A

3D3V_S0

12

C5802

5

12

C5803

SCD1U10V2KX-5GP

C5807

DY

SCD1U25V2KX-GP

Mini Card Connector(802.11a/b/g)

WLAN1

3D3V_S0

WLAN_ACT

TP5801TP5801

TP5802TP5802 R5804 0R2J-2-GP

R5804 0R2J-2-GP

+5V_MINI_DEBUG

1

1 2

DY

4

BT_ACT

R5807

0R2J-2-GP

1 2

DY

USB_PN5_R

USB_PP5_R

E51_RX E51_TX

6

2

28 48

52

24

3 5

8 10 12 14 16 17 19 20 37 39 41 43 45

DEBUG

FILTER-4P-62-GP

47 49 51

42 44 46

SKT-MINI52P-81-GP-U

1st = 62.10043.G91

2nd = 62.10043.G81

3rd = 62.10043.I81

R5803

0R3J-0-U-GP

TR5801

3 4

DY

69.10080.021

2nd = 69.10103.061

R5802

0R3J-0-U-GP

1.5V

3.3V/MS_V3

+1.5V +1.5V

+3.3V/MS_V3

+3.3VAUX/MS_V3

RESERVED#3 RESERVED#5 RESERVED#8 RESERVED#10 RESERVED#12 RESERVED#14 RESERVED#16 RESERVED#17 RESERVED#19 RESERVED#20 RESERVED#37 RESERVED#39/MS_V3 RESERVED#41/MS_V3 RESERVED#43 RESERVED#45 RESERVED#47 RESERVED#49 RESERVED#51

LED_WWAN# LED_WLAN# LED_WPAN#

MINI_PCI 52P

12

3

MS_TX+/PERN0

MS_TX-/PERP0

MS_RX-/PETN0

MS_RX+/PETP0

NP1

REFCLK+

REFCLK-

USB_D-

USB_D+

SMB_CLK

SMB_DATA

WAKE#

CLKREQ#

PERST#

NP1

NP2

X01 0409

13 11

23 25

31 33

36 38

30 32

1 7 22

4

GND

9

GND

15

GND

18

GND

21

GND

26

GND

27

GND

29

GND

34

GND

35

GND

40

GND

50

GND

53

GND

54

GND

USB_PN5 16

USB_PP5 16

Title

Size Document Number Rev

A4

Date: Sheet of

2

CLK_PCIE_WLAN_P3 18 CLK_PCIE_WLAN_N3 18

PCIE_PRX_WLANTX_N3 16 PCIE_PRX_WLANTX_P3 16

PCIE_PTX_WLANRX_N3_C 16 PCIE_PTX_WLANRX_P3_C 16

USB_PN5_R USB_PP5_R

CLK_PCIE_WLAN_REQ3# 15,18 PLT_RST# 17,24,30,55,65,73,96

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

MINICARD(WLAN)/ITP CONN

Latitude300 Haswell

58 104Friday, April 19, 2013

1

X00

A

4 4

3 3

B

C

D

E

(Blanking)

2 2

1 1

A

B

C

D

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

E

59 104Tuesday, March 26, 2013

X00

5

4

3

2

1

SSID = PCH

D D

C C

B B

Wistron Corporation

A A

Title

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

(Reserved)

Latitude300 Haswell

60 104Tuesday, March 26, 2013

1

X00

5

4

3

2

1

SSID = User.Interface

Wireless LED

FRONT POWER LED

Low actived from KBC GPIO

D D

PWRLED#24

Q6101

R2

R1

PDTA144VT-GP

E

C

B

84.00144.P11

2nd = 84.DT144.A11

X01 0408

5V_S5

12

EC6101

DY

SC220P50V2KX-3GP

R6104

330R2J-3-GP

PLED1

3

AK

FPOWER_LED_ALED_PWR

12

AK

1 2

LED-W-27-GP

83.01221.R70

2nd = 83.00110.R70

X01 0408

Low actived from KBC GPIO

5V_S0

Q6105

R2

WLAN_LED#24

B

84.00144.P11

2nd = 84.DT144.A11

X01 0408

E

R1

C

PDTA144VT-GP

12

EC6102

DY

SCD1U25V2KX-GP

Place EC6806 near WLED1

R6105

12

330R2J-3-GP

WLAN_LED_AWLAN_LED_R

83.01221.R70

2nd = 83.00110.R70

X01 0408

WLED1

3

AK

1 2

LED-W-27-GP

SATA HDD LED(White)

Low actived from PCH GPIO

C C

Q6102

R2

R1

PDTA144VT-GP

E

C

SATA_LED#19

B

84.00144.P11

2nd = 84.DT144.A11

X01 0408

5V_S0

12

EC6106

DY

SC220P50V2KX-3GP

R6106

330R2J-3-GP

HDLED1

3

AK

HDD_LED_ASATA_LED_R

12

AK

1 2

LED-W-27-GP

83.01221.R70

2nd = 83.00110.R70

X01 0408

Battery LED1

Low actived from KBC GPIO

B B

CHG_AMBER_LED#24

BATT_WHITE_LED#24

A A

Battery LED2

(AMBER_LED)

Q6104

R2

R1

PDTA144VT-GP

E

C

B

84.00144.P11

2nd = 84.DT144.A11

X01 0408

Q6103

R2

R1

PDTA144VT-GP

E

C

B

84.00144.P11

2nd = 84.DT144.A11

X01 0408

(WHITE_LED)

5V_S5

DY

12

R6103

12

499R2F-2-GP

EC6105

EC6105 SC220P50V2KX-3GP

SC220P50V2KX-3GP

R6101

12

330R2J-3-GP

EC6103

EC6103 SC220P50V2KX-3GP

SC220P50V2KX-3GP

BAT_AMBERAMBER_LED_BAT

AMBER

CHLED1

1

2

LED-OW-8-GP

83.01222.X80

2nd = 83.00327.D70

BAT_WHITEWHITE_LED_BAT

2nd = 83.00327.D70

X01 0408

WHITE

ORANGE

+

3

-

+

WHITE

Low actived from KBC GPIO

5

4

3

Power button

R6102

100R2F-L1-GP-U

AFTP6801AFTP6801

1 2

1

KBC_PWRBTN#24

KBC_PWRBTN#_C

12

EC6104

SCD1U25V2KX-GP

DY

SCD1U25V2KX-GP

DY

2

PWRBT1

6

4 3 2

1

5

20.K0465.004

2nd = 20.K0382.004

X01 0408

ETY-CON4-34-GP

AFTP6802AFTP6802

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

LED Bard/Power Button

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

61 104

1

X00

5

4

3

2

1

SSID = Touch.PadSSID = KBC

Internal Keyboard Connector

3D3V_S0

D D

KROW[0..7]24

KCOL[0..16]24

C C

KB_DET#20

AFTP6901AFTP6901

AFTP6909AFTP6909 AFTP6910AFTP6910 AFTP6911AFTP6911 AFTP6913AFTP6913 AFTP6912AFTP6912 AFTP6914AFTP6914 AFTP6916AFTP6916 AFTP6915AFTP6915 AFTP6917AFTP6917 AFTP6919AFTP6919 AFTP6918AFTP6918 AFTP6920AFTP6920 AFTP6922AFTP6922 AFTP6921AFTP6921 AFTP6923AFTP6923 AFTP6925AFTP6925 AFTP6924AFTP6924 AFTP6926AFTP6926 AFTP6928AFTP6928 AFTP6927AFTP6927 AFTP6929AFTP6929 AFTP6931AFTP6931 AFTP6930AFTP6930 AFTP6932AFTP6932 AFTP6934AFTP6934

AFTP6902AFTP6902

CAP LED Control

LOW actived from KBC GPIO

CAP_LED#24

1 2

R6202

R6202 33R2J-2-GP

33R2J-2-GP

CAP_LED_R#

1

KROW7

1

KROW6

1

KROW4

1

KROW2

1

KROW5

1

KROW1

1

KROW3

1

KROW0

1

KCOL5

1

KCOL4

1

KCOL7

1

KCOL6

1

KCOL8

1

KCOL3

1

KCOL1

1

KCOL2

1

KCOL0

1

KCOL12

1

KCOL16

1

KCOL15

1

KCOL13

1

KCOL14

1

KCOL9

1

KCOL11

1

KCOL10

1

CAP_LED

1

Q6201

R2

B

R1

PDTA144VT-GP

84.00144.P11

2nd = 84.DT144.A11

KB1

31

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32

ACES-CON30-10-GP

5V_S0

E

C

20.K0592.030

2nd = 20.K0565.030

3rd = 20.K0621.030

X01 0408

R6201

1 2

1KR2J-1-GP

CAP_LEDCAP_LED_Q

R6209 0R3J-0-U-GPR6209 0R3J-0-U-GP

1 2

TP_VDD

1

EC6201

23

4

EC6202

SC33P50V2JN-3GPDYEC6202

SC33P50V2JN-3GP

EC6203

SC33P50V2JN-3GPDYEC6203

12

DY

AFTP6906AFTP6906 AFTP6907AFTP6907 AFTP6908AFTP6908 AFTP6933AFTP6933

AFTP6937AFTP6937

SC33P50V2JN-3GP

DY

12

DY

1 1 1 1 1

RN6201

SRN10KJ-5-GP

TPCLK24

TPDATA24

PCH_SMBCLK12,13,18,96

PCH_SMBDATA12,13,18,96

SC33P50V2JN-3GP

TP_VDD TPCLK_C TPDATA_C PCH_SMBCLK_R PCH_SMBDATA_R

X01 0408

B B

TP_VDD

12

C6201

SCD1U10V2KX-5GP

RN6202

1 2 3 4 5

SRN0J-7-GP

X01 0405 change RN6202 to 0ohm from 10K

EC6204

SC33P50V2JN-3GPDYEC6204

SC33P50V2JN-3GP

12

TPCLK_C

8

TPDATA_C

7

PCH_SMBCLK_R

6

PCH_SMBDATA_R

AFTP6935AFTP6935

Touch Pad Connector

TPAD1

7

1

2 3 4 5 6

8

ACES-CON6-28-GP

20.K0422.006

2nd = 20.K0382.006

1

2

3

4

5

6

2nd = 20.K0382.006

X01 0409

Pin name

VDD

PS2_CLK

PS2_DATA

GND

SMBUS_CLK

SMBUS_DATA

1

Refer "PN 510-002792-01 Rev 2 " module spec

Pin number

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

Key Board/Touch Pad

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

62 104

1

X00

5

4

3

2

1

SSID = User.Interface

D D

C C

R6302

1 2

DY

0R3J-0-U-GP

X01 0408

20.K0397.006

2nd = 20.K0610.006

1

2 3 4 5 6

USB_PN2_R USB_PP2_R

+5V_USB1

USB_PN2_R USB_PP2_R

1

AFTP8201AFTP8201

1

AFTP8204AFTP8204

AFTP8203AFTP8203

1

AFTP8202AFTP8202

1

IOBD 1

7

8

PTWO-CON6-13-GP

B B

PTWO-CON6-13-GP

USB_PN216

USB_PP216

+5V_USB1

0R3J-0-U-GP

TR6301

1 2

FILTER-4P-6-GP

R6303

1 2

DY

0R3J-0-U-GP

U6302

69.10103.041

34

2nd = 68.00201.141

X01 0408

USB_PN2_R

USB_PP2_R

TVLST2304AD0-1-GP

456

TVLST2304AD0-1-GP

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

IO Board Connector

Size Document Number Rev

A3

Date: Sheet of

IO Board Connector

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

63 104Friday, April 19, 2013

1

X00

123

USB_PP2_R USB_PN2_R

A A

5

4

3

5

4

3

2

1

SSID = User.Interface

D D

3D3V_S5

12

R6401

100KR2J-1-GP

LID_CLOSE#24

C C

DY

1 2

12

SCD1U10V2KX-5GP

C6401

C6401 SCD047U16V2KX-1-GP

SCD047U16V2KX-1-GP

C6402

LID_CLOSE#

LIDSW1

1

VSS

2

VDD

3

OUT

S-5712ACDL1-M3T1U-GP

74.05712.0BB

2nd = 74.09132.C7B

X01 0408

B B

Wistron Corporation

A A

Title

Hall Sensor

Size Document Number Rev

Size Document Number Rev A4

A4

Friday, April 19, 2013

Date: Sheet of

5

4

3

Date: Sheet of

2

Hall Sensor

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X00

64 104

1

5

4

3

2

1

SSID = DEBUG PORT

D D

Layout Note:

Place near trace separated point

LPC_AD[3..0]18,24

LPC_FRAME#18,24 PLT_RST#17,24,30,55,58,73,96

C C

B B

LPC_AD[3..0]

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

R6501 0R2J-2-GP

R6501 0R2J-2-GP R6502 0R2J-2-GP

R6502 0R2J-2-GP

RN6501

RN6501 SRN0J-7-GP

SRN0J-7-GP

1 2 3

LPC

4 5

1 2

LPC

1 2

LPC

8 7 6

LPC_LAD0_R LPC_LAD1_R LPC_LAD2_R LPC_LAD3_R

LPC_FRAME#_DEBUG PLT_RST#_DEBUG

CLK_PCI_LPC18

Debug Connector

3D3V_S0

ACES-CON10-1-GP-U1

DB1

1

2 3 4 5

LPC

6 7 8 9

10

20.F0714.010

11

12

Wistron Corporation

A A

Title

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

Latitude300 Haswell

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Dubug connector

65 104Friday, April 19, 2013

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

66 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

67 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

RESERVED

Size Document Number Rev

A3

Date: Sheet of

RESERVED

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

68 104Tuesday, March 26, 2013

1

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

USB3.0 PORT

69 104Tuesday, March 26, 2013

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

70 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

71 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

72 104Tuesday, March 26, 2013

X00

5

4

3

2

1

dGPU Reset

DGPU_HOLD_RST#15

PLT_RST#17,24,30,55,58,65,96

D D

X01 0408

PEG_CLKREQ#18

C C

B B

A A

5

1

2

U74LVC1G08G-AL5-R-GP-U

73.01G08.EHG

2nd = 73.7SZ08.EAH

3rd = 73.7SZ08.DAH

R7304 0R2J-2-GP

1 2

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

Q7301

D

2N7002K-2-GP

0R2J-2-GP

U7301

A

OPS

B

GND3Y

DY

OPS

1 2

DY

R7305

VCC

3D3V_VGA_S0

5

X01 0408

4

3D3V_VGA_S0

G

S

OPS

1 2

R7303

R7303 10KR2J-3-GP

10KR2J-3-GP

CPU_RXP_C_dGPU_TXP016 CPU_RXN_C_dGPU_TXN016

dGPU_RXP_C_CPU_TXP016 dGPU_RXN_C_CPU_TXN016

CPU_RXP_C_dGPU_TXP116 CPU_RXN_C_dGPU_TXN116

dGPU_RXP_C_CPU_TXP116 dGPU_RXN_C_CPU_TXN116

CPU_RXP_C_dGPU_TXP216 CPU_RXN_C_dGPU_TXN216

dGPU_RXP_C_CPU_TXP216 dGPU_RXN_C_CPU_TXN216

CPU_RXP_C_dGPU_TXP316 CPU_RXN_C_dGPU_TXN316

dGPU_RXP_C_CPU_TXP316 dGPU_RXN_C_CPU_TXN316

12

SC10U6D3V5KX-1GP

12

SC10U6D3V5KX-1GP

C7317

SC4D7U6D3V3KX-GP

2

1D05V_VGA_S0

12

OPS

C7326

C7325

SC10U6D3V5KX-1GP

1D05V_VGA_S0

12

OPS

C7328

C7327

SC10U6D3V5KX-1GP

3D3V_VGA_S0

POWER IC

12

C7319

OPS

SC1U10V2KX-1GP

OPS

SC10U6D3V5KX-1GP

OPS

SC10U6D3V5KX-1GP

12

OPS

1.05V +/- 30mV

3.3A

3.3V +/- 5% 210mA

N14M-G E

L7301

MHC1608S121PBP-GP

1 2

68.00335.151

2nd = 68.00230.241

R7308

0R3J-0-U-GP

1 2

N14P-GV 2

1D05V_VGA_S0

1.05V +/- 30mV 150mA

X01 0408

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_PCIE/STRAPPING(1/5)

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, April 19, 2013

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

1

73 104

X00

12

R7306

R7306 100KR2F-L1-GP

100KR2F-L1-GP

OPS

1 OF 14

GPU1A

1/14 PCI_EXPRESS

GK208/GF117/GF119

PEX_WAKE#

PEX_RST#

PEX_CLKREQ#

PEX_REFCLK PEX_REFCLK#

PEX_TX0 PEX_TX0#

PEX_RX0 PEX_RX0#

PEX_TX1 PEX_TX1#

PEX_RX1 PEX_RX1#

PEX_TX2 PEX_TX2#

PEX_RX2 PEX_RX2#

PEX_TX3 PEX_TX3#

PEX_RX3 PEX_RX3#

PEX_TX4 PEX_TX4#

PEX_RX4 PEX_RX4#

PEX_TX5 PEX_TX5#

PEX_RX5 PEX_RX5#

PEX_TX6 PEX_TX6#

PEX_RX6 PEX_RX6#

PEX_TX7 PEX_TX7#

PEX_RX7 PEX_RX7#

PEX_TX8 PEX_TX8#

PEX_RX8 PEX_RX8#

PEX_TX9 PEX_TX9#

PEX_RX9 PEX_RX9#

PEX_TX10 PEX_TX10#

PEX_RX10 PEX_RX10#

PEX_TX11 PEX_TX11#

PEX_RX11 PEX_RX11#

PEX_TX12 PEX_TX12#

PEX_RX12 PEX_RX12#

PEX_TX13 PEX_TX13#

PEX_RX13 PEX_RX13#

PEX_TX14 PEX_TX14#

PEX_RX14 PEX_RX14#

PEX_TX15 PEX_TX15#

PEX_RX15 PEX_RX15#

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GK208/GF117/GF119

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

GF117GF119

GF117GF119 GK208

GK208

3

AB10 AC10

AD11 AC11

AC12 AB12

AG10

AB13 AC13

AE10

AD14 AC14

AE12

AC15 AB15

AG12 AG13

AB16 AC16

AE13

AD17 AC17

AE15

AC18 AB18

AG15 AG16

AB19 AC19

AE16

AD20 AC20

AE18

AC21 AB21

AG18 AG19

AD23 AE23

AE19

AE24

AE21

AG24 AG25

AG21 AG22

AB6

AC7

AC6

AE8

AD8

AC9

AB9

AG6 AG7

AF7 AE7

AE9 AF9

AG9

AF10

AF12

AF13

AF15

AF16

AF18

AF19

AF24

AF21

VGA_RST#76

CLK_PCIE_VGA18 CLK_PCIE_VGA#18

OPS

C7301 SCD22U10V2KX-1GP

1 2

OPS

C7302 SCD22U10V2KX-1GP

1 2

OPS

C7303 SCD22U10V2KX-1GP

1 2

OPS

C7304 SCD22U10V2KX-1GP

1 2

OPS

C7305 SCD22U10V2KX-1GP

1 2

OPS

C7306 SCD22U10V2KX-1GP

1 2

OPS

C7307 SCD22U10V2KX-1GP

1 2

OPS

C7308 SCD22U10V2KX-1GP

1 2

4

VGA_RST#

GPU_CLKREQ#

dGPU_TXP_CPU_RXP0 dGPU_TXN_CPU_RXN0

dGPU_TXP_CPU_RXP1 dGPU_TXN_CPU_RXN1

dGPU_TXP_CPU_RXP2 dGPU_TXN_CPU_RXN2

dGPU_TXP_CPU_RXP3 dGPU_TXN_CPU_RXN3

1 OF 14

PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD PEX_IOVDD

PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ PEX_IOVDDQ

PEX_PLL_HVDD PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT#

PEX_PLLVDD PEX_PLLVDD

TESTMODE

PEX_TERMP

Place close VDD ball

C7312

AA22 AB23 AC24 AD25 AE26 AE27

AA10 AA12 AA13 AA16 AA18 AA19 AA20

C7311

AA21 AB22 AC23 AD24 AE25 AF26 AF27

AA8 AA9

AB8

F2

F1

PEXTSTCLK_OUT

AF22

PEXTSTCLK_OUT#

AE22

VCC1R05VIDEO_PEX_PLLVDD

AA14 AA15

TESTMODE

AD9

10KR2F-2-GP

PEX_TERMP

AF25

2K49R2F-GP

12

OPS

SC1U10V2KX-1GP

12

OPS

SC1U10V2KX-1GP

R7302

1 2

OPS

R7301

1 2

OPS

Place close Chip

C7313

OPS

C7310

SC4D7U6D3V3KX-GP

SC1U10V2KX-1GP

C7323

OPS

C7322

SC10U6D3V5KX-1GP

12

OPS

Place close ChipPlace close VDD ball

C7309

12

OPS

C7320

OPS

C7321

SC10U6D3V5KX-1GP

OPS

SC4D7U6D3V3KX-GP

C7314

12

OPS

SC1U10V2KX-1GP

Place close Chip

C7316

R7307

200R2F-L-GP

1 2

DY

12

OPS

SCD1U10V2KX-5GP

C7315

OPS

SC4D7U6D3V3KX-GP

VGA_SENSE 82

GND_SENSE 82

C7324

OPS

SC4D7U6D3V3KX-GP

12

Place close VDD ball Place close Chip

12

C7318

SCD1U10V2KX-5GP

OPS

SCD1U10V2KX-5GP

OPS

5

4

3

2

1

LVDS Interface

7 OF 14

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

DVI/HDMI

I2CW_SDA

I2CW_SDA I2CW_SCL

I2CW_SCL

GF119/GK208

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

7 OF 14

AC4

IFPA_TXC#

AC3

IFPA_TXC

Y3

IFPA_TXD0#

Y4

IFPA_TXD0

AA2

IFPA_TXD1#

AA3

IFPA_TXD1

AA1

IFPA_TXD2#

AB1

IFPA_TXD2

AA5

IFPA_TXD3#

AA4

IFPA_TXD3

AB4

IFPB_TXC#

AB5

IFPB_TXC

AB2

IFPB_TXD4#

AB3

IFPB_TXD4

AD2

IFPB_TXD5#

AD3

IFPB_TXD5

AD1

IFPB_TXD6#

AE1

IFPB_TXD6

AD5

IFPB_TXD7#

AD4

IFPB_TXD7

B3

GPIO14

8 OF 14

IFPC

DP

IFPC_AUX_I2CW_SDA#

IFPC_AUX_I2CW_SCL

IFPC_L3#

IFPC_L3

IFPC_L2#

IFPC_L2

IFPC_L1#

IFPC_L1

IFPC_L0#

IFPC_L0

GPIO15

9 OF 14

GF119/GK208

IFPD_AUX_I2CX_SDA#

IFPD_AUX_I2CX_SCL

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

GF119/GK208

I2CY_SDA

I2CY_SDA I2CY_SCL

I2CY_SCL

TXC

TXC TXCTXC

TXCTXC

TXD0

TXD0 TXD0

TXD0

TXD1NC

TXD1NC TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

HPD_E

GF119/GK208

I2CZ_SDA

I2CZ_SDA I2CZ_SCL

I2CZ_SCL

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

NC FOR GK208

HPD_F

9 OF 14

DP

P4 P3

R5

IFPD_L3#

R4

IFPD_L3

T5

IFPD_L2#

T4

IFPD_L2

U4

IFPD_L1#

U3

IFPD_L1

V4

IFPD_L0#

V3

IFPD_L0

D4

GPIO17

10 OF 14

DPDVI-SL/HDMI

IFPE_AUX_I2CY_SDA#

IFPE_AUX_I2CY_SCL

IFPE_L3#

IFPE_L3

IFPE_L2#

IFPE_L2

IFPE_L1#

IFPE_L1

IFPE_L0#

IFPE_L0

GPIO18

IFPF_AUX_I2CZ_SDA#

IFPF_AUX_I2CZ_SCL

IFPF_L3#

IFPF_L3

IFPF_L2#

IFPF_L2

IFPF_L1#

IFPF_L1

IFPF_L0#

IFPF_L0

GPIO19

J3 J2

J1 K1

K3 K2

M3 M2

M1 N1

C2

H4 H3

J5 J4

K5 K4

L4 L3

M5 M4

F7

GPU1I

6/14 IFPD

GF119/GK208

U6

IFPD_RSET

IFPC_ PLLVD D

4

DY

1

2 3

IFPEF _PLLV DD

N5 N4

N3 N2

R3 R2

R1 T1

T3 T2

IFPEF _IOVD D

C3

4

RN7403

RN7403 SRN10KJ-5-GP

SRN10KJ-5-GP

DY

1

2 3

IFPC_ IOVDD

RN7401

RN7401 SRN10KJ-5-GP

SRN10KJ-5-GP

T7

IFPD_PLLVDD

R7

IFPD_PLLVDD

R6

IFPD_IOVDD

GF119/GK208

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GPU1J

7/14 IFPEF

J7

IFPEF_PLLVDD

K7

IFPEF_PLLVDD

K6

IFPEF_RSET

H6

IFPE_IOVDD

J6

IFPF_IOVDD

IFPD

GF119

IFPE

IFPF

GF117

GF117 GK208

GK208

NC

GF117

GF117 GK208

GK208

GF117

NC

GF117

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

GF117

DVI-DL

I2CY_SDA

NC

I2CY_SDA

NC

I2CY_SCL

NC

I2CY_SCL

NC

TXC

NC

TXC

NC

NC TXD0

NC TXD0 NC

NC

TXD0

TXD1

NC

TXD1

NC

TXD1

NC

TXD2

NC

TXD2

NC

TXD2

NC

HPD_E

GF117

DVI-DL DP

NC

NC NC

NC

NC NC

NC

TXD3

NC

TXD3

NC

TXD3

NC

TXD4

NC

TXD4

NC

TXD4

TXD5NC

NC

TXD5

NC

TXD5

NC

DVI/HDMI

I2CX_SDA

I2CX_SDA I2CX_SCL

I2CX_SCL

NC FOR GK208

DVI-SL/HDMI

GPU1G

4/14 IFPAB

D D

IFPAB _PLLV DD

IFPAB _IOVD D

4

RN7402

RN7402 SRN10KJ-5-GP

SRN10KJ-5-GP

DY

1

C C

2 3

4/14 IFPAB

GF119/GK208

AA6

IFPAB_RSET

V7

IFPAB_PLLVDD

W7

IFPAB_PLLVDD

GF119/GK208

W6

IFPA_IOVDD

Y6

IFPB_IOVDD

IFPAB

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GF117

NC

HDMI Interface

GPU1H

5/14 IFPC

GF119/GK208

T6

IFPC_RSET

IFPD_ PLLVD D

B B

4

DY

1

2 3

IFPD_ IOVDD

RN7404

RN7404 SRN10KJ-5-GP

SRN10KJ-5-GP

M7

IFPC_PLLVDD

N7

IFPC_PLLVDD

P6

IFPC_IOVDD

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GF117

NC

NC NC

NC NC NC

NC

GF117

NC

NC NC

NC

NC NC

NC

NC NC

NC

NC NC

NC

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

A A

5

4

3

OPS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A2

A2

Tuesday, March 26, 2013

Tuesday, March 26, 2013 Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

GPU Memory(2/5)

Latitude300 Haswell

1

74 104

X00

5

FBA_D[0..31]78

D D

FBA_D[32..63]79

C C

FBA_DQM078 FBA_DQM178 FBA_DQM278 FBA_DQM378 FBA_DQM479 FBA_DQM579 FBA_DQM679 FBA_DQM779

FBA_EDC078 FBA_EDC178 FBA_EDC278 FBA_EDC378 FBA_EDC479 FBA_EDC579 FBA_EDC679 FBA_EDC779

B B

TP7503TP7503

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7

FBA_DQS_RN078 FBA_DQS_RN178 FBA_DQS_RN278 FBA_DQS_RN378 FBA_DQS_RN479 FBA_DQS_RN579 FBA_DQS_RN679 FBA_DQS_RN779

FB_VREF

1

GPU1B

E18 F18 E16 F17 D20 D21 F20 E21 E15 D15 F15 F13 C13 B13 E13 D13 B15 C16 A13 A15 B18 A18 A19 C19 B24 C23 A25 A24 A21 B21 C20 C21 R22 R24 T22 R23 N25 N26 N23 N24 V23 V22 T23 U22 Y24

AA24

Y22 AA23 AD27 AB25 AD26 AC25 AA27 AA26

W26

Y25

R26

T25

N27

R27

V26

V27

W27 W25

D19

D14

C17

C22

P24

W24

AA25

U25

E19

C15

B16

B22

R25

W23

AB26

T26

F19

C14

A16

A22

P25

W22

AB27

T27

D23

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

2/14 FBA

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

FB_VREF_PROBE

GF119 GF117/GK208

FB_PLLAVDD

GF117 GF119/GK208

NC

FB_CLAMP

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBA_WCK01

FBA_WCK01#

FBA_WCK23

FBA_WCK23#

FBA_WCK45

FBA_WCK45#

FBA_WCK67

FBA_WCK67#

FB_PLLAVDD

FB_DLLAVDD

2 OF 14

FB_CLAM

F3

C27 C26 E24 F24 D27 D26 F25 F26 F23 G22 G23 G24 F27 G25 G27 G26 M24 M23 K24 K23 M27 M26 M25 K26 K22 J23 J25 J24 K27 K25 J27 J26

F22 J22

D24 D25 N22 M22

D18 C18 D17 D16 T24 U24 V24 V25

62mA

F16

P22

35mA

H22

4

R7519

R7518 10KR2F-2-GP

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0P FBA_CLK0N FBA_CLK1P FBA_CLK1N

Under GPU

OPS_GC6

1 2

0R2J-L-GP

1 2

OPS

FBA_CMD0 78

TP7501 TPAD14-OP-GPTP7501 TPAD14-OP-GP

1

FBA_CMD2 78 FBA_CMD3 78 FBA_CMD4 78,79 FBA_CMD5 78,79 FBA_CMD6 78,79 FBA_CMD7 78,79 FBA_CMD8 78,79 FBA_CMD9 78,79 FBA_CMD10 78,79 FBA_CMD11 78,79 FBA_CMD12 78,79 FBA_CMD13 78,79

TP7505 TPAD14-OP-GPTP7505 TPAD14-OP-GP

1

FBA_CMD15 78,79 FBA_CMD16 79

TP7502 TPAD14-OP-GPTP7502 TPAD14-OP-GP

1

FBA_CMD18 79 FBA_CMD19 79 FBA_CMD20 78,79 FBA_CMD21 78,79 FBA_CMD22 78,79 FBA_CMD23 78,79 FBA_CMD24 78,79 FBA_CMD25 78,79 FBA_CMD26 78,79 FBA_CMD27 78,79 FBA_CMD28 78,79 FBA_CMD29 78,79 FBA_CMD30 78,79

TP7504 TPAD14-OP-GPTP7504 TPAD14-OP-GP

1

R7501 60D4R2F-GP

1 2

DY

R7503 60D4R2F-GP

1 2

DY

FBA_CLK0P 78 FBA_CLK0N 78 FBA_CLK1P 79 FBA_CLK1N 79

Near GPU

FBA_PLL_AVDD

12

C7505

C7518

OPS

SCD1U10V2KX-5GP

SC22U6D3V5MX-2GP

EC_FB_CLAMP 24,76,83

FBA_CMD5 FBA_CMD2 FBA_CMD3 FBA_CMD19 FBA_CMD18

1D35V_VGA_S0

1D05V_VGA_S0

L7501

(

21

OPS

BLM18KG300TN1D-GP

CHIP BEAD BLM18KG300TN1D MURATA

68.00084.H41

30ohm@100MHZ(ESR=0.01ohm)

3

12

R7508

OPS

10KR2F-2-GP

R7509

10KR2F-2-GP

1D35V_VGA_S0

12

R7510

OPS

10KR2F-2-GP

Under GPU

R7505

OPS

40D2R2F-GP

12

R7507

OPS

1 2

42D2R2F-GP

12

R7511

10KR2F-2-GP

FB_CAL_PD_VDDQ

12

FB_CAL_PU_GND

FB_CAL_TERM_GND

R7506

51D1R2F-GP

12

R7512

OPS

10KR2F-2-GP

4 OF 14

GPU1D

12/14 FBVDDQ

FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ FBVDDQ

D22

FB_CAL_PD_VDDQ

C24

FB_CAL_PU_GND

B25

FB_CAL_TERM_GND

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

2

1.5V +/- 3%

4.88A

OPS

SC1U6D3V2KX-GP

OPS

SCD1U10V2KX-5GP

Near GPU

C7507

C7513

12

C7511

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

OPS

12

OPS

SC4D7U6D3V3KX-GP

12

Under GPU

B26 C25 E23 E26 F14 F21 G13 G14 G15 G16 G18 G19 G20 G21 H24 H26 J21 K21 L22 L24 L26 M21 N21 R21 T21 V21 W21

C7501

C7502

12

OPS

SCD1U10V2KX-5GP

Close to DRAM

C7504

C7503

12

OPS

SCD1U10V2KX-5GP

C7525

C7526

C7514

C7528

OPS

SC4D7U6D3V3KX-GP

OPS

SC1U6D3V2KX-GP

1D35V_VGA_S0

C7517

12

OPS

1 2

SC10U10V5KX-2GP

C7527

12

OPS

SC1U6D3V2KX-GP

C7520

C7515

OPS

SC22U6D3V5MX-2GP

OPS

SC1U6D3V2KX-GP

1

12

1D35V_VGA_S0

C7519

C7516

12

OPS

SC1U6D3V2KX-GP

C7521

OPS

SC1U6D3V2KX-GP

C7531

C7530

12

OPS

SC1U6D3V2KX-GP

A A

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

GPU_DP/LVDS/CRT/GPIO(3/5)

Size Document Number Rev

Size Document Number Rev A2

A2

Friday, April 19, 2013

Friday, April 19, 2013 Date: Sheet of

Date: Sheet of

5

4

3

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Latitude300 Haswell

1

75 104

X00

5

11 OF 14

GPU1K

3/14 DACA

GF117 GF119/GK208

GF119/GK208

GF117 GF119/GK208

GF119/GK208

W5

AE2

AF2

D D

C C

TP7602

TP7602 TP7605

TP7605 TP7601

TP7601

B B

DACA_VDD

DACA_VREF

DACA_RSET

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

TP7603

TP7604

1 1 1

OPS

OPS OPS

OPS

R7607

R7607 40K2R2F-GP

40K2R2F-GP

NC

TSEN_VRE F

1

OPS

1 2

N14P-GV2

NC NC

N12P_JTAG_TCK N12P_JTAG_TMS N12P_JTAG_TDI N12P_JTAG_TDO N12P_JTAG_TRST

4

1

2 3

GF117

NC

NC NC

NC

P2800_VGA_DXN

P2800_VGA_DXP

RN7602

RN7602 SRN10KJ-5-GP

SRN10KJ-5-GP

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

STRAP_REF0_GND_N9

11 OF 14

I2CA_SCL I2CA_SDA

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

E12

F12

AE5 AD6 AE6 AF6 AG4

E10

F10

D1 D2 E4 E3 D3

C1

F6

F4

F5

I2CA_SCL

B7

I2CA_SDA

A7

AE3 AE4

AG3

AF4

AF3

GPU1N

8/14 MISC1

THERMDN

THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GPU1L

10/14 MISC2

VMON_IN0 VMON_IN1

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

GF119

STRAP5

MULTI_ST RAP_R EF0_ GND

GF119

MULTI_ST RAP_R EF1_ GND

MULTI_ST RAP_R EF2_ GND

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

GF117/GF119/GK2 08

NC

NC NC

NC

GF117

GF117 GK208

GK208

NC

3D3V_VGA_S0

RN7603

1234

OPS

SRN2K2J-1-GP

14 OF 14

SMBC_THERM_NV

D9

I2CS_SCL

SMBD_THERM_NV

D8

I2CS_SDA

GF117

NC

NC NC

NC

GK208

GK208 OVERT

OVERT

GF117GK208

GPIO16

NC

GPIO16

NC

GPIO20

NC

GPIO20

NC

GPIO8

NC

GPIO8

NC

GF117

GK208

NC

I2CB_SC L

C9

I2CB_SCL

I2CB_SD A

C8

I2CB_SDA

FB_CLAMP_MON

C6

GPIO0

B2

GPIO1

D6

GPIO2

C7

GPIO3

F9

GPIO4

A3

GPIO5

FB_CLAMP_TGL_REQ#

A4

GPIO6

B6

GPIO7

GPIO8_OVERT#

A6

GPIO8

GPIO9_ALERT

F8

GPIO9

GPIO10_FBVREF

C5

GPIO10

E7

GPIO11

PWR_LEVEL

D7

GPIO12

B4

GPIO13

GF119

D5

GPIO16

E6

GPIO20

C4

GPIO21

12 OF 14

ROM_CS#

D12

ROM_CS#

ROM_SI

B12

ROM_SI

ROM_SO

A12

ROM_SO

ROM_SCLK

C12

ROM_SCLK

BUFRST#

D11

BUFRST#

D10

NC

PGOOD

GF119

E9

NC

N14X no support CEC

CEC

GF117

GF117 GK208

GK208 GF119

GF119

I2CC_SCL

A9

I2CC_SCL

I2CC_SDA

B9

I2CC_SDA

GF119

GF119 GK208

GF117

GK208

RN7604

1234

OPS

SRN2K2J-1-GP

RN7605

1234

OPS

SRN2K2J-1-GP

DA-05691-001_V05 P15 GPIO20/21 NC : for ALL

3D3V_VGA_S0

R7626

R7626 10KR2J-3-GP

10KR2J-3-GP

DY

1 2

R7628

12

OPS

10KR2J-3-GP

3D3V_VGA_S0

GPIO10_FBVREF

GPIO10_FBVREF 78,79

VGA_CORE_VID 82

VGA_CORE_PSI 82

4

1D05V_VGA_S0

X01 0408

2nd = 68.00217.751

X01 0408

180ohm@100MHz DCR=0.3 ohm Max current = 300mA

12

R7610

R7610 100KR2J-1-GP

100KR2J-1-GP

OPS

3D3V_VGA_S0

12

OPS

30ohm@100MHz DCR=0.04 ohm Max current = 3000mA

L7601

MHC1608S300QBP-GP

1 2

OPS

68.00335.051

2nd = 68.00214.091

C7605

SCD1U10V2KX-5GP

L7602

MCB1608S181FBP-GP

1 2

OPS

68.00909.261

R7605

R7605 10KR2J-3-GP

10KR2J-3-GP

D7601

DY

1SS400GPT-GP

83.00400.C1F

2nd = 83.27101.01F

3rd = 83.01426.01F

D7602

OPS

1SS400GPT-GP

83.00400.C1F

2nd = 83.27101.01F

3rd = 83.01426.01F

X01 0408

C7601

12

OPS

12

OPS

SCD1U10V2KX-5GP

KA

X01 0408

KA

12

OPS

12

C7604

C7603

OPS

SC4D7U6D3V3KX-GP

AC_PRESENT 17,24

OVER_CURRENT_P8# 24

52mA

C7606

SC2D2U6D3V2MX-GP

111mA

12

C7602

OPS

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

3

2

1

NV request to need to be keeped

13 OF 14

GPU1M

9/14 XTAL_PLL

GPU_PLL_VDD

L6

CORE_PLLVDD

SP_PLLVDD

M6

SP_PLLVDD

N6

NC

VID_PLLVDD

GF117

GF119/GK208

12

OPS

VIDEO_THERM_OVERT#82

VIDEO_CLK_XTAL_SS

12

R7601

R7601 10KR2J-3-GP

10KR2J-3-GP

SC15P50V2JN-2-GP

GF119/GK208

A10

XTAL_SSIN

C11

XTAL_IN

N14M-GE-S-A2-GP

20PF 5% 50V +/-0. 25PF 0402

71.0N14M.B0U

R7603

1MR2J-1-GP

OPS

27MHZ_IN

1 2

DY

X7601

41

27MHZ_OUT_R

2 3

OPS

XTAL-27MHZ-85-GP

R7612

1 2

OPS

10KR2J-3-GP

R7624

1 2

OPS

0R2J-2-GP

6

OPS

123 4

5

XTAL-27MHZ-85-GP

82.30034.641

2nd = 82.30034.A81

3rd = 82.30034.651

X01 0408

R7613

R7613 10KR2J-3-GP

10KR2J-3-GP

1 2

OPS

Q7602

Q7602 2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

3D3V_VGA_S0

Q7601_G

Q7601

3 4

2

1

OPS

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

GPIO8_OVERT#

5

6

C7607

1 2

OPS

X01 3/7 Change value from test report

VGA_RST#73

GPIO9_ALERT

3D3V_VGA_S0

SML1_DATA18,24,26,53

SML1_CLK18,24,26,53

13 OF 14

XTAL_OUTBUFF

XTAL_OUT

27MHZ_OUT

R7604

R7604 0R2J-2-GP

0R2J-2-GP

OPS

1 2

C7608

C7608 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

1 2

OPS

X01 0408

PURE_HW_SHUTDOWN# 24,26,36

SMBD_THERM_NV

2N7002KDW-GP

SMBC_THERM_NV

C10

B10

3D3V_VGA_S0

4

OPS

1

2 3

N12P_XTAL_OUTBUFF

RN7601

RN7601 SRN4K7J-8-GP

SRN4K7J-8-GP

12

R7602

R7602 10KR2J-3-GP

10KR2J-3-GP

OPS

N14M-GE, N14P-GV2 Strapping

ROM_SCLK

ROM_SO

ROM_SI

4K99R2F-L-GP

GV2_ROM_SCLK

10KR2J-3-GP

3D3V_VGA_S0

R7608

R7614

DY

12

R7611

R7611 4K99R2F-L-GP

4K99R2F-L-GP

GV2_ROM_SO

12

R7620

R7620 10KR2J-3-GP

10KR2J-3-GP

DY

12

R7615

R7615 10KR2J-3-GP

10KR2J-3-GP

GV2_Micron

12

10KR2J-3-GP

DY

12

GV2_Hynix

R7619

R7618

R7618 15KR2F-GP

15KR2F-GP

STRAP0

STRAP1

45K3R2F-L-GP

GV2_STRAP0

10KR2J-3-GP

3D3V_VGA_S0

R7616

R7621

DY

12

R7622

R7622 10KR2J-3-GP

10KR2J-3-GP

DY

12

R7617

R7617 4K99R2F-L-GP

4K99R2F-L-GP

GV2_STRAP1

X01 Modify VRAM

STRAP2

STRAP3

STRAP4

Strap pin setting 0409

3D3V_VGA_S0

12

R7623

10KR2J-3-GP

DY

12

R7609

15KR2F-GP

GV2_STRAP2

3

12

R7629

R7629 4K99R2F-L-GP

4K99R2F-L-GP

GV2_STRAP3

12

R7633

R7633 10KR2J-3-GP

10KR2J-3-GP

DY

12

R7630

R7630 10KR2J-3-GP

10KR2J-3-GP

DY

12

R7631

R7631 45K3R2F-L-GP

45K3R2F-L-GP

GV2_STRAP4

12

DY

R7634

R7634 10KR2J-3-GP

10KR2J-3-GP

DY

R7632

R7632 10KR2J-3-GP

10KR2J-3-GP

Title

Size Document Number Rev

Size Document Number Rev A1

A1

Friday, April 19, 2013

Date: Sheet of

2

Date: Sheet of

GPU_POWER(4/5)

Latitude300 Haswell

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

76 104

X00

3D3V_S0

R7649

R7650

R7650 10KR2J-L-GP

6

5

FB_CLAMP_MON_S

10KR2J-L-GP

OPS_GC6

1 2

FB_CLAMP_TGL_REQ#

2N7002KDW-GP

Q7603

1

R7647

R7647 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

1 2

2

3 4

OPS_GC6

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

A A

EC_FB_CLAMP24,75,83

3D3V_VGA_S0

FB_CLAMP_MON

5

R7649 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

1 2

4

Q7606

G

S

2N7002K-2-GP

OPS_GC6

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

D

3D3V_S03D3V_VGA_S03D3V_VGA_S0

R7648

R7648 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

1 2

EC_FB_CLAMP_TGL_REQ# 24

5

Under GPU

C7722

C7708

12

OPS

C7709

SC4D7U6D3V3KX-GP

OPS

SC4D7U6D3V3KX-GP

C7725

12

OPS

SC4D7U6D3V3KX-GP

C7714

OPS

SCD1U10V2KX-4GP

D D

C C

Near GPU

C7732

C7733

C7731

12

DY

ST330U2VDM-4-GP

SC4D7U6D3V3KX-GP

OPS

12

DY

SC4D7U6D3V3KX-GP

12

OPS

12

C7730

C7723

C7721

C7713

OPS

SC4D7U6D3V3KX-GP

4

VGA_CORE

GPU1E

11/14 NVVDD

K10

VDD

K12

VDD

K14

C7702

C7701

12

C7724

SC4D7U6D3V3KX-GP

SCD1U10V2KX-4GP

OPS

SC4D7U6D3V3KX-GP

12

DY

12

OPS

12

OPS

SC4D7U6D3V3KX-GP

C7719

12

OPS

SC4D7U6D3V3KX-GP

C7711

12

OPS

SCD1U10V2KX-4GP

C7710

C7717

SC22U6D3V5MX-2GP

OPS

12

OPS

SC47U6D3V5MX-1-GP

12

OPS

SC4D7U6D3V3KX-GP

C7720

12

OPS

SC4D7U6D3V3KX-GP

C7712

12

OPS

SCD1U10V2KX-4GP

C7726

12

OPS

SC4D7U6D3V3KX-GP

VDD

K16

VDD

K18

VDD

L11

VDD

L13

VDD

L15

VDD

L17

VDD

M10

VDD

M12

VDD

M14

VDD

M16

VDD

M18

VDD

N11

VDD

N13

VDD

N15

VDD

N17

VDD

P10

VDD

P12

VDD

P14

VDD

P16

VDD

P18

VDD

R11

VDD

R13

VDD

R15

VDD

R17

VDD

T10

VDD

T12

VDD

T14

VDD

T16

VDD

T18

VDD

U11

VDD

U13

VDD

U15

VDD

U17

VDD

V10

VDD

V12

VDD

V14

VDD

V16

VDD

V18

VDD

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

3

5 OF 14

GPU1F

A2

GND

AB17

GND

AB20

GND

AB24

GND

AC2

GND

AC22

GND

AC26

GND

AC5

GND

AC8

GND

AD12

GND

AD13

GND

A26

GND

AD15

GND

AD16

GND

AD18

GND

AD19

GND

AD21

GND

AD22

GND

AE11

GND

AE14

GND

AE17

GND

AE20

GND

AB11

GND

AF1

GND

AF11

GND

AF14

GND

AF17

GND

AF20

GND

AF23

GND

AF5

GND

AF8

GND

AG2

GND

AG26

GND

AB14

GND

B1

GND

B11

GND

B14

GND

B17

GND

B20

GND

B23

GND

B27

GND

B5

GND

B8

GND

E11

GND

E14

GND

E17

GND

E2

GND

E20

GND

E22

GND

E25

GND

E5

GND

E8

GND

H2

GND

H23

GND

H25

GND

H5

GND

K11

GND

K13

GND

K15

GND

K17

GND

L10

GND

L12

GND

L14

GND

L16

GND

L18

GND

L2

GND

L23

GND

L25

GND

L5

GND

M11

GND

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

13/14 GND

2

6 OF 14

M13

GND

M15

GND

M17

GND

N10

GND

N12

GND

N14

GND

N16

GND

N18

GND

P11

GND

P13

GND

P15

GND

P17

GND

P2

GND

P23

GND

P26

GND

P5

GND

R10

GND

R12

GND

R14

GND

R16

GND

R18

GND

T11

GND

T13

GND

T15

GND

T17

GND

U10

GND

U12

GND

U14

GND

U16

GND

U18

GND

U2

GND

U23

GND

U26

GND

U5

GND

V11

GND

V13

GND

V15

GND

V17

GND

Y2

GND

Y23

GND

Y26

GND

Y5

GND

AA7

GND

AB7

GND

1

B B

3.3V +/- 5%

C7729

SCD1U10V2KX-5GP

OPS

85mA

12

C7727

C7728

OPS

SCD1U10V2KX-5GP

3

SC1U6D3V2KX-GP

OPS

3D3V_VGA_S0

12

C7703

OPS

SC4D7U6D3V3KX-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Do cument Number Rev

Size Do cument Number Rev Custom

Custom

Friday, April 12, 2013

Friday, April 12, 2013 Date: Sheet of

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

GPU_DPPWR/GND(5/5)

Latitude300 Haswell

77 104

1

X00

3 OF 14

GPU1C

14/14 XVDD/VDD33

AD10

NC#AD10

AD7

NC#AD7

B19

NC#B19

F11

3V3AUX

V5

NC#V5

V6

NC#V6

CONFIGURABLE

POWER CHANNELS

* nc on substrate

G1

NC#G1

G2

NC#G2

G3

NC#G3

G4

NC#G4

G5

NC#G5

G6

NC#G6

G7

NC#G7

V1

A A

V2

W1 W2 W3 W4

5

NC#V1 NC#V2

NC#W1 NC#W2 NC#W3 NC#W4

N14M-GE-S-A2-GP

71.0N14M.B0U

OPS

3 OF 14

VDD33 VDD33 VDD33 VDD33

G10 G12 G8 G9

4

Under GPU Near GPU

12

C7734

OPS

SCD1U10V2KX-5GP

5

4

3

2

1

FBA_VREF_0

OPS

243R2F-2-GP

FBA_DQM375 FBA_DQM275

1D35V_VGA_S0

FBA_ZQ1

FBA_CLK0P FBA_CLK0N

FBA_CMD3

VRAM2

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

K4W4G1646B-HC11-GP

OPS

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#M7

NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

FBA_D21

E3

FBA_D17

F7

FBA_D20

F2

FBA_D16

F8

FBA_D22

H3

FBA_D19

H8

FBA_D23

G2

FBA_D18

H7

FBA_D30

D7

FBA_D25

C3

FBA_D31

C8

FBA_D26

C2

FBA_D29

A7

FBA_D24

A2

FBA_D28

B8

FBA_D27

A3

C7 B7

F3 G3

K1

L2 T2

M7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

FBCLK Termination place on VRAM side

FBA_CLK0P

R7810

R7810 162R2F-GP

162R2F-GP

DY

1 2

FBA_CLK0N

FBA_D[0..31] 75

FBA_EDC3 75

FBA_DQS_RN3 75

FBA_EDC2 75

FBA_DQS_RN2 75

FBA_CMD2 75

FBA_CMD0 75 FBA_CMD5 75,79

OPS

Place close VRAM1 VDD ball

Place close VRAM2 VDD ball

C7814

SC1U6D3V3KX-2GP

C7814

C7812

SC1U6D3V3KX-2GP

C7812

SC1U6D3V3KX-2GP

OPS

12

C7817

SC1U6D3V3KX-2GP

C7817

SC1U6D3V3KX-2GP

OPS

12

SC1U6D3V3KX-2GP

C7810

SC1U6D3V3KX-2GP

C7810

SC1U6D3V3KX-2GP

OPS

12

SC1U6D3V3KX-2GP

C7811

SC1U6D3V3KX-2GP

C7811

SC1U6D3V3KX-2GP

OPS

12

OPS

C7816

OPS

C7813

SC10U10V5KX-2GP

C7813

SC10U10V5KX-2GP

OPS

12

C7815

SC10U10V5KX-2GP

C7815

SC10U10V5KX-2GP

OPS

12

1D35V_VGA_S0

OPS

12

OPS

12

Place close VRAM1VDDQ ball

C7832

SCD1U10V2KX-4GP

C7832

SCD1U10V2KX-4GP

OPS

12

Place close VRAM1VDDQ ball

C7836

SCD1U10V2KX-4GP

C7836

SCD1U10V2KX-4GP

OPS

12

C7827

SCD1U10V2KX-4GP

C7827

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

OPS

C7820

SCD1U10V2KX-4GP

C7820

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

C7829

SCD1U10V2KX-4GP

C7829

SCD1U10V2KX-4GP

OPS

12

1D35V_VGA_S0

C7833

SCD1U10V2KX-4GP

C7833

SCD1U10V2KX-4GP

OPS

12

OPS

SCD1U10V2KX-4GP

OPS

SCD1U10V2KX-4GP

12

C7804

C7805

SC1U6D3V3KX-2GP

C7805

SC1U6D3V3KX-2GP

12

C7822

SC1U6D3V3KX-2GP

C7822

SC1U6D3V3KX-2GP

C7821

12

C7830

SCD1U10V2KX-4GP

C7830

SCD1U10V2KX-4GP

C7831

SCD1U10V2KX-4GP

C7831

SCD1U10V2KX-4GP

OPS

12

C7835

SCD1U10V2KX-4GP

C7835

SCD1U10V2KX-4GP

OPS

C7834

SCD1U10V2KX-4GP

C7834

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

FBA_CMD375

1D35V_VGA_S0

FBA_VREF_0

R7808

1 2

OPS

243R2F-2-GP

FBA_CMD975,79 FBA_CMD1175,79

FBA_CMD875,79

FBA_CMD2575,79 FBA_CMD1075,79 FBA_CMD2475,79

FBA_CMD2275,79 FBA_CMD775,79

FBA_CMD2175,79

FBA_CMD675,79 FBA_CMD2975,79 FBA_CMD2375,79

FBA_CMD2875,79

FBA_CMD2075,79 FBA_CMD475,79

FBA_CMD1275,79

FBA_CMD2775,79 FBA_CMD2675,79

FBA_DQM175 FBA_DQM075

FBA_CMD1375,79

FBA_CMD1575,79

FBA_CMD3075,79

FBA_ZQ0

FBA_CMD3

D D

C C

FBA_CLK0P75 FBA_CLK0N75

Check

B B

Frame Buffer Patition A-Lower Half

1D35V_VGA_S0

R7806

1K33R2F-GP

R7806

1K33R2F-GP

12

OPS

FBA_VREF_0

OPS

C7803

SC820P50V2KX-1GP

C7803

SC820P50V2KX-1GP

R7807

1K33R2F-GP

R7807

1K33R2F-GP

R7804

931R2F-1-GPDYR7804

931R2F-1-GP

12

OPS

12

DY

VRAM1

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

K4W4G1646B-HC11-GP

OPS

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#M7

NC#L9 NC#L1 NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

FBA_D0

E3

FBA_D4

F7

FBA_D2

F2

FBA_D7

F8

FBA_D1

H3

FBA_D5

H8

FBA_D3

G2

FBA_D6

H7

FBA_D10

D7

FBA_D13

C3

FBA_D8

C8

FBA_D12

C2

FBA_D11

A7

FBA_D15

A2

FBA_D9

B8

FBA_D14

A3

C7 B7

F3 G3

K1

L2 T2

M7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

SCD01U50V2KX-1GP

R7802

80K6R2F-GP

FBA_D[0..31] 75

FBA_EDC1 75

FBA_DQS_RN1 75

FBA_EDC0 75

FBA_DQS_RN0 75

FBA_CMD2 75

FBA_CMD0 75 FBA_CMD5 75,79

12

OPS

FBA_CLK0_MIDPTFBA_CLK0_MIDPTFBA_CLK0_MIDPTFBA_CLK0_MIDPT

12

C7801

OPS

12

FBA_CLK0P FBA_CLK0N

R7801

R7801 80K6R2F-GP

80K6R2F-GP

FBA_CLK0P75 FBA_CLK0N75

FBA_CMD375

1D35V_VGA_S0

R7809

1 2

FBA_CMD975,79 FBA_CMD1175,79

FBA_CMD875,79

FBA_CMD2575,79 FBA_CMD1075,79 FBA_CMD2475,79

FBA_CMD2275,79 FBA_CMD775,79

FBA_CMD2175,79

FBA_CMD675,79 FBA_CMD2975,79 FBA_CMD2375,79

FBA_CMD2875,79

FBA_CMD2075,79 FBA_CMD475,79

FBA_CMD1275,79

FBA_CMD2775,79 FBA_CMD2675,79

FBA_CMD1375,79

FBA_CMD1575,79

FBA_CMD3075,79

X01 stuff R7802 R7801 C7801,DY

FBA_VREF_FET_L

D

Q7801

Q7801 2N7002K-2-GP

A A

DY

GPIO10_FBVREF76,79

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

5

2N7002K-2-GP

S

G

Description

X01 0408

FBVREF Termination

Type

Un-termination

4

FBVREF%

70%Termination

Voltage

0.749V50%

1.0617V

R7810 for CLK reference 0411

GPU_GPIO10

High

Low

20110613

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

2

Date: Sheet of

GPU-VRAM1,2 (1/4)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

78 104

1

X00

5

4

3

2

1

1D35V_VGA_S0

D D

C C

FBA_CLK1P75 FBA_CLK1N75

B B

FBA_CMD1975

1D35V_VGA_S0

FBA_VREF_1

R7912

1 2

OPS

243R2F-2-GP

FBA_CMD975,78 FBA_CMD1175,78

FBA_CMD875,78

FBA_CMD2575,78 FBA_CMD1075,78 FBA_CMD2475,78

FBA_CMD2275,78 FBA_CMD775,78

FBA_CMD2175,78

FBA_CMD675,78 FBA_CMD2975,78 FBA_CMD2375,78

FBA_CMD2875,78

FBA_CMD2075,78 FBA_CMD475,78

FBA_CMD1275,78

FBA_CMD2775,78 FBA_CMD2675,78

FBA_DQM775

FBA_DQM475

FBA_CMD1375,78

FBA_CMD1575,78

FBA_CMD3075,78

FBA_ZQ2

FBA_CMD19

Frame Buffer Patition A-Lower Half

1D35V_VGA_S0

R7903

1K33R2F-GP

R7903

1K33R2F-GP

12

OPS

FBA_VREF_1

OPS

R7904

1K33R2F-GP

R7904

1K33R2F-GP

R7902

931R2F-1-GPDYR7902

C7902

SC820P50V2KX-1GP

C7902

SC820P50V2KX-1GP

12

OPS

931R2F-1-GP

12

DY

VRAM3

K8

VDD

K2

VDD

N1

VDD

R9

VDD

B2

VDD

D9

VDD

G7

VDD

R1

VDD

N9

VDD

A8

VDDQ

A1

VDDQ

C1

VDDQ

C9

VDDQ

D2

VDDQ

E9

VDDQ

F1

VDDQ

H9

VDDQ

H2

VDDQ

H1

VREFDQ

M8

VREFCA

L8

ZQ

N3

A0

P7

A1

P3

A2

N2

A3

P8

A4

P2

A5

R8

A6

R2

A7

T8

A8

R3

A9

L7

A10/AP

R7

A11

N7

A12/BC#

T3

A13

T7

A14

M2

BA0

N8

BA1

M3

BA2

J7

CK

K7

CK#

K9

CKE

D3

DMU

E7

DML

L3

WE#

K3

CAS#

J3

RAS#

K4W4G1646B-HC11-GP

OPS

SCD01U50V2KX-1GP

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#M7

NC#L9 NC#L1

NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

R7906

80K6R2F-GP

OPS

C7931

FBA_D32

E3

FBA_D39

F7

FBA_D35

F2

FBA_D36

F8

FBA_D34

H3

FBA_D38

H8

FBA_D33

G2

FBA_D37

H7

FBA_D58

D7

FBA_D61

C3

FBA_D56

C8

FBA_D63

C2

FBA_D57

A7

FBA_D62

A2

FBA_D59

B8

FBA_D60

A3

C7 B7

F3 G3

K1

L2 T2

M7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

12

R7908

R7908 80K6R2F-GP

80K6R2F-GP

OPS

FBA_CLK1_MIDPT

12

OPS

FBA_D[32..63] 75

FBA_EDC7 75 FBA_DQS_RN7 75

FBA_EDC4 75 FBA_DQS_RN4 75

FBA_CMD18 75

FBA_CMD16 75 FBA_CMD5 75,78

FBA_CLK1P FBA_CLK1N

1D35V_VGA_S0

R7913

1 2

FBA_CMD975,78 FBA_CMD1175,78

FBA_CMD875,78

FBA_CMD2575,78 FBA_CMD1075,78 FBA_CMD2475,78

FBA_CMD2275,78 FBA_CMD775,78

FBA_CMD2175,78

FBA_CMD675,78 FBA_CMD2975,78 FBA_CMD2375,78

FBA_CMD2875,78

FBA_CMD2075,78 FBA_CMD475,78

FBA_CMD1275,78

FBA_CMD2775,78 FBA_CMD2675,78

FBA_CLK1P75 FBA_CLK1N75

FBA_CMD1975

FBA_DQM675

FBA_DQM575

FBA_CMD1375,78

FBA_CMD1575,78

FBA_CMD3075,78

FBCLK Termination place on VRAM side

FBA_VREF_1

OPS

243R2F-2-GP

1D35V_VGA_S0

FBA_ZQ3

FBA_CLK1P FBA_CLK1N

FBA_CMD19

DY

1 2

K8 K2 N1 R9 B2 D9

G7

R1 N9

A8 A1 C1 C9 D2 E9 F1 H9 H2

H1

M8

L8

N3 P7 P3 N2 P8 P2 R8 R2 T8 R3 L7 R7 N7 T3 T7

M2

N8

M3

K7

K9

D3 E7

L3 K3

R7914

R7914 162R2F-GP

162R2F-GP

VRAM4

VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFDQ VREFCA ZQ

A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 A10/AP A11 A12/BC# A13 A14

BA0 BA1 BA2

J7

CK CK#

CKE

DMU DML

WE# CAS#

J3

RAS#

K4W4G1646B-HC11-GP

OPS

FBA_CLK1P

FBA_CLK1N

DQL0 DQL1 DQL2 DQL3 DQL4 DQL5 DQL6 DQL7

DQU0 DQU1 DQU2 DQU3 DQU4 DQU5 DQU6 DQU7

DQSU

DQSU#

DQSL

DQSL#

ODT

CS#

RESET#

NC#M7

NC#L9 NC#L1 NC#J9 NC#J1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

FBA_D41

E3

FBA_D45

F7

FBA_D43

F2

FBA_D47

F8

FBA_D40

H3

FBA_D46

H8

FBA_D42

G2

FBA_D44

H7

FBA_D49

D7

FBA_D53

C3

FBA_D51

C8

FBA_D54

C2

FBA_D50

A7

FBA_D55

A2

FBA_D48

B8

FBA_D52

A3

C7 B7

F3 G3

K1

L2 T2

M7 L9 L1 J9 J1

J8 M1 M9 J2 P9 G8 B3 T1 A9 T9 E1 P1

G1 F9 E8 E2 D8 D1 B9 B1 G9

FBA_D[32..63] 75

FBA_EDC6 75 FBA_DQS_RN6 75

FBA_EDC5 75 FBA_DQS_RN5 75

FBA_CMD18 75

FBA_CMD16 75 FBA_CMD5 75,78

SC1U6D3V3KX-2GP

OPS

12

OPS

12

C7916

SC1U6D3V3KX-2GP

OPS

C7917

OPS

C7919

SC1U6D3V3KX-2GP

C7919

SC1U6D3V3KX-2GP

C7915

SC1U6D3V3KX-2GP

C7915

SC1U6D3V3KX-2GP

OPS

12

SC1U6D3V3KX-2GP

C7926

SC1U6D3V3KX-2GP

C7926

SC1U6D3V3KX-2GP

OPS

12

Place close VRAM3 VDD ball

Place close VRAM4 VDD ball

Place close VRAM3 VDDQ ball

C7918

SC10U10V5KX-2GP

C7918

SC10U10V5KX-2GP

OPS

12

Place close VRAM4 VDDQ ball

C7924

C7920

SC10U10V5KX-2GP

C7920

SC10U10V5KX-2GP

DY

12

SCD1U10V2KX-4GP

OPS

C7921

OPS

SCD1U10V2KX-4GPDYC7929

SCD1U10V2KX-4GP

C7929

OPS

1D35V_VGA_S0

DY

C7910

SCD1U10V2KX-4GP

C7910

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

OPS

C7913

SCD1U10V2KX-4GP

C7913

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

C7922

SCD1U10V2KX-4GP

C7922

SCD1U10V2KX-4GP

DY

12

SCD1U10V2KX-4GP

12

1D35V_VGA_S0

C7928

OPS

C7906

SC1U6D3V3KX-2GP

C7906

SC1U6D3V3KX-2GP

C7909

SCD1U10V2KX-4GPDYC7909

SCD1U10V2KX-4GP

12

OPS

C7911

SC1U6D3V3KX-2GP

C7911

SC1U6D3V3KX-2GP

C7912

SCD1U10V2KX-4GP

C7912

SCD1U10V2KX-4GP

12

C7923

SCD1U10V2KX-4GPDYC7923

SCD1U10V2KX-4GP

C7925

SCD1U10V2KX-4GP

C7925

SCD1U10V2KX-4GP

OPS

12

C7927

SCD1U10V2KX-4GP

C7927

SCD1U10V2KX-4GP

C7930

SCD1U10V2KX-4GP

C7930

SCD1U10V2KX-4GP

OPS

12

FBA_VREF_FET_H

A A

GPIO10_FBVREF76,78

5

DY

D

Q7901

Q7901 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

S

G

X01 0408

4

X01 stuff R7906 R7908 C7931,DY R7914 for CLK reference 0411

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Friday, April 19, 2013

Date: Sheet of

3

2

Date: Sheet of

GPU-VRAM3,4 (2/4)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

79 104

1

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Tuesday, March 26, 2013

Date: Sheet of

GPU-VRAM5,6 (3/4)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

80 104

1

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Tuesday, March 26, 2013

Date: Sheet of

GPU-VRAM7,8 (4/4)

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

81 104

1

X00

5

4

3

2

1

PWR_VGA_CORE_REFIN

PR8269

PR8269 3KR2F-GP

3KR2F-GP

N14M-GE

1 2

PR8271

1 2

30KR2F-GP

PR8211

1 2

20KR2F-L-GP

12

PR8273

PR8273 24KR2F-GP

24KR2F-GP

PR8270

PR8270 3KR2F-GP

3KR2F-GP

1 2

5V_S5

12

PR8264

PR8264 2D2R2J-GP

2D2R2J-GP

OPS

PWR_VGA_CORE_VCC

12

PC8211

OPS

SC1U6D3V2KX-GP

81172_AGND

PWR_VGA_CORE_EN PWR_VGA_CORE_PSI

PWR_VGA_CORE_TALERT#

PWR_VGA_CORE_VID

PWR_VGA_CORE_TSENSE

PWR_VGA_CORE_VREF

PWR_VGA_CORE_VIDBUF

R1

12

PR8207

PR8207 20KR2F-L-GP

20KR2F-L-GP

N14P-GV2

N14M-GE

N14P-GV2

PWR_VGA_CORE_REFIN

12

PR8203

PR8203 18KR2F-GP

18KR2F-GP

N14P-GV2

VGA_R4R5VGA_R4 R5VGA_R4R 5VGA_R4R5

12

PR8201

PR8201 0R2J-2-GP

0R2J-2-GP

N14P-GV2

1st = 84.03669.037

2nd = 84.003S3.037

PU8207

OPS

1

9

FDMS3600-02-RJK0215-COLAY-GP

PR8229

PR8229 2D2R5F-2-GP

2D2R5F-2-GP

DY

1 2

VGA_SNB2

12

PC8233

PC8233 SC330P50V2KX-3GP

SC330P50V2KX-3GP

DY

12

81172_AGND81172_AGND

81172_AGND

PR8272

PR8272 39KR2F-GP

39KR2F-GP

R2

81172_AGND

12

PC8219

PC8219 SC2700P50V2KX-1-GP

SC2700P50V2KX-1-GP

N14P-GV2

2 3 4 10

678 5

X01 3/1 Change to MP version

PU8201

15

VCC

PVCC

25

PGND

GND

HG1

BST1

3

EN

PH1

4

PSI

LG1

16

PGOOD

14

TALERT#

5

VID

HG2

BST2

13

TSNS

PH2 LG2

8

VREF

7

REFIN

FBRTN

6

VIDBUF

FB

9

PWR_VGA_CORE_FS

FS

COMP

NCP81172MNTXG-1-GP-U

74.81172.A73

12

PR8208

PR8208 36K5R2F-GP

36K5R2F-GP

C

12

PC8239

PC8239 SC1800P50V3KX-GP

SC1800P50V3KX-GP

N14M-GE

Phase2Phase1

PWR_DCBATOUT_VGA_CORE2

OPS

12

PC8226

PC8223

SC10U25V5KX-GP

PU8208

OPS

1

9

FDMS3600-02-RJK0215-COLAY-GP

PL8202

1 2

COIL-D15UH-2-GP

OPS

68.R1510.20A

2nd = 68.R1510.10H

CYNTEC D15uH/DCR=0.66mohm+-7%

5V_S5

PC8212

21

1 2

SC4D7U6D3V2MX-GP-U

22

OPS

PR8225

PWR_VGA_CORE_HG1

0R3J-0-U-GP

2 1 24 23

17 18 19 20

10 11 12

PC8225

SCD1U25V3KX-GP

0R3J-0-U-GP

PWR_VGA_CORE_BST1 PWR_VGA_CORE_SW1 PWR_VGA_CORE_LG1

PWR_VGA_CORE_HG2 PWR_VGA_CORE_BST2 PWR_VGA_CORE_SW2 PWR_VGA_CORE_LG2

PWR_VGA_CORE_FBRTN PWR_VGA_CORE_FB

2 3 4 10

678 5

OPS

PR8216 100KR2F-L1-GP

1 2

DY

OPS

PR8230

0R3J-0-U-GP

PC8218

COMP_RC1

PR8267

1 2

SC100P50V2JN-L-GP

SC100P50V2JN-L-GP 82KR2F-1-GP

82KR2F-1-GP

PC8217

OPS

PWR_VGA_CORE_COMP FBRT N_RC

PG8207

1 2

GAP-CLOSE-PWR

OPS

81172_AGND

OPS

12

PC8236

SC10U25V5KX-GP

1st = 84.03669.037

2nd = 84.003S3.037

X01 0408

ESR=12mohm

SC10P50V2JN-L1-GP

PWR_DCBATOUT_VGA_CORE2

OPS

12

PC8235

SC10U25V5KX-GP

VGA_CORE

12

OPS

PWR_VGA_CORE_BST1_R

12

PWR_VGA_CORE_BST2_R

12

PR8206

1 2

49D9R2F-GP

OPS

12

OPS

12

PC8234

SCD1U25V3KX-GP

PT8213

PT8213 SE330U2D5VM-8-GP

SE330U2D5VM-8-GP

77.53371.18L

2nd = 77.53371.26L

PC8230

1 2

SCD1U25V3KX-GP

PC8237

1 2

SCD1U25V3KX-GP

COMP_RC2

OPS

PWR_VGA_CORE_SW1

OPS

PWR_VGA_CORE_SW2

PR8209

1 2

OPS

10KR2F-2-GP

1 2

OPS

PC8215

SC47P50V2JN-L1-GP

1 2

PR8210

PR8210 0R2J-2-GP

0R2J-2-GP

12

OPS

PC8232

PC8232 SC1KP25V2JX-GP

SC1KP25V2JX-GP

PR8205

1 2

0R2J-2-GP

OPS

EDC=45A EDP=72A

N14M-GE

N14P-GV2

N14P-GT

2012-12-06 (Power team modify) PR8228 and PR8227 change to 100R(64.10005.6DL) nVidia suggest

PR8228

1 2

100R2F-L1-GP-U

OPS

PR8227

1 2

OPS

100R2F-L1-GP-U

config

C

35A 41A

32A

45A

EDP

55A

75A

GND_SENSE 73

VGA_SENS E 73

VGA_CORE

R2/PR8211 R3/PR8204TYPE TDC

R1/PR8207

OCP R4/PR8203

39kohm

30kohm 3kohm 1.8nF

3kohm

24kohm

20kohm

2kohm 18kohm 0ohm 2.7nFB

20kohm

2kohmB 18kohm20kohm 0ohm

R5/PR8201 C/PC8219

2.7nF

D D

DCBATOUT PWR_DCBATOUT_VGA_CORE1

PG8201

1 2

GAP-CLOSE-PWR

PG8202

1 2

OPS

GAP-CLOSE-PWR

PG8203

1 2

OPS

GAP-CLOSE-PWR

OPS

EN

3D3V_VGA_S0

PR8263 10KR2J-3-GP

DGPU_PWR_EN15,83

C C

1 2

13KR2F-GP

X01 modify PR8266 from 1.8K to 13K for fine tune the GPU power sequence 0412

PSI

PR8257

1 2

VGA_CORE _PSI76

0R2J-2-GP

PC8214

OPS

1st = 84.03669.037

2nd = 84.003S3.037

X01 0408 X01 0408

PU8206

2

OPS

3

1

4 10

B B

PWR_VGA_CORE_HG1 PWR_VGA_CORE_SW1 PWR_VGA_CORE_LG1

9

FDMS3600-02-RJK0215-COLAY-GP

PR8226

PR8226 2D2R5F-2-GP

2D2R5F-2-GP

DY

1 2

VGA_SNB1

12

PC8231

PC8231 SC330P50V2KX-3GP

SC330P50V2KX-3GP

DY

678 5

PWR_DCBATOUT_VGA_CORE2DCBATOUT

PG8204

1 2

GAP-CLOSE-PWR

PG8205

1 2

OPS

GAP-CLOSE-PWR

PG8206

1 2

OPS

GAP-CLOSE-PWR

OPS

NTC close Phase1 MOSFET

DY

PR8266

OPS

1 2

DY

SCD1U10V2KX-4GP

DY

12

PWR_VGA_CORE_EN

PC8238

SCD1U10V2KX-4GP

12

OPS

3D3V_VGA_S0

12

PR8258

PR8258 10KR2J-3-GP

10KR2J-3-GP

PWR_VGA_CORE_PSI

OPS

12

PR8259

PR8259 0R2J-2-GP

0R2J-2-GP

DY

PWR_DCBATOUT_VGA_CORE1

OPS

12

PC8220

SC10U25V5KX-GP

2nd = 68.R1510.10H

CYNTEC D15uH/DCR=0.66mohm+-7%

PC8224

PC8221

SCD1U25V3KX-GP

SC10U25V5KX-GP

PU8205

OPS

1

9

FDMS3600-02-RJK0215-COLAY-GP

1st = 84.03669.037

2nd = 84.003S3.037

PL8201

X01 0408

1 2

COIL-D15UH-2-GP

OPS

68.R1510.20A

X01 0408 X01 0408

3D3V_VGA_S0

OPS

PC8229

2 3 4 10

678 5

12

PT8210

PT8210 SE470UF2VDM-GP

SE470UF2VDM-GP

ESR=6mohm ESR=12mohm

OPS

79.47719.2BL

2nd = 77.24771.13L

X01 0408

DGPU_PWROK15,83

PR8213 10KR2J-L-GP

VIDEO_T HERM _OVER T#76

1 2

VGA_CORE _VID76

OPS

PR8268

NTC-100K-12-GP

B=4250K

OPS

81172_AGND

69.60011.221

2nd = 69.60013.201

3rd = 69.60037.031

X01 0409

DY

PR82150R2J-2-GPDYPR82150R2J-2-GP

1 2

PR82140R2J-2-GP

1 2

OPS

12

PC8216

12

SCD1U10V2KX-4GP

OPS

SCD01U50V2KX-1GP

PR8202

3K92R2F-GP

12

OPS

PC8222

81172_AGND

N14P-GV2

12

R4

R3

12

PR8204

PR8204 2KR2F-3-GP

2KR2F-3-GP

VGA_R1R3

N14M-GE

R5

N14M-GE

PWR_DCBATOUT_VGA_CORE1

OPS

12

PC8228

PC8227

SC10U25V5KX-GP

PC8227

SC10U25V5KX-GP

SCD1U25V3KX-GP

PWR_VGA_CORE_HG2

VGA_CORE

12

PT8211

PT8211 SE330U2D5VM-8-GP

SE330U2D5VM-8-GP

77.53371.18L

OPS

2nd = 77.53371.26L

X01 0408 X01 0408

PWR_VGA_CORE_SW2 PWR_VGA_CORE_LG2

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L MOS: Q1: Id=10A,Rdson=9.8~13.2 mohm ; Q2: Id=17A, Rdson=3.6~5.2mohm 84.03669.037 Inductor: CHIP CHOKE 0.22UH PCMB063T-R22MS 2.5~3mohm Isat =34Arms 68.R2210.20C O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L

A A

5

4

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L MOS: Q1: Id=10A,Rdson=9.8~13.2 mohm ; Q2: Id=17A, Rdson=3.6~5.2mohm 84.03669.037 Inductor: CHIP CHOKE 0.22UH PCMB063T-R22MS 2.5~3mohm Isat =34Arms 68.R2210.20C O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L

3

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

ADP3211_+VGA_CORE

Latitude300 Haswell

1

X00

82 104Friday, April 19, 2013

5

4

3

2

1

3D3V_VGA_S0 1D05V_VGA_S0

3D3V_VGA_S0 should ramp-up before VGA_Core

VGA_Core should ramp-up before 1D5V_VGA_S0

D D

1D35V_VGA_S0 should ramp-up before 1D05V_VGA_S0

3D3V_S0

1D05V_S0

R8313

1D05V_VGA_EN

DGPU_PWROK15,82

C C

1 2

0R2J-2-GP

OPS

C8309

SCD1U10V2KX-L1-GP

1 2

DY

12

C8302

DY

SC1U6D3V2KX-GP

5V_S0

DGPU_PWR_E N15,82

DY

12

1D05V_VGA_EN

C8304

C8304 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

3D3V_S0 to 3D3V_VGA_S0 1D05V_S0 to 1D05V_VGA_S0

U8301

1

VIN1#1

2

VIN1#2

3

ON1

4

VBIAS

5

ON2

6

VIN2#6

OPS

VIN2#77VOUT2#8

TPS22966DPUR-GP

74.22966.093

2nd = 74.03523.A73

X01 0408

VOUT1#14 VOUT1#13

VOUT2#9

GND

15 14 13 12

CT1

11 10

CT2

9 8

VTT_CT_105VC_2

VTT_CT_3VC_1

3D3V_VGA_OUT1

C8305

12

SC470P50V2KX-3GP

OPS

1D05V_VGA_OUT2

C8316

12

SC2200P50V2KX-2GP

OPS

PG8312

1 2

OPS

GAP-CLOSE-PWR

0307 Add Discharge Circuit

1D05V_VGA_S0

PG8313

1 2

OPS

GAP-CLOSE-PWR

3D3V_VGA_S0

C8308

C8307

12

SC10U6D3V5KX-1GP

OPS

DY

1 2

GAP-CLOSE-PWR

PG8314

1 2

OPS

GAP-CLOSE-PWR

SCD1U10V2KX-L1-GP

12

DY

GAP-CLOSE-PWR

C8310

SC10U6D3V5KX-1GP

PG8315

1 2

OPS

1 2

C8306

3D3V_AUX_S5

SCD1U10V2KX-L1-GP

DGPU_PWR_E N#

1 2

OPS

PR8313

PR8313 100KR2J-1-GP

100KR2J-1-GP

PQ8305

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

DGPU_PWR_E N15,82

GDS

5

6

OPS

123 4

G

SD

1D05V_VGA_S0

12

OPS

10R2J-2-GP

10R2J-2-GP PR8316

PR8316

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

DGPU_PWR_E N#

PR8317

10R2J-2-GP

VGA_CORE

12

OPS

D

G

PQ8307

PQ8307 2N7002K-2-GP

2N7002K-2-GP

OPS

S

1D35V_VGA_S0

1D35V_S3

AO4468, SO-8

3D3V_AUX_S5

D8301

1

GV2

2

BAT54CPT-2-GP

R8312

1 2

0R2J-2-GP

GE

Id=?A, Qg=9~12nC Rdson=17.4~22m oh m

1 2

3

PC8303

SC10U6D3V3MX-GP

OPS

1D35V_VGA_EN#

PR8311

PR8311 100KR2J-1-GP

100KR2J-1-GP

PQ8304

2N7002KDW-GP

84.2N702.A3F

2nd = 75.00601.07C

3rd = 84.2N702.E3F

4th = 84.DMN66.03F

X01 0408

1D35V_VGA_EN

12

DY

SIRA06DP-T1-GE3-GP

84.SRA06.037

2nd = 84.08057.037

X01 0408

PC8302

SCD01U50V2KX-1GP

GDS

5

6

OPS

123 4

100KR2J-1-GP

G

SD

1D35V_ENABLE

1D35V_VGA_EN 51

4

PR8310

DY

B B

X01 D8301 change main source to 75.00054.K7D 0411

EC_FB_CLAMP24,75,76

A A

DGPU_PWROK15,82

5

75.00054.K7D

2nd = 75.00054.J7D

3rd = 75.00054.A7D

PQ8308

D

8

D

7

D

6

D

5

DY

1D35V_ENABLE_RC

1 2

12

15V_S5

DY

1 2

1.35V +/- 3%.

5.6A

S

1

S

2

S

3

G

4

R8314

DY

0R2J-2-GP

X01 add PR8312 PH to DCBATOUT 0409

DCBATOUT

PR8312

100KR2J-1-GP

DY

1 2

X01 DY PR8312 0418

1D35V_VGA_S0

12

PC8307

PC8307 SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

DY

PQ8306

2N7002K-2-GP

1D35V_VGA_S0

12

OPS

10R2J-2-GP

10R2J-2-GP PR8315

PR8315

DIS_1D35V_VGA_S0

D

G

3

OPS

S

84.2N702.J31

2nd = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

X01 0408

Discharge Circuit

1D35V_VGA_EN#

X01 0409 Change PQ8306.G to 1D35V_VGA_EN# and PQ8304 and PR8311 to OPS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsic hih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsic hih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCRETE VGA POWER

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

83 104Friday, April 19, 2013

1

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

84 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

85 104Tuesday, March 26, 2013

X00

5

SSID = Mechanical

S1

S1 STF237R117H83-1-GP

STF237R117H83-1-GP

4

S2

S2 STF237R117H83-1-GP

STF237R117H83-1-GP

S3

S3 STF237R113H111-GP

STF237R113H111-GP

3

2

1

34.4CK01.001

D D

34.4CK01.001

2nd = 34.4CK01.601

3rd = 34.4CK01.501

1

34.4CK01.001

2nd = 34.4CK01.601

3rd = 34.4CK01.501

1

1st = 34.4V802.101

2nd = 34.4V802.401

3rd = 34.4V802.201

X01 0408 X01 0408 X01 0409

H1

H1 HOLE335R115-GP

HOLE335R115-GP

1

ZZ.00PAD.D01

C C

H2

H2 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

ZZ.00PAD.D41

1

SPR2

SPR2 SPRING-102-GP

SPRING-102-GP

1

34.41V01.001

H3

H3 HOLE335R115-GP

HOLE335R115-GP

1

ZZ.00PAD.D01

SPR3

SPR3 SPRING-102-GP

SPRING-102-GP

1

34.41V01.001

H4

H4 HOLE256R115-GP

HOLE256R115-GP

1

ZZ.00PAD.D11

C1

C1 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

1

C2

C2 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

H5

H5 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

ZZ.00PAD.D41

C3

C3 HOLE197R166-1-GP

HOLE197R166-1-GP

1

ZZ.00PAD.V71

CPU BRACKET

H6

H6 HT85BE85R29-U-5-GP

HT85BE85R29-U-5-GP

ZZ.00PAD.D41

1

34.39S07.003

SPR4

SPR4 SPRING-62-GP

SPRING-62-GP

1

H9

H9 HOLE237R95-GP

HOLE237R95-GP

1

ZZ.00PAD.921

SPR5

SPR5 SPRING-102-GP

SPRING-102-GP

1

34.41V01.001

H8

H8 HOLE237R95-GP

HOLE237R95-GP

1

ZZ.00PAD.921

SSID = EMI

DCBATOUT

DY

12

EC9701

SC1U6D3V2KX-GP

DY

12

EC9702

SC1U6D3V2KX-GP

DY

12

EC9703

SC1U6D3V2KX-GP

DY

12

EC9704

SC1U6D3V2KX-GP

1 2

EC9708

SC1KP25V2JX-GP

DY

12

EC9705

SC1U6D3V2KX-GP

DY

12

EC9706

SC1U6D3V2KX-GP

1 2

EC9707

SC1KP25V2JX-GP

1 2

EC9709

SC1KP25V2JX-GP

1 2

EC9710

SC1KP25V2JX-GP

1D35V_VGA_S0

12

EC9727

DY

AUD_AGND

12

EC9725

SC1U6D3V2KX-GP

DY

12

EC9726

SC1U6D3V2KX-GP

DY

12

EC9730

SC1U6D3V2KX-GP

DY

12

EC9728

SC1U6D3V2KX-GP

DY

12

EC9729

SC1U6D3V2KX-GP

DY

EC9731

SC1U6D3V2KX-GP

EC9739

SC1KP25V2JX-GP

12

EC9744

SC1KP25V2JX-GP

12

EC9743

SC1KP25V2JX-GP

12

EC9745

SC1KP25V2JX-GP

12

EC9717

B B

A A

DY

5V_S0

12

DY

EC9717

SC1U6D3V2KX-GP

EC9720

SC1U6D3V2KX-GP

DY

1 2

12

EC9711

SC1KP25V2JX-GP

EC9719

SC1U6D3V2KX-GP

DY

12

EC9712

SC1U6D3V2KX-GP

DY

12

EC9718

SC1U6D3V2KX-GP

DY

5

12

EC9713

SC1U6D3V2KX-GP

EC9723

SC1U6D3V2KX-GP

DY

12

EC9716

SC1U6D3V2KX-GP

EC9721

SC1U6D3V2KX-GP

DY

12

EC9715

SC1U6D3V2KX-GP

EC9722

SC1U6D3V2KX-GP

DY

1 2

12

EC9714

SC1KP25V2JX-GP

EC9724

SC1U6D3V2KX-GP

DCBATOUT

X01 2/27 Change to 0.1u/25V for rating

EC9741

EC9742

EC9740

SC1KP25V2JX-GP

1 2

DY

1 2

12

DY

EC9735

SC1U6D3V2KX-GP

3

DY

12

EC9737

SC1U6D3V2KX-GP

DY

4

SCD1U25V2KX-GP

EC9736

SC1U6D3V2KX-GP

DY

1 2

12

EC9742

SCD1U25V2KX-GP

EC9738

SC1U6D3V2KX-GP

DY

1 2

EC9747

SCD1U25V2KX-GP

1 2

5V_S53D3V_S0

DY

EC9748

SC1KP25V2JX-GP

12

EC9734

EC9750

EC9749

SCD1U25V2KX-GP

DY

1 2

DY

12

EC9732

SC1U6D3V2KX-GP

DY

1 2

DY

12

SCD1U25V2KX-GP

EC9733

SC1U6D3V2KX-GP

DY

EC9751

SCD1U25V2KX-GP

1 2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

UNUSED PARTS/EMI Capacitors

Size Document Number Rev

Size Document Number Rev A3

A3

Date: Sheet of

2

Date: Sheet of

Latitude300 Haswell

Thursday, April 11, 2013

Taipei Hsien 221, Taiwan, R.O.C.

86 104

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

87 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

88 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

89 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Free Fall Sensor

90 104Tuesday, March 26, 2013

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

91 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Reserved

1

92 104Tuesday, March 26, 2013

X00

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A3

Date: Sheet of

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

Express Card

93 104Tuesday, March 26, 2013

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Tuesday, March 26, 2013

Date: Sheet of

LVDS_Switch

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

94 104

1

X00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Size Document Number Rev A3

A3

Tuesday, March 26, 2013

Date: Sheet of

CRT_Switch

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

95 104

1

X00

5

4

3

2

1

SSID = XDP

CPU XDP

D D

CFG[19:0]6

XDP_BPM[7:0]4

XDP_PREQ#4

XDP_PRDY#4

XDP_TDO4

XDP_TRST#4

XDP_TDI4

XDP_TMS4

R9601 1KR2J-1-GP

1 2

XDP

H_VCCST_PWRGD7

PM_PWRBTN#17,24

C C

B B

PWR_DEBUG7 SYS_PWROK17,24

PCH_SMBDATA12,13,18,62

PCH_SMBCLK12,13,18,62

XDP_TCLK4

PCIE_CLK_XDP_P18

PCIE_CLK_XDP_N18

PLT_RST#17,24,30,55,58,65,73

XDP_DBRESET#17

SCD1U10V2KX-5GP

PCIE_CLK_XDP_N

C9602

XDP

R9603 0R2J-2-GP

1 2

XDP

R9604 0R2J-2-GP

1 2

XDP

R9605 0R2J-2-GP

1 2

RN9601

XDP

1 2 3

XDP

SRN0J-6-GP

PCIE_CLK_XDP_P

R96020R2J-2-GP

12

XDP

12

XDP

VCCST_PWRGD_XDP BP_PWRGD_RST#

XDP_PW R_DEBUG XDP_SYS_PWROK

XDP_SMBDAT

4

XDP_SMBCLK

XDP_TCLK

XDP_RST

XDP_DBRESET#

1 1

TP9648 TPAD14-OP-GPTP9648 TPAD14-OP-GP

1

TP9645 TPAD14-OP-GPTP9645 TPAD14-OP-GP

1

TP9647 TPAD14-OP-GPTP9647 TPAD14-OP-GP

1

TP9644 TPAD14-OP-GPTP9644 TPAD14-OP-GP

1

TP9646 TPAD14-OP-GPTP9646 TPAD14-OP-GP

1

TP9649 TPAD14-OP-GPTP9649 TPAD14-OP-GP

1

TP9650 TPAD14-OP-GPTP9650 TPAD14-OP-GP

1

TP9652 TPAD14-OP-GPTP9652 TPAD14-OP-GP TP9651 TPAD14-OP-GPTP9651 TPAD14-OP-GP

TP9654 TPAD14-OP-GPTP9654 TPAD14-OP-GP TP9653 TPAD14-OP-GPTP9653 TPAD14-OP-GP

CFG[19:0]

XDP_BPM[7:0]

XDP_PREQ#

XDP_PRDY# XDP_TDO XDP_TRST# XDP_TDI XDP_TMS

XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG17 CFG16 CFG8 CFG9 CFG10 CFG11 CFG19 CFG18 CFG12 CFG13 CFG14 CFG15

TP9601 TPAD14-OP-GPTP9601 TPAD14-OP-GP

1

TP9602 TPAD14-OP-GPTP9602 TPAD14-OP-GP

1

TP9624 TPAD14-OP-GPTP9624 TPAD14-OP-GP

1

TP9621 TPAD14-OP-GPTP9621 TPAD14-OP-GP

1

TP9623 TPAD14-OP-GPTP9623 TPAD14-OP-GP

1

TP9611 TPAD14-OP-GPTP9611 TPAD14-OP-GP

1

TP9612 TPAD14-OP-GPTP9612 TPAD14-OP-GP

1

TP9613 TPAD14-OP-GPTP9613 TPAD14-OP-GP

1

TP9614 TPAD14-OP-GPTP9614 TPAD14-OP-GP

1

TP9615 TPAD14-OP-GPTP9615 TPAD14-OP-GP

1

TP9616 TPAD14-OP-GPTP9616 TPAD14-OP-GP

1

TP9617 TPAD14-OP-GPTP9617 TPAD14-OP-GP

1

TP9618 TPAD14-OP-GPTP9618 TPAD14-OP-GP

1

TP9619 TPAD14-OP-GPTP9619 TPAD14-OP-GP

1

TP9626 TPAD14-OP-GPTP9626 TPAD14-OP-GP

1

TP9627 TPAD14-OP-GPTP9627 TPAD14-OP-GP

1

TP9620 TPAD14-OP-GPTP9620 TPAD14-OP-GP

1

TP9622 TPAD14-OP-GPTP9622 TPAD14-OP-GP

1

TP9630 TPAD14-OP-GPTP9630 TPAD14-OP-GP

1

TP9631 TPAD14-OP-GPTP9631 TPAD14-OP-GP

1

TP9629 TPAD14-OP-GPTP9629 TPAD14-OP-GP

1

TP9628 TPAD14-OP-GPTP9628 TPAD14-OP-GP

1

TP9634 TPAD14-OP-GPTP9634 TPAD14-OP-GP

1

TP9635 TPAD14-OP-GPTP9635 TPAD14-OP-GP

1

TP9633 TPAD14-OP-GPTP9633 TPAD14-OP-GP

1

TP9632 TPAD14-OP-GPTP9632 TPAD14-OP-GP

1

TP9637 TPAD14-OP-GPTP9637 TPAD14-OP-GP

1

TP9639 TPAD14-OP-GPTP9639 TPAD14-OP-GP

1

TP9638 TPAD14-OP-GPTP9638 TPAD14-OP-GP

1

TP9636 TPAD14-OP-GPTP9636 TPAD14-OP-GP

1

TP9640 TPAD14-OP-GPTP9640 TPAD14-OP-GP

1

TP9643 TPAD14-OP-GPTP9643 TPAD14-OP-GP

1

TP9642 TPAD14-OP-GPTP9642 TPAD14-OP-GP

1

TP9641 TPAD14-OP-GPTP9641 TPAD14-OP-GP

1

Wistron Corporation

A A

Title

TOUCH PANEL

Size Document Number Rev

Size Document Number Rev A4

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

Latitude300 Haswell

Friday, April 19, 2013

TOUCH PANEL

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

X00

96 104

1

X00

5

4

3

2

1

Shark Bay Platform Power Sequence

(DC mode)

DC

t01

PM_PWRBTN#

>9ms

+RTC_VCC

RTC_RST#

DCBATOUT

D D

Sense the power button status

V5REF_Sus must be powered up before VccSus3_3, or after VccSus3_3 within

0.7 V. Also, V5REF_Sus must power down after VccSus3_3, or before VccSus3_3 within 0.7 V.

In case of a non-Deep S4/S5 Platform timing t42 should be added to t07 which will make it 100mS minimum.

3D3V_AUX_S5

KBC_PWRBTN#

3D3V_AUX_KBC

S5_ENABLE

5V_S5

3D3V_S5

PM_RSMRST#(RSMRST#_RST)

PCH_SUSCLK_KBC

PM_PWRBTN#

PM_SLP_S4#

PM_SLP_S3#

PM_LAN_ENABLE

C C

V5REF must be powered up before Vcc3_3, or after Vcc3_3 within 0.7 V. Also, V5REF must power down after Vcc3_3, or before Vcc3_3 within 0.7 V.

1D5V_S3

DDR_VREF_S3(0.75V)

5V_S0

3D3V_S0

+5VS_PCH_VCC5REF

1D5V_S0

1D8V_S0

0D75V_S0

RUNPWROK

1D05V_PCH

VCCP_CPU

1D05_VTT_PWRGD

0D85V_S0

Red Words: Controlled by EC GPIO

Press Power button

Ta+5VA_PCH_VCC5REFSUS

t05

>10ms

After Power Button

t10

>30us

Tb

Platfor m to KBC PS L_IN2

PSL_OUT#( GPIO71) kee p low

KBC GPIO34 control power on by 3V_5V_EN

5V_S5 & 3D3V_S5 need meet 0.7V difference

>100ms

t07

KBC GPIO43 to PCH

PCH to K BC GPIO00

KBC GPIO20 to PCH

Enable by PM_SLP_S4#

5V_S0 & 3D3V_S0 need meet 0.7V difference

1D8V_S0 & 1D5V_S3 power ready

PCH to K BC GPIO44

PCH to K BC GPIO01

KBC GPIO47 to LAN

D85V_PWRGD

1D8V_S0

0D85V_S0

SetVID ACK

t14

t18

>0us

<650ms2ms<

t17

t13

>1ms

t19

>2ms

t20

<650ms5ms<

1ms<

50us< <2000us

t36

<100ms

t25

t37

<5ms

KBC GPIO77 to PCH

PCH to C PU

>1ms+60us

t21+t22

PCH to a ll system

<200us

t39

D85V_PWRGD

CPU SVID BUS

VCC_CORE

VCC_GFXCORE

B B

This signal represents the Power Good for all the non-CORE and non-graphics power rails.

IMVP_PWRGD

PCH_CLOCK_OUT

ALL_SYS_PWRGD=D85V_PWRGD >99ms

PWROK(S0_PWR_GOOD)

DRAMPWROK(VDDPWRGOOD)

UNCOREPWRGOOD(H_CPUPWRGD)

SYS_PWROK

PLT_RST#

DMI

N14P-GT Power-Up/Down Sequence

DGPU_PWR_EN#(Discrete only)

3D3V_VGA_S0(VDD33)

A A

8209A_EN/DEM_VGA(Discrete only)

VGA_CORE(NVVDD)

DGPU_PWROK(Discrete only)

1D5V_VGA_S0(FBVDDQ)

1D05V_VGA_S0(PEX_VDD)

First rail to power down

Last rail to power down

3D3V_S0

tPOWER-OFF

<10ms

tNVVDD

>0ms

tNV-FBVDDQ

>0ms

tNV-PEX_VDD

For power-down, reversing the ramp-up sequence is recommended.

5

PCH GPIO54 output

RT8208 PGOOD

>0ms

VGA_CORE,1D05V_VGA_S0 1D5V_VGA_S0,3D3V_VGA_S0

4

Title

Size Document Number Rev

A1

Date: Sheet of

Tuesday, March 26, 2013

Date: Sheet of

Tuesday, March 26, 2013

Date: Sheet of

3

2

Tuesday, March 26, 2013

1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Power Sequence

Latitude300 Haswell

X00

97

104

5

4

3

2

1

Wistron SHARK BAY POWER UP SEQUENCE DIAGRAM

D D

DC

Battery

-7

C C

B B

Page43

AC

Adapter in

Page42

+DC_IN

SLP_S3# de-assert, delay 20ms; PCH_PWROK assert.

BT+

SWITCH

Page44

SWITCH

Page44

Charger

BQ24715

ACOK

AD+

Page44

7

-6

AC_IN

KBC_PWRBTN#

PM_SLP_S4#

PM_SLP_S3#

6

PCH_PWROK

11

H_CPU_SVIDDAT

H_VR_ENABLE

DCBATOUT

-5

DCBATOUT

1

VDIO

VR_ON

-3

S5_ENABLE

EN1

EN2

TPS51225CRUKR

VIN

DC/DC

(3.3V/5V)

3D3V_AUX_S5

SWITCH

-4

Page24

3D3V_AUX_KBC

PSL_IN1#

KBC

PSL_IN2#

NPCE985

GPIO8

GPIO01

GPIO80

S0_PWR_GOOD

10

SLP_S3# de-assert, delay 200ms; S0_PWR_GOOD assert.

TPS51622

CSD97374

PGOOD

Page46

PWR_VCC_PWM1

VSW

Page47

VCC_CORE

Page41

GPIO34

GPIO43

GPIO20

Page24

9

8

3D3V_S5

-2

5V_S5

-3

S5_ENABLE

-1

RSMRST#_KBC

PM_PWRBTN#

2

DPWROK

Haswell ULT CPU

RSMRST#

PWRBTN#

with Lynx Point PCH

APWROK

PCH_PWROK

5

H_VCCST_PWRGD

SYS_PWROK be asserted after S0_PWR_GOOD assertion and CPU core VR power good assertion.

S0_PWR_GOOD

IMVP_PWRGD

4

PM_SLP_S3#

DDR_VTT_PG_CTRL

DDR_PG_CTL

VCCST_PWRGD

EN PGOOD

4

SYS_PWROK

PM_SLP_S4#

DCBATOUT

VIN

TPS51367

1D35V_S3

TPS51206

3

Page48

VIDSOUT

PLTRST#

VR_READY

SW

VR_EN

Page46

4a

1D05V_S0

RUNPWROK

4b

0D675V_S0

7

H_VR_ENABLE

H_CPU_SVIDDAT

11

12

PCI_PLTRST#

4b

PM_SLP_S3#

RUNPWROK

4

DCBATOUT

TPS51367

3D3V_S5

TPS51312

EN

VIN

SWITCH

Level Shifter

VIN

Page36

Page7

SW

PGOODEN

Page48

5V_S0

3D3V_S0

H_VCCST_PWRGD

VOUT

PGOOD

Page51

3a

1D35V_S3

RUNPWROK

4b

5

4a

1D5V_S0

RUNPWROK

4b

A A

4b 5 6 7 8 9 10 11 121 2 3a 4 4a

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Docum ent Number Rev

A2

Date: Sheet of

Tuesday, March 26, 2013

Date: Sheet of

Tuesday, March 26, 2013

Date: Sheet of

Tuesday, March 26, 2013

Taipei Hsien 221, Taiwan, R.O.C.

Power Sequence Diagram

Latitude300 Has well

1

98

X00

104

5

4

3

2

1

Adapter

D D

DCBATOUT

RT8237

TPS51216RUKR AP3211

ISL95813

Charger

BQ24717

Battery

C C

+PBATT

1D05V_S0

TPS22966 SIRA06DP

1D05V_VGA_S0

TLV70215

1D5V_S0

1D35V_VGA_S0

0D675V_S01D35V_S3

VCC_CORE

VGA_CORE

TPS51125ARGER

15V_S5

3D3V_AUX_S5

5V_AUX_S5 5V_S5

AP2182SG

AP2301M8G

TPS22966

3D3V_S5

TLV70215

AO3403

USB30_VCCA

B B

USB30_VCCB

+5V_USB1

5V_S0

3D3V_S0

1D5V_S0

3D3V_LAN_S5

SY6288

ODD_PWR_5V

RT9724

LCDVDD

A A

5

4

3

TPS22966

3D3V_VGA_S0

Power Shape

Regulator LDO Switch

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Power Block Diagram

Size Document Number Rev

A3

Date: Sheet of

2

Date: Sheet of

Power Block Diagram

Latitude300 Haswell

Taipei Hsien 221, Taiwan, R.O.C.

99 104Tuesday, March 26, 2013

1

X00

A

PCH SMBus Block Diagram

3D3V_S5_PCH



SRN2K2J-1-GP

SMBCLK

SMB_CLK

1 1

SMBDATA

SMB_DATA



3D3V_S5_PCH



SRN2K2J-1-GP

SML1CLK

SML1_CLK

SML1DATA

SML1_DATA

2 2

PCH

3 3

SML1CLK

SML1DATA

3D3V_S5_PCH

SRN2K2J-8-GP



3D3V_S0

KBC

SML1_CLK



SML1_DATA



SRN2K2J-1-GP

SDVO_CTRLCLK

SDVO_CTRLDATA

PCH_HDMI_CLK DDC_CLK_HDMI



PCH_HDMI_DATA



2N7002SPT

2N7002DW-1-GP

3D3V_S0







3D3V_S0

2N7002SPT

DDC_DATA_HDMI

3D3V_S0



3D3V_VGA_S0



SMBC_Therm_NV

SMBD_Therm_NV

B

3D3V_S0



SRN10KJ-5-GP

PCH_SMBCLK



PCH_SMBDATA



PCH_SMBCLK



PCH_SMBDATA



PCH_SMBCLK

PCH_SMBDATA



SRN2K2J-8-GP

THM_SML1_CLK

THM_SML1_DATA

5V_S0



DIMM 1

SCL

SDA

SMBus Address:A0

DIMM 2

SCL

SDA

SMBus Address:A4

TPAD

SMB_CLK

SMB_DATA

Thermal

SCL

SDL

NCT7718W

SMBus Address:98

3D3V_VGA_S0



SRN4K7J-8-GP



SMBus Address:9E

SRN2K2J-1-GP

HDMI CONN

VGA

I2CS_SCL

I2CS_SDA

C

D

KBC SMBus Block Diagram

TP_VDD



SRN10KJ-5-GP

TouchPad Conn.

TPDATA

TPCLK

PBAT_SMBCLK1

PBAT_SMBDAT1

SCL

Thermal

SDA

NCT7718W

SCL

PCH

SDA

Battery Conn.

CLK_SMB

DAT_SMB

SCL

SDA

2N7002SPT

KBC

NPCE985P

PSDAT1

PSCLK1

GPIO17/SCL1

GPIO22/SDA1

GPIO73/SCL2

GPIO74/SDA2

TPDATA

TPCLK

3D3V_AUX_KBC



3D3V_S5_PCH

SML1_CLK

SML1_DATA



SRN4K7J-8-GP

BAT_SCL



BAT_SDA



SRN2K2J-8-GP

SRN33J-7-GP

SMBus address:16

BQ24717

SMBus address:12

3D3V_S0



3D3V_S0

SRN2K2J-8-GP



CIICSCL1



CIICSDA1



LVDS SWITCH

SCL

SDL

SMBus Address:94&6A

LVDS_DDC_CLK

LVDS_DDC_DATA

E

LVDS_DDC_DATA_R

LVDS_DDC_CLK_R

SRN33J-5-GP

CLK

LCD CONN

DATA

4 4

Wistron Corporation

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai W u Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

A2

Latitude300 Has well

Date: Sheet of

A

B

C

D

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

SMBUS Block Diagram

100 104Tuesday, March 26, 2013

E

100 104Tuesday, March 26, 2013

X00