Dell Inspiron 7437, Inspiron 7537, Inspiron 7737 Schematics

5

D D

4

3

2

1

Hadley15" Schematics Document

Haswell ULT

C C

2013-06-28

REV : A00

B B

DY : None Installed UMA: UMA only installed OPS: Optimus solution installed. eDP: Support eDP Panel installed. LVDS: Support LVDS Panel installed.

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Cover Page

Hadley 15"

1

1 101Friday, June 28, 2 013

of

1 101Friday, June 28, 2 013

of

1 101Friday, June 28, 2 013

X02

5

4

3

2

1

Project code : 91.47L01.001

Hadly15 Block Diagram

PCB P/N : 12311-1 Revision : A00

eDP/

D D

15.6" LCD FHD(1920 x 1080)

52

LVDS Option circuit

52, 53

HDMI CONN

54

USB 2.0

USB 3.0 / Power share

34

C C

USB 3.0 CONN

34

Mini-Card

802.11a/b/g/n BT

58

Daughter board

USB 3.0 CONN

USB 3.0

B B

USB 3.0 CONN

USB 3.0

mSATA

SATA3

Internal Digital M IC

A A

Universal jack

29

2CH SPEAKER

5

eDP

eDP to LVDS

LVDS

Converter

Realtek RTD2136R

USB PowerShare

PERICOM PI5USB1457AZAE

PCI-E

USB 2.0

USB3.0 Redriver

TI SN65LVPE502RGER

USB3.0 Redriver

TI SN65LVPE502RGER

SATA repeater

TI SN75LVCP601

52

29

53

35

Audio Codec

Realtek ALC3223

4

TMDS

USB 2.0

USB 3.0

USB 2.0

USB 3.0

USB 2.0

USB 3.0

USB 2.0

USB 3.0

SATA3

eDP

DDR3L 1600MHz

Slot A

Slot B

12

13

Intel CPU

Haswell ULT

DDR3L Channel A

DDR3L Channel B

15W/25W

VRAM(GDDR5)

128M x 16 x4(1GB)

VRAM(GDDR5)

128M x 16 x 4(1GB)

FFS

ST DE351DL

RJ45

67

HDD

31

INT2

56

MMI Card Connector (SD/SDHC/SDXC/ SD-UHS/MS/MS-Pro)

Thermal

Nuvoton NCT7718W

33

26

Lynx Point-LP

8 USB 2.0/1.1 ports

2-4 USB 3.0 ports

High Definition Audio

4 SATA ports

8-12 PCIE ports

LPC I/F

ACPI 4.0a

PCI-E x4

USB 2.0

SMBUS

INT1

SATA3

PCI-E

LPC

GPU

25W

N14P-GT

73~77

Touch Screen

52

2M 720P Camera

52

SATA repeater

TI SN75LVCP601

LAN+Card reader

(10/100/1000M)

Realtek

RTL8411B

LPC debug port

65

GDDR5 Ch A

GDDR5 Ch B

SATA3

30

SMBus

KBC

Nuvoton

SPI

HDA

27

SMBus

Flash ROM

3

8MB

25

NPCE985PA0DX

PS2

Touch Pad

62

24

Backlight Int. KB

62

2

DC Fan Contrroller

ANPEC APL5606AKI

26

Title

Size Document Number Rev

Custom

Date: Sheet of

DC Fan Module

Block Diagram

Hadley 15"

CHARGER

BQ24717

AD+ BT+ DCBATOUT

OUTPUTSINPUTS

SYSTEM DC/DC

TPS51225

INPUTS OUTPUTS

DCBATOUT

INPUTS OUTPUTS

DCBATOUT

5V_AUX_S5 3D3V_AUX_S5 5V_CHARGER 3D3V_PWR

CPU DC/DC TPS51622

VCC_CORE

46~47

SYSTEM DC/DC

TPS51363

OUTPUTSINPUTS

DCBATOUT

1D05V_S0

SYSTEM DC/DC

TPS51216

INPUTS

DCBATOUT

OUTPUTS

1D35V_S3 0D675V_S0

SYSTEM DC/DC

NCP81172

INPUTS

DCBATOUT

5V_S5 3D3V_S5

3D3V_S0 1D05V_S0

1D35V_S3 1D35V_VGA_S0

OUTPUTS

VGA_CORE

Switches

OUTPUTSINPUTS

5V_S0 3D3V_S0

3D3V_VGA_S0 1D05V_VGA_S0

36, 83

LDO

TLV70215DBVR

3D3V_S5

OUTPUTSINPUTS

PCB LAYER

L1 : TOP

L2 : GND

L3 : Signal

L4 : Signal

L5 : VCC

L6 : Signal

L7 : GND

L8 : Bottom

26

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

2 101Friday, June 28, 2013

1

44

45

48

49

82

51

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

(Reserved)

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

3 101Friday, June 28, 2 013

of

3 101Friday, June 28, 2 013

of

3 101Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

D D

1D05S_ VCCST

12

R401

62R2J-G P

H_PROC HOT#[24,42,44 ,46]

C C

R407 200R2F -L-GPR407 200R2F -L-GP

1 2

R408 120R2F -GPR40 8 120R2F -GP

1 2

R409 100R2F -L1-GP-UR409 100R2F -L1-GP-U

1 2

Layout Note:

Design Gui deline: SM_RCOMP k eep routi ng length less tha n 500 mil s.

Layout Note:

Impedance control:5 0 ohm

SM_RCO MP_0

SM_RCO MP_1

SM_RCO MP_2

TP401TP401 TP402TP402

H_PECI[24]

1 2

TP403TP403

DDR_PG _CTRL[12]

R403

R403 56R2J-4 -GP

56R2J-4 -GP

SKTOCC #

1

H_CATE RR#

1

H_PROC HOT#_R

H_CPUP WRGD

1

R405

12

10KR2J -3-GP

SM_RCO MP_0 SM_RCO MP_1 SM_RCO MP_2 SM_DRA MRST# DDR_PG _CTRL

B B

D61 K61 N62

K63

C61

AU60 AV60 AU61 AV15 AV61

CPU1B

PROC_DETECT# CATERR# PECI

PROCHOT#

PROCPWRGD

SM_RCOMP0 SM_RCOMP1 SM_RCOMP2 SM_DRAMRST# SM_PG_CNTL1

HASW ELL-6-GP

SM_DRA MRST#

MISC

THERMAL

PWR

DDR3L

HSW_ULT_DDR3L

1D35V_ S3

12

R410

R410 470R2J -2-GP

470R2J -2-GP

R404

1 2

0R0402 -PAD-2-GP

JTAG

2 OF 19

XDP_PR DY#

J62

PRDY#

PREQ# PROC_TCK PROC_TMS

PROC_TRST#

PROC_TDI

PROC_TDO

BPM#0

BPM#1

BPM#2

BPM#3

BPM#4

BPM#5

BPM#6

BPM#7

Layout Note:

Place close to DIMM

XDP_PR EQ#

K62

XDP_TC LK

E60

XDP_TM S

E61

XDP_TR ST#

E59

XDP_TD I

F63

XDP_TD O

F62

XDP_BP M0

J60

XDP_BP M1

H60

XDP_BP M2

H61

XDP_BP M3

H62

XDP_BP M4

K59

XDP_BP M5

H63

XDP_BP M6

K60

XDP_BP M7

J61

DDR3_D RAMRST# [12,13]

XDP_PR DY# [96] XDP_PR EQ# [96]

XDP_BP M[7:0]

XDP_BP M[7:0] [96 ]

XDP_TD O XDP_TD I

XDP_TM S

R402 51R2J-2 -GP

XDP_TR ST# XDP_TC LK

R406 51R2J-2 -GPR406 51R2J-2 -GP

RN401

1 2 3

XDP

4 5

SRN51J -1-GP

XDP

1 2 1 2

1D05S_ VCCST

8 7 6

X01 change to short pad

A A

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU (THERMAL/CLOCK)

Size Documen t Number Rev

Date: Sheet of

Date: Sheet

CPU (THERMAL/CLOCK)

A3

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

4 101Friday, June 28, 2 013

of

4 101Friday, June 28, 2 013

of

4 101Friday, June 28, 2 013

X02

5

4

3

2

1

SSID = CPU

HSW_ULT_DDR3L

CPU1C

M_A_DQ[63:0][12]

D D

C C

M_A_DQ[63:0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQS7 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

AH63 AH62

AK63

AK62 AH61 AH60

AK61

AK60 AM63 AM62

AP63

AP62 AM61 AM60

AP61

AP60

AP58 AR58 AM57

AK57

AL58

AK58 AR57 AN57

AP55 AR55 AM54

AK54

AL55

AK55 AR54 AN54

AY58 AW58

AY56 AW56

AV58 AU58

AV56 AU56

AY54 AW54

AY52 AW52

AV54 AU54

AV52 AU52

AK40

AK42 AM43 AM45

AK45

AK43 AM40 AM42 AM46

AK46 AM49

AK49 AM48

AK48 AM51

AK51

CPU1C

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

HSW_ULT_DDR3L

DDR CHANNEL A

3 OF 19

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS#

SA_WE#

SA_CAS#

SA_BA0 SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32

AY34 AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6

+V_SM_VREF_CNT

M_A_DIMA_CLK_DDR#0 [12] M_A_DIMA_CLK_DDR0 [12] M_A_DIMA_CLK_DDR#1 [12] M_A_DIMA_CLK_DDR1 [12]

M_A_DIMA_CKE0 [12] M_A_DIMA_CKE1 [12]

M_A_DIMA_CS#0 [12] M_A_DIMA_CS#1 [12]

TP_M_A_DIMA_ODT0

M_A_RAS# [12]

M_A_WE# [12]

M_A_CAS# [12]

M_A_BS0 [12] M_A_BS1 [12] M_A_BS2 [12]

M_A_A[15:0] [12]

M_A_DQS#[7:0] [12]

M_A_DQS[7:0] [12]

+V_SM_VREF_CNT [37] DDR_WR_VREF01 [12] DDR_WR_VREF02 [13]

CPU1D

M_B_DQ[63:0][13]

TP501TP501

1

M_B_DQ[63:0]

M_B_DQ0 M_B_DQ1 M_B_DQ2 M_B_DQ3 M_B_DQ4 M_B_DQ5 M_B_DQ6 M_B_DQ7 M_B_DQ8 M_B_DQ9 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ13 M_B_DQ14 M_B_DQ15 M_B_DQ16 M_B_DQ17 M_B_DQ18 M_B_DQ19 M_B_DQ20 M_B_DQ21 M_B_DQ22 M_B_DQ23 M_B_DQ24 M_B_DQ25 M_B_DQ26 M_B_DQ27 M_B_DQ28 M_B_DQ29 M_B_DQ30 M_B_DQ31 M_B_DQ32 M_B_DQ33 M_B_DQ34 M_B_DQ35 M_B_DQ36 M_B_DQ37 M_B_DQ38 M_B_DQ39 M_B_DQ40 M_B_DQ41 M_B_DQ42 M_B_DQ43 M_B_DQ44 M_B_DQ45 M_B_DQ46 M_B_DQ47 M_B_DQ48 M_B_DQ49 M_B_DQ50 M_B_DQ51 M_B_DQ52 M_B_DQ53 M_B_DQ54 M_B_DQ55 M_B_DQ56 M_B_DQ57 M_B_DQ58 M_B_DQ59 M_B_DQ60 M_B_DQ61 M_B_DQ62 M_B_DQ63

AY31

AW31

AY29

AW29

AV31

AU31

AV29

AU29

AY27

AW27

AY25

AW25

AV27

AU27

AV25 AU25 AM29

AK29

AL28

AK28 AR29 AN29 AR28

AP28 AN26 AR26 AR25

AP25

AK26 AM26

AK25

AL25

AY23 AW23

AY21 AW21

AV23 AU23

AV21 AU21

AY19 AW19

AY17 AW17

AV19 AU19

AV17 AU17 AR21 AR22

AL21 AM22 AN22

AP21

AK21

AK22 AN20 AR20

AK18

AL18

AK20 AM20 AR18

AP18

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

HSW_ULT_DDR3L

DDR CHANNEL B

4 OF 19

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS#

SB_WE#

SB_CAS#

SB_BA0 SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32

AM35 AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

TP_M_B_DIMB_ODT0

M_B_A0 M_B_A1 M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQS#0 M_B_DQS#1 M_B_DQS#2 M_B_DQS#3 M_B_DQS#4 M_B_DQS#5 M_B_DQS#6 M_B_DQS#7

M_B_DQS0 M_B_DQS1 M_B_DQS2 M_B_DQS3 M_B_DQS4 M_B_DQS5 M_B_DQS6 M_B_DQS7

M_B_DIMB_CLK_DDR#0 [13] M_B_DIMB_CLK_DDR0 [13] M_B_DIMB_CLK_DDR#1 [13] M_B_DIMB_CLK_DDR1 [13]

M_B_DIMB_CKE0 [13] M_B_DIMB_CKE1 [13]

M_B_DIMB_CS#0 [13] M_B_DIMB_CS#1 [13]

M_B_RAS# [13]

M_B_WE# [13]

M_B_CAS# [13]

M_B_BS0 [13] M_B_BS1 [13] M_B_BS2 [13]

M_B_A[15:0] [13]

M_B_DQS#[7:0] [13]

M_B_DQS[7:0] [13]

TP503TP503

1

B B

HASWELL-6-GP

A A

5

4

3

HASWELL-6-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDR)

Hadley 15"

1

X02

5 101Friday, June 28, 2013

X02

5

4

3

2

1

SSID = CPU

HSW_ULT_DDR3L

CPU1S

D D

CFG[19:0 ][96]

C C

CFG[19:0 ]

1 2

R601

R601 49D9R2 F-GP

49D9R2 F-GP

1 2

R603

R603 8K2R2F -1-GP

8K2R2F -1-GP

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RC OMP

TD_IREF

AC60 AC62 AC63 AA63 AA60

Y62 Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60

AA62

U63

AA61

U62

V63

H18 B12

A5

E1 D1

J20

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP

RSVD#A5

RSVD#E1 RSVD#D1 RSVD#J20 RSVD#H18 TD_IREF

HSW_ULT_DDR3L

RESERVED

19 OF 19

RSVD_TP#AV63 RSVD_TP#AU63

RSVD_TP#C63 RSVD_TP#C62

RSVD#B43

RSVD_TP#A51 RSVD_TP#B51

RSVD_TP#L60

RSVD#N60

RSVD#W23

RSVD#Y22

PROC_OPI_RCOMP

RSVD#AV62

RSVD#D58

VSS VSS

RSVD#P20 RSVD#R20

AV63 AU63

C63 C62

EDP_SP ARE

B43

A51 B51

L60

N60

W23

PROC_O PI_COMP3

Y22

PROC_O PI_COMP

AY15

AV62 D58

P22 N21

HVM_CL K#

P20

HVM_CL K

R20

1

TP605TP605

R606 49D9R2 F-GP

1 2

DY

R602 49D9R2 F-GPR602 49D9R2 F-GP

1 2

1

TP619TP619

1

TP620TP620

Layout Note:

1.Referenced "continuous " VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3.Trace width: 12~15mil

4.Isolation Spacing: 12m il

5.Max length: 500mil

CFG3

DY

12

R604

R604 1KR2J-1 -GP

1KR2J-1 -GP

PHYSICAL_D EBUG_ENAB LED (DFX PRIVACY)

0 : ENABL ED

CFG[3]

SET DFX EN ABLED BIT IN DEBU G INTERFA CE MSR

1 : DISABL ED

CFG4

B B

A A

5

4

12

R605

R605 1KR2J-1 -GP

1KR2J-1 -GP

DISPLAY PO RT PRESEN CE STRAP

0 : ENABL ED AN EXTERNA L DISPLAY PORT DEV ICE IS CO NNECTED T O THE EMBE DDED DISP LAY PORT

CFG[4]

1 : DISABL ED

NO PHYSICA L DISPLAY PORT ATT ACHED TO EMBEDDED DISPLAY PO RT

3

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU (RESERVED)

Hadley 15"

6 101Friday, June 28, 2 013

1

X02

of

X02

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

CPU1L

L59

AH26

AJ31 AJ33

AJ37 AN33 AP43 AR48 AY35 AY40 AY44 AY50

AC58

AB23

AD23 AA23 AE59

AD60 AD59 AA59 AE60 AC59 AG58

AC22 AE22 AE23

AB57 AD57 AG57

F59 N58

E63

A59 E20

L62 N63 L63 B59 F60 C59

D63 H59 P62 P60 P61 N59 N61 T59

U59 V59

C24 C28 C32

J58

RSVD#L59 RSVD#J58

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD#N58 RSVD#AC58

VCC_SENSE RSVD#AB23 VCCIO_OUT VCCIOA_OUT RSVD#AD23 RSVD#AA23 RSVD#AE59

VIDALERT# VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG# VSS RSVD_TP#P60 RSVD_TP#P61 RSVD_TP#N59 RSVD_TP#N61 RSVD#T59 RSVD#AD60 RSVD#AD59 RSVD#AA59 RSVD#AE60 RSVD#AC59 RSVD#AG58 RSVD#U59 RSVD#V59

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

HASW ELL-6-GP

1D35V_ S3

1D05S_ VCCST

R703 75R2F-2 -GPR703 75R2F-2 -GP

1 2

R704 130R2F -1-GPR704 130R2F -1-GP

1 2

C C

1D05V_ VTT_PWR GD[36,48]

EC701

SCD1U25V2KX-GP

12

DY

B B

VR_SVID_ ALERT#

H_CPU_ SVIDDAT

SCD1U1 0V2KX-5GP

U701

1

NC#1

2

A

DY

GND3Y

74LVC1 G07GW-GP

73.01G07.0HG

1 2

R707

R707 100KR2 F-L1-GP

100KR2 F-L1-GP

VCC

C702

5

4

12

3D3V_S 5

12

DY

R709

R709 51KR2J -1-GP

51KR2J -1-GP

1D05S_ VCCST

12

R706

R706 10KR2J -3-GP

10KR2J -3-GP

DY

H_VCCS T_PWRGD

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Lwngth match<25mil

VR_SVID_ ALERT#[46] H_CPU_ SVIDCLK[46]

H_VR_E NABLE[46]

H_CPU_ SVIDDAT[46]

C705

SCD1U2 5V2KX-GP

1D05S_ VCCST

100R2F -L1-GP-U

VCC_SE NSE[46]

IMVP_PW RGD_R

1 2

DY

R705 150R2J -L1-GP-UR705 150R2J -L1-GP-U

1 2

VCC_CO RE

R702

1 2

12

TP701TP701

R701

43R2J-G P

1 2

DY

VCC_CO RE

TP_VCC IO_OUT

1

+VCCIOA_ OUT

H_CPU_ SVIDALRT#

H_CPU_ SVIDCLK H_CPU_ SVIDDAT H_VCCS T_PWRGD

10KR2J -3-GP

10KR2J -3-GP R710

R710

PWR _DEBUG

1D05S_ VCCST

VCC_CO RE

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

A00 0619

H_VR_E NABLE

PR714

1D05S_ VCCST1D05V_ S0

1 2

R711

0R0805 -PAD-2-GP-U

A A

5

DY

12

C701

C703

DY

SC1U6D3V2KX-GP

SC22U6D3V5MX-2GP

4

IMVP_PW RGD[24,46]

1 2

R713

R713 100KR2 F-L1-GP

100KR2 F-L1-GP

47KR2F -GP

IMVP_PW RGD_L IMVP_PW RGD_R

C704

SCD1U25V2KX-GP

12

R712

DY

3

1 2

0R2J-2-G P

PD701

DY

BAT54L PS-7-GP

KA

12

PR715

DY

10KR2F -2-GP

12

PC706

DY

SCD047 U10V2KX-2GP

Title

CPU (VCC_CORE)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

2

Date: Sheet

CPU (VCC_CORE)

Hadley 15"

VCC_CO RE

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

7 101Friday, June 28, 2 013

of

7 101Friday, June 28, 2 013

of

7 101Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

X01 remove

CPU1A

HSW_ULT_DDR3L

1 OF 19

HDMI_DAT A2#[54]

HDMI_DAT A2[54]

HDMI

HDMI_DAT A1#[54]

HDMI_DAT A1[54]

HDMI_DAT A0#[54]

HDMI_DAT A0[54]

HDMI_CLK #[54]

HDMI_CLK[54]

C C

C54 C55

B58

C58

B55 A55 A57 B57

C51 C50 C53

B54

C49

B50 A53 B53

HASW ELL-6-GP

DDI1_TXN0 DDI1_TXP0 DDI1_TXN1 DDI1_TXP1 DDI1_TXN2 DDI1_TXP2 DDI1_TXN3 DDI1_TXP3

DDI2_TXN0 DDI2_TXP0 DDI2_TXN1 DDI2_TXP1 DDI2_TXN2 DDI2_TXP2 DDI2_TXN3 DDI2_TXP3

EDPDDI

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

EDP_TX 0_DN [53] EDP_TX 0_DP [5 3] EDP_TX 1_DN [53] EDP_TX 1_DP [5 3]

EDP_AU X_DN [5 3] EDP_AU X_DP [53]

EDP_CO MP EDP_BR IGHTNESS

R801

24D9R2 F-L-GP

1

TP801TP801

+VCCIOA_ OUT

Design Gui deline:

12

EDP_COMP k eep routi ng length max 100 mils. Trace Widt h:20 mils .

B B

A A

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU (DDI/EDP)

Hadley 15"

8 101Friday, June 28, 2 013

of

X02

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HSW_ULT_DDR3L

CPU1P

D33 D34 D35 D37 D38 D39 D41 D42 D43 D45 D46 D47 D49

D5 D50 D51 D53 D54 D55 D57

C C

B B

D59 D62

D8 E11 E17 F20 F26 F30 F34 F38 F42 F46 F50 F54 F58 F61

G18 G22

G3 G5 G6 G8

H13

HASW ELL-6-GP

16 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS_SENSE

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SE NSE

VSS_SE NSE [46]

12

R901

100R2F-L1-GP-U

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Lwngth match<25mil

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU (VSS)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

CPU (VSS)

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

9 101Friday, June 28, 2 013

of

9 101Friday, June 28, 2 013

of

9 101Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

1D35V_ S3

D D

C1005

SC10U6D3V3MX-GP

C1005

C1004

C1003

SC10U6D3V3MX-GP

C1003

C1002

C1001

SC10U6D3V3MX-GP

C1001

SC10U6D3V3MX-GP

12

C1017

SC2D2U6D3V2MX-GP

C C

SC10U6D3V3MX-GP

C1018

DY

SC2D2U6D3V2MX-GP

12

C1019

DY

SC2D2U6D3V2MX-GP

SC10U6D3V3MX-GP

12

C1020

SC2D2U6D3V2MX-GP

C1006

SC10U6D3V3MX-GPDYC1006

SC10U6D3V3MX-GP

12

DY

Layout Note:

Direct tie to CPU VccIn/ Vss balls

Layout Note:

As close to CPU as possi ble

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU(Power CAP1)

Hadley 15"

10 10 1Friday, June 28, 2 013

1

of

X02

5

4

3

2

1

SSID = CPU

D D

MAX: 1.92A

1.838A 41mA 42mA

1D05V_ HSIO +V1.05D X_MODPHY_PCH

1 2

R1101

0R0805 -PAD-2-GP-U

12

C1101

SC1U6D3V2KX-GP

C1101

C1102

SC1U6D3V2KX-GP

12

L1101 IND -2D2UH-196-GP

1 2

68.2R21D.10R

C1103

12

+V1.05S _AUSB3PLL

SC1U6D3V2KX-GP

C1104

SC10U6D3V3MX-GP

C1104

SC10U6D3V3MX-GP

12

+V1.05S _AUSB3PLL1D05V_ HSIO

C1123

SC10U6D3V3MX-GPDYC1123

SC10U6D3V3MX-GP

12

DY

1D05V_ HSIO +V1.05S _ASATA3PLL

L1102 IND -2D2UH-196-GP

1 2

68.2R21D.10R

C1105

SC1U6D3V2KX-GP

C1105

SC1U6D3V2KX-GP

12

+V1.05S _ASATA3PLL

C1106

SC10U6D3V3MX-GP

C1106

SC10U6D3V3MX-GP

12

C1107

12

SC10U6D3V3MX-GPDYC1107

SC10U6D3V3MX-GP

DY

CAP need close to pin K9 L10

C C

1 2

R1102

0R0603 -PAD-2-GP-U

+V1.05S _APLLOPI

C1109

SC1U6D3V2KX-GP

C1109

SC1U6D3V2KX-GP

12

C1110

SC10U6D3V3MX-GP

C1110

SC10U6D3V3MX-GP

CAP need close to pin AA21 CAP need close to pin AC9 CAP need close to pin J18

CAP need close to pin B18 CAP need close to pin B11

+V1.05S _APLLOPI1D05V_ S0

C1124

SC10U6D3V3MX-GPDYC1124

SC10U6D3V3MX-GP

12

3D3V_S 5_PCH +V3.3A_ PSUS

1 2

R1103

0R0603 -PAD-2-GP-U

1205 Add

C1108

SC10U6D3V3MX-GP

C1108

SC10U6D3V3MX-GP

12

1D05V_ S0 +V1.05S _AXCK_DCB

L1103 IND -2D2UH-196-GP

1 2

68.2R21D.10R

DY

1205 Add

200mA62mA57mA

+V1.05S _AXCK_DCB

C1112

SC10U6D3V3MX-GPDYC1112

SC10U6D3V3MX-GP

C1125

SC10U6D3V3MX-GPDYC1125

DY

SC10U6D3V3MX-GP

12

C1111

SC1U6D3V2KX-GP

C1111

SC1U6D3V2KX-GP

12

DY

1205 Add

31mA 658mA 1.632A 1mA

IND-2D2UH -196-GP

IND-2D2UH -196-GP L1104

L1104

1 2

68.2R21D.10R

B B

+V1.05S _AXCK_LCPL L1D05V_ S0

C1113

SC1U6D3V2KX-GP

C1113

SC1U6D3V2KX-GP

C1114

12

DY

CAP need close to pin A20 CAP need close to pin AE9 CAP need close to pin AE8 J11

1D05V_ S0 +1.05M_ ASW 1D05V _S0

1 2

R1104

0R0603 -PAD-2-GP-U

SC10U6D3V3MX-GPDYC1114

SC10U6D3V3MX-GP

0R0603 -PAD-2-GP-U

C1115

SC22U6D3V5MX-2GPDYC1115

SC22U6D3V5MX-2GP

12

DY

RTC_AU X_S5

C1117

SC1U6D3V2KX-GP

C1117

C1116

SC1U6D3V2KX-GP

C1116

SC1U6D3V2KX-GP

12

SC1U6D3V2KX-GP

C1118

SC1U6D3V2KX-GP

C1118

SC1U6D3V2KX-GP

12

C1119

SC10U6D3V3MX-GP

C1119

SC10U6D3V3MX-GP

12

C1120

SCD1U10V2KX-5GPDYC1120

SCD1U10V2KX-5GP

12

C1122

SC1U6D3V2KX-GP

C1122

SC1U6D3V2KX-GP

C1121

SCD1U10V2KX-5GP

C1121

SCD1U10V2KX-5GP

12

DY

CAP need close to pin AG10

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU(Power CAP2)

Hadley 15"

11 10 1Friday, June 28, 2 013

1

of

X02

5

4

3

2

1

SSID = MEMORY

DM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

SKT_DDR 204P SMD

DDR3-204P-122-GP-U1

62.10017.Z51

4

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103

102

CK1

104

11 28 46 63 136 153 170 187

200

SDA

202

SCL

198

199

SA0_DIMA

197

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SA1_DIMA

201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

1D35V_S3

M_A_RAS# [5] M_A_WE# [5] M_A_CAS# [5]

M_A_DIMA_CS#0 [5] M_A_DIMA_CS#1 [5]

M_A_DIMA_CKE0 [5] M_A_DIMA_CKE1 [5]

M_A_DIMA_CLK_DDR0 [5] M_A_DIMA_CLK_DDR#0 [5]

M_A_DIMA_CLK_DDR1 [5] M_A_DIMA_CLK_DDR#1 [5]

PCH_SMBDATA [13,18,58,62,67] PCH_SMBCLK [13,18,58,62,67]

C1203

SCD1U10V2KX-5GP

1D35V_S3

Layout Note:

Place these Caps near SO-DIMMA.

X01 change to short pad

DDR_PG_CTRL[4]

1 2

Q1201 Need check Vth=1V

3D3V_S0

12

DY

12

0R0402-PAD-2-GP

R1205

3

0R0402-PAD-2-GP

C1207

12

DY

12

C1211

C1210

SCD1U10V2KX-5GP

DDR_PG_CTRL_R

SA0_DIMA SA1_DIMA

SC10U6D3V3MX-GPDYC1207

SC10U6D3V3MX-GP

SCD1U10V2KX-5GP

R1202

C1208

12

SC10U6D3V3MX-GP

12

C1212

SC1U6D3V2KX-GP

1D35V_S3

Q1201

Q1201 DMN5L06K-7-GP

DMN5L06K-7-GP

84.05067.031

C1209

SC10U6D3V3MX-GP

C1209

SC10U6D3V3MX-GP

C1213

SC1U6D3V2KX-GP

G

12

R1201

R1201 0R0402-PAD-2-GP

0R0402-PAD-2-GP

12

C1220

SCD1U10V2KX-5GP

DS

12

5V_S5

C1221

SCD1U10V2KX-5GP

12

DY

Note: SA0 DIM0 = 0, SA1_DIM0 = 0 SO-DIMMA SPD Address is 0xA0 SO-DIMMA TS Address is 0x30

Layout Note:

Place Close SO-DIMMA.

DDR_WR_VREF01[5]

12

C1222

SCD1U10V2KX-5GP

1D35V_S3

D

R1208

R1208 220KR2J-L2-GP

220KR2J-L2-GP

DDR_VTT_PG_CTRL

R1204

R1204 2MR2-GP

2MR2-GP

G

2

12

+V_VREF_PATH1

12

Q1202

Q1202 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

M_A_B_DIMM_ODT

DDR_VTT_PG_CTRL [49]

1D35V_S30D675V_VTTREF

12

R1215

0R2J-2-GP

DY

2R2F-GP

2R2F-GP R1210

R1210

1 2

C1219

C1219 SCD022U16V2JX-GP

SCD022U16V2JX-GP

R1212

R1212 24D9R2F-L-GP

24D9R2F-L-GP

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Date: Sheet of

R1211

R1211 1K8R2F-GP

1K8R2F-GP

12

R1213

R1213 1K8R2F-GP

1K8R2F-GP

R1206 66D5R2F-GPR1206 66D5R2F-GP

1 2

R1207 66D5R2F-GPR1207 66D5R2F-GP

1 2

R1203 66D5R2F-GPR1203 66D5R2F-GP

1 2

R1209 66D5R2F-GPR1209 66D5R2F-GP

1 2

DDR3L-SODIMM1

Hadley 15"

Friday, June 28, 2013

Hadley 15"

M_VREF_DQ_DIMMA

M_A_DIMA_ODT0

M_A_DIMA_ODT1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

M_B_DIMB_ODT0 [13]

M_B_DIMB_ODT1 [13]

12 101

X02

C1217

SCD1U10V2KX-5GPDYC1217

SCD1U10V2KX-5GP

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ13 M_A_DQ8 M_A_DQ14 M_A_DQ10 M_A_DQ9 M_A_DQ12 M_A_DQ15 M_A_DQ11 M_A_DQ29 M_A_DQ28 M_A_DQ30 M_A_DQ31 M_A_DQ25 M_A_DQ24 M_A_DQ27 M_A_DQ26 M_A_DQ44 M_A_DQ41 M_A_DQ43 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ42 M_A_DQ46 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ7 M_A_DQ21 M_A_DQ20 M_A_DQ17 M_A_DQ16 M_A_DQ18 M_A_DQ19 M_A_DQ22 M_A_DQ23 M_A_DQ36 M_A_DQ33 M_A_DQ34 M_A_DQ38 M_A_DQ37 M_A_DQ32 M_A_DQ35 M_A_DQ39 M_A_DQ62 M_A_DQ58 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ59 M_A_DQ56 M_A_DQ57

M_A_DQS#1 M_A_DQS#3 M_A_DQS#5 M_A_DQS#6 M_A_DQS#0 M_A_DQS#2 M_A_DQS#4 M_A_DQS#7

M_A_DQS1 M_A_DQS3 M_A_DQS5 M_A_DQS6 M_A_DQS0 M_A_DQS2 M_A_DQS4 M_A_DQS7

M_A_DIMA_ODT0 M_A_DIMA_ODT1

0D675V_S0

12

M_A_A[15:0][5]

D D

M_A_BS2[5]

M_A_BS0[5] M_A_BS1[5]

M_A_DQ[63:0][5]

12

DY

C1202

SCD1U10V2KX-5GP

Layout Note:

Place these caps close to VREF_DQ

12

DY

C1206

SCD1U10V2KX-5GP

C1216

SC1U6D3V2KX-GP

M_A_DQS#[7:0][5]

M_A_DQS[7:0][5]

DDR3_DRAMRST#[4,13]

Layout Note:

Place these caps close to VREF_CA

Layout Note:

Place these caps close to VTT1 and VTT2.

M_VREF_CA_DIMMA M_VREF_DQ_DIMMA

M_VREF_CA_DIMMA

12

DY

C1201

C1218

SCD1U10V2KX-5GP

C C

M_VREF_DQ_DIMMA

12

C1204

0D675V_S0

12

C1214

B B

A A

SC1U6D3V2KX-GP

Layout Note:

All VREF traces should have width=20mil; spacing=20 mil

SCD1U10V2KX-5GP

12

C1205

DY

SC2D2U6D3V2MX-GP

SCD1U10V2KX-5GP

12

C1215

DY

SC1U6D3V2KX-GP

DY

close to dimm

5

4

3

2

1

SSID = MEMORY

DM2

M_B_A0 M_B_A1

M_B_A[15:0] [5]

D D

M_B_BS2[5]

M_B_BS0[5] M_B_BS1[5]

12

DY

12

DY

12

C1318

M_B_DQ[63:0][5]

Layout Note:

Place these caps close to VREF_CA

C1302

SCD1U10V2KX-5GP

Layout Note:

Place these caps close to VREF_DQ

C1306

SCD1U10V2KX-5GP

Layout Note:

Place these caps close to VTT1 and VTT2.

SC1U6D3V2KX-GP

M_B_DQS#[7:0] [5]

M_B_DQS[7:0] [5]

M_B_DIMB_ODT0[12] M_B_DIMB_ODT1[12]

M_VREF_CA_DIMMB M_VREF_DQ_DIMMB

DDR3_DRAMRST#[4,12]

M_VREF_CA_DIMMB

12

DY

C1301

EC1302

SCD1U10V2KX-5GP

C C

M_VREF_DQ_DIMMB

12

C1305

DY

C1304

SC2D2U6D3V2MX-GP

SCD1U10V2KX-5GP

0D675V_S0

12

B B

A A

12

DY

C1317

C1316

SC1U6D3V2KX-GP

Layout Note:

All VREF traces should have width=20mil; spacing=20 mil

M_B_A2 M_B_A3 M_B_A4 M_B_A5 M_B_A6 M_B_A7 M_B_A8 M_B_A9 M_B_A10 M_B_A11 M_B_A12 M_B_A13 M_B_A14 M_B_A15

M_B_DQ8 M_B_DQ14 M_B_DQ10 M_B_DQ11 M_B_DQ12 M_B_DQ9 M_B_DQ13 M_B_DQ15 M_B_DQ28 M_B_DQ29 M_B_DQ26 M_B_DQ27 M_B_DQ25 M_B_DQ24 M_B_DQ30 M_B_DQ31 M_B_DQ40 M_B_DQ41 M_B_DQ46 M_B_DQ42 M_B_DQ45 M_B_DQ44 M_B_DQ47 M_B_DQ43 M_B_DQ56 M_B_DQ57 M_B_DQ59 M_B_DQ58 M_B_DQ61 M_B_DQ60 M_B_DQ63 M_B_DQ62 M_B_DQ4 M_B_DQ1 M_B_DQ3 M_B_DQ7 M_B_DQ5 M_B_DQ0 M_B_DQ2 M_B_DQ6 M_B_DQ21 M_B_DQ20 M_B_DQ22 M_B_DQ23 M_B_DQ16 M_B_DQ17 M_B_DQ19 M_B_DQ18 M_B_DQ36 M_B_DQ33 M_B_DQ35 M_B_DQ39 M_B_DQ37 M_B_DQ32 M_B_DQ34 M_B_DQ38 M_B_DQ52 M_B_DQ49 M_B_DQ48 M_B_DQ53 M_B_DQ51 M_B_DQ55 M_B_DQ54 M_B_DQ50

M_B_DQS#1 M_B_DQS#3 M_B_DQS#5 M_B_DQS#7 M_B_DQS#0 M_B_DQS#2 M_B_DQS#4 M_B_DQS#6

M_B_DQS1 M_B_DQS3 M_B_DQS5 M_B_DQS7 M_B_DQS0 M_B_DQS2 M_B_DQS4 M_B_DQS6

C1319

SCD1U10V2KX-5GPDYC1319

SCD1U10V2KX-5GP

0D675V_S0

12

DY

close to dimm

5

4

DM2

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

SKT_DDR 204P SMD

DDR3-204P-122-GP-U1

62.10017.Z51

RAS#

WE#

CAS#

CS0# CS1#

CKE0 CKE1

CK0#

CK1#

DM0 DM1 DM2 DM3 DM4 DM5 DM6 DM7

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

NP1

NP2

110 113 115

114 121

73 74

101

CK0

103

102

CK1

104

11 28 46 63 136 153 170 187

200

SDA

202

SCL

198

199

197

SA0 SA1

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

SA1_DIMB

201

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2 3 8 9 13 14 19 20 25 26 31 32 37 38 43 44 48 49 54 55 60 61 65 66 71 72 127 128 133 134 138 139 144 145 150 151 155 156 161 162 167 168 172 173 178 179 184 185 189 190 195 196 205 206

1D35V_S3

M_B_RAS# [5] M_B_WE# [5] M_B_CAS# [5]

M_B_DIMB_CS#0 [5] M_B_DIMB_CS#1 [5]

M_B_DIMB_CKE0 [5] M_B_DIMB_CKE1 [5]

M_B_DIMB_CLK_DDR0 [5] M_B_DIMB_CLK_DDR#0 [5]

M_B_DIMB_CLK_DDR1 [5] M_B_DIMB_CLK_DDR#1 [5]

PCH_SMBDATA [12,18,58,62,67] PCH_SMBCLK [12,18,58,62,67]

DY

C1303

SCD1U10V2KX-5GP

1D35V_S3

12

DY

12

Layout Note:

Place these Caps near SO-DIMMA.

3

3D3V_S0

12

C1312

SC10U6D3V3MX-GPDYC1312

SC10U6D3V3MX-GP

C1311

SC10U6D3V3MX-GPDYC1311

SC10U6D3V3MX-GP

12

DY

12

C1314

C1313

SCD1U10V2KX-5GP

Note: SO-DIMMB SPD Address is 0xA4 SO-DIMMB TS Address is 0x34

3D3V_S0

12

R1301

R1301 10KR2J-3-GP

10KR2J-3-GP

SA1_DIMB

SA0_DIMBSA0_DIMB

12

R1302

R1302 0R0402-PAD-2-GP

0R0402-PAD-2-GP

Layout Note:

Place Close SO-DIMMA.

DDR_WR_VREF02[5]

C1307

SC10U6D3V3MX-GP

C1307

SC10U6D3V3MX-GP

C1308

SC10U6D3V3MX-GP

C1308

C1310

SC10U6D3V3MX-GPDYC1310

SC10U6D3V3MX-GP

12

DY

12

C1315

DY

SCD1U10V2KX-5GP

SC10U6D3V3MX-GP

C1309

SC10U6D3V3MX-GPDYC1309

SC10U6D3V3MX-GP

EC1301

SCD1U10V2KX-5GP

12

2

0D675V_VTTREF

R1308

0R2J-2-GP

2R2F-GP

2R2F-GP R1304

R1304

1 2

12

C1320

C1320 SCD022U16V2JX-GP

SCD022U16V2JX-GP

+V_VREF_PATH2

12

R1307

R1307 24D9R2F-L-GP

24D9R2F-L-GP

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Date: Sheet of

1D35V_S3

12

DY

Friday, June 28, 2013

12

R1306

R1306 1K8R2F-GP

1K8R2F-GP

12

R1303

R1303 1K8R2F-GP

1K8R2F-GP

DDR3L-SODIMM2

Hadley 15"

M_VREF_DQ_DIMMB

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

13 101

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

M1&M3

Hadley 15"

14 10 1Friday, June 28, 2 013

of

14 10 1Friday, June 28, 2 013

of

14 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

D D

3D3V_S 0

1

23

RN1501

HSW_ULT_DDR3L

eDP SIDEBAND

PCIE

HSW_ULT_DDR3L

DISPLAY

CPU1I

AD4

CPU1I

B8 A9 C6

U6 P4 N4 N2

U7

L1 L3

R5

L4

EDP_BKLCTL EDP_BKLEN EDP_VDDEN

PIRQA#/GPIO77 PIRQB#/GPIO78 PIRQC#/GPIO79 PIRQD#/GPIO80 PME#

GPIO55 GPIO52 GPIO54 GPIO51 GPIO53

C C

0R0402 -PAD-2-GP

L_BKLT _CTRL_R

R1501

RN1504

1 2 3

OPS

SRN10K J-5-GP

100KR2 J-1-GP

100KR2 J-1-GP R1509

R1509

1 2

DGPU_P WR_EN

4

DGPU_H OLD_RST#

DGPU_P WROK

L_BKLT _CTRL[53 ] L_BKLT _EN[24]

EDP_VD D_EN[52]

B11!dibohf!up!QJSRC$

HDD_FA LL_INT[67]

DGPU_P WR_EN[82,83] DGPU_H OLD_RST#[73]

DGPU_P WROK[24,82,83 ]

1 2

0R0402 -PAD-2-GP

0R0402 -PAD-2-GP R1503

R1503

1 2

TP1501TP1501

TP1503TP1503

TP1502TP1502

PIRQA# PIRQB# PIRQC# PIRQD# PCI_PME#

1

MCP_GP IO55

1

DGPU_P WR_EN DGPU_H OLD_RST# DGPU_P WROK

PCH_SD _CD#

1

9 OF 19

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN DDPB_AUXP DDPC_AUXP

DDPB_HPD

DDPC_HPD

EDP_HPD

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

RN1501 SRN2K2 J-1-GP

SRN2K2 J-1-GP

4

HDMI_PCH _DET [54]

EDP_HP D [52 ,53]

PCH_HD MI_CLK [54] PCH_HD MI_DATA [54]

3D3V_S 0

B B

A A

5

RN1505

8 7 6

SRN10K J-6-GP

PIRQD#

1

PIRQC#

2

PIRQB#

3

PIRQA#

45

4

3

HASW ELL-6-GP

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU ( EDP SIDEBAND/GPIO/DDI )

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

X02

15 10 1Friday, June 28, 2 013

of

15 10 1Friday, June 28, 2 013

of

15 10 1Friday, June 28, 2 013

1

X02

SSID = CPU

5

4

3

2

1

D D

PCIE Table

Port

1

2

3

4

5(4lane)

6(4lane)

C C

B B

Device

N/A

WLAN

LAN+ Card reader

GPU

N/A

Share BUS

USB3.0_3

USB3.0_4

SATA0~3

CPU_RX N_C_dGPU_T XN0[73] CPU_RX P_C_dGPU_T XP0[73]

dGPU_R XN_C_CPU_T XN0[73] dGPU_R XP_C_CPU_T XP0[7 3]

CPU_RX N_C_dGPU_T XN1[73] CPU_RX P_C_dGPU_T XP1[73 ]

dGPU_R XN_C_CPU_T XN1[73] dGPU_R XP_C_CPU_T XP1[7 3]

CPU_RX N_C_dGPU_T XN2[73] CPU_RX P_C_dGPU_T XP2[73 ]

dGPU_R XN_C_CPU_T XN2[73] dGPU_R XP_C_CPU_T XP2[7 3]

CPU_RX N_C_dGPU_T XN3[73] CPU_RX P_C_dGPU_T XP3[73 ]

dGPU_R XN_C_CPU_T XN3[73] dGPU_R XP_C_CPU_T XP3[7 3]

PCIE_PRX _WLANTX _N3[58] PCIE_PRX _WLANTX _P3[58]

PCIE_PTX _WLANRX _N3_C[58] PCIE_PTX _WLANRX _P3_C[58]

PCIE_PRX _LANTX_N4[30] PCIE_PRX _LANTX_P4[30]

PCIE_PTX _LANRX_N4_ C[30] PCIE_PTX _LANRX_P4_ C[30]

USB3_P RX_DTX_N2[63] USB3_P RX_DTX_P2[63]

USB3_P TX_DRX_N2[63] USB3_P TX_DRX_P2[63]

USB3_P RX_DTX_N3[63] USB3_P RX_DTX_P3[63]

USB3_P TX_DRX_N3[63] USB3_P TX_DRX_P3[63]

+V1.05S _AUSB3PLL

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1606

C1606

1 2

OPS

1 2

OPS

C1605

C1605 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1608

C1608

1 2

OPS

1 2

OPS

C1607

C1607 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1610

C1610

1 2

OPS

1 2

OPS

C1609

C1609 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1612

C1612

1 2

OPS

1 2

OPS

C1611

C1611 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1601

C1601

1 2 1 2

C1602

C1602 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP C1603

C1603

1 2 1 2

C1604

C1604 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

R1601

3KR2F-G P

1 2

Layout Note:

1. PCIE_RC OMP/ PCIE _IREF tra ce width= 12~15mil

2. Isolati on Spacin g: 12mil

3. Total t race leng th<500mil

dGPU_R XN_CPU_TXN 0

dGPU_R XP_CPU_TXP 0

dGPU_R XN_CPU_TXN 1

dGPU_R XP_CPU_TXP 1

dGPU_R XN_CPU_TXN 2

dGPU_R XP_CPU_TXP 2

dGPU_R XN_CPU_TXN 3

dGPU_R XP_CPU_TXP 3

PCIE_PTX _WLANRX _N3 PCIE_PTX _WLANRX _P3

PCIE_PTX _LANRX_N4 PCIE_PTX _LANRX_P4

PCIE_RCO MP

E10

C23 C22

B23 A23

H10 G10

B21 C21

B22 A21

G11

C29 B30

G13

B29 A29

G17

C30 C31

G15

B31 A31

E15 E13 A27 B27

CPU1K

F10

F8 E8

E6 F6

F11

F13

F17

F15

PERN5_L0 PERP5_L0

PETN5_L0 PETP5_L0

PERN5_L1 PERP5_L1

PETN5_L1 PETP5_L1

PERN5_L2 PERP5_L2

PETN5_L2 PETP5_L2

PERN5_L3 PERP5_L3

PETN5_L3 PETP5_L3

PERN3 PERP3

WLAN

PETN3 PETP3

PERN4 PERP4

LAN+Card reader

PETN4 PETP4

PERN1/USB3RN3 PERP1/USB3RP3

PETN1/USB3TN3 PETP1/USB3TP3

PERN2/USB3RN4 PERP2/USB3RP4

PETN2/USB3TN4 PETP2/USB3TP4

RSVD#E15 RSVD#E13 PCIE_RCOMP PCIE_IREF

HASW ELL-6-GP

HSW_ULT_DDR3L

PCIE USB

11 OF 19

USB2N0 USB2P0

USB2N1 USB2P1

USB2N2 USB2P2

USB2N3 USB2P3

USB2N4 USB2P4

USB2N5 USB2P5

USB2N6 USB2P6

USB2N7 USB2P7

USB3RN1 USB3RP1

USB3TN1 USB3TP1

USB3RN2 USB3RP2

USB3TN2 USB3TP2

USBRBIAS#

USBRBIAS RSVD#AN10 RSVD#AM10

OC0/GPIO40# OC1/GPIO41# OC2/GPIO42# OC3/GPIO43#

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USB_PN 7 USB_PP 7

USB_CO MP

USB_OC #0_1 USB_OC #2_3 USB_OC #4_5 USB_OC #6_7

1 1

USB_PN 0 [34] USB_PP 0 [3 4]

USB_PN 1 [35] USB_PP 1 [3 5]

USB_PN 2 [63] USB_PP 2 [6 3]

USB_PN 3 [63] USB_PP 3 [6 3]

USB_PN 4 [52] USB_PP 4 [5 2]

USB_PN 5 [58] USB_PP 5 [5 8]

USB_PN 6 [52] USB_PP 6 [5 2]

TP1602TP1602 TP1601TP1601

1 2

R1602

R1602 22D6R2 F-L1-GP

22D6R2 F-L1-GP

USB_OC #0_1 [3 5] USB_OC #2_3 [3 5]

USB 2.0 Table

Pair

0

1

2

3

4

5

6

7

USB3_P RX_CTX_N0 [34 ] USB3_P RX_CTX_P0 [34]

USB3_P TX_CRX_N0 [34 ] USB3_P TX_CRX_P0 [34]

USB3_P RX_CTX_N1 [34 ] USB3_P RX_CTX_P1 [34]

USB3_P TX_CRX_N1 [34 ] USB3_P TX_CRX_P1 [34]

1. USB_COM P using 5 0 ohm singl e-ended i mpedance

2. Isolati on Spacin g :15mil

3. Total t race leng th<500mil

USB_OC #0_1 USB_OC #2_3 USB_OC #4_5 USB_OC #6_7

Device

USB3.0 Port2

USB3.0 port1 (with Power Share)

USB3.0 Port3

USB3.0 Port4

CAMERA

WLAN

Touch Panel

N/A

Layout Note:

3D3V_S 5_PCH

RN1601

1

8

2

7

3

6

4 5

SRN10K J-6-GP

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU (PCIE/USB)

Hadley 15"

16 10 1Friday, June 28, 2 013

1

of

X02

5

SSID = CPU

D D

RN1703

1

4

2 3

SRN10K J-5-GP

1 2

DY

R1717 10KR2 J-3-GP

3D3V_S 0

RN1704

1 2 3

SRN8K2 J-3-GP

C C

B B

XDP_DB RESET#

4

PM_CLK RUN#

SYS_PW ROK[24,96] PCH_PW ROK[2 4,26,36]

PM_PW RBTN#[24,96] AC_PRE SENT[24,76 ]

PCH_SL P_S0#[48] PM_SLP _SUS# [24,38 ]

3D3V_S 5

3D3V_S 5_PCH

PM_RSM RST# PM_PCH _PWROK

SYS_PW ROK

R1706 0R0402-P AD-2-GPR1706 0R0402-P AD-2-GP

1 2

PLT_RS T#[24,30,58 ,65,73]

100KR2 J-1-GP

RN1701

1

4

2 3

SRN10K J-5-GP

1 2

DY

R1724 10KR2J -3-GP

1 2

R1727 10KR2J -3-GPR1727 10KR2J-3-GP

0R0402 -PAD-2-GP

TP1705TP1705

R1715

DY

BATLOW # AC_PRE SENT

PM_SUS _STAT#

PM_SUS WARN#

R1707

1 2

12

DY

4

PM_SUS ACK#_R

XDP_DB RESET# SYS_PW ROK

PM_PCH _PWROK

MPW ROK PCI_PLTR ST#

PM_RSM RST#

PM_SUS WARN#_R

PM_PW RBTN# AC_PRE SENT BATLOW # PCH_SL P_S0#

R1713

PCH_SL P_WLAN#

PCI_PLTR ST#

PM_SUS ACK#[2 4]

PM_SUS WARN#[2 4]

1

0R0402 -PAD-2-GP

1 2

C1701

C1701 SC220P 50V2KX-3GP

SC220P 50V2KX-3GP

CPU1H

AK2

SUSACK#

AC3

SYS_RESET#

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST#

AW6

RSMRST#

AV4

SUSWARN#/SUSPWRDNACK#/GPIO30

AL7

PWRBTN#

AJ8

ACPRESENT/GPIO31

AN4

BATLOW#/GPIO72

AF3

SLP_S0#

AM5

SLP_WLAN#/GPIO29

HASW ELL-6-GP

RN

A00 0618

1

4

2 3

0R4P2R -PAD

RN1702

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

PM_SUS ACK#_R PM_SUS WARN#_R

3D3V_A UX_S5

R1726

R1726 10KR2J -3-GP

10KR2J -3-GP

1 2

3

8 OF 19

DPWROK

WAKE#

SLP_S4# SLP_S3#

SLP_A# SLP_SUS# SLP_LAN#

AW7 AV5 AJ5

V5 AG4 AE6 AP5

AJ6 AT4 AL5 AP4 AJ7

PCH_DP WROK

PM_RSM RST#

DSWVRMEN

CLKRUN#/GPIO32

SUS_STAT#/GPIO61

SUSCLK/GPIO62

SLP_S5#/GPIO63

NON DS3

1 2

R1708

R1708 100KR2 J-1-GP

100KR2 J-1-GP

Q1701

5

6

2N7002 KDW-GP

34

2

1

3V_5V_ POK# 3V_5V_ POK_C

2

PCH strap pin:

On Die DSW VR Enable

DSWODVREN

DSW ODVREN PCH_DP WROK PM_R SMRST#

PCH_W AKE#

PM_CLK RUN# PM_SUS _STAT# SUS_CL K PM_SLP _S5#

PM_SLP _S4# PM_SLP _S3# PM_SLP _A# PM_SLP _SUS# PM_SLP _LAN#

R1703 1KR2J-1-G PR1703 1KR2J-1 -GP

1

A00 0618

R1718

1 2

0R0402 -PAD-2-GP

R1725

100KR2 F-L1-GP

1KR2J-1 -GP

1KR2J-1 -GP R1702

R1702

1 2

R1728

1 2

0R2J-2-G P

NON DS3

1 2

R1729

0R0402 -PAD-2-GP

*

NON DS3

0R2J-2-G P

0R2J-2-G P R1704

R1704

1 2 1 2

0R0402 -PAD-2-GP

R1709

1 2

TP1702TP1702 R1710

R1710

1 2

TP1703TP1703

TP1704TP1704

TP1707TP1707

12

DS3

RSMRST #_KBC [2 4]

3V_5V_ POK [45]

PM_SLP _SUS#

Low = Disable High = Enable (de fault)

A00 0618

0R0402 -PAD-2-GP

PM_SLP _S4# [24 ,49]

PM_SLP _S3# [2 4,36,48,49,51]

3D3V_S 5

0311 PCH WAKE# pin PH 1K

PM_CLK RUN#_EC [24]

PCH_SU SCLK_KBC [24]

KBC_DP WROK [2 4]

PCH_SU SCLK_KBC

DSW ODVREN

1

R1720

330KR2 J-L1-GP

1 2

DY

R1721

330KR2 J-L1-GP

EC1701

SC4D7P 50V2CN-1GP

RTC_AU X_S5

DY

1 2

A00 0618

A A

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU (PM)

Hadley 15"

X02

17 10 1Friday, June 28, 2 013

of

17 10 1Friday, June 28, 2 013

of

17 10 1Friday, June 28, 2 013

1

X02

5

SSID = CPU

3D3V_S 0

D D

C C

LPC_AD [3..0][24,65]

B B

SRN10K J-6-GP

CLK_PC IE_WLAN_N 3[58] CLK_PC IE_WLAN_P 3[58]

CLK_PC IE_WLAN_R EQ3#[58 ]

CLK_PC IE_LAN_N4[30] CLK_PC IE_LAN_P4[3 0]

CLK_PC IE_LAN_REQ4#[30]

RN1801

1 2 3 4 5

CLK_PC IE_VGA#[73] CLK_PC IE_VGA[7 3]

PEG_CL KREQ#[73]

CLK_PC IE_REQ#

8

CLK_PC IE_WLAN_R EQ3#

7

PEG_CL KREQ#

6

CLK_PC IE_LAN_REQ4#

LPC_AD [3..0]

LPC_FR AME#[24,65]

SPI_CLK_ R[24,25] SPI_CS0# _R[24,25]

SPI_SI_R[24,25]

SPI_SO_R[24,25]

SPI_W P#[25] SPI_HOLD #[25]

3D3V_S 5

RN1802

SRN1KJ -11-GP-U

LPC_AD 0 LPC_AD 1 LPC_AD 2 LPC_AD 3

1

23

4

X01 0321

RN1806

RN1806 0R8P4R -PAD-1-GP

0R8P4R -PAD-1-GP

8 7 6

X01 0321

PCH_SP I_DQ3 PCH_SP I_DQ2

RN

1 2 1 2 1 2 1 2

1 2 3 45

R18010R0402-PAD -2-GP R18010R0402-PA D-2-GP

1 2

R18070R0402-PAD -2-GP R18070R0402-PA D-2-GP

1 2

R18080R0402-PAD -2-GP R18080R0402-PA D-2-GP R18090R0402-PAD -2-GP R18090R0402-PA D-2-GP R18110R0402-PAD -2-GP R18110R0402-PA D-2-GP R18120R0402-PAD -2-GP R18120R0402-PA D-2-GP

4

CLK_PC IE_REQ#

LPC_LA D0_PCH LPC_LA D1_PCH LPC_LA D2_PCH LPC_LA D3_PCH LPC_LF RAME#_PCH

PCH_SP I_CLK

R180633R2 J-2-GP R1 80633R2J-2-GP

PCH_SP I_CS0#

PCH_SP I_SI PCH_SP I_SO PCH_SP I_DQ2 PCH_SP I_DQ3

CPU1F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0#/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1#/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2#/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3#/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4#/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5#/GPIO23

HASW ELL-6-GP

CPU1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME#

AA3

SPI_CLK

Y7

SPI_CS0#

Y4

SPI_CS1#

AC2

SPI_CS2#

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

HASW ELL-6-GP

HSW_ULT_DDR3L

CLOCK

WLAN

SIGNALS

LAN/ Card reader

GPU

HSW_ULT_DDR3L

LPC

SMBUS

SML1ALERT#/PCHHOT#/GPIO73

C-LINKSPI

3

XTAL24_IN

XTAL24_OUT

RSVD#K21 RSVD#M21

DIFFCLK_BIASREF

TESTLOW_C35 TESTLOW_C34 TESTLOW_AK8 TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

CLKOUT_ITPXDP#

CLKOUT_ITPXDP_P

SMBALERT#/GPIO11

SMBCLK

SMBDATA

SML0ALERT#/GPIO60

SML0CLK

SML0DATA

SML1CLK/GPIO75

SML1DATA/GPIO74

CL_CLK CL_DATA CL_RST#

6 OF 19

7 OF 19

A25 B25

K21 M21 C26

C35 C34 AK8 AL8

AN15 AP15

B35 A35

AN2 AP2 AH1 AL2 AN1 AK1 AU4 AU3 AH3

AF2 AD2 AF4

XTAL24 _IN XTAL24 _OUT

XCLK_B IASREF

MCP_TE STLOW1 MCP_TE STLOW2 MCP_TE STLOW3 MCP_TE STLOW4

CLK_PC I_LPC_R CLK_PC I_KBC_R

MCP_GP IO11 SMB_CL K SMB_DA TA CARD_P WR_EN SML0_C LK SML0_D ATA MCP_GP IO73 SML1_C LK SML1_D ATA

TP_CL_ CLK

1

TP_CL_ DATA

1

TP_CL_ RST#

1

3KR2F-G P

R1803

1 2

RN1803

RN1803 SRN10K J-5-GP

SRN10K J-5-GP

2 3 1

RN1808

RN1808 SRN10K J-5-GP

SRN10K J-5-GP

1 2 3

R1804 0R2J-2 -GP

1 2

LPC

R1805

1 2

0R0402 -PAD-2-GP

A00 0618

SML0_C LK [5 3] SML0_D ATA [53 ]

SML1_C LK [24 ,26,76] SML1_D ATA [24 ,26,76]

TP1803TP1803 TP1804TP1804 TP1805TP1805

SMB_DA TA

SMB_CL K

2

+V1.05S _AXCK_LCPL L

4

EC1801

SC10P50V2JN-4GPDYEC1801

SC10P50V2JN-4GP

12

DY

3D3V_S 0

Q1801

6

5

2N7002 KDW-GP

XTAL24 _IN

XTAL24 _OUT

CLK_PC I_LPC [65]

CLK_PC I_KBC [24 ]

PCIE_CLK _XDP_N [9 6] PCIE_CLK _XDP_P [96]

EC1802

SC10P50V2JN-4GPDYEC1802

SC10P50V2JN-4GP

1

2

34

A00 0618

0R0402 -PAD-2-GP

R1810

1 2

12

R1802

R1802 1M1R2J -GP

1M1R2J -GP

SML0_D ATA SML0_C LK SML1_C LK SML1_D ATA

MCP_GP IO73 MCP_GP IO11 CARD_P WR_EN

SMB_DA TA SMB_CL K

84.2N702.A3F

2nd = 84.DM601.03 F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

XTAL24 _IN_R

23

XTAL-24 MHZ-86-GP

XTAL-24 MHZ-86-GP X1801

4 1

2 3 1

X1801

82.30004.891

RN1807

4 5 3 2 1

SRN2K2 J-4-GP

SRN2K2 J-4-GP RN1809

RN1809 SRN10K J-6-GP

SRN10K J-6-GP

1 2 3 4 5

RN1804

2 3 1

SRN2K2 J-1-GP

RN1805

4

SRN2K2 J-1-GP

PCH_SM BDATA [1 2,13,58,62,67]

PCH_SM BCLK [12,13,58 ,62,67]

1

C1801

1 2

SC15P5 0V2JN-2-GP

C1802

1 2

SC15P5 0V2JN-2-GP

6 7 8

8 7 6

4

3D3V_S 0

3D3V_S 5_PCH

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU (CLK/SMB/LPC/SPI)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

18 10 1Friday, June 28, 2 013

of

18 10 1Friday, June 28, 2 013

of

18 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

1 2

R1915 10M R2J-L-GPR1915 10M R2J-L-GP

X1901

41

2 3

X-32D76 8KHZ-65-GP

82.30001.A41

HSW_ULT_DDR3L

RTC

AUDIO SATA

R1903

HDA_SD IN0[27]

TP1902TP1902

TP1901TP1901

HDA_SYNC HDA_RS T# HDA_SD OUT

RTC_AU X_S5

12

R1901

R1901 1M1R2J -GP

1M1R2J -GP

HDA_BITC LK HDA_SYNC HDA_RS T# HDA_SD IN0

HDA_SD OUT TP_HDA _DOCK_EN#

1

PCH_JT AG_TRST#

1

PCH_JT AG_TCK PCH_JT AG_TDI PCH_JT AG_TDO PCH_JT AG_TMS

XDP_TC K_JTAGX

RTC_X1 RTC_X2

SM_INTRU DER#

PCH_INTV RMEN SRTC_R ST# RTC_RS T#

CPU1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER#

AV7

INTVRMEN

AV6

SRTCRST#

AU7

RTCRST#

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST#/I2S_MCLK#

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN#/I2S1_TXD#

AV10

HDA_DOCK_RST#/I2S1_SFRM#

AY8

I2S1_SCLK

AU62

PCH_TRST#

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD#AL11

AC4

RSVD#AC4

AE63

JTAGX

AV2

RSVD#AV2

HASW ELL-6-GP

12

C1903

SC15P50V2JN-2-GP

2nd = 82.30001.841

JTAG

D D

RTC_AU X_S5

RN1901

SRN20K J-1-GP

Q1901

RTCRST _ON[24]

R1902

10KR2J -3-GP

C C

Flash Descriptor Security Overide/ Intel ME Debug Mode

HDA_SDOUT

The internal pull-do wn is disabled af ter PLTRST# deassert s

B B

Low = Default High = Enable

R1913

1 2

DY

330KR2 J-L1-GP

*

PCH_INTV RMEN

Integrated SUS 1V VRM Enable

INTVRMEN

Low = External VRs High = Internal VRs

*

G

12

S

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

HDA_CO DEC_BITCLK[27]

HDA_CO DEC_SYNC[27] HDA_CO DEC_RST#[27 ,29] HDA_CO DEC_SDOUT[27]

ME_UNL OCK[24]

D

12

C1901

SC1U6D3V2KX-GP

R1907 3 3R2J-2-GPR 1907 33R2J-2 -GP

1 2

R1905 0 R0402-PAD-2-G PR1905 0R040 2-PAD-2-GP

1 2

R1908 0 R0402-PAD-2-G PR1908 0R040 2-PAD-2-GP

1 2

R1910 0 R0402-PAD-2-G PR1910 0R040 2-PAD-2-GP

1 2

R1909 1 KR2J-1-GPR1909 1KR2J-1 -GP

1D05S_ VCCST

DY

R1916 51R2J-2 -GP

DY

R1917 51R2J-2 -GP

DY

R1918 51R2J-2 -GP

DY

R1919 1KR2J-1 -GP

21

G1901

GAP-OPEN

12

330KR2 J-L1-GP

1

23

4

12

C1902

C1902 SC1U6D 3V2KX-GP

SC1U6D 3V2KX-GP

HDA_BITC LK

PCH_JT AG_TDI

PCH_JT AG_TDO

PCH_JT AG_TMS

XDP_TC K_JTAGX

RTC_X1

RTC_X2

X02 0502 cha nge C1903 C190 4 from 18pF to 15 pF

12

C1904

SC15P50V2JN-2-GP

5 OF 19

RSVD#L11 RSVD#K10

SATALED#

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

EC_SMI#

V1

MCP_GP IO35

U1

SATA_O DD_PRSNT#

V6 AC1

SATA_IRE F

A12 L11 K10

SATA_R COMP

C12

SATA_L ED#

U3

SATA_RN0/PERN6_L3 SATA_RP0/PERP6_L3

SATA_TN0/PETN6_L3 SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2 SATA_RP1/PERP6_L2

SATA_TN1/PETN6_L2 SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1 SATA_RP2/PERP6_L1

SATA_TN2/PETN6_L1 SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0

SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0 SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

SATA_RCOMP

SATA3_ PRX_DTX_N0 [56] SATA3_ PRX_DTX_P0 [5 6] SATA3_ PTX_DRX_N0 [56] SATA3_ PTX_DRX_P0 [5 6]

SATA3_ PRX_DTX_N1 [63] SATA3_ PRX_DTX_P1 [6 3] SATA3_ PTX_DRX_N1 [63] SATA3_ PTX_DRX_P1 [6 3]

EC_SMI# [24]

MSATA_ DET# [63]

SATA_L ED# [61]

Layout Note:

4mil trace at break -out and 3 12-15mil t race with <0.2 ohm s and length total <= 500mils.

RN1902

EC_SMI#

MCP_GP IO35

MSATA_ DET#

SATA_O DD_PRSNT#

RN1902

1 2 3 4 5

SRN10K J-6-GP

HDD1

mSATA

+V1.05S _ASATA3PLL

0R0402 -PAD-2-GP

R1904

1 2

R1906

R1906 3KR2F-G P

3KR2F-G P

3D3V_S 0

8 7 6

1 2

DY

R1920 51R2J-2 -GP

A A

5

4

PCH_JT AG_TCK

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU (RTC/SATA/HDA/JTAG)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

X02

19 10 1Friday, June 28, 2 013

of

19 10 1Friday, June 28, 2 013

of

19 10 1Friday, June 28, 2 013

1

X02

5

SSID = CPU

4

HSW_ULT_DDR3L

CPU1J

HSW_ULT_DDR3L

3

10 OF 19

2

1D05S_ VCCST

12

R2018

R2018 1KR2J-1 -GP

1KR2J-1 -GP

1

3D3V_S 5

RN2006

D D

1 2 3

SRN10K J-5-GP

4

MCP_GP IO12 MCP_GP IO27

FFS_INT2[67]

TP2004TP2004

RTC_DE T#[25]

GPIO[47:44]=[1,1,1,1] for SODIMM configuration

RN2005

RN2005 SRN10K J-6-GP

SRN10K J-6-GP

1 2

DY

1 2

DY

TP2002TP2002

TP2020TP2020

TP2009TP2009

TP2003TP2003

8 7 6

HDD_DE VSLP

MSATA_ DEVSLP

HSIOPC[21]

3D3V_S 5_PCH

12

R2013

R2013 10KR2J -3-GP

10KR2J -3-GP

MCP_GP IO_PH

C C

3D3V_S 5_PCH

3D3V_S 0

B B

A00 0618

R20010R0402-P AD-2-GP R20010R0402-P AD-2-GP

1 2

R20020R0402-P AD-2-GP R20020R0402-P AD-2-GP

1 2

R20040R0402-P AD-2-GP R20040R0402-P AD-2-GP

1 2

R20070R0402-P AD-2-GP R20070R0402-P AD-2-GP

1 2

R20150R0402-P AD-2-GP R20150R0402-P AD-2-GP

1 2

R20160R0402-P AD-2-GP R20160R0402-P AD-2-GP

1 2

R20170R0402-P AD-2-GP R20170R0402-P AD-2-GP

1 2

R20190R0402-P AD-2-GP R20190R0402-P AD-2-GP

1 2

R20200R0402-P AD-2-GP R20200R0402-P AD-2-GP

1 2

R20210R0402-P AD-2-GP R20210R0402-P AD-2-GP

1 2

R20220R0402-P AD-2-GP R20220R0402-P AD-2-GP

1 2

R20230R0402-P AD-2-GP R20230R0402-P AD-2-GP

1 2

RN2012

RN2012 SRN10K J-6-GP

SRN10K J-6-GP

1 2 3 4 5

R2024

1 2

100KR2 J-1-GP

8 7 6

MCP_GP IO58

DRAM_S EL0 DRAM_S EL2

MCP_GP IO26 MCP_GP IO56

DRAM_S EL1

MCP_GP IO14 MCP_GP IO28 MCP_GP IO8 MCP_GP IO13

DRAM_S EL3

MCP_GP IO57

EC_SCI#

EC_SW I# RTC_DE T#

WLA N_PLT_RST#

HSIOPC

3D3V_S 0

10KR2J -3-GP

EC_SW I#[24] EC_SCI#[24]

HDD_DE VSLP[56]

MSATA_ DEVSLP[63 ]

HDA_SP KR[27]

1 2 3 4 5

R2009

R2010

BIOS strap pin:

BIOS UMA/DIS Strap pin

BOARD_ID2BOARD_ID1

PX(AMD)

DIS

UMA

Optimus(NV)

A A

0 0

0

1

5

1

BOARD_ ID2

0

1

FFS_INT2 MCP_GP IO8 MCP_GP IO12 MCP_GP IO15 MCP_GP IO16

1

SATA_O DD_DA# RTC_DE T# MCP_GP IO27 MCP_GP IO28 MCP_GP IO26

MCP_GP IO56 MCP_GP IO57 MCP_GP IO58 WLA N_PLT_RST#

DRAM_S EL0 DRAM_S EL3

BOARD_ ID1 BOARD_ ID2 MCP_GP IO50

1

MCP_GP IO13 MCP_GP IO14 CAMERA _PWR_EN

1

DRAM_S EL1 DRAM_S EL2

EC_SW I# EC_SCI#

MCP_GP IO70

1

MCP_GP IO39

1

FFS_INT2 BOARD_ ID1 I2C0_SCL SATA_O DD_DA#

BLUETO OTH_EN

3D3V_S 0

12

R2005

OPS

10KR2J -3-GP

12

R2008

R2008 10KR2J -3-GP

10KR2J -3-GP

UMA

4

P1

BMBUSY#/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

HASW ELL-6-GP

PCH strap pin:

HDA_SPKR

The internal pull-do wn is disabled af ter PLTRST# deassert s

SDIO_D0 / GPIO66

The internal pull-do wn is disabled af ter PLTRST# deassert s

The internal pull-do wn is disabled af ter RSMRST# deasserts.

Boot BIOS Destination

The internal pull-do wn is disabled af ter PLTRST# deassert s

GPIO

NO REBOOT

Low = Disable (Def ault)

*

High = Enable

Top-Block Swap Override mode

High = Enable "To p-Block swap" mode (Default) Low = Disable "Top -Block swap" mode

*

TLS Confidentiality

Low = Disable Intel ME Cryp to TLS

GPIO15

*

High = Enable Inte l ME Crypto TLS

Boot BIOS Strap Bit BBS

Low = SPI

*

High = LPC

THRMTRIP#

RCIN#/GPIO82

CPU/

CPU/ MISC

MISC

SERIAL IO

3

SERIRQ

PCH_OPI_RCOMP

RSVD#AF20 RSVD#AB21

GSPI0_CS#/GPIO83

GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86

GSPI1_CS#/GPIO87

GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90

UART0_RXD/GPIO91

UART0_TXD/GPIO92 UART0_RTS#/GPIO93 UART0_CTS#/GPIO94

UART1_RXD/GPIO0

UART1_TXD/GPIO1 UART1_RST#/GPIO2 UART1_CTS#/GPIO3

I2C0_SDA/GPIO4 I2C0_SCL/GPIO5 I2C1_SDA/GPIO6 I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

PCH_TH ERMTRIP

D60

H_RCIN#

V4

INT_SERIRQ

T4

PCH_OP IRCOMP

AW15 AF20 AB21

MCP_GP IO83

R6

MCP_GP IO84

L6

SATA_O DD_PWRG T

N6

LPSS_G SPI0_MOSI_BBS0 _R

L8

MCP_GP IO87

R7

MCP_GP IO88

L5

TOUCH_ PWR_EN

N7 K2 J1 K3

MCP_GP IO93

J2

MCP_GP IO94

G1

MCP_GP IO0

K4

MCP_GP IO1

G2

MCP_GP IO2

J3 J4

I2C0_SDA

F2

I2C0_SCL

F3

I2C1_SDA

G4

I2C1_SCL

F1

COLOR_ ENGINE

E3

MCP_GP IO65

F4

LPSS_S DIO_D0_CMNHD R

D3

MCP_GP IO67

E4

MCP_GP IO68

C3

MCP_GP IO69

E2

3D3V_S 0

1KR2J-1 -GP

1KR2J-1 -GP R2006

R2006

1 2

3D3V_S 0

12

R2011

DY

1KR2J-1 -GP

LPSS_S DIO_D0_CMNHD R

3D3V_S 5_PCH

12

R2014

DY

1KR2J-1 -GP

3D3V_S 0

12

R2012

DY

1KR2J-1 -GP

LPSS_G SPI0_MOSI_BBS0 _R

DY

HDA_SP KR

MCP_GP IO15

1 2

R2003

R2003 49D9R2 F-GP

49D9R2 F-GP

1

TP2010TP2010

1

TP2011TP2011

1

TP2021TP2021

1

TP2012TP2012

1

TP2013TP2013

1

TP2014TP2014

KB_DET # [62] KB_LED _BL_DET [62] DBC_EN [52 ]

1

TP2015TP2015

1

TP2016TP2016

1

TP2017TP2017

1

TP2018TP2018

1

TP2019TP2019

COLOR_ ENGINE [52]

1

TP2005TP2005

1

TP2006TP2006

1

TP2007TP2007

1

TP2008TP2008

2

H_RCIN# [24 ]

INT_SERIRQ [24 ]

Layout Note:

1.Referenced "continuous " VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3. Trace width: 12~15mil

4. Isolation Spacing: 12 mil

5. Max length: 500mil

BLUETO OTH_EN [58]

RN2014

SRN10K J-6-GP

INT_SERIRQ KB_DET #

H_RCIN# DBC_EN

I2C0_SDA

I2C1_SCL I2C1_SDA

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

CPU (GPIO)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

CPU (GPIO)

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

SRN10K J-6-GP

1 2 3 4 5

RN2007

SRN10K J-6-GP

8 7 6

20 10 1Friday, June 28, 2 013

1

3D3V_S 0

8 7 6

3D3V_S 0

1 2 3 45

of

X02

5

4

3

2

1

SSID = CPU

3D3V_S5_PCH

12

C2109

C2109 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

RTC_AUX_S5

C2110

SCD1U10V2KX-5GP

1D05V_S0

R2110

R2110 5D1R2F-GP

5D1R2F-GP

1 2

1

A00 0618

0R0402-PAD-2-GP

R2102

1 2

TP2106TP2106

3D3V_S0

TP2109TP2109

1

TP2105TP2105

1

C2135

12

SC1U6D3V2KX-GP

3D3V_S5

12

C2147

C2147 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

C2114

C2114 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

C2128

SC1U6D3V2KX-GP

C2128

SC1U6D3V2KX-GP

1 2

1D05V_S0

X02 remove C2103

+V3.3S_1.8S_LPSS_SDIO

0R0402-PAD-2-GP

12

C2104

SC1U6D3V2KX-GP

R2103

1 2

3D3V_S0

D D

+V1.05DX_MODPHY_PCH

1D05V_S0

R2104

1 2

0R0402-PAD-2-GP

A00 0618

1 2

R2105

0R0402-PAD-2-GP

3D3V_S5

C C

R2101

1 2

0R0402-PAD-2-GP

12

+V3.3A_DSW_P

C2136

SCD1U10V2KX-5GPDYC2136

SCD1U10V2KX-5GP

3D3V_S0

12

DY

+V3.3A_1.5A_HDA3D3V_S5_PCH

12

R2106

1 2

0R0402-PAD-2-GP

C2105

SC1U6D3V2KX-GPDYC2105

SC1U6D3V2KX-GP

TP2102TP2102

TP2107TP2107

C2116

SC1U6D3V2KX-GP

C2116

SC1U6D3V2KX-GP

TP2108TP2108

DY

1D05V_S0

R2117

1 2

0R0402-PAD-2-GP

+V1.05S_SSCF100

C2137

SC1U6D3V2KX-GP

C2137

SC1U6D3V2KX-GP

12

TP2103TP2103 TP2104TP2104 TP2101TP2101

+V1.05DX_MODPHY_PCH

+V1.05S_AIDLE

+V1.05S_AUSB3PLL

+V1.05S_ASATA3PLL

TP_VCCAPLLOPI_VAL

1

+V1.05S_APLLOPI

+V1.05A_VCCUSB3SUS

1

+V3.3A_1.5A_HDA

+V1.05A_USB2SUS

1

+V3.3A_PSUS

+V3.3A_DSW_P

12

C2123

C2123 SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

+V1.05S_AXCK_DCB

+V1.05S_AXCK_LCPLL

+V1.05S_SSCF100

+V1.05S_SSCFF

TP_V1.05S_SSCF100

1

TP_V1.05S_AXCK_DCB

1

TP_V1.05S_SSCFF

1

+V3.3A_PSUS

+V3.3S_PCORE

AA21

AH14

AH13

AH10

AE20 AE21

W21

M20

L10

B18 B11

Y20

J13

AC9 AA9

W9

J18 K19 A20

J17 R21

T21

K18

V21

CPU1M

K9

M9 N8

P9

V8

VCCHSIO VCCHSIO VCCHSIO VCC1_05 VCC1_05 VCCUSB3PLL VCCSATA3PLL

RSVD#Y20 VCCAPLL VCCAPLL

DCPSUS3

VCCHDA

DCPSUS2

VCCSUS3_3 VCCSUS3_3 VCCDSW3_3 VCC3_3 VCC3_3

VCCCLK VCCCLK VCCACLKPLL VCCCLK VCCCLK VCCCLK RSVD#K18 RSVD#M20 RSVD#V21 VCCSUS3_3 VCCSUS3_3

HSIO

USB3

HDA

VRM

GPIO/LPC

LPT LP POWER

HSW_ULT_DDR3L

OPI

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

13 OF 19

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP#AG19 DCPSUSBYP#AG20

VCCASW VCCASW VCCASW

DCPSUS1#AD10

DCPSUS1#AD8

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO VCCSDIO

DCPSUS4

RSVD#AC20

VCC1_05

+3.3A_DSW_PRTCSUS

AH11 AG10

+VCCRTCEXT

AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22

+PCH_VCCDSW PCH_VCCDSW_R

AG19 AG20 AE9

+1.05M_ASW

AF9 AG8

+V1.05A_SUS_PCH

AD10 AD8

J15

1D5V_S0

K14 K16

U8

+V3.3S_1.8S_LPSS_SDIO

T9

+V1.05A_AOSCSUS

AB8

TP_V1.05S_APLLOPI

AC20 AG16 AG17

HASWELL-6-GP

1D05V_S0

B B

A A

R2118

1 2

0R0402-PAD-2-GP

5

+V1.05S_SSCFF

C2138

SC1U6D3V2KX-GP

C2138

SC1U6D3V2KX-GP

12

HSIOPC[20]

4

1D05V_S0 1D05V_HSIO

1 2

5V_S5

1D05V_S0

HSIO

Non-HSIO

R2123

HSIO

0R2J-2-GP

12

C2102

SC4D7U6D3V3KX-GP

3

R2122

R2122 0R5J-5-GP

0R5J-5-GP

1 2

HSIOPC_R

U2101

1

VDD

2

D#2

3

D#3 D#44S#5

SLG59M1470VTR-GP

74.59147.093

9

HSIO

1D05V_HSIO

0R5J-5-GP

0R5J-5-GP R2114

ON

8

GND

S#7 S#6

HSIO_OUT

7 6 5

R2114

1 2

HSIO

C2101

SC10U6D3V3MX-GP

C2101

SC10U6D3V3MX-GP

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (POWER2)

Hadley 15"

21 101Friday, June 28, 2013

1

X02

of

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

CPU1Q

DC_TES T_AY2_AW2

TP2201TP2201

TP2204TP2204

C C

TP_DC_ TEST_AY60

1

DC_TES T_AY61_AW 61 DC_TES T_AY62_AW 62

1

DC_TES T_A3_B3 DC_TES T_A61_B61 DC_TES T_B62_B63

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

HASW ELL-6-GP

CPU1R

AT2

RSVD#AT2

AU44

RSVD#AU44

AV44

RSVD#AV44

D15

RSVD#D15

F22

RSVD#F22

H22

RSVD#H22

J21

RSVD#J21

HSW_ULT_DDR3L

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

17 OF 19

18 OF 19

RSVD#N23 RSVD#R23

RSVD#T23

RSVD#U10

RSVD#AL1

RSVD#AM11

RSVD#AP7 RSVD#AU10 RSVD#AU15

RSVD#AW14

RSVD#AY14

DC_TES T_A3_B3

A3

TP_DC_ TEST_A4DC_TES T_AY3_AW3

A4

TP_DC_ TEST_A60

A60

DC_TES T_A61_B61

A61

TP_DC_ TEST_A62TP_DC_ TEST_B2

A62

TP_DC_ TEST_AV1

AV1

TP_DC_ TEST_AW 1

AW1

DC_TES T_AY2_AW2

AW2

DC_TES T_AY3_AW3

AW3

DC_TES T_AY61_AW 61DC_TES T_C1_C2

AW61

DC_TES T_AY62_AW 62

AW62

TP_DC_ TEST_AW 63

AW63

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

TP2202TP2202

1

TP2203TP2203

1

TP2205TP2205

1

TP2206TP2206

1

TP2207TP2207

1

TP2208TP2208

1

HASW ELL-6-GP

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

RSVD

Hadley 15"

22 10 1Friday, June 28, 2 013

of

22 10 1Friday, June 28, 2 013

of

22 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU

HSW_ULT_DDR3L

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HSW_ULT_DDR3L

CPU1N

AA1 AA58 AB10 AB20 AB22

AB7 AC61 AD21

AD3 AD63 AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1 AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

HASW ELL-6-GP

D D

C C

B B

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR5 AR52

AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

HSW_ULT_DDR3L

CPU1O

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HASW ELL-6-GP

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

CPU (VSS)

Hadley 15"

23 10 1Friday, June 28, 2 013

of

23 10 1Friday, June 28, 2 013

of

23 10 1Friday, June 28, 2 013

1

X02

5

SSID = KBC

1D05V_S0

D D

Layout Note:

Need very close to EC

C2412

SCD1U10V2 KX-5GP

C C

LCD_TST_ EN[52]

LCD_TST[52]

R2401

1 2

0R0402-PAD -2-GP

3D3V_S0

C2413

12

DY

R2417 0R0402-PAD-2 -GPR2417 0R0402-PAD-2-GP

Don't PD

ALL_SYS_PWRGD assert, delay 10ms;

B B

PCH_PWROK assert.

ALL_SYS_PWRGD assert, delay 100ms; SYS_PWROK assert.

LVDS backlight Control from PS8625

R2444

L_BKLT_EN[15]

0R2J-2-GP

eDP backlight Control from PCH

LVDS_R2136_B KLT_EN[53]

Backlight Control from LVDS Convert er

0R2J-2-GP

R2446

R2446 0R2J-2-GP

0R2J-2-GP

SC2D2U6D3V2MX-GPDYC2413

SC2D2U6D3V2MX-GP

1 2

EC_AGND

1 2

eDP

LVDS

EC_VTT

12

C2401

SCD1U10V2KX-5GP

EC_FB_CLA MP_TGL_REQ#[76]

VBAT

12

C2404

SCD1U10V2KX-5GP

EC_AGND

AD_IA[44]

C2414 SCD1U10V2KX -5GP

1 2

DY

PSID_EC[42]

PM_SLP_SUS#[17,38] BOOST_MON[44]

USBCHAR GER_CB0[35 ]

FAN1_DAC _1[26]

AD_IA_HW[44]

IMVP_PWRG D[7,46]

BAT_SCL[43,44,53] BAT_SDA[43,44,53]

SML1_CLK[18,26,76]

SML1_DATA[18,26,76]

PM_LAN_ENA BLE[30]

RTCRST _ON[19]

USBCHG_ EN[35]

TPCLK[62]

TPDATA[62]

ALL_SYS_PWR GD[36]

PWR_C HG_AD_OFF[42]

AD_IA_HW 2[44]

BLON_OUT[52]

FAN_TAC H1[26]

PM_PWR BTN#[17,96]

EC_FB_CLA MP[75,76,83]

PM_SLP_S3#[17,36,48,4 9,51]

PWRLED #[61]

KBC_BEEP[27]

EC_BRIGHT NESS[52]

AC_IN_KBC#[42]

KB_BL_CTR L[62]

LAN_WA KE#[30]

KBC_DPW ROK[17]

CHG_AMBER _LED#[61]

PCH_PW ROK[17 ,26,36]

USB_PW R_EN#[35]

AC_PRESEN T[17,76]

SYS_PWRO K[17,96] AOAC_W LAN_EN[58]

WIFI_RF_EN[58]

PM_SUSW ARN#[17]

DGPU_PW ROK[15,82,83]

DIS_DTM[44] E51_TxD[58]

PM_CLKRU N#_EC[17]

AMP_MUTE#[27]

12

R2445

100KR2J-1-G P

C2405

SC2D2U6D3V2MX-GPDYC2405

SC2D2U6D3V2MX-GP

12

DY

PCB_VER_A D

AMB_TEMP

MODEL_ID_DET

PROCHO T_EC LCD_TST_ EN

ECSWI#_KB C

L_BKLT_EN_EC

3D3V_AUX_KB C_VCC

115

102

EC_VTT

100 108

101 105 106 107

119 120

123

117

118

104

110 112

124 121 111

12

C2406

SCD1U10V2KX-5GP

KBC24

19

VCC

46

VCC

76

VCC

88

VCC VCC

AVCC

4

VDD

12

VTT

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2 GPIO93/AD3 GPIO5/AD4

96

GPIO4/AD5

95

GPIO3/EXT_PURST#/AD6

94

GPIO7/AD7/VD_IN2

GPIO94/DA0 GPIO95/DA1 GPIO96/DA2 GPIO97/DA3

70

GPIO17/SCL1/N2TCK

69

GPIO22/SDA1/N2TMS

67

GPIO73/SCL2/N2TCK

68

GPIO74/SDA2/N2TMS GPIO23/SCL3/N2TCK GPIO31/SDA3/N2TMS

24

GPIO47/SCL4/N2TCK

28

GPIO53/SDA4/N2TMS

26

GPIO51/TA3/N2TCK GPIO67/N2TMS

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27/PSDAT2

25

GPIO50/PSCLK3/TDO

27

GPIO52/PSDAT3/RDY#

31

GPIO56/TA1 GPIO20/TA2/IOX_DIN_DIO

63

GPIO14/TB1

64

GPIO1/TB2

32

GPIO15/A_PWM GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

22

GPIO45/E_PWM

16

GPIO40/F_PWM/1_WIRE

81

GPIO66/G_PWM

66

GPO33/H_PWM/VD1_EN#

GPIO80/VD_IN1

GPIO82/IOX_LDSH/VD_OUT1 GPIO84/IOX_SCLK/VD_OUT2

84

GPIO77/SPI_MISO

83

GPIO76/SPI_MOSI

82

GPIO75/SPI_SCK

79

GPIO2/SPI_CS#

GPIO10/LPCPD# GPIO85/GA20 GPIO83/SOUT_CR

9

GPIO65/SMI#

8

GPIO11/CLKRUN#

30

GPIO55/CLKOUT/IOX_DIN_DI O

NPCE985PA0D X-1-GP

71.00985.C0G

AOAC Ambient temperature detect

VBAT

12

R2437

R2437 10KR2F-2-G P

R2441

EC_AGND

C2419

1 2

10KR2F-2-G P

1 2

SCD1U10V2KX-5GP

C2420

AMB_TEMP

12

SC100P50V2JN-3GP

5

A A

NTC-10K- 26-GP

69.60037.011

EC_GPIO47 High Active

PROCHO T_EC

12

R2442

100KR2J-1-G P

DY

R2438

R2438 0R2J-2-GP

0R2J-2-GP

1 2

DY

Q2401

G

S

2N7002K-2-G P

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

4

R2402

12

0R0603-PAD -2-GP-U

12

C2407

C2408

DY

SCD1U10V2KX-5GP

KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS

KBSOUT0/GPOB0/SOUT_CR/JEN K#

KBSOUT1/GPIOB1/TCK KBSOUT2/GPIOB2/TMS

KBSOUT3/GPIOB3/TDI

KBSOUT4/GPOB4/JEN0#

KBSOUT5/GPIOB5/TDO

KBSOUT6/GPIOB6/RDY#

KBSOUT9/GPOC1/SDP_VIS#

KBSOUT10/P80_CLK/GPIOC2

KBSOUT11/P80_DAT/GPIOC3

KBSOUT12/GPO64/TEST#

KBSOUT13/GPI/O63/TRIST#

KBSOUT14/GPI/O62/XORTR#

KBSOUT15/GPIO61/XOR_OUT

GPIO81/F_WP#/F_SDIO2 GPIO0/EXTCLK/F_SDIO3

PSL_IN2#/GPI6/EXT_PURST#

GPIO46/CIRRXM/TRST#

GPIO87/CIRRXM/SIN_CR

H_PROCH OT#_EC

D

4

2D2R3-1-U -GP

12

C2409

C2410

DY

SCD1U10V2KX-5GP

KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7

KBSOUT7/GPIOB7 KBSOUT8/GPIOC0

GPIO60/KBSOUT16 GPIO57/KBSOUT17

LAD0/GPIOF1 LAD1/GPIOF2 LAD2/GPIOF3 LAD3/GPIOF4

LCLK/GPIOF5 LFRAME#/GPIOF6 LRESET#/GPIOF7

F_CS0#

F_SCK GPIO30/F_WP# GPIO41/F_WP#

F_SDIO/F_SDIO0

F_SDI/F_SDIO1

PSL_IN1#/GPI70

PSL_OUT#/GPIO71

ECSCI#/GPIO54

EXT_RST#

KBRST#/GPIO86

VSBY VBKUP VCORF

SERIRQ/GPIOF0

GPIO24

GPIO36/TB3

GPIO44/TDI GPIO43/TMS GPIO42/TCK

GPIO34/CIRRXL

AGND

R2440

1 2

0R0402-PAD -2-GP

3D3V_AUX_KB C

R2403

12

PECI

GND GND GND GND GND GND

54 55 56 57 58 59 60 61

53 52 51 50 49 48 47 43 42 41 40 39 38 37 36 35 34 33

126 127 128 1 2 3 7

90 92 109 80 87 86 91 77

73 93 74

29 85 122

75 114 44 13 125 6 15

21 20 17 23

113 14

5 18 45 78 89 116

103

1 2

12

C2411

SC2D2U6D3V2MX-GP

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 USB_DET#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

PLT_RST#_E C

EC_SPI_CS#_C EC_SPI_CLK_C

EC_SPI_DI_C EC_SPI_DO_C

PSL_IN1# PSL_IN2# PSL_OUT#

ECSCI#_KBC ECRST#

EC_VBKUP KBC_VCOR F PECI

ECSMI#_KBC

EC_AGND

12

C2421

C2421 SC47P50V2JN -3GP

SC47P50V2JN -3GP

VBAT

A00 0618

12

R2404

R2404 64K9R2F-1- GP

64K9R2F-1- GP

PCB_VER_A D

SCD1U10V2 KX-5GP

ME_UNLOC K [19]

WIFI_WAK E# [58]

S5_ENABLE [36]

12

EC_AGND

12

R2406

R2406 100KR2F-L1- GP

C2402

X01 0321

R2435

R2435 0R0402-PAD -2-GP

0R0402-PAD -2-GP

100KR2F-L1- GP

DY

1 2

EC_AGND EC_AGND

KROW[0 ..7] [62]

KCOL[0..16] [62]

LPC_AD[3..0] [18,65]

CLK_PCI_KBC [18] LPC_FRAME # [1 8,65]

R2419 0R 0402-PAD-2-GPR2419 0R0402-P AD-2-GP

1 2

R2412 33R 2J-2-GPR2412 33R 2J-2-GP

12

R2420 0R 0402-PAD-2-GPR2420 0R0402-P AD-2-GP

1 2

R2422 0R 0402-PAD-2-GPR2422 0R0402-P AD-2-GP

1 2

Layout Note:

Need very close to EC

H_RCIN# [20]

R2428 0R 0402-PAD-2-GPR2428 0R0402-P AD-2-GP

1 2

INT_SERIRQ [20]

OVER_CU RRENT_P8# [ 76]

PM_SLP_S4# [17,49] RSMRST#_K BC [17]

LID_CLOSE# [61]

D2402

21

CH751H-40 PT-GP

83.R0304.A8F

Layout Note:

Connect GND and AGND planes via eit her 0R resistor or connect directly.

3

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

X01

X02

X03

A00

Reserved

Reserved 100.0K 21 5.0K 1.048V

SPI_CS0#_R [18,25] SPI_CLK_R [18,25] CAP_LED# [62] BAT_IN# [42,43,44] SPI_SI_R [18,25] SPI_SO_R [18,25]

PM_SUSACK # [17]

PCH_SUSC LK_KBC [17]

3D3V_AUX_S5 RTC_AUX _S5

12

DY

PURE_HW _SHUTD OWN#[26,36,76]H_PR OCHOT# [4,42, 44,46]

C2416 SC 1U6D3V2KX-G PC2416 SC1U 6D3V2KX-GP

1 2

R2429

C2422

43R2J-GP

SC100P50V2JN -3GP

TOUCH_ PANEL_INTR# [52]

3

100.0KX00

100.0K

100.0K 1.358V

A00 0618

0R0402-PAD -2-GP

R2416

1 2

12

SC220P50V2KX- 3GP

SC220P50V2KX- 3GP C2415

C2415

DY

H_PECI [4]

Layout Note:

Need very close to EC C2422 PDG is 47p

R2439

10KR2J-3-G P

3D3V_AUX_S5

R2434

12

1 2

DY

0R2J-2-GP

Q2404

MMBT3906-4-G P

84.T3906.A11

2nd = 84.03906.F11

B

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

143.0K

174.0KReserved 100.0K

PLT_RST# [17 ,30,58,65,73]

KBC_PW RBTN#[61]

AC_IN#[44]

USBDET_C ON#[34]

ECRST#

C2418

12

E

DY

C

SC1U6D3V2KX-GP

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65VReserved

1.204V

0R0402-PAD -2-GP

R2427

1 2

0R0402-PAD -2-GP

R2430

1 2

D2401

3

BAT54CPT- 2-GP

75.00054.K7D

PSL_OUT#

2

MODEL_ID_DE T

3D3V_AUX_S5

1

2

1KR2J-1-G P

1KR2J-1-G P R2432

R2432

1 2

2

C2403

SCD1U10V2 KX-5GP

R2425

R2425 330KR2J-L1- GP

330KR2J-L1- GP

1 2

PSL_IN2#

PSL_IN1#

USB_DET#

KBC_ON#_G ATE_L

VBAT

MODEL_ID_DET(GPIO07)

(DOH70)UMA

R2405

49K9R2F-L-GP

R2405

49K9R2F-L-GP

12

DY

1 2

3D3V_AUX_S5 3D3V_AUX_S5

R2407

100KR2F-L1-GP

R2431

R2431 330KR2J-L1- GP

330KR2J-L1- GP

1 2

(DOH50)UMA/eDP

TBD

(DOH70)DIS

TBD TBD TBD TBD

(DOH50)UMA/LVDS (DOH50)DIS/eDP

TBD TBD TBD TBD TBD TBD TBD TBD

(DOH50)DIS/LVDS

TBD

R2433

R2433 20KR2J-L2-G P

20KR2J-L2-G P

ECSCI#_KBC

ECSMI#_KBC

ECSWI#_KB C

KBC_ON#_G ATEKBC_ON#_G ATE_L

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

100.0K 3.0V

100.0K

AC_IN_KBC#

USB_DET#

BAT_SCL BAT_SDA

ECRST#

AC_IN# BAT_IN# OVER_CU RRENT_P8#

FAN_TAC H1

LID_CLOSE#

C2417

C2417 SCD1U10V2 KX-5GP

SCD1U10V2 KX-5GP

1 2

G

D

Q2402

Q2402 DMP2130L-7-G P

DMP2130L-7-G P

84.02130.031

2ND = 84.03413.A31

D

Q2403

G

S

2N7002K-2-G P

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

Title

Size Document N umber Rev

Size Document N umber Rev A2

A2

Friday, June 28 , 2013

Friday, June 28 , 2013 Date: Sheet of

Date: Sheet of

1

10.0K(64.10025.6DL)

13.7K(64.13725.6DL)

17.8K(64.17825.6DL)

22.1K(64.22125.6DL)

27.0K(64.27025.6DL)

32.4K(64.32425.6DL)

37.4K(64.37425.6DL)

43.2K(64.43225.6DL)

57.6K(64.57625.6DL)

64.9K(64.64925.6DL)

73.2K(64.73225.6DL) 1.905V

82.5K(64.82525.6DL) 1.808V

93.1K(64.93125.6DL) 107K(64.10735.6DL) 120K(64.12035.6DL) 137K(64.13735.6DL) 154K(64.15435.6DL) 200K(64.20035.6DL) 1.099V 232K(64.23236.6DL)

X01 0321

R24080R0402-P AD-2-GP R24080R04 02-PAD-2-GP

1 2

R24090R0402-P AD-2-GP R24090R04 02-PAD-2-GP

1 2

R24100R0402-P AD-2-GP R24100R04 02-PAD-2-GP

1 2

3D3V_AUX_KB C

R2426 100KR2J-1-G PR2426 100KR2J-1-G P

1 2

R2411 100KR2J-1-G PR2411 100KR2J-1-G P

1 2

SRN4K7J-8 -GP

R2418 10KR2 J-3-GPR241 8 10KR2J-3-G P

R2413 100KR 2J-1-GP

1 2

R2414 100KR 2J-1-GPR241 4 100KR2J-1-G P

1 2

R2424 100KR 2J-1-GP

1 2

R2415 10KR2 J-3-GPR241 5 10KR2J-3-G P

1 2

R2421 100KR2J-1-GPR2421 100KR2J-1-GP

S

3D3V_AUX_KB C

D

KBC Nuvoton NPCE985

Hadley 15"

1

3D3V_AUX_KB C

RN2401

23 1

4

1 2

3D3V_AUX_KB C

DY

DY DY

DY

1 2

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih,

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih, Taipei Hs ien 221, Taiwan, R .O.C.

Taipei Hs ien 221, Taiwan, R .O.C.

24 101

EC_SCI# [20]

EC_SMI# [19]

EC_SWI# [20]

3D3V_S0

3D3V_S5

3D3V_AUX_KB C

12

R2436

R2436 10KR2J-3-G P

10KR2J-3-G P

S5_ENABLE

2.902V

2.801V

2.702V

2.598V

2.492V

2.402V

2.304V

2.201V49.9K(64.49925.6DL)

2.093V

2.001V

1.709V

1.594V

1.499V

1.392V

1.299V

0.994V

X02

5

4

3

2

1

SSID = Flash.ROM

3D3V_S 5

D D

R2501

4K7R2J -2-GP

SPI Flash ROM(8M) for PCH

4

RN2501

RN2501 SRN4K7 J-8-GP

SRN4K7 J-8-GP

DY

1 2

1

2 3

DY

3D3V_S 5

C2501

SC10U6D3V3MX-GPDYC2501

SC10U6D3V3MX-GP

12

C2502

C2502 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

Single SPI shared flash connection (SPI Quad I/O mode)

SPI25

SPI_CS0# _R[18,24]

SPI_SO_R[1 8,24]

SPI_W P#[18]

12

DY

EC2502

SC4D7P 50V2CN-1GP

C C

EC2502

1

CS#

2

DO/IO1

3

WP#/IO2

4

GND

W25 Q64FVSSIQ-GP

72.25Q64.K01

VCC

HOLD#/IO3

CLK

DI/IO0

3D3V_S 5

8 7 6 5

12

DY

12

EC2503

DY

SC10P5 0V2JN-4GP

EC2501

SC4D7P 50V2CN-1GP

QUAD/DUAL fast read DUAL fa st readSource

72.25Q64.K01

72.25647.00A O O

SPI_HOLD # [1 8] SPI_CLK_ R [1 8,24] SPI_SI_R [18,24]

O O

Refer to "NCPE985x/ NPCE995x board design reference guide"

SSID = RBATT

3

RTC_AU X_S5+RTC_V CC 3D3V_AUX _S5

1 2

C2503

SC1U6D 3V2KX-GP

A00 0619

D2501

2

1

BAS40C W-GP

83.00040.E81

1 2 NP1 NP2

+RTC_V CC

1

1KR2J-1 -GP

R2502

12

RTC_PW R

B B

AFTP25 02AFTP2502

RTC1

PWR GND

NP1 NP2

BAT-AAA -BAT-054-P06-G P-U

62.70001.061

A A

5

4

AFTP25 01AFTP2501

1

Q2505

12

R2504

R2504 10MR2J -L-GP

10MR2J -L-GP

G

S

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

D

3

RTC_DE T# [20]

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Flash/RTC

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

25 10 1

of

25 10 1

of

25 10 1

1

X02

5

SSID = Thermal

4

3

2

1

Fan controller1

FAN261

R2605

0R2J-2-G P

3D3V_S 0 3D 3V_S0

D D

3D3V_S 0

1

C2601

SC10U6D3V3MX-GP

C2601

SC10U6D3V3MX-GP

12

C2602

SCD1U10V2KX-5GP

84.03904.L06

2ND = 84.03904.P11

C C

3

1

Q2603

PMBS39 04-1-GP

2

NCT771 8_DXP

12

C2606

C2606 SC470P 50V3JN-2GP

SC470P 50V3JN-2GP

DY

NCT771 8_DXN

12

C2607

C2607 SC2200 P50V2KX-2GP

SC2200 P50V2KX-2GP

2.System Sensor, Put on palm rest

A00 0618

12

R2601

R2601 0R0402 -PAD-2-GP

Layout Note:

C2812 clos e U2801

Layout Note:

Both DXN a nd DXP ro uting 10 mil trace width an d 10 mil s pacing.

3D3V_S 0

R2603 1 8K7R2F-GPR2603 1 8K7R2F-GP

B B

1 2

R2604 2 KR2F-3-GPR2604 2KR2 F-3-GP

1 2

ALERT#

T_CRIT#

0R0402 -PAD-2-GP

SML1_D ATA[18,24,76]

SML1_C LK[18,2 4,76]

THM26

1

VDD

2

D+

3

D-

T_CRIT#

ALERT#

T_CRIT#4GND

NCT771 8W-GP

74.07718.0B9

1204 change to PCH_PWROK

PCH_PW ROK[17,24,36 ]

THERM_ SYS_SHDN#

SCL

SDA

6

2

5

34

Q2601

Q2601 2N7002 KDW-GP

2N7002 KDW-GP

8 7

ALERT#

6 5

Q2602

G

S

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

1

23

RN2602

RN2602 SRN2K2 J-1-GP

SRN2K2 J-1-GP

4

84.2N702.A3F

2nd = 84.DM601.03 F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

12

DY

C2608

D

DY

THM_SM L1_CLK THM_SM L1_DATA

12

DY

C2609

SCD1U10V2KX-5GP

12

C2610

C2610 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

THM_SM L1_DATA

THM_SM L1_CLK

PURE_H W_SHUTD OWN# [24 ,36,76]

Layout Note:

Signal Routing Guideline : Trace width = 15mil

FAN1_D AC_1[24]

Layout Note:

Need 10 mi l trace w idth.

0R2J-2-G P

1 2

DY

5V_S0

FAN_VC C_1

FAN_TA CH1[2 4]

C2604

SC4D7U 6D3V3KX-GP

C2604

DY

FON#

12

FAN261

1

FSM#

2

VIN

3

VOUT VSET4GND

APL560 6AKI-TRG-GP

74.05606.A71

2nd = 74.02113.0E1

0R0402 -PAD-2-GP

R2606

1 2

21

D2601

DY

CH551H -30PT-GP

83.R5003.C8F

2ND = 83.R5003.H8H

3rd = 83.5R003.08F

GND GND GND

FAN_TA CH1_C

FAN_VC C_1

12

C2603

DY

SC2200P50V2KX-2GP

8 7 6 5

FAN_TA CH1

FAN_VC C_1

ETY-CON3-8 -GP

20.F1841.003

5V_S0

12

C2605

C2611

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

FAN1

4

1

2 3

5

AFTP26 01AFTP2601

1

AFTP26 02AFTP2602

1

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Thermal NCT7718W/Fan

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

26 10 1

of

26 10 1

of

26 10 1

1

X02

5

SSID = AUDIO

4

3

2

1

AGND

LINE1_VREFO_R[29]

LINE1_VREFO_L[29]

D D

C C

B B

3D3V_S0 +3V_AVDD

25mA

1 2

R2701

0R0402-PAD-2-GP

A00 0618

1.5A

5V_S0 +5V_PVDD

0R0805-PAD-2-GP-U

R2702

A00 0618

R2702

0R0805-PAD-2-GP-U

R2704

DGND

3D3V_S0

0R0402-PAD-2-GP

R2705

1 2

R2710 0R2J-2-GP

1 2

DY

A00 0618

1D5V_S0

Azalia I/F EMI

EC2701

SCD1U10V2KX-5GP

DY

DY DY

DY

EC2702

SC22P50V2JN-4GP

12

C2701

SC4D7U6D3V3KX-GP

Close pin36

12

C2706

C2707

12

Layout Note:

Close pin41

C2707

12

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

C2709

C2708

12

SCD1U10V2KX-5GP

SC4D7U6D3V3KX-GP

Layout Note:

Close pin46

AGND

+3V_1D5V_AVDD

12

C2715

SC4D7U6D3V3KX-GP

Close pin40

AUD_AGND

ER2701

47R2J-2-GP

PCH_AZ_CODEC_SDOUT1 HDA_CODEC_SDOUT

12

HDA_CODEC_BITCLK_C

12

47R2J-2-GP

1 2

ER2702

47R2J-2-GP

12

DY

HDA_CODEC_BITCLK

DY

AUD_AGND

AMP_MUTE#[24]

C2712 SC10U6D3V3MX-GPC2712 SC10U6D3V3MX-GP

1 2

AUD_SPK_L+[29]

AUD_SPK_L-[29]

AUD_SPK_R-[29]

AUD_SPK_R+[29]

0R0402-PAD-2-GP

R2708

1 2

remove D2702 R2710 R2711 Add R2708_0R(PDB pin)

TP2702TP2702

DMIC_CLK[52]

SC22P50V2JN-4GP

Close pin3

0109 Add Close pin2

C2723

DMIC_DATA[52]

DY

1 2

HDA_CODEC_SDOUT[19]

HDA_CODEC_BITCLK[19]

HDA_SDIN0[19]

HDA_CODEC_SYNC[19]

HDA_CODEC_RST#[19,29]

SC22P50V2JN-4GP

C2724

1 2

DY

+3V_1D5V_AVDD

+5V_PVDD

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R-

AUD_SPK_R+

+5V_PVDD

1

SC4D7U6D3V3KX-GP

AUD_HP1_JACK_L[29]

AUD_HP1_JACK_R[29]

12

C2703

C2703 SC1U6D3V2KX-GP

SC1U6D3V2KX-GP

CBP

LDO2_CAP

EAPD#

C2716

A00 0618

0R0402-PAD-2-GP

R2714

1 2

R2716

1 2

0R0402-PAD-2-GP

+3V_AVDD

HDA27

37

CBP

38

AVSS2

39

LDO2_CAP

40

AVDD2

41

PVDD1

42

SPK_L+

43

SPK_L-

44

SPK_R-

45

SPK_R+

46

PVDD2

47

PDB

48

SPDIFO/GPIO2

49

GND

ALC3223-CG-GP

+3V_AVDD

12

C2717

SCD1U10V2KX-5GP

DMIC_DATA_R

DMIC_CLK_R

0R0402-PAD-2-GP

R2718

1 2

HDA_CODEC_SYNC

HDA_CODEC_RST#

SC1U6D3V2KX-GP

SC1U6D3V2KX-GP C2704

C2704

1 2

CPVEE

CBN

36

34

33

35

32

CBN

CPVEE

CPVDD

DVDD1GPIO0/DMIC_DATA2GPIO1/DMIC_CLK3DVSS4SDATA_OUT5BIT_CLK6LDO3_CAP7SDATA_IN8DVDD_IO9SYNC10RESET#11PCBEEP

HP_OUT_L

HP_OUT_R

HDA_CODEC_SDIN0

C2705

12

AUD_VREF

31

28

30

29

MIC2_VREFO

LINE1_VREFO_L

LINE1_VREFO_R

LDO3_CAP

C2718SC4D7U6D3V3KX-GP C2718SC4D7U6D3V3KX-GP

12

SC2D2U6D3V2MX-GP

LDO1_CAP

27

VREF

LDO1_CAP

C2719SCD1U10V2KX-5GP C 2719SCD1U1 0V2KX-5GP

MIC2_VREFO [29]

C2702

C2702 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

26

25

AVSS1

AVDD1

LINE2_L

LINE2_R

LINE1_L

LINE1_R

CPVREF

MIC_CAP

MIC2_R/SLEEVE

MIC2_L/RING2

MONO_OUT

JDREF

SENSE_B

SENSE_A

12

AUD_PC_BEEP

+3V_AVDD

AUD_AGND

+5V_AVDD

AUD_AGND

24

23

22

21

20

19

18

17

16

15

14

13

C2713 SC10U6D3V3MX-GPC2713 SC10U6D3V3MX-GP

MIC_CAP

JDREF

R2707 20KR2F-L-GPR2707 20KR2F-L-GP

AUD_SENSE_A

Layout Note:

AGND

Place close to Pin 13

DGND

12

C2710

SCD1U10V2KX-5GP

LINE1_L [29]

LINE1_R [29]

1 2

SLEEVE [29]

RING2 [29]

1 2

R2709

39K2R2F-L-GP

C2711

AGND

1 2

0R0603-PAD-2-GP-U

12

Layout Note:

Place close to Pin 26

AUD_AGND

SC4D7U6D3V3KX-GP

AUD_SENSECOMBO-GPI

DGND

5V_S0+5V_AVDD

A00 0618

R2703

AUD_AGND

Layout Note:

Width>40mil, to improve Headpohone Crosstalk noise

AUD_AGND

AUD_SENSE [29]

AUD_AGND

DGND

EC2708 SCD1U10V2KX-5GP

1 2

DY

EC2707 SCD1U10V2KX-5GPEC2707 SCD1U10V2KX-5GP

1 2

EC2706 SCD1U10V2KX-5GPEC2706 SCD1U10V2KX-5GP

1 2

EC2705 SCD1U10V2KX-5GPEC2705 SCD1U10V2KX-5GP

1 2

EC2704 SCD1U10V2KX-5GP

1 2

DY

EC2703 SCD1U10V2KX-5GPEC2703 SCD1U10V2KX-5GP

1 2

Layout Note:

Tied at point only under Codec or near the Codec

AGND

R2711 0R0603-PAD-2-GP-UR2711 0R0603-PAD-2-GP-U R2706 0R0603-PAD-2-GP-UR2706 0R0603-PAD-2-GP-U

DGND

1 2 1 2

Layout Note:

Tied at point only under Codec or near the Codec

RN

HDA_SPKR[20]

KBC_BEEP[24]

A A

5

4

1 2 3

0R4P2R-PAD

RN2701

HDA_SPKR_R

4

KBC_BEEP_R

D2701

1

2

BAT54CPT-2-GP

75.00054.K7D

2nd=75.00054.J7D

3

AUD_PC_BEEP_C

3

12

R2717

R2717 1KR2J-1-GP

1KR2J-1-GP

AUD_PC_BEEP

1 2

C2720

C2720 SCD1U10V2KX-5GP

SCD1U10V2KX-5GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

2

Date: Sheet

Audio Codec ALC3223

Hadley 15"

Taipei Hsien 221, Taiwan, R.O.C.

of

27 101Friday, June 28, 2013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

1

28 10 1Friday, June 28, 2 013

of

28 10 1Friday, June 28, 2 013

of

28 10 1Friday, June 28, 2 013

X02

5

SSID = AUDIO

4

3

2

1

A00 0618

AUD_SP K_R+_C

R29040R0603-PA D-2-GP-U R29040R0603-PA D-2-GP-U

R29060R0603-PA D-2-GP-U R29060R0603-PA D-2-GP-U

12

R29070R0603-PA D-2-GP-U R29070R0603-PA D-2-GP-U

12

R29090R0603-PA D-2-GP-U R29090R0603-PA D-2-GP-U

12

R29110R0603-PA D-2-GP-U R29110R0603-PA D-2-GP-U

12

R29030R0603-PA D-2-GP-U R29030R0603-PA D-2-GP-U

12

R29020R0603-PA D-2-GP-U R29020R0603-PA D-2-GP-U

12

R29010R0603-PA D-2-GP-U R29010R0603-PA D-2-GP-U

12

AUD_PO RTA_L_R_B

AUD_PO RTA_R_R_B

AUD_SP K_R-_C AUD_SP K_L+_C AUD_SP K_L-_C

RING2_R

SLEEVE _R

D D

C C

RN2901

RN2901 SRN2K2 J-1-GP

SRN2K2 J-1-GP

1

MIC2_VRE FO[27]

RING2[27]

AUD_HP 1_JACK_L[2 7]

LINE1_L[27]

LINE1_VR EFO_L[27]

AUD_SE NSE[2 7]

AUD_HP 1_JACK_R[27]

LINE1_R[27]

LINE1_VR EFO_R[27]

SLEEVE[27 ]

C2907

C2907 SC4D7U 6D3V3KX-GP

SC4D7U 6D3V3KX-GP

C2908

C2908 SC4D7U 6D3V3KX-GP

SC4D7U 6D3V3KX-GP

1 2

LINE1_L_ C

LINE1_R_ C

4

2 3

R2908 10R2F -L-GPR2908 10R2 F-L-GP

1 2

R2921 1KR2J -1-GPR2921 1KR2 J-1-GP

1 2

R2912 2K2R2 J-2-GPR2912 2K2R 2J-2-GP

1 2

R2910 10R2F -L-GPR2910 10R2 F-L-GP

1 2

R2922 1KR2J -1-GPR2922 1KR2 J-1-GP

1 2

R2913 2K2R2 J-2-GPR2913 2K2R 2J-2-GP

1 2

AUD_SP K_R+[27 ]

AUD_SP K_R-[27] AUD_SP K_L+[27] AUD_SP K_L-[27]

AUD_HP 1_JACK_L1

AUD_HP 1_JACK_R1

12

DY

EC2901

SC2K2P50V3KX-GP

DY

EC2902

EC2903

SC2K2P50V3KX-GP

12

DY

EC2904

SC2K2P50V3KX-GP

A00 0618

EC2907

SC100P50V2JN-3GP

EC2907

SC100P50V2JN-3GP

EC2908

SC100P50V2JN-3GP

EC2908

SC100P50V2JN-3GP

R2919

10KR2J-3-GP

R2919

10KR2J-3-GP

12

EC2906

SC100P50V2JN-3GP

EC2906

SC100P50V2JN-3GP

EC2905

SC100P50V2JN-3GPDYEC2905

SC100P50V2JN-3GP

R2920

10KR2J-3-GP

R2920

10KR2J-3-GP

12

DY

B B

AUD_AG NDAUD_AGND

AUD_AG ND

Speaker

1

2 3 4

ACES-CO N4-7-GP-U

20.F0772.004

AUD_SP K_L-_C AUD_SP K_L+_C AUD_SP K_R-_C AUD_SP K_R+_C

Universal jack

AUD_AG ND

AUD_PO RTA_L_R_B AUD_PO RTA_R_R_B

AUD_SE NSE

SPK1

5

6

HPMIC1

3 1

5 6 2 4

MS

AUDIO-JK4 04-GP

22.10270.V01

1 1 1 1

AFTP29 06AFTP2906 AFTP29 07AFTP2907 AFTP29 08AFTP2908 AFTP29 09AFTP2909

AFTP29 01AFTP2901 AFTP29 02AFTP2902 AFTP29 03AFTP2903 AFTP29 04AFTP2904

CONN Pin

Pin1

Pin2

Pin3

Pin4

Net name

SPK_R+

SPK_R-

SPK_L+

SPK_L_

R2918

100KR2 J-1-GP

D

34

GG

POP_G2POP_G1

2

S

1

+3V_AV DD

12

DY

12

DY

0R0402 -PAD-2-GP

R2917

1 2

C2901

C2901 SC1U6D 3V2KX-GP

SC1U6D 3V2KX-GP

HDA_CO DEC_RST# [19,2 7]

SLEEVE [27]

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Speaker/HPMIC CONN

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Speaker/HPMIC CONN

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

29 10 1Friday, June 28, 2 013

of

29 10 1Friday, June 28, 2 013

of

29 10 1Friday, June 28, 2 013

1

X02

AUD_PO RTA_R_R_B

AUD_PO RTA_L_R_B

RING2_R

AUD_SE NSE

SLEEVE _R

ED2904

AZ2025-01H-R7G-GP

ED2904

DY

12

AZ2025-01H-R7G-GP

75.02025.077

DY

ED2905

AZ2025-01H-R7G-GP

ED2905

AZ2025-01H-R7G-GP

12

4

ED2903

AZ2025-01H-R7G-GP

ED2903

DY

12

AZ2025-01H-R7G-GP

75.02025.077

ED2902

AZ2025-01H-R7G-GP

ED2902

DY

12

AZ2025-01H-R7G-GP

75.02025.077

ED2901

AZ2025-01H-R7G-GP

ED2901

AZ2025-01H-R7G-GP

12

A A

DY

75.02025.077

5

5V_PW R_2

12

AUD_AG ND

R2915

R2915 220KR2 J-L2-GP

220KR2 J-L2-GP

U2901

S

5

D

6

2N7002 KDW-GP

3

5

SSID = LOM

3D3V_S 5

12

C3013

SCD1U10V2KX-5GP

C3013

SCD1U10V2KX-5GP

Q3001

G

S

2N7002 K-2-GP

1 2

12

D D

PM_LAN _ENABLE[2 4]

100KR2 J-1-GP

3D3V_L AN_S5 VDDREG

C C

12

C3007

SCD1U10V2KX-5GP

12

R3023

DY

R3006 0 R0603-PAD-2-G P-UR3006 0 R0603-PAD-2-G P-U

12

C3012

C3008

SCD1U10V2KX-5GP

A00 0618

R3034 0 R0603-PAD-2-G P-UR3034 0 R0603-PAD-2-G P-U

1 2

B B

12

DY

C3018

SCD1U10V2KX-5GP

L3010

1 2

IND-4D7UH -242-GP

LAN_SW

68.4R71E.10G

LAN_SW

X5R

A A

5

D

LAN_SW

C3024

12

SC4D7U6D3V3KX-GP

R3021

R3021 10KR2J -3-GP

10KR2J -3-GP

LAN_ENABLE_R_C

12

C3009

SCD1U10V2KX-5GP

C3014

12

LAN_SW

SCD1U10V2KX-5GP

R3022

R3022 20KR2F -L-GP

20KR2F -L-GP

1 2

LAN_SW

12

C3010

SC4D7U6D3V3KX-GP

0R0603 -PAD-2-GP-U

PM_LAN _ENABLE_R

main: 84.00102.031 2nd: 84.03403.031

X5R

A00 0618

R3007

1 2

12

C3003

C3003 SC1U6D 3V2KX-GP

SC1U6D 3V2KX-GP

0311 modify power railA00 0618

12

4

PA102F MG-GP-U

PA102F MG-GP-U Q3004

Q3004

G

3D3V_L AN_S5

12

C3019

C3020

SCD1U10V2KX-5GP

4

DS

R3039

R3039 10KR2J -3-GP

10KR2J -3-GP

LAN_W AKE#

12

C3021

SCD1U10V2KX-5GP

EVDD10

12

C3016

SCD1U10V2KX-5GP

3D3V_L AN_S5

12

DY

C3005

SCD1U10V2KX-5GP

Pin12 Pull VCC33 (3D3V_S 0) Supported RTD3

12

C3022

SCD1U10V2KX-5GP

12

C3023

SC1U6D3V2KX-GP

ENSW REG

CLK_PC IE_LAN_REQ4#[18]

LANXOU T

LANXIN

LAN_W AKE#[24]

3

41

2 3

C3001

1 2

SC15P5 0V2JN-2-GP

3D3V_L AN_S5

12

LAN_SW

12

0110 add CAP need close to chip

3D3V_S 0

12

LAN_TX P_C_PCH_RX P4 LAN_TX N_C_PCH_RX N4

PCIE_PTX _LANRX_P4_ C PCIE_PTX _LANRX_N4_ C

3

C3011

1 2

SC15P5 0V2JN-2-GP

X3001

X3001 XTAL-25 MHZ-155-GP

XTAL-25 MHZ-155-GP

R3036

R3036 0R2J-2-G P

0R2J-2-G P

A00 0618

R3037

R3037 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

VDD10 VDD10 VDD10

VDD10

EVDD10

3D3V_L AN_S5 3D3V_L AN_S5

C3028

LAN_W AKE# ISOLATE#

PLT_RS T#_LAN

CLK_PC IE_LAN_P4 CLK_PC IE_LAN_N4

PCIE_PTX _LANRX_P4_ C PCIE_PTX _LANRX_N4_ C

LAN_TX P_C_PCH_RX P4 LAN_TX N_C_PCH_RX N4

3D3V_L AN_S5

SCD1U10V2KX-5GP

CARD_3 D3V

VDDREGVDD10REGOUT

C3025 SCD1U1 0V2KX-5GPC3025 SCD1U10V 2KX-5GP

1 2 1 2

C3026 SCD1U1 0V2KX-5GPC3026 SCD1U10V 2KX-5GP

Close To Pin 27

VDD33/1 8

U3001

3

AVDD10

8

AVDD10

46

AVDD10

33

DVDD10

20

EVDD10

11

AVDD33

48

AVDD33

12

DVDD33

32

DVDD33

13

CARD_3V3

27

VDD33/18

35

VDDREG

39

LANWAKE#

31

ISOLATE#

29

CLKREQ#

30

PERST#

23

REFCLK_P

24

REFCLK_N

21

HSIP

22

HSIN

25

HSOP

26

HSON

RTL841 1B-CGT-GP

71.08411.D03

2

CARD_3 D3V_S0

12

C3017

SCD1U10V2KX-5GP

SD_D2/MS_CLK

SD_CLK/MS_D0

SD_SMD/MS_D2

SD_WP/MS_BS

PCIE_PRX _LANTX_P4 [16] PCIE_PRX _LANTX_N4 [16]

PCIE_PTX _LANRX_P4_ C [16] PCIE_PTX _LANRX_N4_ C [16]

CLK_PC IE_LAN_P4 [18] CLK_PC IE_LAN_N4 [18]

0R0603 -PAD-2-GP-U

R3008

1 2

12

C3027

SC4D7U6D3V3KX-GP

DY

MDIP0 MDIN0 MDIP1 MDIN1 MDIP2 MDIN2 MDIP3 MDIN3

CKXTAL1 CKXTAL2

ENSWREG_H

REGOUT

RSET

LED_CR

LED0

LED1/GPO

LED3

SD_D0/MS_D1

SD_D1

SD_D3/MS_D3

SD_CD#

MS_CD#

GND

2

A00 0618

1 2 4 5 6 7 9 10

44 45

34 36 47

40 41 38 37

15 14 19 18

16 17 28

42 43

49

CARD_3 D3V

LANXIN LANXOU T

ENSW REG REGOUT RSETVDD33/1 8

LED_CR LED0 LED1 LED3

SP2 SP1 SP6 SP5

SP3 SP4 SP7

1

R3038

2K49R2 F-GP

3D3V_S 0

1 2

1KR2J-1 -GP

3D3V_L AN_S5

2

DY

Q3003

Q3003 PMBS39 04-1-GP

PMBS39 04-1-GP

0R0402 -PAD-2-GP

12

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

1

ISOLATE#

R3014

15KR2F -GP

1

23

RN3001

DY

SRN10K J-5-GP

4

Q402_1

1

R3016

SP2/SD_ D0/MS_D1 [33] SP1/SD1 [3 3] SP6/SD_ D2/MS_CLK [33] SP5/SD_ D3/MS_D3 [33]

SP3/SD_ CLK/MS_D0 [33] SP4/SD_ CMD/MS_D2 [33] SP7/SD_ WP/MS_BS [33]

SD_CD# [33] MS_CD# [33]

3

30 10 1Friday, June 28, 2 013

12

R3015

12

DY

PLT_RS T#_LAN

A00 0618

of

Close To Pin 13

12

C3015

SCD1U10V2KX-5GP

DY

PLT_RS T#[17,24,58 ,65,73]

LAN_MD I0P [31] LAN_MD I0N [31] LAN_MD I1P [31] LAN_MD I1N [31] LAN_MD I2P [31] LAN_MD I2N [31] LAN_MD I3P [31] LAN_MD I3N [31]

TP3004 TPAD 14-OP-GPTP3 004 TPA D14-OP-GP

1

TP3003 TPAD 14-OP-GPTP3 003 TPA D14-OP-GP

1

TP3002 TPAD 14-OP-GPTP3 002 TPA D14-OP-GP

1

TP3001 TPAD 14-OP-GPTP3 001 TPA D14-OP-GP

1

A00 0618

R3017 0R040 2-PAD-2-GPR3017 0 R0402-PAD-2-G P

12

R3018 0R040 2-PAD-2-GPR3018 0 R0402-PAD-2-G P

12

R3019 0R040 2-PAD-2-GPR3019 0 R0402-PAD-2-G P

12

R3020 0R040 2-PAD-2-GPR3020 0 R0402-PAD-2-G P

12

R3032 0R040 2-PAD-2-GPR3032 0 R0402-PAD-2-G P

12

R3033 0R040 2-PAD-2-GPR3033 0 R0402-PAD-2-G P

12

R3035 0R040 2-PAD-2-GPR3035 0 R0402-PAD-2-G P

12

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

LOM(RTL8411B)

Hadley 15"

X02

5

SSID = LOM

4

3

2

1

D D

LAN_MD I3N[30]

LAN_MD I3P[30]

LAN_MD I2N[30]

LAN_MD I2P[30]

LAN_MD I1N[30]

LAN_MD I1P[30]

LOM_TCT

C C

12

C3106

C3106 SCD01U 16V2KX-3GP

SCD01U 16V2KX-3GP

LAN_MD I0N[30]

LAN_MD I0P[30]

EC3108 SC10P50 V2JN-4GP

EC3107 SC10P50 V2JN-4GP

EC3106 SC10P50 V2JN-4GP

EC3105 SC10P50 V2JN-4GP

EC3104 SC10P50 V2JN-4GP

EC3103 SC10P50 V2JN-4GP

EC3102 SC10P50 V2JN-4GP

EC3101 SC10P50 V2JN-4GP

Follow Reference Schematic 0.01 uF~0.4uF

GIGA LAN TransFormer

XF3101

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

1 2

DY

2

1

3

1:1

5

4

6

1:1

8

7

9

1:1

11

10

12 13

1:1

XFORM-2 4P-63-GP

68.89240.30D

23

MCT0

24

22

20

MCT1

21

19

17

MCT2

18

16

14

MCT3

15

MDO3-

MDO3+

MDO2-

MDO2+

MDO1-

MDO1+

MDO0-

MDO0+

MCT1

MCT0

MCT3

MCT2

45

678

MCT

12

Layout: Place near RJ45

AFTP31 07AFTP3107 AFTP31 02AFTP3102 AFTP31 01AFTP3101 AFTP31 03AFTP3103 AFTP31 04AFTP3104 AFTP31 06AFTP3106 AFTP31 05AFTP3105 AFTP31 08AFTP3108

123

RN3101

RN3101 SRN75J -1-GP

SRN75J -1-GP

C3101

C3101 SC100P 3KV8JN-2-GP

SC100P 3KV8JN-2-GP

78.1013N.1AL

1 1 1 1 1 1 1 1

MDO0+ MDO0MDO1+ MDO2+ MDO2MDO1MDO3+ MDO3-

U3101

LAN_MD I0P LAN_MD I0P LAN_MD I0N LA N_MDI0N

LAN_MD I1P LAN_MD I1P LAN_MD I1N LA N_MDI1N

LAN_MD I2P LAN_MD I2N

LAN_MD I3P LAN_MD I3N

91 8

2

3

DY

7

4

6

5

ESD3V3 U4ULC-GP

83.3V3U4.0A0

U3102

91 8

2

3

DY

7

4

6

5

ESD3V3 U4ULC-GP

83.3V3U4.0A0

MDO0+

MDO0MDO1+ MDO2+ MDO2MDO1MDO3+ MDO3-

LAN_MD I2P LAN_MD I2N

LAN_MD I3P LAN_MD I3N

RJ45

9 1

2 3 4 5 6 7 8

10

RJ45-8P -118-GP-U

22.10019.141

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

RJ45+Transformer

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

RJ45+Transformer

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

31 10 1Friday, June 28, 2 013

of

31 10 1Friday, June 28, 2 013

of

31 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

1

32 10 1Friday, June 28, 2 013

of

32 10 1Friday, June 28, 2 013

of

32 10 1Friday, June 28, 2 013

X02

5

SSID = SDIO

4

3

2

1

D D

C C

B B

CARD_3 D3V_S0 CARD_3 D3V_S0

AFTP33 08AFTP3308

SD_CD#[30] SP5/SD_ D3/MS_D3[30]

SP3/SD_ CLK/MS_D0[3 0] SP4/SD_ CMD/MS_D2[30]

SP2/SD_ D0/MS_D1[30] SP1/SD1[30] SP6/SD_ D2/MS_CLK[3 0]

SP7/SD_ WP/MS_BS[30]

12

C3303

SCD1U10V2KX-5GP

Close To Pin11 SD_VCC

12

Close To P in 4 MS_V CC

12

C3302

C3304

SC4D7U6D3V3KX-GP

SCD1U10V2KX-5GP

Reserve EMI Cap, 0107 CLK Cap DY

SP1/SD1 SP2/SD_ D0/MS_D1 SP3/SD_ CLK/MS_D0 SP4/SD_ CMD/MS_D2 SP5/SD_ D3/MS_D3 SP6/SD_ D2/MS_CLK SP7/SD_ WP/MS_BS

EC3305

EC3304

SC4D7P50V2BN-GPDYEC3304

SC4D7P50V2BN-GP

SC4D7P50V2BN-GPDYEC3303

SC4D7P50V2BN-GP

12

DY

EC3301

SC4D7P50V2BN-GPDYEC3301

SC4D7P50V2BN-GP

EC3302

SC4D7P50V2BN-GPDYEC3302

SC4D7P50V2BN-GP

EC3303

12

DY

CARD1

1

SC4D7P50V2BN-GPDYEC3305

SC4D7P50V2BN-GP

EC3306

SC4D7P50V2BN-GPDYEC3306

SC4D7P50V2BN-GP

EC3307

SC4D7P50V2BN-GPDYEC3307

SC4D7P50V2BN-GP

12

DY

SD_VDD/MMC_VDD11MS_DATA0

4

MS_VCC

20

SD_CD

3

SD_CD/DAT3/MMC_RSV

14

SD_SLK/MMC_CLK

6

SD_CMD/MMC_CMD

18

SD_DAT0/MMC_DAT

19

SD_DAT1

1

SD_DAT2

22

SD_WP/SW

NP1

NP2

CARDBU S22P-SKT-2-GP -U

62.10051.H21

AFTP33 01AFTP3301 AFTP33 02AFTP3302 AFTP33 03AFTP3303 AFTP33 04AFTP3304 AFTP33 05AFTP3305 AFTP33 06AFTP3306 AFTP33 07AFTP3307

SD_VSS/MMC_VSS1 SD_VSS/MMC_VSS2

1 1 1 1 1 1 1

SP1/SD1 SP2/SD_ D0/MS_D1 SP3/SD_ CLK/MS_D0 SP4/SD_ CMD/MS_D2 SP5/SD_ D3/MS_D3 SP6/SD_ D2/MS_CLK SP7/SD_ WP/MS_BS

MS_DATA1 MS_DATA2 MS_DATA3

MS_INS

MS_BS

MS_SCLK

GND GND

SD_GND

MS_VSS MS_VSS

12 13 10 7

8 15 5

23 24

21

16 2

9 17

1

AFTP33 09AFTP3309

SP3/SD_ CLK/MS_D0 [30] SP2/SD_ D0/MS_D1 [30] SP4/SD_ CMD/MS_D2 [30] SP5/SD_ D3/MS_D3 [30]

MS_CD# [30] SP7/SD_ WP/MS_BS [30] SP6/SD_ D2/MS_CLK [30]

layout note: EC3305 need colse to chip

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Card Reader CONN

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

33 10 1Friday, June 28, 2 013

of

33 10 1Friday, June 28, 2 013

of

33 10 1Friday, June 28, 2 013

1

X02

5

SSID = USB

USB3.0 Port1 with power share

USB1

1

VBUS

2

D-

3

D+

10

11

12

13

SKT-USB 13-144-GP

22.10339.W31

A00 0618

R3404

1 2

0R0402 -PAD-2-GP

A00 0618

R3406

1 2

0R0402 -PAD-2-GP

A00 0618

R3405

1 2

0R0402 -PAD-2-GP

A00 0618

R3407

1 2

0R0402 -PAD-2-GP

STDA_SSRX-

STDA_SSRX+

STDA_SSTX-

STDA_SSTX+

GND_DRAIN

USB30_ RXDN0_C

USB30_ RXDP0_C

5 6

8 9

4

GND

7

USB30_ TXDN0_C

USB30_ TXDP0_C

D D

AFTP34 03AFTP3403 AFTP34 02AFTP3402

USB3_P TX_CRX_N0[16]

C C

USB3_P TX_CRX_P0[16]

B B

1 1

USB3_P RX_CTX_N0[16]

USB3_P RX_CTX_P0[16]

AFTP34 07AFTP3407

USB20_ DN1_C USB20_ DP1_C

1 2

C3401

SCD1U1 0V2KX-5GP

1 2

C3402

SCD1U1 0V2KX-5GP

USB30_ VCCA

1

USB20_ DN1_C USB20_ DP1_C

USB30_ TXDN0_R

USB30_ TXDP0_R

4

USB30_ RXDN0_C

USB30_ RXDP0_C

USB30_ TXDN0_C

USB30_ TXDP0_C

USBDET 1#

1

USB_PP 1_R[35]

USB_PN 1_R[35]

USB30_ TXDP0_C

USB30_ TXDN0_C

USB30_ RXDP0_C

USB30_ RXDN0_C

1 2

R3402

R3402 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

AFTP34 01AFTP3401

X02 stuff TR3403

A00 0618

TR3403

1 2

FILTER-4P -62-GP

69.10080.021

2nd = 69.10103.061

A00 0618

U3401

1

2

3

4 5

AZ1065 -06Q-GP

83.01065.0AJ

X01 0321

USBDET _CON# [24]

34

USB30_ VCCA

8

7

USB20_ DP1_C

6

USB20_ DN1_C

USB20_ DP1_C

USB20_ DN1_C

3

2

1

USB3.0 Port2

USB30_ VCCB

1

USB30_ TXDP1_C

USB30_ TXDN1_C USB20_ DN0_C

USB20_ DP0_C USB30_ RXDP1_C

USB30_ RXDN1_C

AFTP34 05AFTP3405 AFTP34 06AFTP3406

1 1

AFTP34 08AFTP3408

USB20_ DN0_C USB20_ DP0_C

A00 0618

USB30_ TXDN1_R

USB3_P TX_CRX_N1[16]

1 2

C3407

SCD1U1 0V2KX-5GP

R3441

1 2

0R0402 -PAD-2-GP

USB30_ TXDN1_C

A00 0618

USB30_ TXDP1_R

USB3_P TX_CRX_P1[16]

1 2

C3409

SCD1U1 0V2KX-5GP

R3415

1 2

0R0402 -PAD-2-GP

USB30_ TXDP1_C

A00 0618

R3424

USB3_P RX_CTX_N1[16]

1 2

0R0402 -PAD-2-GP

USB30_ RXDN1_C

A00 0618

R3423

USB3_P RX_CTX_P1[16]

1 2

0R0402 -PAD-2-GP

USB30_ RXDP1_C

USB2

CHASSIS CHASSIS

10

9 1

8 2 7 3 6 4 5

11 12

CHASSISCHASSIS

SKT-USB 13-32-GP-U

22.10341.531

USB_PP 0[16]

USB_PN 0[1 6]

USB20_ DN0_C

USB20_ DP0_C

USB30_ RXDP1_C

USB30_ RXDN1_C

13

1

2

3

4 5

AFTP34 04AFTP3404

1

X02 stuff TR3412

A00 0618

TR3412

1 2

FILTER-4P -62-GP

69.10080.021

2nd = 69.10103.061

A00 0618

8

7

USB30_ TXDN1_C

6

USB30_ TXDP1_C

USB30_ VCCB

U3403

AZ1065 -06Q-GP

83.01065.0AJ

USB20_ DP0_C

34

USB20_ DN0_C

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

USB3.0(1)

1

34 10 1Friday, June 28, 2 013

of

34 10 1Friday, June 28, 2 013

of

34 10 1Friday, June 28, 2 013

X02

5

SSID = USB

4

3

2

1

12

C3507

USB30_ VCCB5V_S5

SC1U6D3V2KX-GP

12

C3504

SC100U 6D3V6MX-GP

78.10710.52L

If MLCC is used as Main Source. Inform Layout team to remark Pin 1 as positive. In case MLCC shortage and other type of Cap With Polarity Is Used.

U3502

1

GND

2

C3501

SC1U6D3V2KX-GP

D D

USB_PW R_EN#[24]

C C

12

5V_S5

C3505

SC1U6D3V2KX-GP

C3505

SC1U6D3V2KX-GP

12

USB_PW R_EN#[24]

VIN

3

VIN EN#4OC#

UP7534 QRA8-15-GP

74.07534.C79

2nd = 74.06288.A79

3rd = 74.02000.B71

U3503

1

GND

2

IN

3

EN1# EN2#4FLG2

AP2182 SG-13-GP

74.02182.071

0319 modify USB Charger circuit

VOUT#8 VOUT#7 VOUT#6

FLG1 OUT1 OUT2

8 7 6 5

USB_OC #0_1 [1 6]

USB_OC #2_3 [1 6]

USB30_ VCCC USB30_ VCCD

C3502

SCD1U10V2KX-5GP

12

A00 0618

R3505

USBCHG _EN[24]

U3501

SB#

U3501

9 8 7 6 5

INT

GND

D-

SB/

D+

Y-

SEL

Y+ VDD

PI5USB14 58AZAEX-GP

74.51458.073

1 2 3 4

A00 0618

0R0402 -PAD-2-GP

R3502

1 2

USB_PN 1[16] USB_PP 1[16]

5V_S5

12

C3510

SCD1U10V2KX-5GP

B B

1 2

0R0402 -PAD-2-GP

USBCHG _EN_R

SEL

USB_PN 1_R [34]USBCHA RGER_CB0[24] USB_PP 1_R [34 ]

5V_S5

12

R3503

R3503 100KR2 J-1-GP

100KR2 J-1-GP

Q3502

G

S

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

5V_S5

12

R3501

R3501 100KR2 J-1-GP

100KR2 J-1-GP

D

USBCHG _EN#

12

R3504

10KR2J -3-GP

DY

5V_S5 USB30_ VCCA

C3503

SC1U6D3V2KX-GP

12

A A

USB Power SW (U3504)

Vendor Vendor P/N Wistron P/N

Silergy

DII (Diodes)

GMT

5

SY6288DCAC

AP2301MPG-13

G547I2P81U

74.06288.A79

74.02301.071

74.00547.F79

Priority

1ST

2ND

3RD

USBCHG _EN#

4

U3504

1

GND

VOUT#8

2

VIN

VOUT#7

3

VIN

VOUT#6

EN#4OC#

UP7534 QRA8-15-GP

74.07534.C79

2nd = 74.06288.A79

3rd = 74.02000.B71

8 7 6 5

USB_OC #0_1 [1 6]

3

C3511

C3512

SCD1U10V2KX-5GP

SC1U6D3V2KX-GP

12

C3506

C3506 SC100U 6D3V6MX-GP

SC100U 6D3V6MX-GP

78.10710.52L

If MLCC is used as Main Source. Inform Layout team to remark Pin 1 as positive. In case MLCC shortage and other type of Cap With Polarity Is Used.

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Date: Sheet of

2

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

USB Power SW

1

X02

35 10 1Friday, June 28, 2 013

X02

12

5

SSID = Reset.Suspend

4

3

2

1

D D

Power Good

1D35V_ VTT_PWR GD[49 ]

1D05V_ VTT_PWR GD[7,48 ]

A00 0618

R3610 0R040 2-PAD-2-GPR3610 0 R0402-PAD-2-G P

12

R3611 0R040 2-PAD-2-GPR3611 0 R0402-PAD-2-G P

12

3D3V_S 0

12

R3601

R3601 1KR2J-1 -GP

1KR2J-1 -GP

ALL_SYS_ PWRGD [24]

ROSA Run Power

C C

B B

3D3V_A UX_S5

1 2

DY

R3607

100KR2 J-1-GP

PM_SLP _S3#[17,24,48 ,49,51]

PCH_PW ROK[17,24,26 ]

PS_S3C NTRL

D G

S

5

6

DY

123 4

G

D

Q3603

Q3603 2N7002 KDW-GP

2N7002 KDW-GP

84.2N702.A3F

A00 0618

R3609

12

0R0402 -PAD-2-GP

3V_5V_ S0_EN

3D3V_S 5

5V_S5

U3601

1

VIN1#1

2

VIN1#2

3

ON1

4

VBIAS

5

ON2

6

VIN2#6 VIN2#77VOUT2#8

TPS229 66DPUR-GP

74.22966.093

GND VOUT1#14 VOUT1#13

CT1

GND

CT2

VOUT2#9

5V_S0

15 14 13 12 11 10 9 8

CT2

CT1

3D3V_S 0

C3601

SC470P50V2KX-3GP

C3601

SC470P50V2KX-3GP

C3602

12

C3604

SC10U6D3V3MX-GP

C3604

SC10U6D3V3MX-GP

SC470P50V2KX-3GP

12

5V_S0

C3603

SC10U6D3V3MX-GP

C3603

SC10U6D3V3MX-GP

5V_S0 Comsumption Peak current 4.033A

3D3V_S0

3D3V_S0 Comsumption Peak current 3A

D3602

D3602 BAS16-6 -GP

BAS16-6 -GP

2

3

3V_5V_ EN[4 5]

12

R3602

DY

200KR2 J-L1-GP

A A

5

DY

1

1 2

R3603

1KR2J-1 -GP

83.00016.K11

2ND = 83.00016.F11

PURE_H W_SHUTD OWN# [24 ,26,76]

S5_ENA BLE [24]

4

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

Power Plane Enable

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

36 10 1

of

36 10 1

of

36 10 1

1

X02

5

4

3

2

1

SSID = Reset.Suspend

D D

12

+V_SM_ VREF_CNT[5]

R3706

R3706 1K8R2F -GP

1K8R2F -GP

R3703

R3703 1K8R2F -GP

1K8R2F -GP

2R2F-GP

2R2F-GP R3708

R3708

1 2

12

C3701

C3701 SCD022 U16V2JX-GP

SCD022 U16V2JX-GP

+V_VRE F_PATH3

12

R3707

R3707 24D9R2 F-L-GP

24D9R2 F-L-GP

Close to DIMM S3 Power Reduction Circuit PM_DRAM_PWRGD

Layout Note:

Place Close SO-DIMMA.

C C

B B

SA_DIMM_VREFDQ

SODIMM1

M_VREF _CA_DIMMA

0D675V _VTTREF 1D35V_ S3

0R2J-2-G P

0R2J-2-G P R3704

R3704

1 2

DY

12

R3705

R3705 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

SB_DIMM_VREFDQ

SODIMM2

M_VREF _CA_DIMMB

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

S3 Power Reduction

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

37 10 1

of

37 10 1

of

37 10 1

1

X02

5

4

3

2

1

SSID = Reset.Suspend

D D

3D3V_S 5 3D3V _S5_PCH

3D3V_S 5

C3801

SCD47U16V2ZY-GP

C3801

SCD47U16V2ZY-GP

12

DS3

C C

DS3_PW RCTL

R3802

PM_SLP _SUS#[17,24]

1 2

0R0402 -PAD-2-GP

A00 0618

B B

0R3J-0-U -GP

0R3J-0-U -GP R3801

R3801

1 2

Non DS3

U3801

DS3

1

GND

OUT#8

2

IN#2

OUT#7

3

IN#3

OUT#6

EN/EN#4OCB

SY6288CC AC-GP

74.06288.079

3D3V_S 5_PCH

8 7 6 5

C3802

SCD47U16V2ZY-GP

C3802

SCD47U16V2ZY-GP

12

DS3

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

DSW

1

38 10 1Friday, June 28, 2 013

of

38 10 1Friday, June 28, 2 013

of

38 10 1Friday, June 28, 2 013

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

39 10 1Friday, June 28, 2 013

of

39 10 1Friday, June 28, 2 013

of

39 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

40 10 1Friday, June 28, 2 013

of

40 10 1Friday, June 28, 2 013

of

40 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

41 10 1

of

41 10 1

of

41 10 1

1

X02

5

4

3

5V_S5

2

1

SSID = PWR.Support

84.03904.L06

PR4202

15KR2F -GP

D D

0103 Add EC4203

ndde close to EL4202

Layout Note:

PSID Layout width > 25mi l

100KR2 J-1-GP

A00 0618

0R0603 -PAD-2-GP-U

PR4214

PR4214 100KR2 J-1-GP

100KR2 J-1-GP

0R0603 -PAD-2-GP-U

PR4219

1 2

PQ4206

3 4

2

1

2N7002 KDW-GP

PS_ID_R2

1

2

DY

3

12

PR4216

3K3R6J -GP

PQ4206 _3

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

5

6

PD4204

PD4204 PESD24 VS2UT-GP

PESD24 VS2UT-GP

1 2

PR4212

1KR2J-1 -GP

JGND

SCD1U5 0V5JX-1-GP

SCD1U5 0V5JX-1-GP EC4203

EC4203

1 2

DY

EL4202

EL4202 PAD-2P-4 516-GP-U

PAD-2P-4 516-GP-U

DCIN1

6 NP1 1

2 3

C C

ACES-CO N5-27-GP

20.F2182.005

B B

4 5 NP2 7

1

AFTP42 05AFTP4205

AC_IN_KB C#[24]

1

+DC_IN_C

DY

JGND

1

2

AFTP42 03AFTP4203

1

A00 0619

SC10U25V5KX-GP

EC4202

SCD1U25V2KX-GP

EC4202

SCD1U25V2KX-GP

12

EC4201

JGND

1

2

EL4201

PAD-2P-4 516-GP-U

1

2

EL4203

EL4203 PAD-2P-4 516-GP-U

PAD-2P-4 516-GP-U

PR4215

PR4215 100KR2 J-1-GP

100KR2 J-1-GP

PS_ID_R

AFTP42 04AFTP4204

12

AC_IN#_G

12

PR4211

1 2

PQ3802 _1

1 2

FDV301 N-NL-GP

D

B

2nd = 84.05124.011

PWR _CHG_AD_OF F_R

84.03904.L06

2nd = 84.03904.P11

2

PMBS39 04-1-GP

1

PQ4202

3

G

PQ4201

84.00301.A31

2nd = 84.3K329.031

PR4208

1 2

DY

33R2J-2 -GP

KA

PD4201

PD4201 1SMB22 AT3G-GP-U1

1SMB22 AT3G-GP-U1

83.22R03.03G

PQ4204

C

R1

E

R2

PDTC12 4EU-1-GP

84.00124.H1K

PSID_DISAB LE#_R_C

SD

AD_OFF _L

12

DT MODE

PR4203

PR4203 10KR2J -3-GP

10KR2J -3-GP

PS_ID

PC4202

PC4202 SCD1U2 5V3KX-GP

SCD1U2 5V3KX-GP

PQ4205

R2

B

R1

PDTA12 4EU-1-GP

84.00124.K1K

2nd = 84.05124.A11

E

C

PR4207

1 2

33R2J-2 -GP

AD_OFF _R

3D3V_S 5

DY

1 2

12

PC4201

PR4210

47KR3J -L-GP

PR4213

PR4213 10KR2J -3-GP

10KR2J -3-GP

3D3V_S 5

AD++DC_IN

8 7 6

PQ4208

DY

D

2N7002 K-2-GP

84.2N702.J31

3D3V_S 5

12

PC4205

12

SCD01U50V2KX-1GP

G

S

PR4206

PR4206 2K2R2J -2-GP

2K2R2J -2-GP

12

PC4206

SC10U25V5KX-GP

PQ3808 G

12

DY

PSID_EC [24]

PR4217

1 2

DY

1KR2J-1 -GP

PC4209

1

2

PD4203

PD4203 BAV99-1 2-GP

BAV99-1 2-GP

3

75.00099.E7D

2nd = 75.03101.07D

PU4201

S

D

S

1

240KR3-GP

2 3 4 5

SI7121DN -T1-GE3-GP

DY

PC4208

SC1U25V3KX-1-GP

12

PR4209

SC1U25V5KX-1GP

12

D

S

D

S

D

S

D

S

D

G D

Id=-9.6A Qg=-25nC Rdson=18~30mohm

12

PQ3808 D

SCD01U50V2KX-1GP

PWR _CHG_AD_OF F[24 ]

PR4218

12

DY

100KR2 J-1-GP

PQ3807 D

1 2

DY

H_PROC HOT#[4,24,44 ,46]

A A

5

4

3

DY

PC4207

PC4207 SC1U6D 3V2ZY-GP

SC1U6D 3V2ZY-GP

PQ4203

1

6

2

5

DY

3 4

DMN66D 0LDW-7-GP

2

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

BAT_IN#

BAT_IN# [24,43 ,44]

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

DCIN

Hadley 15"

1

SCD01U50V2KX-1GP

X02

42 10 1Friday, June 28, 2 013

X02

of

5

SSID = PWR.Support

4

3

2

1

D D

SRN100 J-4-GP

SRN100 J-4-GP RN4301

RN4301

DY

12

1 2 3 4 5

EC4301

SC10P50V2JN-4GPDYEC4301

SC10P50V2JN-4GP

BAT_SC L[2 4,44,53] BAT_SD A[24,44,5 3] BAT_IN#[24,42 ,44]

EC4303

SC10P50V2JN-4GPDYEC4303

SC10P50V2JN-4GP

DY

C C

EC4302

SC10P50V2JN-4GPDYEC4302

SC10P50V2JN-4GP

12

DY

1 2

8 7 6

BT+

C4301

SCD1U5 0V3KX-GP

C4301

DY

12

EC4304

DY

SC2200 P50V2KX-2GP

1 2

R4303

R4303 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

PBAT_S MBCLK1 PBAT_S MBDAT1 PBAT_P RES1# SYS_PRES 1#

Battery CONN

BATT1

10

8 7 6 5 4 3 2

1 9

SYN-CON8-2 8-GP

20.82045.008

AFTP43 01AFTP4301 AFTP43 02AFTP4302 AFTP43 03AFTP4303 AFTP43 04AFTP4304 AFTP43 05AFTP4305

PBAT_P RES1#

1

PBAT_S MBDAT1

1

PBAT_S MBCLK1

1

BT+

1

SYS_PRES 1#

1

0109 DY PD4301~4303

BAT_SC LBAT_IN# BAT_SD A

3

PD4303

PD4303 BAV99-1 2-GP

BAV99-1 2-GP

1

2

75.00099.E7D

2nd = 75.03101.07D

B B

3

1

2

75.00099.E7D

2nd = 75.03101.07D

PD4302

PD4302 BAV99-1 2-GP

BAV99-1 2-GP

3

1

2

75.00099.E7D

2nd = 75.03101.07D

PD4301

PD4301 BAV99-1 2-GP

BAV99-1 2-GP

3D3V_A UX_KBC

Layout Note:

Place near Battery CONN

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

BATT CONN

1

43 10 1Friday, June 28, 2 013

of

43 10 1Friday, June 28, 2 013

of

43 10 1Friday, June 28, 2 013

X02

5

SSID = Charger

D D

AD+

12

DY

12

PR4452

100KR2J-1-G P

DY

3D3V_S5

12

PR4431

DY

12

DY

PQ4406_G

G

DY

A00 0618

PR4462

0R0402-PAD-2 -GP

PR4463

0R2J-2-GP

DY

BQ24715_AGND

3K3R2J-3-GP

BAT_SDA[24,43,53]

BAT_SCL[24,43,5 3]

PQ4412_2

100KR2F-L1-GP

PC4414

PC4414 SCD47U6D3V2 KX-1-GP

SCD47U6D3V2 KX-1-GP

12

DY

1 2

PQ4405_3

PQ4405_2

12

DY

PWR_CHG_ACOK

KBC FOR DT MODE CHECK EE PULL HIGH

3D3V_AUX_S5

150KR2F-L-GP

PWR_CHG_ REGN

PR4434

12

C C

PR4419

100KR2F-L1-GPDYPR4419

100KR2F-L1-GP

DY

12

PR4415

33KR2F-GPDYPR4415

33KR2F-GP

DY

DIS_DTM: H= cell is plus to GND. (reset c harger ic) L=nornal

12

PR4449

PR4449 100KR2J-1-G P

100KR2J-1-G P

Follow custormer circuits

1 2

DIS_DTM[24]

DY

PC4409

SC1U25V3KX-1-G P

B B

CHECK EE

PQ4406

PQ4406 2N7002K-1-GP

2N7002K-1-GP

84.2N702.031

PR4433

PD4403_A

PMBS3906-GP

84.03906.F11

680KR2F-GP

PQ4406_D

12

DY

1

PR4451

AD+

12

PQ4408_E

2

3

12

5

84.2N702.031

D S

PR4416

100KR2J-1-GP

PQ4408

PQ4408_C

H_PROCHOT#[4,24,42,46]

0R2J-2-GP

A A

A00 0618

CHECK EE follow custormer circuits.

PR4459

15V_S5

DY

1 2

1N4148WS- 7-F-GP

1 2

DCBATOUT

DY

1 2

PR4456

PR4456 0R2J-2-GP

0R2J-2-GP

PD4403

K A

PD4403_K

PR4458

PR4458 0R0402-PAD-2 -GP

0R0402-PAD-2 -GP

1MR2J-1-GP

309KR2F-GP

PC4402

SCD01U50V2KX-1GP

PR4432

DY

ACAV_IN H=ACIN L=UNAC

CHARGER_CELL _PIN

DY

PR4454

1 2

0R2J-2-GP

BAT_IN# [24,42,43]

PR4429

PR4429 100KR2J-1-G P

100KR2J-1-G P

PR4455

PR4455 0R0402-PAD-2 -GP

0R0402-PAD-2 -GP

PQ4405

3 4

2

1

2N7002KDW -GP

PD4405

A K

PAD-2P-330056- GP

AD+

12

VacDET=2.4V

PR4444

Acok setting=2.4*((PR4444+PR4411)/PR4411 ) Setting=18.178v

12

PR4411

PR4411 47KR2F-GP

47KR2F-GP

BQ24715_AGND

3D3V_AUX_S53D3V_S5

12

PR4414

PR4414 3K3R2J-3-GP

3K3R2J-3-GP

DY

PG4401 GAP-CLO SE-PWR-3-GPPG4401 GAP-CLOSE-PW R-3-GP

PG4408 GAP-CLO SE-PWR-3-GPPG4408 GAP-CLOSE-PW R-3-GP

ACAV_IN

PR4430 0R0402-PAD-2-GPPR 4430 0R0402-PAD-2-GP

Follow custormer circuits

PQ4412

3 4

2

5

DY

CHARGER_CELL _PIN

1

6

2N7002KDW -GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

PWR_CHG_ACOK: PWR_CHG_REGN=6V V+=6*(PR4404/(PR4410+PR4404))=3.27V

BATTERY MON

BOOST_MON[24]

H_PROCHOT# [4,24,42,46]

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

PQ4405_5

5

PC4404

SC1U25V3KX-1-GP

PC4404

SC1U25V3KX-1-GP

12

6

PQ4405_6

PR4405

PR4405 100KR2F-L1-G P

100KR2F-L1-G P

12

PR4450

10KR2F-2-GP

1 2

3D3V_S5

PWR_CHG_ 1

12

AD_IA[24]

DY

A00 0618

1 2

0R0402-PAD-2 -GP

12

PR4445

1 2

DY

100KR2F-L1-GPDYPR4464

100KR2F-L1-GP

4

SC1U25V3KX-1-G P

+SDC_IN

PR4413

0R0402-PAD-2 -GP

DIS_DTM_CELLPQ4413_2

PC4431

PC4431 SC1U25V3KX-1-G P

SC1U25V3KX-1-G P

PR4464

4

PC4432

BQ24715_AGND

12

PR4439

PR4439 4K02R2F-GP

4K02R2F-GP

PWR_CHG_ CMSRC

PWR_CHG_ ACDET

CHARGER_CELL _PIN

PWR_CHG_ ACOK

PC4417

SC1U25V3KX-1-GP

PC4417

SC1U25V3KX-1-GP

12

PR4403 10R5J-GPPR 4403 10R5J-GP

12

DY

PWR_SDA

PWR_SCL

BQ24715_IOUT_1

12

PR4424

1 2

20KR2F-L-GP

1 2

PWR_CHG_ACP

PWR_CHG_ACN

1

2

3

4

6

10

8

9

5

7

SC100P50V2JN-3GP

12

PU4401_6BOOST_MON_1

PC4423

PWR_CHG_ VCC

BQ24715_AGND

PU4404

BQ24717RGRR -GP

ACN

BATDRV#

ACP

REGN

CMSRC

BTST

ACDRV

HIDRV

ACDET

CELL

PHASE

LODRV

SDA

SCL

ACOK

IOUT

GND

21

PR4406 0R0402-PAD-2 -GPPR4406 0R040 2-PAD-2-GP

BQ24715_AGND

Close PR4443

DCBATOUT

PG4404

GAP-CLOSE-PWR-3-GP

PG4404

GAP-CLOSE-PWR-3-GP

1 2

DCBATOUT_R

12

PR4446

PR4446 0R0402-PAD-2 -GP

0R0402-PAD-2 -GP

1 2

PR4407

6D8R2F-GP

1 2

PU4401_5

PC4415

SCD1U25V2KX-GP

PU4401_4

5

6

PU4401

-

+

-

+

INA199A1-GP

123 4

DCBATOUT

PC4408

SC1U25V3KX-1-GP

PC4408

SC1U25V3KX-1-GP

12

AD+

PR4418

PR4418 3KR5J-GP

3KR5J-GP

PC4410

12

PC4433

SCD1U25V2KX-GP

PC4410

12

SC1U25V3KX-1-G P

BQ24715_AGND

PR4409

4K02R2F-GP

PR4409

4K02R2F-GP

12

20

VCC

PWR_CHG_ BATDRV

11

PWR_CHG_ REGN

16

PWR_CHG_ BTST

17

PWR_CHG_ HIDRV

18

PWR_CHG_ PHASE

19

PWR_CHG_ LODRV

15

14

GND

PWR_CHG_ SRP

13

SRP

PWR_CHG_ SRN

12

SRN

1 2

PR4425

1 2

0R3J-0-U-G P

PR4438 0R0402-PAD-2-GPPR 4438 0R0402-PAD-2-GP

1 2

PR4417 0R0402-PAD-2-GPPR 4417 0R0402-PAD-2-GP

1 2

BQ24715_AGND

PG4405

GAP-CLOSE-PWR-3-GP

PG4405

GAP-CLOSE-PWR-3-GP

1 2

CHECK PM BATTERY TYPE CHECK CELL for DT mode

+VCHGR_R +VCHGR

12

PR4448

PR4448 10R2F-L-GP

10R2F-L-GP

DIS_DTM_HW: PWR_CHG_REGN=6V V+=6*(PR4440/(PR4441+PR4440))=3.27V Setting=3.27*((PR4442+PR4447)/PR4447)=9V

3

PU4405

S

D

S

D

1

8

S

D

S

D

2

7

SGDD

3

6

45

SI7121DN-T1-G E3-GP

84.06675.030

2nd = 84.07121.037

12

DC_IN_D

ACAV_IN

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

PU4406 and PU440 7: main source: 84. 03660.037

BATDRV

PWR_CHG_ REGN

PC4422

1 2

SC1U25V3KX-1-G P

PD4401

PD4401 1PS76SB40-GP-U

1PS76SB40-GP-U

83.1PS76.01F

K A

PC4421

PWR_CHG_ BTST1

1 2

SCD047U25V3KX- 3-GP

PWR_CHG_CMPIN: V-=3.3*(PR4402/(PR4428+PR4402))=1.1099V

12

PR4422

PR4422 1M8R2J-L-GP

1M8R2J-L-GP

PWR_CHG_ REGN

5V_S5

12

DY

120KR2J-GP

PR4461

100KR2F-L1-GP

PR4440

12

DY

PU4402_1IN+

12

DY

3

PR4441

100KR2F-L1-GP

DCBATOUT

PQ4407

3 4

2

5

1

6

2N7002KDW -GP

84.2N702.A3F

FDMS3600-02-R JK0215-COLAY-GP

3D3V_AUX_S5

1 2

PR4402

PR4402 316KR2F-GP

316KR2F-GP

BQ24715_IOUT_1

BT+

PR4465

316KR2F-GPDYPR4465

316KR2F-GP

12

DY

AD+_G_2

1

9

8

ZZ.00215.037

5

LM393PWR-GP

2IN+

PU4402

4

PR4442

412KR2F-GPDYPR4442

412KR2F-GP

12

PR4447

PR4447 180KR2F-GP

180KR2F-GP

PU4406

12

PWR_CHG_CMPIN

6

150KR2F-L-GP

PR4428

5V_S5

7

2IN-

2OUT

PU4402_1IN-

12

PR4423

AD+_G_1

1 2

BQ24715_AGND

2 3 4 10

7

DY

6 5

PWR_CHG_ SRP_R

PWR_CHG_ SRN_R

PWR_CHG_ CMPOUT

8

VCC

1OUT11IN-21IN+3GND

PWR_CHG_ REGN

DIS_DTM_CELL

PR4435

100KR2J-1-GP

10KR2F-2-GP

1 2

FDMS3600-02-R JK0215-COLAY-GP

12

PC4426

SC100P50V2JN-3GP

5V_S5

100KR2F-L1-GP

12

PR4453

DY

PR4426

1 2

D01R3721F-G P-U

12

PG4406

PG4406 GAP-CLOSE-PWR -3-GP

GAP-CLOSE-PWR -3-GP

PR4421 0R2J-2-GP

DY

PC4428

PWR_CHG_ACP

SCD1U25V2KX-GP

PC4418

PU4407

2 3

1

4 10

9

7 6

8

5

ZZ.00215.037

PR4427

2D2R5F-2-GPDYPR4427

2D2R5F-2-GP

12

DY

DCBATOUT_SNU B

12

DY

PC4406

SC330P50V3KX-GP

12

PC4419

SCD01U25V2KX-3GP

100KR2F-L1-GP

12

PR4460

(AD_IA_HW )

2

CHARGER_SRC+SDC _IN

12

PG4402

PG4402 GAP-CLOSE-PWR -3-GP

GAP-CLOSE-PWR -3-GP

12

SCD1U25V2KX-GP

DY

1 2

PC4416

PWR_CHG_ACN

BQ24715_AGND

CHARGER_SRC

PC4425

SC10U25V5KX-GP

PC4425

SC10U25V5KX-GP

PC4411

SC10U25V5KX-GP

PC4411

SC10U25V5KX-GP

12

DCBATOUT

PC4403

SC10U25V5KX-GP

PC4403

SC10U25V5KX-GP

12

PL4401

PL4401 COIL-2D2UH- 11-GP

COIL-2D2UH- 11-GP

1 2

68.2R210.20C

SCD1U25V2KX-GP

PC4401

1 2

PR4443

D01R2512F-3 -GP

GAP-CLOSE-PWR-3-GP

PG4407

1 2

PC4429

1 2

12

SCD1U25V2KX-GP

GAP-CLOSE-PWR-3-GP

PG4403

1 2

12

PC4412

PC4412 SCD1U25V2KX-GP

SCD1U25V2KX-GP

BQ24715_AGND BQ247 15_AGND

5V_S5

12

PR4437

PR4437 100KR2J-1-G P

100KR2J-1-G P

PR4436

PWR_CHG_ CMPOUT PQ4413_5

CHECK PM ADAPTER TYPE And setting adapter type

PR4436

1 2

220KR2F-GP

SCD01U50V3J X-1GP

AC_IN#[24]

357KR2F-GP

PR4401

1 2

PQ4411_D1PW R_CHG_CMPIN

PC4405

12

PQ4411

3 4

2

1

2N7002KDW -GP

ADAPTER TYPE

90W

65W

45W

2

PC4407

SC10U25V5KX-GP

PC4407

SC10U25V5KX-GP

PC4427

SC10U25V5KX-GP

PC4427

SC10U25V5KX-GP

PC4413

SCD1U25V2KX-GP

PC4413

SCD1U25V2KX-GP

12

PC4430

SC10U25V5KX-GP

PC4430

SC10U25V5KX-GP

+VCHGR

PC4420

DY

SC1U25V3KX-1-G P

1 2

BATDRV

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

PQ4413

PQ4413 2N7002KDW -GP

2N7002KDW -GP

6

3D3V_AUX_S5

12

PR4412

PR4412 100KR2F-L1-G P

100KR2F-L1-G P

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

5

6

1 2

AD_IA_HW AD_IA_HW_2

L

H L

L

H

PC4434

SC10U25V5KX-GP

PC4434

SC10U25V5KX-GP

12

PD4402

3

V10P10-GP-U

PU4403

S

1

S

2

S

3

G D

4 5

FDMC6675BZ-GP- U

84.06675.030

2nd = 84.07121.037

2345

1

AD_IA_HW [24]AD_IA_HW2[24]

147KR2F-GP

147KR2F-GP PR4420

PR4420

1.099V

0.862329V

0.659648V

1

2

D

8

D

7

D

6

DY

PR4457

1 2

H_PROCHOT# [4,24,42 ,46]

0R0402-PAD-2 -GP

PQ4413_3

PWR_CHG_ REGN

12

PWR_CHG_ CMPINPQ441 1_D2

(AD_IA_HW _2)

SETTING

1

BT+

12

PC4424

SCD01U25V2KX-3GP

PR4410

PR4410 100KR2J-1-G P

100KR2J-1-G P

PWR_CHG_ ACOK

PR4404

PR4404 120KR2J-GP

120KR2J-GP

Wistron Corporati on

21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hs ichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

CHARGE(BQ 24715)

44 101Friday, June 28, 2013

1

44 101Friday, June 28, 2013

X02

A

B

C

D

E

SSID = PWR.Plane.Regulator_5v3p3v

PWR_5V_VCLK

PC4525

3D3V_AUX_S5

12

PR4503

0R2J-2-GP

DY

12

PWR_DCBATOUT_3D3V

SC10U25V5KX-GP

12

D

SSS

123

S G

12

D

8

DY

D

SSS

123

S

PWR_3D3V_SNUB

12

DY

PR4502

PWR_5V_EN1_R PWR_5V_EN1

PR4504

PR4504 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

84.00412.03 7

678

DDD

PU4502

PU4502 SIS412DN-T1-GE3-GP

SIS412DN-T1-GE3-GP

G D

PC4515

4 5

PU4504

567

DDD

SIS780DN-T1-GE3-GP

G

4

1 2

PWR_3D3V_VBST2_1

12

SCD1U25V3KX-GP

PR4502

0R0402-PAD-2-GP

PR4505

PWR_3D3V_EN2

0R0402-PAD-2-GP

PR4507

1 2

1D5R3F-GP

G

12

PR4511

PR4511 57K6R2F-GP

57K6R2F-GP

3D3V_AUX_S5

GAP-CLOSE-PWR-3-GP

3D3V_S5

12

PR4519

DY

100KR2J-1-GP

PR4520

0R0402-PAD-2-GP

100KR2J-1-GP

12

PWR_3D3V_VBST2

PWR_3D3V_DRVH2

PWR_3D3V_LL2

PWR_3D3V_DRVL2

PWR_3D3V_FB2

PWR_3D3V_EN2

PWR_3D3V_CS2

PWR_5V3D3V_PGOOD

PG4529

1 2

SC4D7U6D3V3KX-GP

PU4501

TPS51225RUKR-GP

9

VBST2

10

DRVH2

8

SW2

11

DRVL2

4

VFB2

6

EN2

5

CS2

7

PGOOD

3D3V_PWR_2

PC4523

DCBATOUT

VREG3

3

12

PC4510

SC10U25V5KX-GP

12

DY

12

VIN

VBST1

DRVH1

SW1

DRVL1

VO1

VFB1

EN1

CS1

VCLK

GND

VREG5

13

12

PC4524

SC1U6D3V3KX-2GP

PC4511

12

17

16

18

15

14

2

20

1

19

21

5V_PWR_2

SCD01U50V2KX-1GP

PWR_5V_VBST1

PWR_5V_DRVH1

PWR_5V_LL1

PWR_5V_DRVL1

PWR_5V_VO1

PWR_5V_FB1

PWR_5V_EN1

PWR_5V_CS1

PWR_5V_VCLK

4 4

DCBATOUT

3 3

GAP-CLOSE-PWR-3-GP

2 2

PWR_DCBATOUT_3D3V

PG4504

1 2

GAP-CLOSE-PWR-3-GP

PG4501

1 2

GAP-CLOSE-PWR-3-GP

PG4507

1 2

GAP-CLOSE-PWR-3-GP

PG4511

1 2

GAP-CLOSE-PWR-3-GP

3D3V_PWR3D3V_S5

PG4514

12

PG4516

12

PG4518

12

PG4519

12

PG4524

12

PG4531

12

3V_5V_EN[36]

Design Cur rent=3.34 A

5.28A<OCP< 5.72AA

3D3V_PWR

PC4517

SCD1U10V2KX-5GPDYPC4517

SCD1U10V2KX-5GP

12

DY

PT4502

SE220U6D3VM-28-GP- U

PR4513

6K65R2F-GP

PR4517

10KR2F-2-GP

PC4507

SC10U25V5KX-GP

68.3R310.20A

2nd = 68.3R31B.1 0U

1 2

IND-3D3UH-57GP

PG4520

12

GAP-CLOSE-PWR-3-GP

3V_FEEDBACK

12

DY

12

DY

12

Close to V FB Pin (p in5)

0R2J-2-GP

PC4508

SCD1U25V2KX-GP

12

PL4503

PR4509

2D2R5F-2-GP

PC4519

SC330P50V3KX-GP

PR4514

PR4514 0R2J-2-GP

0R2J-2-GP

PC4521

PC4521 SC18P50V2JN-1-GP

SC18P50V2JN-1-GP

3V_5V_POK[17]

PR4506

DY

PC4509

PR4508

1 2

1D5R3F-GP

DCBATOUT

GAP-CLOSE-PWR-3-GP

PWR_5V_VBST1_1

12

PR4512

PR4512 143KR2F-GP

143KR2F-GP

PWR_DCBATOUT_5V

PG4502

12

PG4503

12

PG4505

12

PG4506

12

PG4508

12

PG4510

12

84.00412.03 7

SIS412DN-T1-GE3-GP

PC4516

12

SCD1U25V3KX-GP

PU4503

678

DDD

GD

4 5

G

567

DDD

G

4

SC1KP50V2KX-1GP

3rd = 75.00054.M7D

SCD1U25V3KX-GP

PWR_DCBATOUT_5V

PC4512

12

D

SSS

123

S

D

8

D

PU4505

SIS780DN-T1-GE3-G P

DY

SSS

123

SG

DY

SC18P50V2JN-1-GP

PC4525

75.00054.B7D

2nd = 75.00054.C7D

PC4527

PC4513

SC10U25V5KX-GP

12

IND-2D2UH-46-GP-U

12

PR4510

PR4510 2D2R5F-2-GP

2D2R5F-2-GP

PWR_5V_SNUB

12

PC4520

PC4520 SC560P50V-GP

SC560P50V-GP

0R2J-2-GP

PC4526

SCD1U25V3KX-GP

12

DY

BAT54S-7-F-GP

5V_PWR 15V_S5

12

DY

SCD1U25V3KX-GP

PC4514

SC10U25V5KX-GP

12

PL4502

1 2

PR4515

PC4522

PD4503

SCD1U25V2KX-GP

12

DY

PWR_5V_FB1_RPWR_3D3V_FB2_R

12

DY

12

DY

BST15V_1

3

DY

1

2

BOOST_10V

12

DY

SC1U25V3KX-1-GP

PC4534

SC1U25V3KX-1-GP

Design Cur rent=8.48 A

13.33A<OCP <15.76A

PG4521

GAP-CLOSE-PWR-3-GP

12

PR4516

PR4516 15KR2F-GP

15KR2F-GP

X01 change PR4120 to 9.76K to solve 5V

12

voltage fall issue while on heavy lo ading

PR4518

PR4518 9K76R2F-1-GP

9K76R2F-1-GP

1

PC4533

12

DY

PC4518

12

PC4532

PC4532 SCD1U25V3KX-GP

SCD1U25V3KX-GP

BST15V_2

3

PD4502

PD4502 BAT54S-7-F-GP

BAT54S-7-F-GP

75.00054.B7D

2nd = 75.00054.C7D

3rd = 75.00054.M7D

2

15V_PWR

12

DY

5V_PWR

SCD1U10V2KX-5GPDYPC4518

SCD1U10V2KX-5GP

A00 0618A00 0618

12

PT4501

PG4530

GAP-CLOSE-PWR-3-GP

PD4501

BZT52C15S-GP

DY

A K

5V_PWR

GAP-CLOSE-PWR-3-GP

SE220U6D3VM-28-GP- U

GAP-CLOSE-PWR-3-GP

12

PG4512

PG4513

PG4515

PG4517

PG4522

PG4523

PG4525

PG4526

PG4527

PG4528

Close to V FB Pin (p in2)

5V_S5

12

1 1

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

A

B

C

D

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan, R.O.C.

3V/5V TPS51225

E

X02

45 101Friday, June 28, 2013

X02

5

SSID = CPU.Regulator

4

PWR _VCC_VREF

3

2

1

12

PR4603

12

PR4602

16

VBAT

DROOP

25

SCD33U6D3V2KX-1-GP

PR4602

NTC-100 K-10-GP

PC4602

1 2

SC4700 P50V2KX-1GP

1 2

PR4610

422KR3 F-GP

PWR_VCC_THERM

PWR_VCC_IMON

PWR_VCC_OCP-1

11

13

14

15

26

12

IMON

OCP-I

SLEWA

THERM

VREF

GND

COMP

V5A

27

29

30

28

PWR_VCC_V5A

PC4606

PR4624 10R3J-3-GPPR46 24 1 0R3J-3-GP

PC4607

SC10U6D3V2MX-GP-U

PC4607

SC10U6D3V2MX-GP-U

12

1 2

PR4609

PR4609 56KR2F -GP

56KR2F -GP

PWR _VCC_B-RAMP

PWR _VCC_F-Imax

PWR _VCC_O-USR

9

10

O-USR

F-IMAX

B-RAMP

VR_ON

SKIP#

PWM1

PWM2

MODE

PGOOD

VDD

VDIO

ALERT#

GND

VR_HOT#

VCLK

32

33

31

1 2

8

7

6

5

4

3

2

1

D D

PR4606 15 KR2F-GPPR4606 1 5KR2F-GP

1 2

PC4603

1 2

SC1KP5 0V2KX-1GP

PR4611 75R2F-2-GP

1 2

DY

PR4612

PWR _VCC_SLEW A

1 2

39KR2F -GP

PR4613

DCBATO UT

C C

PWR _VCC_CSP1[47]

PWR _VCC_CSN1[47]

3D3V_S 5

PR4616

VSS_SE NSE[9]

VCC_SE NSE[7]

B B

1 2

0R0402 -PAD-2-GP

0R0402 -PAD-2-GP PR4617

PR4617

1 2

0R0402 -PAD-2-GP

PR4627

1 2

5K76R2 F-2-GP

PC4604

PC4604 SC470P 50V2JN-GP

SC470P 50V2JN-GP

PR4613

10R3J-3 -GP

PWR _VCC_GFB

PWR _VCC_VFB

PWR _VCC_DROOP

12

DY

1 2

PR4619

PR4619 10KR2F -2-GP

10KR2F -2-GP

PC4608

1 2

SC1500 P50V2KX-2GP

PWR _VCC_VBAT

1 2

TPS516 22RSMR-1-GP

PR4620

1 2

3KR2F-G P

PU4601

17

CSP1

18

CSN1

19

CSN2

20

CSP2

21

NC#21

22

NC#22

23

GFB

24

VFB

PWR _VCC_COMP

PWR _VCC_VREF

DY

12

IMVP_VRO N

NC#4

PR4626

PR4626 0R2J-2-G P

0R2J-2-G P

PWR _PG

PR4625

PR4625 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

PWR _VCC_VDD

PC4601

12

5V_S5

PR4603 75R2F-2 -GP

75R2F-2 -GP

PR4601

PR4601 150KR2 F-L-GP

150KR2 F-L-GP

PR4615

PR4615 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

1 2

PR4618 10R3J-3-GPPR46 18 1 0R3J-3-GP

SC1U6D3V2KX-GP

1 2

DY

1 2

12

PR4604

PR4604 1MR2F-G P

1MR2F-G P

12

PR4607

PR4607 150KR2 F-L-GP

150KR2 F-L-GP

H_CPU_ SVIDDAT [7]

VR_SVID_ ALERT# [7 ]

H_CPU_ SVIDCLK [7]

H_PROC HOT# [4,24,4 2,44]

12

PR4605

PR4605 8K87R2 F-2-GP

8K87R2 F-2-GP

12

PR4608

PR4608 150KR2 F-L-GP

150KR2 F-L-GP

H_VR_E NABLE [7]

PWR _VCC_SKIP# [47]

PWR _VCC_PW M1 [47]

IMVP_PW RGD [7,24]

3D3V_S 5

Fsw

OCP

IMON

Load line

IMVP_PW RGD

H_CPU_ SVIDDAT

H_CPU_ SVIDCLK

VR_SVID_ ALERT#

28W 15W

392K

PR4604

75K

PR4607

150k

PR4609

680K

PR4610

2.8K

PR4620

PR4614 2KR2F-3-GPPR4614 2KR2F-3-GP

EC4602

SCD1U25V2KX-GP

12

DY

1M

150K

75K

422K

3K

3D3V_S 0

12

0117 Add EC4602

1D05S_ VCCST

PC4605SCD1U10 V2KX-5GP

12

DY

1 2

PR4621130R2F -1-GP PR4 621130R2F -1-GP

PR462254D9R2 F-L1-GP PR462254D9 R2F-L1-GP

PR4623130R2F -1-GP

DY

PWR_VCC_COMP_1

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

TPS51622_CPUCORE(1/2)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

46 10 1Friday, June 28, 2 013

of

46 10 1Friday, June 28, 2 013

of

46 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = CPU.Regulator

PWR _DCBATOUT_ VCCCORE1

PWR _DCBATOUT_ VCCCORE1DCBATO UT

PG4702

1 2

GAP-CLO SE-PWR-3-G P

D D

C C

B B

GAP-CLO SE-PWR-3-G P

VCC_CO RE

SC22U6D3V3MX-1-GP

PG4703

1 2

PG4704

1 2

PG4701

1 2

PG4705

1 2

PG4706

1 2

12

PC4729

12

PC4719

12

PC4714

DY

12

PC4731

PC4730

SC22U6D3V3MX-1-GP

12

PC4721

PC4720

SC22U6D3V3MX-1-GP

PC4727

DY

SC22U6D3V3MX-1-GP

12

PC4728

DY

12

PC4732

PC4733

SC22U6D3V5MX-2GP

SC22U6D3V3MX-1-GP

12

PC4722

PC4726

SC22U6D3V5MX-2GP

SC22U6D3V3MX-1-GP

12

PC4715

PC4739

DY

12

PC4702

SC10U25V5KX-GP

PWR _VCC_SKIP#[46]

PWR _VCC_PW M1[46]

12

PC4725

PC4710

PC4716

DY

12

PC4736

SC22U6D3V5MX-2GP

12

PC4711

SC22U6D3V3MX-1-GP

12

PC4741

PC4734

SC22U6D3V5MX-2GP

12

PC4709

SC22U6D3V3MX-1-GP

12

PC4740

DY

12

SC22U6D3V5MX-2GP

PC4703

SC10U25V5KX-GP

PC4737

SC22U6D3V5MX-2GP

PC4742

DY

PC4724

12

PC4704

SC10U25V5KX-GP

12

PR4702

PR4702 0R0402 -PAD-2-GP

0R0402 -PAD-2-GP

12

PC4738

SC22U6D3V5MX-2GP

12

PC4735

DY

SC22U6D3V5MX-2GP

12

PC4743

DY

12

DY

PC4708

PC4708 SC1000 P100V3KX-GP

SC1000 P100V3KX-GP

1 2

12

EC4701

SCD1U50V3KX-GP

DY

PWR _DCBATOUT_ VCCCORE1

PWR _VCC_SKIP#1

A00 0621

0318 Add EC4702, need close to PC4741

SCD1U10V2KX-4GP

12

EC4702

For acoustic noice

PT4702

SE68U25VM-7-GP-U

PU4701

PU4701 CSD973 74Q4M-GP-U1

CSD973 74Q4M-GP-U1

5

VIN

1

SKIP#

8

PWM

3

PGND

VDD

BOOT_R

BOOT

VSW

PGND

9

2

6

7

4

5V_S5

PC4705 SC2 D2U10V3KX-1 GPPC4705 SC2D2U 10V3KX-1GP

1 2

PWR _VCC_BOOTR 1

PWR _VCC_BOOT1

1 2

PR4703 2D2R3F-L -GPPR4703 2D2R3F-L -GP

PWR _VCC_VSW 1

12

PR4701

PR4701 2D2R5F -2-GP

2D2R5F -2-GP

VCC_VS W1_R

12

PC4701

PC4701 SC820P 50V2KX-1GP

SC820P 50V2KX-1GP

PC4706

VCC_BO OTR1_R

PC4706

1

2

SCD22U 25V3KX-GP

PL4701 IND-D 22UH-9-GP-UPL4701 IND-D 22UH-9-GP-U

1 2

GAP-CLOSE-PWR-3-GP

PG4707

1 2

VCC_VSW1_GP

12

PR4704

PR4704 2K21R2 F-GP

2K21R2 F-GP

1 2

PR4706

2K94R2 F-GP

1 2

VCC_CS N1_R

1 2

PR4705

29K4R2 F-GP

PC4707

SCD15U 10V3KX-4-GP

PR4707

1 2

NTC-10K -26-GP

VCC_CO RE

A00 0621

GAP-CLOSE-PWR-3-GP

PG4708

1 2

12

PT4701

DY

SE330U 2D5VM-14-GP

79.3371V.6CL

28W 15W

DCR sensing

PWR _VCC_CSN1 [46]

PWR _VCC_CSP1 [46]

PR4704

PR4706

PR4705

2.21K

2.94K

60.4K

2.21K

2.94K

29.4K

SC22U6D3V5MX-2GP

28W CPU need stuff PC4743, PC4728, PC4739, PC4724, PC4735, PC4738

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

TPS51622_CPUCORE(2/2)

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

47 10 1Friday, June 28, 2 013

of

47 10 1Friday, June 28, 2 013

of

47 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p05v

1D05V_ PWR

Mode

Fsw(KHz)

GND

D D

PM_SLP _S3#[17,24,36 ,49,51]

PR4801 0R0402-PA D-2-GPPR4801 0R 0402-PAD-2-G P

12

Refer Intel CRB to use SLP_S3# control

SCD1U1 0V2KX-4GP

PC4826

SCD22U6D3V2KX-1GP

PC4826

SCD22U6D3V2KX-1GP

12

C C

TRIP

GND

5V

B B

PWR _1D05_VRF_ L

12

PR4826

PR4826 95K3R2 F-GP

95K3R2 F-GP

PWR _1D05_REFIN_ 1

12

PR4833

PR4833 105KR2 F-1-GP

105KR2 F-1-GP

OCL(A)

8A

12A

PR4823

1 2

0R0402 -PAD-2-GP

PR4832

1 2

0R0402 -PAD-2-GP

PR4828

1 2

0R0402 -PAD-2-GP

Reserve PR4821 for OCP setting

5V_S5

DY

1 2

PR4821

PR4821 0R2J-2-G P

0R2J-2-G P

PWR _1D05_EN

12

PC4818

DY

PWR _1D05_VREF

PWR _1D05_REFIN

DY

SC10P5 0V2JN-4GP

5V_S5

PWR _1D05V_GSN S

PWR _1D05V_VSN S

PWR _1D05_SLEW

PWR _1D05_TRIP

PC4819

12

1 2

PC4821 S C10P50V2JN -4GP

1 2

PC4833

1 2

PC4834 SC2700P 50V2KX-1-GPPC4834 SC2700P50V 2KX-1-GP

Pin19 direct connect to thermal pad

PU4801

28

EN

27

NU#27

26

VREF

25

REFIN

24

REFIN2

23

GSNS

22

VSNS

21

SLEW

20

TRIP

19

GND

18

V5

17

VIN

TPS513 63RVER-GP

16

SC2D2U10V3KX-1GP

VIN

15

VIN

PGOOD

NU#2

MODE

NC#4

BST

SW#6

SW#7

SW#8

SW#9

PGND

GND

29

PWR _1D05_PGOO D

1

PWR _1D05_LP#

2

PWR _1D05_MODE

3

4

PWR _1D05_BOOT

5

6

7

8

9

10

11

12

13

14

PR4834 0R0402-PA D-2-GPPR4834 0R 0402-PAD-2-G P

PR4835 10KR2F-2-G P

1 2

DY

PR4819 10KR2F-2-G P

1 2

DY

PR4824 0R 2J-2-GP

PR4830

PR4830 5D1R3F -GP

5D1R3F -GP

1 2

PWR _1D05_SW

PR4825

2D2R5F -2-GP

PC4820

SC330P 50V3KX-GP

1 2

12

DY

PWR _1D05_RC

12

SCD1U2 5V3KX-GP

SCD1U2 5V3KX-GP PC4823

PC4823

12

DY

PWR_1D05_SUNB

12

DY

400KHz

Float

800KHz

PCH_SL P_S0# [17]

Panasonic ETQP3W1R0WFN 7 x 7 x 3 . Isat : 13 A , DCR 6.9+-15%mOhm

PL4801

1 2

COIL-1UH-6 1-GP

PWR _1D05V_VSN S

PWR_1D 05V_GSNS

1D05V_ VTT_PWR GD [7,36]

GAP-CLOSE-PWR-3-GP

12

PG4820

PG4821

12

GAP-CLOSE-PWR-3-GP

12

PC4829

SC22U6D3V5MX-2GP

12

PC4822

SC22U6D3V5MX-2GP

GAP-CLO SE-PWR-3-G P

12

PC4831

SC22U6D3V5MX-2GP

1D05V_ S0

PG4802

1 2

PG4803

1 2

PG4804

1 2

PG4805

1 2

PG4806

1 2

PG4807

1 2

PG4808

1 2

Design Current = 6.1A

9.57A<OCP<11.31A

12

DY

PC4830

SC22U6D3V5MX-2GP

PC4825

SC22U6D3V5MX-2GP

DY

12

PC4832

1D05V_ PWR

12

SC22U6D3V5MX-2GP

PC4828

SCD1U10V2KX-5GP

+PW R_SRC_1D05 VDCBATO UT

PG4813

1 2

GAP-CLO SE-PWR-3-G P

PG4812

1 2

GAP-CLO SE-PWR-3-G P

PG4814

1 2

GAP-CLO SE-PWR-3-G P

PG4815

1 2

GAP-CLO SE-PWR-3-G P

A A

5

+PW R_SRC_1D05 V

PC4817

12

PC4835

PC4827

SC10U25V5KX-GP

12

I/P cap: CHIP CAP C 10U 25V K0805 X5R/ 78.10622.51L Inductor:CHIP CHOKE 1.0UH ETQP3W1R0WFN / Panasonic/ 6.9mOhm / Isat =13Arms/ 68.1R01D.20H O/P cap:CHIP CAP C 22U 6.3V M0805 X5R /78.22610.51L

4

PC4835

PC4824

SC10U25V5KX-GP

DY

SC10U25V5KX-GP

SCD1U25V2KX-GP

12

SCD1U25V2KX-GP

12

REFIN Voltage (V)

GND

FLOAT

Resistor Divider

Output Voltage (V)

1.05V

1.2V

Adjustable between 0.6V to 2.0 V

3

SC10U25V5KX-GP

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet

2

Date: Sheet

TPS51363 1D05V

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

of

48 10 1

of

48 10 1

of

48 10 1

1

X02

5

4

3

2

1

SSID = PWR.Plane.Regulator_1p35v0p675v

PR4907

PM_SLP _S4#[17,24 ]

D D

DDR_VT T_PG_CTRL[12]

PM_SLP _S3#[17,24,36,4 8,51]

1D35V_ VTT_PWR GD[36 ]

C C

12

PC4903

SCD1U10V2KX-4GP

B B

0117 Add EC4901

12

PR4903

PR4903 10KR2F -2-GP

10KR2F -2-GP

12

PC4902

12

SCD01U16V2KX-3GP

PR4906

29K4R2F-GP

1 2

0R0402 -PAD-2-GP

PR4909

1 2

0R0402 -PAD-2-GP

PR4910 0R2J-2-GP

1 2

EC4901

SCD1U25V2KX-GP

12

DY

0D675V _EN

PWR _1D35V_EN

PWR _1D35V_VRE F

PWR _1D35V_REF IN

PWR _1D35V_MOD E

PWR _1D35V_TRIP

12

200KR2F-L-GP

PR4902

68K1R2F-1-GP

PR4902

68K1R2F-1-GP

PWR _1D35V_VTT REF

12

PC4918

PC4918 SCD22U 10V2KX-1GP

SCD22U 10V2KX-1GP

PR4908

1 2

DY

PWR _1D35V_EN

12

PC4906

PC4906 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

DY

0D675V _EN

PU4901

20

PGOOD

17

VTTEN

16

EN/PSV

6

VREF

8

REFIN

19

MODE

18

TRIP

5

VTTREF

21

GND

7

GND

TPS512 16RUKR-GP

74.51216.073

+0D675 V_DDR_P 0D675V _S0

PGND

VDDQS

VTTIN

VTTGND

PG4901

1 2

GAP-CLO SE-PWR-3-G P

PG4902

1 2

GAP-CLO SE-PWR-3-G P

V5IN

VBST

DRVH

DRVL

VTT

VTTS

SW

12

PWR _1D35V_VBS T

15

PWR _1D35V_DRV H

14

PWR _1D35V_SW

13

PWR _1D35V_DRV L

11

10

PWR _1D35V_VDD QS

9

2

3

1

4

PWR _1D35V_VTT REF

5V_S5

PC4915

12

PC4901

SC1U10V2KX-1GP

PR4905

1 2

2D2R3-1 -U-GP

PC4916

SCD1U10V2KX-5GP

PC4919

PC4919 SCD1U2 5V3KX-GP

SCD1U2 5V3KX-GP

PR4605_2

1 2

+0D675 V_DDR_P

12

DY

PC4917

SC10U6D3V5KX-1GP

A00 0618

PR4911

1 2

0R0603 -PAD-2-GP-U

SC10U6D3V5KX-1GP

0D675V _VTTREF

+PW R_SRC_1D35 V

12

PC4911

SC10U25V5KX-GP

1 2

12

PC4912

SC10U25V5KX-GP

PC4909

SIR172ADP-T1-GE3-GP

567

8

DDD

D

DDD

D

PU4902

G

4

SSS

123

567

8

DDD

D

DDD

D

PU4903

G

4

SSS

123

1D35V_ PWR

PC4904

SC1U6D3V2KX-GP

PC4904

SC1U6D3V2KX-GP

12

SIRA12DP-T1-GE3-GP

SC10U25V5KX-GP

PL4902

IND-D68UH -51-GP-U

12

PR4912

DY

2D2R5F -2-GP

TPS512 16_PHS_SET

12

DY

PC4922

PC4922 SC330P 50V2KX-3GP

SC330P 50V2KX-3GP

12

PC4913

SCD1U25V2KX-GP

1 2

PWR_1D35V_VDDQS

DCBATO UT

PC4914

SC4D7U25V5KX-GP

12

PC4920

PG4907

GAP-CLOSE-PWR-3-GP

PC4920

+PW R_SRC_1D35 V

PG4903

1 2

GAP-CLO SE-PWR-3-G P

PG4904

1 2

GAP-CLO SE-PWR-3-G P

PG4905

1 2

GAP-CLO SE-PWR-3-G P

PG4906

1 2

GAP-CLO SE-PWR-3-G P

PG4921

1 2

GAP-CLO SE-PWR-3-G P

PG4920

1 2

GAP-CLO SE-PWR-3-G P

Design Current=13.52A

21.25A<OCP>25.11A

1D35V_ PWR

A00 0621

PT4903

12

PC4921

SCD1U10V2KX-5GP

SC4D7U6D3V5KX-3GP

79.3371V.6CL

1D35V_ PWR 1D35V_S3

PG4908

1 2

GAP-CLO SE-PWR-3-G P

PG4909

1 2

GAP-CLO SE-PWR-3-G P

PG4910

1 2

GAP-CLO SE-PWR-3-G P

PG4911

1 2

GAP-CLO SE-PWR-3-G P

PG4912

1 2

GAP-CLO SE-PWR-3-G P

PG4913

1 2

GAP-CLO SE-PWR-3-G P

PG4914

1 2

GAP-CLO SE-PWR-3-G P

PG4915

1 2

GAP-CLO SE-PWR-3-G P

PG4916

1 2

GAP-CLO SE-PWR-3-G P

PG4917

SE330U2D5VM-14-GP

12

DY

EC4601

SCD1U50V3KX-GP

1 2

GAP-CLO SE-PWR-3-G P

PG4919

1 2

GAP-CLO SE-PWR-3-G P

PG4918

1 2

GAP-CLO SE-PWR-3-G P

PG4922

1 2

GAP-CLO SE-PWR-3-G P

PG4923

1 2

GAP-CLO SE-PWR-3-G P

State S3 S5 VDDR VTTREF VTT

S0

S3

S4/S5

MODE

A A

PR4608

200k ohm

100k ohm

68k ohm

47k ohm

Hi

Lo

HiLoOn

Hi

On

Lo

Frequency

400kHz

300kHz

400kHz

5

On

OffOff

On

Off(Hi-Z)

Off

Discharge Mode

Tracking Discharge

Non-tracking Discharge

I/P cap: 10U 25V K0805 X5R/ 78.10622.51L Inductor: CHIP CHOKE 1.0UH PCMB104T-1R0M/ 3.3mohm/ Isat =28A rms /68.1R01C.10Q O/P cap: CHIP CAP POL 330U 2.5V M 6.3*4.5 2.3Arms Matsuti/77.53371.18L H/S: SIR172ADP-T1-GE3 / 8.5mohm/10.5mOhm@4.5Vgs/ 84.00172.A37 L/S: SIRA12DP-T1-GE3 / 4.4mohm/6mOhm@4.5Vgs/ 84.SRA12.037

4

3

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

2

Date: Sheet

TPS51216_+1.35V_SUS

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

49 10 1

of

49 10 1

of

49 10 1

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet

Date: Sheet of

(Reserved)TPS51312 1D8V

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

50 10 1

of

50 10 1

of

50 10 1

1

X02

5

SSID = PWR.Plane.Regulator_1p5v

4

3

2

1

D D

3D3V_S 5

TLV70215DBVR for 1D5V_S0

PC5103

SC1U6D3V2KX-GP

PC5103

SC1U6D3V2KX-GP

12

Design Current = 15mA

PU5101

1

IN

OUT

2

PWR _1D5V_EN

C C

PR5108

PM_SLP _S3#[17,24,36 ,48,49]

12

0R0402 -PAD-2-GP

GND EN3NC#4

TLV702 15DBVR-GP

PWR _1D5V_EN

12

PC5101

PC5101 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

DY

1D5V_P WR 1D5V _S0

5

4

12

PC5104

SC1U6D3V2KX-GP

PC5104

SC1U6D3V2KX-GP

1 2

GAP-CLO SE-PWR

PG5101

0108 Reserve PC5101

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

RT9198-15PU5R_1D5V

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

51 10 1

of

51 10 1

of

51 10 1

1

X02

5

SSID = VIDEO

12

C5201

SCD1U10V2KX-5GP

LVDS_DATA2#_R [53]

LVDS_DATA2_R [53]

LVDS_CLK#_R [53]

LVDS_CLK_R [53]

LCDVDD

12

C5203

EC5201

SC4D7U6D3V3KX-GP

DY

DBC_EN [20]

COLOR_ENGINE [20]

SCD1U25V2KX-GP

LCD_TST_C LCD_BRIGHTNESS BLON_OUT_C

LCD1

31

1

2 3 4

EDP_HP/LVDS_3D3V_ROM

5

LCD_TST_C

6

EDP_AUX/LVDS_DDC_CLK

32

STAR-CON30-4-GP

7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30

A00 0618

CH751H-40PT-GP

83.R0304.A8F

EDP_AUX#/LVDS_DDC_DAT

EDP_TX0/LVDS_DATA0# EDP_TX0/LVDS_DATA0

EDP_TX1/LVDS_DATA1# EDP_TX1/LVDS_DATA1

LVDS_DATA2#_R LVDS_DATA2_R

LVDS_CLK#_R LVDS_CLK_R

DBC_EN_R LCD_BRIGHTNESS BLON_OUT_C COLOR_ENGINE_CONN

0R0402-PAD-2-GP

R5222

1 2

D5202

21

A00 0618

0R0402-PAD-2-GP

R5224

1 2

DY

R5228

DCBATOUT_LCD

R5228 0R2J-2-GP

0R2J-2-GP

LVDS / EDP Colay Page 53 PL Page 53.

eDP_BKLT_CTRL [53]

EC_BRIGHTNESS [24]

EC (BIST MODE)

D D

C C

BKLT_CTRL

4

eDP eDPLVDS LVDS

1

LCDVDD

2

LCDVDD

3

LCDVDD

4

LCDVDD

EDP_HP 3D3V_ROM

5

LCD_TST_C

6

EDP_AUX LV DS_DDC_CLK

7

8

EDP_AUX# L VDS_DDC_DAT

9

GND GND

10

EDP_TX0N L VDS_DATA0#

11

EDP_TX0P L VDS_DATA0

12

GND GND

13

EDP_TX1N L VDS_DATA1#

14

EDP_TX1P L VDS_DATA1

15

GND GND

1 2 3 4 5

SRN100J-4-GP

RN5201

LCDVDD LCDVDD

LCDVDD

LCD_TST_C

8

BKLT_CTRL

7 6

16 17

18

1920NC

21 22

23

24

25

26 27

28

29

30

LCD_TST [24]

BLON_OUT [24]

NC NC LVDS_DATA2

GND

GND GND

GND

DBC_EN DBC_EN

BRIGHTNESS BRIGHTNESS

BLON_OUT BLON_OUT

Color_Engi ne Color_E ngine

NC

DCBATOUT_L CD

BKLT_CTRL BLON_OUT_C EDP_HPD

3

LVDS_DATA2#

GND

LVDS_CLK#_R

LVDS_CLK_RNC

GND GND

GND

NC

DCBATOUT_L CD

RN5204

1 2 3 4 5

SRN100KJ-5-GP

2

1

X02 change CAM1 connector

CAM1

15

1

2 3 4 5 6 7 8 9 10 11 12 13 14

16

ACES-CON14-9-GP

Camera Power

303mA

3D3V_S0

R5214 0R3J-0-U-GPR5214 0R3J-0-U-GP

1 2

F5204

1 2

DY

POLYSW-D5A6V-1-GP

69.50007.921

8 7 6

USB_CAMERA USB_CAMERA#

DMIC_CLK_C

USB_PN6_TPNL USB_PP6_TPNL

EL5201

1 2

BLM15AG221SN-GP

68.00094.991

TOUCH_PANEL_INTR# [24]

USB_CAMERA USB_CAMERA# DMIC_CLK DMIC_DATA 3D3V_CAMERA_S0

CAMERA

3D3V_CAMERA_S0

EC5202

SC1U6D3V2KX-GPDYEC5202

SC1U6D3V2KX-GP

C5207

SC10U6D3V3MX-GP

C5207

SC10U6D3V3MX-GP

12

DY

3D3V_CAMERA_S0

DMIC_CLK [27]

DMIC_DATA [27]

TPAN_VDD

1 1 1 1 1

SC10P50V2JN-4GP

AFTP5202AFTP5202 AFTP5203AFTP5203 AFTP5204AFTP5204 AFTP5205AFTP5205 AFTP5206AFTP5206

DY

EC5206

USB_CAMERA#

USB_CAMERA

DY

12

SC10P50V2JN-4GP

SC10P50V2JN-4GP EC5205

EC5205

need close to connector

A00 0618

0R0603-PAD-2-GP-U

R5225

12

R5221

0R0603-PAD-2-GP-U

USB_PN4 [16]

USB_PP4 [16]

eDP/ LVDS select circuit

eDP

C5215 SCD1U10V2KX-5GP

EDP_TX0_DN_CON_L[53] EDP_TX0_DP_CON_L[53]

LVDSA_DATA0#[53] LVDSA_DATA0[53]

EDP_TX1_DN_CON_L[53] EDP_TX1_DP_CON_L[53]

LVDSA_DATA1#[53] LVDSA_DATA1[53]

B B

EDP_AUX_DN_CON_L[53] EDP_AUX_DP_CON_L[53]

LVDS_DDC_DATA_R[53] LVDS_DDC_CLK_R[53]

1 2

C5216 SCD1U10V2KX-5GP

1 2

eDP

2 3

LVDS

1

eDP

1 2 1 2

eDP

2 3

LVDS

1

eDP

1 2 1 2

eDP

1 2 3

LVDS

4

RN5206 SRN0J-6-GP

C5218 SCD1U10V2KX-5GP

C5218 SCD1U10V2KX-5GP C5217 SCD1U10V2KX-5GP

C5217 SCD1U10V2KX-5GP

RN5207 SRN0J-6-GP

C5219 SCD1U10V2KX-5GP

C5219 SCD1U10V2KX-5GP C5220 SCD1U10V2KX-5GP

C5220 SCD1U10V2KX-5GP

RN5208 SRN0J-6-GP

Touch panel

X02 remove TPNL1

A A

EC5204

TPAN_VDD USB_PN6_TPNL USB_PP6_TPNL TOUCH_PANEL_INTR#

AFTP5210AFTP5210

1

AFTP5208AFTP5208

1

AFTP5209AFTP5209

1

AFTP5207AFTP5207

1

5

EC5204

SC10P50V2JN-4GP

EDP_TX0/LVDS_DATA0# EDP_TX0/LVDS_DATA0

EDP_TX1/LVDS_DATA1# EDP_TX1/LVDS_DATA1

EDP_AUX#/LVDS_DDC_DAT EDP_AUX/LVDS_DDC_CLK

USB_PN6_TPNL

USB_PP6_TPNL

12

DY

EC5203

SC10P50V2JN-4GP

need close to connector

INVERTER POWER

3D3V_S0

R5201 0R3J-0-U-GP

F5202 FUSE-2A32V-16-GP

A00 0618

0R0603-PAD-2-GP-U

R5223

12

A00 0618

12

R5220

0R0603-PAD-2-GP-U

A00 0618

4

POLYSW-1D1A24V-GP-U

69.50007.A31

2nd = 69.50007.D31

3rd = 69.50007.A41

1 2

LVDS

1 2

DY

EDP_HPD[15,53]

F5201

1 2

R5203 100R2J-2-GP

eDP

0307 modify

USB_PN6 [16]

USB_PP6 [16]

800mA

C5205

SCD1U50V3KX-GP

12

DCBATOUT_LCDDCBAT OUT

12

DY

1 2

EDP_HP/LVDS_3D3V_ROM

0R3J-0-U-GP

0R3J-0-U-GP R5229

R5229

1 2

F5203

1 2

DY

POLYSW-D5A6V-1-GP

69.50007.921

C5202

3

SC1KP50V2KX-1GP

TPAN_VDD5V_S0

LCDVDD

EDP_VDD_EN[15]

LVDS_VDD_EN[53]

LCD_TST_EN[ 24]

R5207

1 2

eDP

0R2J-2-GP

R5208

1 2

DY

0R2J-2-GP

Layout Note:

Trace width = 80mil

LCDPWR_EN

2

D5201

1

eDP

2

BAT54CPT-2-GP

75.00054.K7D

LVDS_VDD_EN

LCD Power

3

12

R5209

eDP

100KR2J-1-GP

R5211

1 2

0R3J-0-U-GP

2136_LCDVDD

R5212

1 2

0R3J-0-U-GP

2136_LCDVDD

EN_LCDPWR

600mA

U5201

LCDVDD

Layout Note:

Trace width = 80mil

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Friday, June 28, 2013

Date: Sheet of

U5201

1

EN

2

GND

3

VOUT

RT9724GB-GP

74.09724.09F

LCDVDD

2136_LCDVDD

LCD Connector

Hadley 15"

5

VIN#5

eDP

4

VIN#4

12

R5202

100KR2J-1-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

1

3D3V_S0

12

C5204

C5204 SC4D7U6D3V3KX-GP

SC4D7U6D3V3KX-GP

eDP

52 101

X02

5

4

3

2

1

SSID = VIDEO

LVDS & EDP Colay

LVDS

LVDS LVDS

LVDS

C5209 SCD1U10V2KX-5GP

EDP_TX1_DN[8]

EDP_TX1_DP[8]

D D

EDP_TX0_DN[8]

EDP_TX0_DP[8]

EDP_AUX_DN[8] EDP_AUX_DP[8]

Brightness

L_BKLT_CTRL[15]

EDP_HPD[15,52]

3D3V_S0

12

C5312

LVDS

3D3V_S0

12

LVDS

C5317

SCD1U10V2KX-5GP

SWR_LX

RN5301

1 2 3

LVDS

4 5

SRN4K7J-10-GP

CIICSDA1

CIICSCL1

L5301

1 2

LVDS

MPZ1608S600AT-GP

68.00212.011

SCD1U10V2KX-5GP

L5302

LVDS

1 2

MPZ1608S600AT-GP

68.00212.011

L5303

IND-4D7UH-300-GP

1 2

2136_SW

A00 0618

0R0603-PAD-2-GP-U

R5314

1 2

LVDS_DDC_DATA_R

8

LVDS_DDC_CLK_R

7 6

5

LVDS

C C

B B

A A

DP_AVCC33

C5301

SC10U6D3V3MX-GP

C5301

SC10U6D3V3MX-GP

12

LVDS

DY

DP_DVCC33

C5302

SC10U6D3V3MX-GPDYC5302

SC10U6D3V3MX-GP

12

DY

SWR_V12

C5305

SC10U6D3V3MX-GP

C5305

SC10U6D3V3MX-GP

12

C5306

LVDS

3D3V_S0

Q5301

1

LVDS

2

3 4

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

C5303

SCD1U10V2KX-5GP

C5313

SCD1U10V2KX-5GP

6

5

CIICSDA

CIICSCL

1 2 3

SRN0J-6-GP

1 2 3

SRN0J-6-GP

1 2

C5210 SCD1U10V2KX-5GP

1 2

2 3

eDP

1

LVDS

LVDS LVDS

LVDS

1 2 1 2

2 3

eDP

1

1 2 1 2

1 2 3

eDP

1 2

LVDS

1 2

eDP

R5302

1KR2J-1-GP

1 2

LVDS

4

EDP_AUX_DN_RTS2136 EDP_AUX_DP_RTS2136

EDP_TX0_DP_RTS2136 EDP_TX0_DN_RTS2136 EDP_TX1_DP_RTS2136 EDP_TX1_DN_RTS2136

RN5303 SRN0J-6-GP

C5211 SCD1U10V2KX-5GP

C5211 SCD1U10V2KX-5GP C5212 SCD1U10V2KX-5GP

C5212 SCD1U10V2KX-5GP

RN5302 SRN0J-6-GP

LVDS

LVDS LVDS

LVDS

C5213 SCD1U10V2KX-5GP

C5213 SCD1U10V2KX-5GP C5214 SCD1U10V2KX-5GP

C5214 SCD1U10V2KX-5GP

RN5304 SRN0J-6-GP

R5319 0R2J-2-GP

R5320 0R2J-2-GP

Close to P IN5

12

LVDS

RN5307

4

DY

RN5305

4

LVDS

4

Layout Note:

Place near U530 1

EDP_TX1_DN_RTS2136 EDP_TX1_DP_RTS2136

EDP_TX1_DN_CON_L EDP_TX1_DP_CON_L

EDP_TX0_DN_RTS2136 EDP_TX0_DP_RTS2136

EDP_TX0_DN_CON_L EDP_TX0_DP_CON_L

EDP_AUX_DN_RTS2136 EDP_AUX_DP_RTS2136

EDP_AUX_DN_CON_L EDP_AUX_DP_CON_L

2136_PWM_IN

eDP_BKLT_CTRL

EDP_HPD_RTS2136

X02 change to 4P2R

RN5306

1

4

2 3

LVDS

SRN100KJ-6-GP

DP_AVCC33

C5316

SCD1U10V2KX-5GP

SML0_DATA [18] SML0_CLK [18]

BAT_SDA [24,43,44] BAT_SCL [24,43,44]

EDP_AUX_DN_CON_L [52] EDP_AUX_DP_CON_L [52]

LVDS_R2136_BKLT_EN[24]

LVDS_DDC_DATA_R[52] LVDS_DDC_CLK_R[52]

TEST_MODE 2136_PWM_IN

C5310

SCD1U10V2KX-5GP

12

LVDS

PCH PCH

KBC KBC

EDP_TX1_DN_CON_L [52] EDP_TX1_DP_CON_L [52]

EDP_TX0_DN_CON_L [52] EDP_TX0_DP_CON_L [52]

EDP_HPD_RTS2136 TEST_MODE

DP_AVCC33

SWR_V12 DP_REXT

12

R5301

R5301 12KR2F-L-GP

12KR2F-L-GP

eDP_BKLT_CTRL[52] LVDS_VDD_EN[52]

2136_PWM_IN

eDP_BKLT_CTRL [52]

LVDS_DDC_DATA_R LVDS_DDC_CLK_R EEPROM_SDA0 EEPROM_SCL0

49

U5301

GND

1

HPD

2

TEST

3

AUX_N

4

AUX_P

5

DP_V33

6

DP_GND

7

LANE0_P

8

LANE0_N

9

LANE1_P

10

LANE1_N

11

DP_V12

12

DP_REXT

CIICSCL1 CIICSDA1

DP_DVCC33

LVDS

3

SWR_V12

1 2

43

44

48

CIICSCL13CIICSDA14SWR_VCCK15SWR_GND16SWR_LX17SWR_VDD18PWM_OUT19PANEL_VCC20PWM_IN21PVCC22TXE3+23TXE3-

12

46

MIICSCL

MODE_CFG047MODE_CFG1

LVDS

SWR_V12

C5308

SCD1U10V2KX-5GP

45

MIICSDA

SWR_LX

LVDS

40

42

41

VCCK

TXO1-

TXO0-

BL_EN

TXO0+

12

C5307

SC10U6D3V3MX-GP

SCD1U10V2KX-5GP

C5311

DY

38

37

39

TXO2-

TXO2+

TXO1+

TXOC-

TXOC+

TXO3-

TXO3+

TXE0-

TXE0+

TXE1-

TXE1+

TXE2TXE2+ TXEC-

TXEC+

RTD2136R-CGT-GP

24

71.02136.B03

DP_DVCC33

12

C5309

LVDS

SCD1U10V2KX-5GP

Close to P IN13

36 35 34 33 32 31 30 29 28 27 26 25

LVDSA_DATA0# [52] LVDSA_DATA0 [52] LVDSA_DATA1# [52] LVDSA_DATA1 [52] LVDS_DATA2#_R [52] LVDS_DATA2_R [52]

LVDS_CLK#_R [52] LVDS_CLK_R [52]

2

PIN48

3D3V_S0

R5306

R5317

12

4K7R2J-2-GP

DY

12

R5307

R5318

4K7R2J-2-GP

LVDS

DY

EEPROM_SCL0 EEPROM_SDA0

LVDS

Operation Mode Table

PIN47

0

1

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Date: Sheet of

Date: Sheet

X

ROM EEPOOM

LVDS_Switch

Hadley 15"

Friday, June 28, 2013

Hadley 15"

1

EP Mode

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

53 101

1

X02

of

5

SSID = VIDEO

5V_S0

F5401

D D

C C

B B

1 2

POLYSW -1D1A8V-5-GP

5V_HDM I_S0

HDMI_CLK #[8 ] HDMI_CLK[8]

HDMI_DAT A0#[8] HDMI_DAT A0[8]

HDMI_DAT A1#[8] HDMI_DAT A1[8]

HDMI_DAT A2#[8] HDMI_DAT A2[8]

U5401

G

S

2N7002 K-2-GP

84.2N702.J31

C5401 SCD1U 10V2KX-5GPC5401 SCD1U 10V2KX-5GP

1 2

C5402 SCD1U 10V2KX-5GPC5402 SCD1U 10V2KX-5GP

1 2

C5403 SCD1U 10V2KX-5GPC5403 SCD1U 10V2KX-5GP

1 2

C5404 SCD1U 10V2KX-5GPC5404 SCD1U 10V2KX-5GP

1 2

C5405 SCD1U 10V2KX-5GPC5405 SCD1U 10V2KX-5GP

1 2

C5406 SCD1U 10V2KX-5GPC5406 SCD1U 10V2KX-5GP

1 2

C5407 SCD1U 10V2KX-5GPC5407 SCD1U 10V2KX-5GP

1 2

C5408 SCD1U 10V2KX-5GPC5408 SCD1U 10V2KX-5GP

1 2

PCH_HD MI_CLK[1 5]

PCH_HD MI_DATA[15]

HDMI_PLL _GND

D

SRN470 J-5-GP

3D3V_S 0

5

6

Q5401

Q5401 2N7002 KDW-GP

2N7002 KDW-GP

84.2N702.A3F

RN5402

34

2

1

4

0307 change RN5401 RN5402 form 680 ohm to 470 ohm

123

45

123

45

RN5401

RN5401 SRN470 J-5-GP

SRN470 J-5-GP

678

5V_HDM I_S0

3

2

D5102_2

4

RN5203

RN5203 SRN2K2 J-1-GP

SRN2K2 J-1-GP

1

2 3

DDC_CL K_HDMI

DDC_DA TA_HDMI

678

HDMI_CLK _R_C# HDMI_CLK _R_C

HDMI_DAT A0_R_C# HDMI_DAT A0_R_C

HDMI_DAT A1_R_C# HDMI_DAT A1_R_C

HDMI_DAT A2_R_C# HDMI_DAT A2_R_C

D5401

D5401 BAW 56-11-GP

BAW 56-11-GP

75.00056.B7D

1

2nd = 75.00056.A7D

D5102_1

3

HDMI_CLK _R_C

HDMI_CLK _R_C#

HDMI_DAT A0_R_C

HDMI_DAT A0_R_C#

0R3J-0-U -GP

0R3J-0-U -GP R5401

R5401

1 2

A00 0618

1 2

R5402

R5402 0R3J-0-U -GP

0R3J-0-U -GP

0R3J-0-U -GP R5403

R5403

1 2

A00 0618

1 2

R5404

R5404 0R3J-0-U -GP

0R3J-0-U -GP

HDMI_CLK _R_C_CON

A00 0619

12

ER5401

ER5401 150R2J -L1-GP-U

150R2J -L1-GP-U

HDMI_CLK _R_C#_CON

ER5401~04 change to 180R

HDMI_DAT A0_R_C_CON

A00 0619

12

ER5402

ER5402 150R2J -L1-GP-U

150R2J -L1-GP-U

HDMI_DAT A0_R_C#_CO N

HDMI_DAT A2_R_C_CON

HDMI_DAT A2_R_C#_CO N HDMI_DAT A1_R_C_CON

HDMI_DAT A1_R_C#_CO N HDMI_DAT A0_R_C_CON

HDMI_DAT A0_R_C#_CO N HDMI_CLK _R_C_CON

HDMI_CLK _R_C#_CON

1

12

TP5411TP5411

DDC_CL K_HDMI DDC_DA TA_HDMI

1

5V_HDM I_S0

AFTP54 01AFTP5401

C5417

SCD1U1 0V2KX-5GP

3D3V_S 0

2

HDMI_DAT A2_R_C

HDMI_DAT A2_R_C#

HDMI_DAT A1_R_C

HDMI_DAT A1_R_C#

HPD_HD MI_CON

0R3J-0-U -GP

0R3J-0-U -GP R5405

R5405

1 2

A00 0618

1 2

R5406

R5406 0R3J-0-U -GP

0R3J-0-U -GP

0R3J-0-U -GP R5407

R5407

1 2

A00 0618

1 2

R5408

R5408 0R3J-0-U -GP

0R3J-0-U -GP

HDMI CONN

HDMI1

22 20

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19

21 23

SKT-HDM I23-97-GP

22.10296.A31

HDMI_DAT A2_R_C_CON

HDMI_DAT A2_R_C#_CO N

HDMI_DAT A1_R_C_CON

HDMI_DAT A1_R_C#_CO N

1

A00 0619

12

ER5403

ER5403 150R2J -L1-GP-U

150R2J -L1-GP-U

A00 0619

12

ER5404

ER5404 150R2J -L1-GP-U

150R2J -L1-GP-U

3

PMBS39 04-1-GP

PMBS39 04-1-GP Q5402

Q5402

R5413

HDMI_HPD _E

A A

5

4

HDMI_PCH _DET[15]

1 2

0R0402 -PAD-2-GP

3

1

84.03904.L06

2

12

R5414

R5414 10KR2J -3-GP

10KR2J -3-GP

HDMI_HPD _B

R5411

1 2

150KR2 J-L1-GP

DY

12

R5412

R5412 20KR2J -L2-GP

20KR2J -L2-GP

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

HDMI Repeater/Connector

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

54 10 1

of

54 10 1

of

54 10 1

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Reserved

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

55 10 1Friday, June 28, 2 013

of

55 10 1Friday, June 28, 2 013

of

55 10 1Friday, June 28, 2 013

1

X02

SSID = SATA

Layout Note:

AC coupling Cap; place near CONN(<100mils )

SATA3_ PTX_DRX_P0[1 9]

SATA3_ PTX_DRX_N0[19 ]

R5601

10KR2J -3-GP

R5605

10KR2J -3-GP

3D3V_S 0

DY

12

10KR2J -3-GP

C5609 SCD 01U16V2KX-3 GPC56 09 SCD 01U16V2KX-3 GP

C5610 SCD 01U16V2KX-3 GPC56 10 SCD 01U16V2KX-3 GP

3D3V_S 0

R5606

DY

R5609

DY

1 2 1 2

12

5V_S0

C5602

SC10U6D3V3MX-GP

C5602

SC10U6D3V3MX-GP

3D3V_S 0

R5611

4K7R2J -2-GP

R5610

4K7R2J -2-GP

12

C5603

C5603 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

DY

SATA3_ DRX_CTX_P0 SATA3_ DRX_CTX_N0

SC1U6D3V2KX-GP

C5613

SC1U6D3V2KX-GP

12

3D3V_S 0

DY

R5613

12

4K7R2J -2-GP

A00 0618

0R0402 -PAD-2-GP

HDD_DE VSLP[20]

1 2

Need to check conn pin define

FFS_INT2 _Q[67]

C5601 SCD01U 16V2KX-3GPC56 01 S CD01U16V2K X-3GP

1 2

C5604 SCD01U 16V2KX-3GPC56 04 S CD01U16V2K X-3GP

1 2

C5606 SCD01U 16V2KX-3GPC56 06 S CD01U16V2K X-3GP C5605 SCD01U 16V2KX-3GPC56 05 S CD01U16V2K X-3GP

C5611

SC1U6D3V2KX-GP

C5611

SC1U6D3V2KX-GP

C5612

SC1U6D3V2KX-GP

C5612

SC1U6D3V2KX-GP12C5613

12

12 12

12

HDD Re-driver

U5601

SATA3_ PTX_DRX_P0 _R SATA3_ PTX_DRX_N0 _R SATA3_ DRX_CTX_P0 SATA3_ DRX_CTX_N0

SATA3_ DE1_HDD SATA3_ DE2_HDD

HDD_DE W1 HDD_DE W2

12

DY

10 20

1

2 11 12

9

8

16

6

SN75LV CP601RTJR-G P

TX1P

VCC

TX1N

VCC

TX2P

TX2N RX1P RX1N RX2P RX2N

DE1 DE2

DEW1 DEW2

71.75601.003

EQ1 EQ2

GND GND GND GND

EN

HDD_DE VSLP_R

R5602

5V_S0

0R0402 -PAD-2-GP

R5614

1 2

SATA3_ DRX_CTX_P0 _C SATA3_ DRX_CTX_N0 _C

SATA3_ DTX_CRX_N0 _CSATA3_ DTX_CRX_N0 SATA3_ DTX_CRX_P0 _CSATA 3_DTX_CRX_ P0

SATA3_ DTX_CRX_P0

15

SATA3_ DTX_CRX_N0

14

SATA3_ PRX_DTX_P0 _L

5

SATA3_ PRX_DTX_N0 _L

4

SATA3_ EQ1_HDD

17

SATA3_ EQ2_HDD

19

7

3 13 18 21

FFS_INT2 _Q_R

3D3V_S 0

HDD CONN

20.F2036.020

ACES-CO N20-28-GP

20 19 18 17 16 15 14 13 12 11 10

C5607 SCD 01U16V2KX-3 GPC56 07 SCD 01U16V2KX-3 GP

C5608 SCD 01U16V2KX-3 GPC56 08 SCD 01U16V2KX-3 GP

9 8 7 6 5 4 3 2

1

HDD1

1 2 1 2

24

23

22

21

3D3V_S 0

DY

12

R5604

R5604 10KR2J -3-GP

10KR2J -3-GP

12

R5608

R5608 10KR2J -3-GP

10KR2J -3-GP

SATA3_ PRX_DTX_P0 [1 9]

SATA3_ PRX_DTX_N0 [19]

3D3V_S 0

12

R5603

R5603 10KR2J -3-GP

10KR2J -3-GP

DY

12

R5607

R5607 10KR2J -3-GP

10KR2J -3-GP

DY

R5612

4K7R2J -2-GP

12

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

HDD

56 10 1

of

56 10 1

of

56 10 1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

57 10 1Friday, June 28, 2 013

of

57 10 1Friday, June 28, 2 013

of

57 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = Wireless

D D

0311 modify power rail

3D3V_W LAN_AOA C

12

R5809

R5809 10KR2J -3-GP

10KR2J -3-GP

1.1A

3D3V_S 0 3D3V_W LAN_AOA C

3D3V_S 5

C5804

SC1U6D3V2KX-GP

AOAC

C C

1210 Low Active change to High Active (Need to confirm with the SW)

B B

AOAC

AOAC_W LAN_EN[24]

USB_PN 5_R

SC1U6D3V2KX-GP

1 2

12

R5808

100KR2J-1-GPDYR5808

100KR2J-1-GP

DY

A00 0618

R5801 0 R0603-PAD-2-G P-UR5801 0 R0603-PAD-2-G P-U

1 2

A00 0618

USB_PP 5_R

A00 0618

R5805 0 R0603-PAD-2-G P-UR5805 0 R0603-PAD-2-G P-U

1 2

R5806

0R3J-0-U -GP

1 2

NON AOAC

U5801

AOAC

1

GND

OUT#8

2

IN#2

OUT#7

3

IN#3

OUT#6

EN/EN#4OCB

SY6288CC AC-GP

74.06288.079

8 7 6 5

USB_PN 5 [16]

USB_PP 5 [1 6]

3D3V_W LAN_AOA C

C5801

SC10U6D3V3MX-GP

C5801

SC10U6D3V3MX-GP

12

PCIE_PRX _WLANTX _N3[1 6]

PCIE_PRX _WLANTX _P3[16]

PCIE_PTX _WLANRX _N3_C[16]

PCIE_PTX _WLANRX _P3_C[16]

12

C5806

SCD1U10V2KX-5GP

WIFI_W AKE#[2 4]

E51_TxD[24 ]

WIFI_RF _EN[24]

PLT_RS T#[17,24,30 ,65,73]

PCH_SM BCLK[12,13,18,62,67 ]

PCH_SM BDATA[12,13,1 8,62,67]

C5805

C5805 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

TP5802TP5802

1

TP5803TP5803

1

CLK_PC IE_WLAN_R EQ3#[1 8]

CLK_PC IE_WLAN_N 3[18]

CLK_PC IE_WLAN_P 3[18]

TP5801TP5801

1

R5803 0R2J-2-GP

1 2

DY

0R0402 -PAD-2-GP

A00 0618

BLUETO OTH_EN[20]

0R0402 -PAD-2-GP

R5804

1 2

5V_S5

10KR2J -3-GP

10KR2J -3-GP R5807

R5807

1 2

DY

WLA N_ACT

BT_ACT

E51_RxD_ R

E51_TxD_ R

WLA N_22

USB_PN 5_R

USB_PP 5_R

WLAN CONN

WLA N1

54

NP1

1 2

3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52

NP2

53

MINIPCI52P-8-G P-U1

62.10043.B91

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

WLAN/BT

58 10 1Friday, June 28, 2 013

of

58 10 1Friday, June 28, 2 013

of

58 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

1

59 10 1Friday, June 28, 2 013

of

59 10 1Friday, June 28, 2 013

of

59 10 1Friday, June 28, 2 013

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

1

60 10 1Friday, June 28, 2 013

of

60 10 1Friday, June 28, 2 013

of

60 10 1Friday, June 28, 2 013

X02

5

4

3

2

1

SSID = User.Interface

PWRBTN CONN

PWB T1

AFTP61 01AFTP6101 AFTP61 02AFTP6102 AFTP61 07AFTP6107

AFTP61 03AFTP6103 AFTP61 04AFTP6104 AFTP61 05AFTP6105 AFTP61 06AFTP6106

5

1

2 3 4

6

ACES-CO N4-50-GP

20.K0722.004

LEDBD1

5

1

2 3 4

6

ACES-CO N4-50-GP

20.K0722.004

D D

Battery LED1(Amber_LED)

LOW actived from KBC GPIO

CHG_AM BER_LED#_R

2nd = 84.DT144.A11

Q6104

R2

B

R1

PDTA14 4VT-GP

84.00144.P11

RN6101

KBC_PW RBTN#[2 4]

LID_CLOS E#[24]

5V_S5

E

C

LED_BA T

EC6104

DY

SC220P50V2KX-3GP

1 2

R6107

12

680R2J -3-GP

BAT_AM BER_LED_A

1 2 3

4

SRN100 J-3-GP

3D3V_S 5

KBC_PW RBTN#_C LID_CLOS E#_C

3D3V_S 5 KBC_PW RBTN#_C LID_CLOS E#_C

1 1 1

Power & Battery LED2(White_LED)

LOW actived from KBC GPIO

C C

Q6103

R2

RN6102

RN6102 0R8P4R -PAD-1-GP

0R8P4R -PAD-1-GP

RN

CHG_AM BER_LED#[24]

PWR LED#[2 4] SATA_L ED#[19]

1 2 3 4 5

CHG_AM BER_LED#_R

8

PWR LED#_R

7

SATA_L ED#_R

6

PWR LED#_R

2nd = 84.DT144.A11

R2

B

R1

PDTA14 4VT-GP

84.00144.P11

5V_S5

E

C

LED_BA TCHG

EC6103

SC220P50V2KX-3GP

DY

1 2

R6106

12

680R2J -3-GP

BAT_W HITE_LED_A

LED board CONN

BAT_W HITE_LED_A

BAT_AM BER_LED_A HDD_LE D_A

SATA HDD LED

B B

5V_S0

E

SATA_L ED_R

C

DY

1 2

12

EC6105

R6108

680R2J -3-GP

HDD_LE D_A

BAT_W HITE_LED_A BAT_AM BER_LED_A GND HDD_LE D_A

1 1 1 1

SATA_L ED#_R

Q6105

R2

B

R1

PDTA14 4VT-GP

84.00144.P11

2nd = 84.DT144.A11

SC220P50V2KX-3GP

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

LED Bar/Power Button

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

61 10 1

of

61 10 1

of

61 10 1

1

X02

5

4

3

2

1

SSID = Touch.PadSSID = KBC

Internal Keyboard Connector

0R0603 -PAD-2-GP-U

TP_VDD

1

23

RN6201

SRN10K J-5-GP

4

12

DY

1 1 1 1 1

X01 0321

R6209

1 2

SRN33J -5-GP-U

1 2 3

EC6202

SC33P50V2JN-3GPDYEC6202

SC33P50V2JN-3GP

RN6202

12

DY

AFTP62 29AFTP6229 AFTP62 30AFTP6230 AFTP62 31AFTP6231 AFTP62 32AFTP6232 AFTP62 33AFTP6233

TP_VDD

Touch Pad Connector

TP_VDD

12

C6201

20.K0721.006

ACES-CO N6-52-GP

1

ACES-CO N6-52-GP

8

6 5 4 3 2

1

7

TP1

SCD1U10V2KX-5GP

AFTP62 14AFTP6214

TPCLK_ C TPDATA _C

4

PCH_SM BCLK[12,13,18,58,67 ]

PCH_SM BDATA[12,13,1 8,58,67]

3D3V_S 0

KB1

31

1

2 3 4 5 6 7 8

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 32

ACES-CO N30-10-GP

20.K0592.030

TPCLK[24]

TPDATA[24]

EC6201

SC33P5 0V2JN-3GP

AFTP62 02AFTP6202 AFTP62 03AFTP6203 AFTP62 04AFTP6204 AFTP62 05AFTP6205 AFTP62 06AFTP6206 AFTP62 07AFTP6207 AFTP62 08AFTP6208 AFTP62 09AFTP6209 AFTP62 10AFTP6210 AFTP62 11AFTP6211 AFTP62 12AFTP6212 AFTP62 13AFTP6213 AFTP62 15AFTP6215 AFTP62 16AFTP6216 AFTP62 17AFTP6217 AFTP62 18AFTP6218 AFTP62 19AFTP6219 AFTP62 20AFTP6220 AFTP62 21AFTP6221 AFTP62 22AFTP6222 AFTP62 23AFTP6223 AFTP62 25AFTP6225 AFTP62 24AFTP6224 AFTP62 26AFTP6226 AFTP62 27AFTP6227

CAP_LE D

1

AFTP62 01AFTP6201

AFTP62 28AFTP6228

D D

KROW [0..7][24 ]

KCOL[0..1 6][24]

C C

KB_DET #[20 ]

AFTP62 38AFTP6238

1

KROW 7

1

KROW 6

1

KROW 4

1

KROW 2

1

KROW 5

1

KROW 1

1

KROW 3

1

KROW 0

1

KCOL5

1

KCOL4

1

KCOL7

1

KCOL6

1

KCOL8

1

KCOL3

1

KCOL1

1

KCOL2

1

KCOL0

1

KCOL12

1

KCOL16

1

KCOL15

1

KCOL13

1

KCOL14

1

KCOL9

1

KCOL11

1

KCOL10

1

CAP_LE D

1

CAP LED Control

LOW actived from KBC GPIO

Q6201

A00 0618

CAP_LE D_R#

R6202

CAP_LE D#[24]

1 2

0R0402 -PAD-2-GP

Q6201

B

R1

PDTA14 4VT-GP

84.00144.P11

2nd = 84.DT144.A11

5V_S0 CAP_LED

R2

E

C

R6201

1 2

1KR2J-1 -GP

TP_VDD TPCLK_ C

CAP_LE DCAP_LE D_Q

TPDATA _C PCH_SM BCLK PCH_SM BDATA

B B

F6201

1 2

DY

POLYSW -D5A6V-1-GP

69.50007.921

1 2

R6205 0R3J-0 -U-GPR6205 0R3J -0-U-GP

KB_LED _BL_DET[20]

A A

5

KB_BL_ CTRL[24]

12

C6202

C6202 SCD1U1 0V2KX-5GP

SCD1U1 0V2KX-5GP

R6206

1 2

12

51KR2J -1-GP

R6207

R6207 100KR2 J-1-GP

100KR2 J-1-GP

DY

12

+5V_KB _BL5V_S0

KB_LED _DET_C

12

C6203

DY

R6208

R6208 100KR2 J-1-GP

100KR2 J-1-GP

SCD1U10V2KX-5GP

G

KB_BL_CTRL#

DS

Q6202

Q6202 P8503B MG-GP

P8503B MG-GP

84.P8503.031

2nd = 84.03404.C31

4

KBLIT1

5

1

2 3 4

6

ACES-CO N4-50-GP

20.K0722.004

+5V_KB _BL KB_LED _DET_C KB_BL_ CTRL#

1

AFTP62 34AFTP6234

1 1 1

AFTP62 35AFTP6235 AFTP62 36AFTP6236 AFTP62 37AFTP6237

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

62 10 1

of

62 10 1

of

62 10 1

1

X02

5

4

3

2

1

SSID = User.Interface

D D

A00 0618

IOBD1

41

1

2 3 4 5 6 7 8

C C

B B

9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40

42

ACES-CO N40-18-GP

20.K0678.040

USB30_ VCCC

USB30_ VCCD

3D3V_S 0

USB20_ DN3_C USB20_ DP3_C

USB20_ DN2_C USB20_ DP2_C

SATA3_ PTX_DRX_N1 _R SATA3_ PTX_DRX_P1 _R

SATA3_ PRX_DTX_N1 _R SATA3_ PRX_DTX_P1 _R

USB30_ VCCC USB30_VCCD 3D3V_S0

EC6301

SCD1U10V2KX-5GPDYEC6301

SCD1U10V2KX-5GP

12

DY

USB3_P RX_DTX_N3 [16 ] USB3_P RX_DTX_P3 [16]

USB3_P TX_DRX_N3 [1 6] USB3_P TX_DRX_P3 [16]

USB3_P RX_DTX_N2 [16 ] USB3_P RX_DTX_P2 [16]

USB3_P TX_DRX_N2 [1 6] USB3_P TX_DRX_P2 [16]

DY

C6002 SCD 01U16V2KX-3 GP

1 2 1 2

DY

C6013 SCD 01U16V2KX-3 GP

C6013 SCD 01U16V2KX-3 GP C6012 SCD 01U16V2KX-3 GP

C6012 SCD 01U16V2KX-3 GP

1 2

DY

1 2

DY

C6001 SCD 01U16V2KX-3 GP

MSATA_ DET# [19]

DY

A00 0628

EC6302

SCD1U10V2KX-5GPDYEC6302

SCD1U10V2KX-5GP

EC6303

SCD1U10V2KX-5GPDYEC6303

SCD1U10V2KX-5GP

12

DY

USB20_ DN2_C

USB20_ DP2_C

1 2

TR6301

FILTER-4P -62-GP

34

USB_PN 2 [16]

69.10080.021

2nd = 69.10103.061

USB_PP 2 [1 6]

A00 0618

SATA3_ PTX_DRX_N1 [19] SATA3_ PTX_DRX_P1 [1 9]

SATA3_ PRX_DTX_N1 [19] SATA3_ PRX_DTX_P1 [1 9]

MSATA_ DEVSLP [20]

USB20_ DN3_C

USB20_ DP3_C

1 2

TR6302

FILTER-4P -62-GP

34

USB_PN 3 [16]

69.10080.021

2nd = 69.10103.061

USB_PP 3 [1 6]

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

IO Board Connector

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

IO Board Connector

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

63 10 1Friday, June 28, 2 013

of

63 10 1Friday, June 28, 2 013

of

63 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

64 10 1

1

of

X02

5

4

3

2

1

SSID = DEBUG PORT

Debug Connector

DB1

LPC

A00 0625

D D

Place near trace separat ed point

RN6501

LPC_AD [3..0][18,24]

C C

LPC_AD [3..0]

LPC_AD 0 LPC_AD 1 LPC_AD 2 LPC_AD 3

LPC_FR AME#[18,24] PLT_RS T#[17,24,30 ,58,73]

RN6501

0R8P4R -PAD-1-GP

RN

1 2 3 4 5

R65010 R0402-PAD-2-G P R65010R 0402-PAD-2-GP

1 2

R65020 R0402-PAD-2-G P R65020R 0402-PAD-2-GP

1 2

8 7 6

LPC_LA D0_R LPC_LA D1_R LPC_LA D2_R LPC_LA D3_R LPC_FR AME#_DEBUG PLT_RS T#_DEBUG

CLK_PC I_LPC[18]

3D3V_S 0

11

1

2 3 4 5 6 7 8

9 10 12

PAD-10P -177042-GP

ZZ.00PAD.Y41

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Dubug connector

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

65 10 1

of

65 10 1

of

65 10 1

1

X02

5

D D

C C

4

3

2

1

B B

A A

5

4

(Blanking)

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Reserved

Size Document Number Rev

Size Document Number Rev A4

A4

Friday, June 28, 2013

Date: Sheet

2

Reserved

Hadley 15"

of

66 101

of

66 101

of

66 101

1

X02

5

4

3

2

1

SSID = User.Interface

D D

Note:

- no via, trace, under the sensor (keep out area around 2mm)

- stay away from the screw hole or metal shield soldering joints

- design PCB pad based on our sensor LGA pad size (add 0.1mm)

Free Fall Sensor

C C

10

RES#10

13

RES#13

15

RES#15

16

RES#16

PCH_SM BCLK[12,13,18,58,62 ] PCH_SM BDATA[12,13,1 8,58,62]

3D3V_R UN_FFS

4

SCL/SPC

6

SDA/SDI/SDO

SDO/SA07CS

5

GND

12

GND

LNG3DM TR-GP

74.LNG3D.0BZ

FFS

U6701

VDD_IO

VDD

INT1 INT2

NC#2 NC#3

1

14

11 9

8

2 3

3D3V_R UN_FFS

C6703

SCD1U16V2KX-3GP

C6703

SCD1U16V2KX-3GP

12

FFS

C6702

SCD1U16V2KX-3GP

C6702

SCD1U16V2KX-3GP

C6701

12

DY

3D3V_S 0

A00 0618

0R0603 -PAD-2-GP-U

R6701

1 2

SC10U6D3V3MX-GPDYC6701

SC10U6D3V3MX-GP

- solder stencil opening to 90% of the PCB pad size

- mount the sensor near the center of mass of the NB as possible as you can

3D3V_S 0

HDD_FA LL_INT

HDD_FA LL_INT [15]

Need to check GPIO

2N7002 KDW-GP

84.2N702.A3F

2nd = 84.DM601.03 F

3rd = 84.2N702.E3F

4th = 84.2N702.F3F

Q6701

FFS

12

34

R6703

R6703 100KR2 J-1-GP

100KR2 J-1-GP

FALL_INT 2

1

2

FFS

5

6

B B

Note:

(1) Keep all signals are the same trace width. (included VDD, GND). (2) No VIA under IC bottom.

FFS_INT2

FFS_INT2 [20]

FFS_INT2 _Q [56]

Need to check conn pin define

Need to check GPIO

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

FFS

1

67 10 1Friday, June 28, 2 013

of

67 10 1Friday, June 28, 2 013

of

67 10 1Friday, June 28, 2 013

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

68 10 1Friday, June 28, 2 013

of

68 10 1Friday, June 28, 2 013

of

68 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

69 10 1Friday, June 28, 2 013

of

69 10 1Friday, June 28, 2 013

of

69 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

70 10 1Friday, June 28, 2 013

of

70 10 1Friday, June 28, 2 013

of

70 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

71 10 1Friday, June 28, 2 013

of

71 10 1Friday, June 28, 2 013

of

71 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

72 10 1Friday, June 28, 2 013

of

72 10 1Friday, June 28, 2 013

of

72 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = VIDEO

D7301

K A

OPS

PLT_RST#[17,24,30,58,65]

D D

PEG_CLKREQ#[18]

C C

B B

A A

DGPU_HOLD_RST#[15]

3D3V_VGA_S0

Q7301

D

OPS

2N7002K-2-GP

84.2N702.J31

1 2

DY

R7305

0R2J-2-GP

5

OPS

1SS400GPT-GP

83.00400.C1F

2ND = 83.27101.01F

3RD = 83.01426.01F

0R0402-PAD-2-GP

A00 0618

1 2

R7308

G

10KR2J-3-GP

OPS

1 2

S

R7304

CPU_RXP_C_dGPU_TXP0[16] CPU_RXN_C_dGPU_TXN0[16]

dGPU_RXP_C_CPU_TXP0[16] dGPU_RXN_C_CPU_TXN0[16]

CPU_RXP_C_dGPU_TXP1[16] CPU_RXN_C_dGPU_TXN1[16]

dGPU_RXP_C_CPU_TXP1[16] dGPU_RXN_C_CPU_TXN1[16]

CPU_RXP_C_dGPU_TXP2[16] CPU_RXN_C_dGPU_TXN2[16]

dGPU_RXP_C_CPU_TXP2[16] dGPU_RXN_C_CPU_TXN2[16]

CPU_RXP_C_dGPU_TXP3[16] CPU_RXN_C_dGPU_TXN3[16]

dGPU_RXP_C_CPU_TXP3[16] dGPU_RXN_C_CPU_TXN3[16]

dGPU Reset

CLK_PCIE_VGA[18] CLK_PCIE_VGA#[18]

C7301 SCD22U10V2KX-1GP

1 2

OPS

C7302 SCD22U10V2KX-1GP

1 2

OPS

C7303 SCD22U10V2KX-1GP

1 2

OPS

C7304 SCD22U10V2KX-1GP

1 2

OPS

C7305 SCD22U10V2KX-1GP

1 2

OPS

C7306 SCD22U10V2KX-1GP

1 2

OPS

C7307 SCD22U10V2KX-1GP

1 2

OPS

C7308 SCD22U10V2KX-1GP

1 2

OPS

4

VGA_RST# [ 76]

VGA_RST#

GPU_CLKREQ#

dGPU_TXP_CPU_RXP0 dGPU_TXN_CPU_RXN0

dGPU_TXP_CPU_RXP1 dGPU_TXN_CPU_RXN1

dGPU_TXP_CPU_RXP2 dGPU_TXN_CPU_RXN2

dGPU_TXP_CPU_RXP3 dGPU_TXN_CPU_RXN3

GPU1A

AJ11

PEX_WAKE#

AJ12

PEX_RST#

AK12

PEX_CLKREQ#

AL13

PEX_REFCLK

AK13

PEX_REFCLK#

AK14

PEX_TX0

AJ14

PEX_TX0#

AN12

PEX_RX0

AM12

PEX_RX0#

AH14

PEX_TX1

AG14

PEX_TX1#

AN14

PEX_RX1

AM14

PEX_RX1#

AK15

PEX_TX2

AJ15

PEX_TX2#

AP14

PEX_RX2

AP15

PEX_RX2#

AL16

PEX_TX3

AK16

PEX_TX3#

AN15

PEX_RX3

AM15

PEX_RX3#

AK17

PEX_TX4

AJ17

PEX_TX4#

AN17

PEX_RX4

AM17

PEX_RX4#

AH17

PEX_TX5

AG17

PEX_TX5#

AP17

PEX_RX5

AP18

PEX_RX5#

AK18

PEX_TX6

AJ18

PEX_TX6#

AN18

PEX_RX6

AM18

PEX_RX6#

AL19

PEX_TX7

AK19

PEX_TX7#

AN20

PEX_RX7

AM20

PEX_RX7#

AK20

PEX_TX8

AJ20

PEX_TX8#

AP20

PEX_RX8

AP21

PEX_RX8#

AH20

PEX_TX9

AG20

PEX_TX9#

AN21

PEX_RX9

AM21

PEX_RX9#

AK21

PEX_TX10

AJ21

PEX_TX10#

AN23

PEX_RX10

AM23

PEX_RX10#

AL22

PEX_TX11

AK22

PEX_TX11#

AP23

PEX_RX11

AP24

PEX_RX11#

AK23

PEX_TX12

AJ23

PEX_TX12#

AN24

PEX_RX12

AM24

PEX_RX12#

AH23

PEX_TX13

AG23

PEX_TX13#

AN26

PEX_RX13

AM26

PEX_RX13#

AK24

PEX_TX14

AJ24

PEX_TX14#

AP26

PEX_RX14

AP27

PEX_RX14#

AL25

PEX_TX15

AK25

PEX_TX15#

AN27

PEX_RX15

AM27

PEX_RX15#

N14P-GS-A1-GP

71.0N14P.00U

1/17 PCI_EXPRESS

GK107/GF108

GK208/GF117

GF108

PEX LANES 8 TO 1 5 NC FOR GF117/GK208

3

NC

GK208/GK107/GF117

PEX_IOVDD_1 PEX_IOVDD_2 PEX_IOVDD_3 PEX_IOVDD_4 PEX_IOVDD_5 PEX_IOVDD_6

PEX_IOVDDQ_1 PEX_IOVDDQ_2 PEX_IOVDDQ_3 PEX_IOVDDQ_4 PEX_IOVDDQ_5 PEX_IOVDDQ_6 PEX_IOVDDQ_7 PEX_IOVDDQ_8

PEX_IOVDDQ_9 PEX_IOVDDQ_10 PEX_IOVDDQ_11 PEX_IOVDDQ_12 PEX_IOVDDQ_13 PEX_IOVDDQ_14

PEX_PLL_HVDD

PEX_SVDD_3V3

VDD_SENSE

GND_SENSE

PEX_TSTCLK_OUT

PEX_TSTCLK_OUT#

PEX_PLLVDD

OPS

PEX_TERMP

1 OF 17

NC_3V3AUX

TESTMODE

12

OPS

C7323

SC10U6D3V3MX-GP

AG19 AG21 AG22 AG24 AH21 AH25

AG13 AG15 AG16 AG18 AG25 AH15 AH18 AH26 AH27 AJ27 AK27 AL27 AM28 AN28

AH12

AG12

C7320

SC10U6D3V3MX-GP

12

OPS

X7R, Under GPU.

L4

L5

P8

PEXTSTCLK_OUT

AJ26

PEXTSTCLK_OUT#

AK26

AG26

R7302

TESTMODE

PEX_TERMP

1 2

OPS

10KR2J-3-GP

R7301

1 2

OPS

2K49R2F-GP

AK11

AP29

OPS

C7310

SC10U6D3V3MX-GP

OPS

C7321

SC10U6D3V3MX-GP

R7303

200R2F-L-GP

1 2

DY

12

C7316

SCD1U10V2KX-5GP

C7322

C7309

OPS

12

SC10U6D3V3MX-GP

SC4D7U6D3V3KX-GP

OPS

12

C7315

C7312

C7311

SC4D7U6D3V3KX-GP

OPS

C7318

SCD1U10V2KX-5GP

2

12

OPS

C7313

SC1U6D3V2KX-GP

12

OPS

C7314

SC1U6D3V2KX-GP

12

C7324

SC4D7U6D3V3KX-GP

OPS

VGA_SENSE [82]

GND_SENSE [82]

12

OPS

12

OPS

SC1U6D3V2KX-GP

12

OPS

SC1U6D3V2KX-GP

12

C7317

12

OPS

C7325

SC10U6D3V3MX-GP

12

OPS

C7327

SC10U6D3V3MX-GP

3D3V_VGA_S0

POWER IC

12

SC4D7U6D3V3KX-GP

OPS

1D05V_VGA_S0

12

OPS

C7326

SC10U6D3V3MX-GP

1.05V +/- 30mV

3.3A

1D05V_VGA_S0

12

OPS

C7328

SC4D7U6D3V3KX-GP

3.3V +/- 5% 210mA

1.05V +/- 30mV 150mA

1D05V_VGA_S0

0102 remove R7307

12

C7319

SC1U6D3V2KX-GP

OPS

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

GPU_PCIE/STRAPPING(1/5)

Hadley 15"

1

X02

of

73 101Friday, June 28, 2013

of

73 101Friday, June 28, 2013

of

73 101Friday, June 28, 2013

5

4

3

2

1

SSID = VIDEO

10 OF 17

GPU1J

5/17 IFPAB

ALL PINS NC FOR GF117

D D

TP7402TP7402

TP7403TP7403

TP7405TP7405

IFPAB_PLLVDD

1

IFPA_IOVDD IFPC_IOVDD

1

IFPB_IOVDD

1

IFPD_PLLVDD

1

IFPD_IOVDD

1

5

TP7401TP7401

C C

B B

TP7404TP7404

A A

AJ8

IFPAB_RSET

AH8

IFPAB_PLLVDD

AG8

IFPA_IOVDD

AG9

IFPB_IOVDD

IFPAB

N14P-GS-A1-GP

71.0N14P.00U

OPS

GPU1L

7/17 IFPD

AN2

IFPD_RSET

AG7

IFPD_PLLVDD

AG6

IFPD_IOVDD

N14P-GS-A1-GP

71.0N14P.00U

OPS

ALL PINS NC FOR GF117

IFPD

DP(GK208)

DPA_L3

DPA_L3 DPA_L3

DPA_L3

DPA_L2

DPA_L2 DPA_L2

DPA_L2

DPA_L1

DPA_L1 DPA_L1

DPA_L1

DPA_L0

DPA_L0 DPA_L0

DPA_L0

DPB_L3

DPB_L3 DPB_L3

DPB_L3

DPB_L2

DPB_L2 DPB_L2

DPB_L2

DPB_L1

DPB_L1 DPB_L1

DPB_L1

DPB_L0

DPB_L0 DPB_L0

DPB_L0

I2CX_SDA

I2CX_SDA I2CX_SCL

I2CX_SCL

DVI/HDMI

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

10 OF 17

LVDS

IFPA_TXC#

IFPA_TXC

IFPA_TXD0#

IFPA_TXD0

IFPA_TXD1#

IFPA_TXD1

IFPA_TXD2#

IFPA_TXD2

IFPA_TXD3#

IFPA_TXD3

IFPB_TXC#

IFPB_TXC

IFPB_TXD4#

IFPB_TXD4

IFPB_TXD5#

IFPB_TXD5

IFPB_TXD6#

IFPB_TXD6

IFPB_TXD7#

IFPB_TXD7

GPIO14

12 OF 17

DP

IFPD_AUX_I2CX_SDA#

IFPD_AUX_I2CX_SCL

IFPD_L3#

IFPD_L3

IFPD_L2#

IFPD_L2

IFPD_L1#

IFPD_L1

IFPD_L0#

IFPD_L0

GPIO17

11 OF 17

GPU1K

6/17 IFPC

ALL PINS NC FOR GF117

AN6 AM6

AN3 AP3

AM5 AN5

AK6 AL6

AH6 AJ6

AH9 AJ9

AP5 AP6

AL7 AM7

AM8 AN8

AL8 AK8

TP7406TP7406

TP7407TP7407

IFPC_PLLVDD

1

N4

TP7409TP7409

TP7410TP7410

IFPEF_PLLVDD

1

IFPE_IOVDD

1

IFPF_IOVDD

1

TP7408TP7408

AK2 AK3

AK5 AK4

AL4 AL3

AM4 AM3

AM2 AM1

AF8

IFPC_RSET

AF7

IFPC_PLLVDD

AF6

IFPC_IOVDD

N14P-GS-A1-GP

71.0N14P.00U

OPS

GPU1M

8/17 IFPEF

AB8

IFPEF_PLLVDD

AD6

IFPEF_RSET

NC FOR GK208

AC7

IFPE_IOVDD

AC8

IFPF_IOVDD

NC FOR GK208

ALL PINS NC FOR GF117

DVI/HDMI DP

I2CW_SDA

I2CW_SDA I2CW_SCL

I2CW_SCL

TXC

TXC TXC

TXC

TXD0

IFPC

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

ALL PINS NC FOR GF117

I2CY_SDA

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

IFPE

IFPF

TXD1

TXD2

TXD2 TXD2

TXD2

HPD_E

TXD3

TXD3 TXD3

TXD3

TXD4

TXD4 TXD4

TXD4

TXD5

TXD5 TXD5

TXD5

M6

N14P-GS-A1-GP

71.0N14P.00U

OPS

4

3

11 OF 17

IFPC_AUX_I2CW _SDA#

IFPC_AUX_I2CW _SCL

IFPC_L3#

IFPC_L3

IFPC_L2#

IFPC_L2

IFPC_L1#

IFPC_L1

IFPC_L0#

IFPC_L0

GPIO15

I2CY_SDA

IFPE_AUX_I2CY_SDA#

I2CY_SCLI2CY_SCL

IFPE_AUX_I2CY_SCL

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

NC FOR GK208

HPD_E

I2CZ_SDA

IFPF_AUX_I2CZ_SD A#

I2CZ_SCL

IFPF_AUX_I2CZ_SC L

TXC

TXC TXC

TXC

TXD0

TXD0 TXD0

TXD0

TXD1

TXD1 TXD1

TXD1

TXD2

TXD2 TXD2

TXD2

NC FOR GK208

HPD_F

AG2 AG3

AG4 AG5

AH4 AH3

AJ2 AJ3

AJ1 AK1

P2

13 OF 17

DPDVI-SL/HDMIDVI-DL

IFPE_L3#

IFPE_L3

IFPE_L2#

IFPE_L2

IFPE_L1#

IFPE_L1

IFPE_L0#

IFPE_L0

GPIO18

IFPF_L3#

IFPF_L3

IFPF_L2#

IFPF_L2

IFPF_L1#

IFPF_L1

IFPF_L0#

IFPF_L0

GPIO19

2

AB4 AB3

AC5 AC4

AC3 AC2

AC1 AD1

AD3 AD2

R1

AF2 AF3

AF1 AG1

AD5 AD4

AF5 AF4

AE4 AE3

P3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan, R.O.C.

GPU Memory(2/5)

of

74 101Friday, June 28, 2013

1

X02

5

4

3

2

1

SSID = VIDEO

FBA_D[0..31][78]

D D

FBA_D[32..63][79]

C C

FBA_DQM[0..3 ][78 ]

FBA_DQM[4..7 ][79 ]

FBA_EDC[0 ..3][78]

FBA_EDC[4 ..7][79]

B B

TP7503TP7503

A A

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_EDC0 FBA_EDC1 FBA_EDC2 FBA_EDC3 FBA_EDC4 FBA_EDC5 FBA_EDC6 FBA_EDC7

1

5

AM29 AM31

AM30

AM33

AM32

AM34

AG28 AF29 AG29 AF28 AD30 AD29 AC29 AD28

AK29

AK28

AN29

AN31 AN32 AP30 AP32

AK33 AK32 AD34 AD32 AC30 AD33 AF31 AG34 AG32 AG33

AD31

AF34

AE31 AK30 AN33 AF33

AF30 AK31

AF32

L28

M29

L29 M28 N31 P29 R29 P28

J28 H29

J29 H28 G29 E31 E32

F30 C34 D32 B33 C33

F33

F32 H33 H32 P34 P32 P31 P33

L31

L34

L32

L33

AJ29

AJ30

AL31

P30

F31

F34 M32

AL29

M31 G31 E33 M33

M30 H30 E34 M34

H26

GPU1B

2/17 FBA

FBA_D0 FBA_D1 FBA_D2 FBA_D3 FBA_D4 FBA_D5 FBA_D6 FBA_D7 FBA_D8 FBA_D9 FBA_D10 FBA_D11 FBA_D12 FBA_D13 FBA_D14 FBA_D15 FBA_D16 FBA_D17 FBA_D18 FBA_D19 FBA_D20 FBA_D21 FBA_D22 FBA_D23 FBA_D24 FBA_D25 FBA_D26 FBA_D27 FBA_D28 FBA_D29 FBA_D30 FBA_D31 FBA_D32 FBA_D33 FBA_D34 FBA_D35 FBA_D36 FBA_D37 FBA_D38 FBA_D39 FBA_D40 FBA_D41 FBA_D42 FBA_D43 FBA_D44 FBA_D45 FBA_D46 FBA_D47 FBA_D48 FBA_D49 FBA_D50 FBA_D51 FBA_D52 FBA_D53 FBA_D54 FBA_D55 FBA_D56 FBA_D57 FBA_D58 FBA_D59 FBA_D60 FBA_D61 FBA_D62 FBA_D63

FBA_DQM0 FBA_DQM1 FBA_DQM2 FBA_DQM3 FBA_DQM4 FBA_DQM5 FBA_DQM6 FBA_DQM7

FBA_DQS_WP0 FBA_DQS_WP1 FBA_DQS_WP2 FBA_DQS_WP3 FBA_DQS_WP4 FBA_DQS_WP5 FBA_DQS_WP6 FBA_DQS_WP7

FBA_DQS_RN0 FBA_DQS_RN1 FBA_DQS_RN2 FBA_DQS_RN3 FBA_DQS_RN4 FBA_DQS_RN5 FBA_DQS_RN6 FBA_DQS_RN7

THE FBA_WCKBxx

THE FBA_WCKBxx PINS ARE USED

PINS ARE USED ONLY ON GK107

ONLY ON GK107 THEY ARE NC

THEY ARE NC FOR GK208/GF108

FOR GK208/GF108 /GF117

/GF117

FB_VREF

N14P-GS-A 1-GP

71.0N14P.00U

OPS

FBA_CMD14 FBA_CMD30

FBA_CMD29 FBA_CMD13

NC

NC NC

NC

GF117/GK208

GF117/GK208 GK107/GF108

GK107/GF108

1D35V_VGA_S0 1D35V_VGA_S0

OPS

1 2

OPS

1 2

R7516

10KR2J-3-GP

R7520

10KR2J-3-GP

FB_CLAMP

FB_DLL_AVDD

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8

FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_CMD_RFU0 FBA_CMD_RFU1

FBA_DEBUG0 FBA_DEBUG1

FBA_CLK0

FBA_CLK0#

FBA_CLK1

FBA_CLK1#

FBA_WCK1 FBA_WCK1# FBA_WCK23

FBA_WCK23#

FBA_WCK45

FBA_WCK45#

FBA_WCK67

FBA_WCK67#

FBA_WCKB1 FBA_WCKB1# FBA_WCKB23

FBA_WCKB23#

FBA_WCKB45

FBA_WCKB45#

FBA_WCKB67

FBA_WCKB67#

FBA_PLL_AVDD

R7524

10KR2J-3-GP

OPS

1 2

R7521

OPS

1 2

10KR2J-3-GP

2 OF 17

E1

K27

U30 T31 U29 R34 R33 U32 U33 U28 V28 V29 V30 U34 U31 V34 V33 Y32 AA31 AA29 AA28 AC34 AC33 AA32 AA33 Y28 Y29 W31 Y30 AA34 Y31 Y34 Y33 V31

R32 AC32

R28 AC28

R30 R31 AB31 AC31

K31 L30 H34 J34 AG30 AG31 AJ34 AK34

J30 J31 J32 J33 AH31 AJ31 AJ32 AJ33

U27

C7509

A00 0618

0R0402-PAD -2-GP

R7506

1 2

FB_CLAM

R7518 10KR2J- 3-GP

1 2

OPS

FBA_PLL_AVD D

X7R

12

Layout note:FBA _PLL_AVDD=16mil

OPS

Place close to Ball

SCD1U10V2KX-5GP

0102 remove L75 02 change K27 pin net name

FBA_CMD0 FBA_CMD1 FBA_CMD2 FBA_CMD3 FBA_CMD4 FBA_CMD5 FBA_CMD6 FBA_CMD7 FBA_CMD8 FBA_CMD9 FBA_CMD10 FBA_CMD11 FBA_CMD12 FBA_CMD13 FBA_CMD14 FBA_CMD15 FBA_CMD16 FBA_CMD17 FBA_CMD18 FBA_CMD19 FBA_CMD20 FBA_CMD21 FBA_CMD22 FBA_CMD23 FBA_CMD24 FBA_CMD25 FBA_CMD26 FBA_CMD27 FBA_CMD28 FBA_CMD29 FBA_CMD30 FBA_CMD31

FBA_DEBU G0 FBA_DEBU G1

FBA_CLK0P FBA_CLK0N FBA_CLK1P FBA_CLK1N

FBA_WC K01 FBA_WC K01# FBA_WC K23 FBA_WC K23# FBA_WC K45 FBA_WC K45# FBA_WC K67 FBA_WC K67#

FBA_CMD0 [78] FBA_CMD1 [78] FBA_CMD2 [78] FBA_CMD3 [78] FBA_CMD4 [78] FBA_CMD5 [78] FBA_CMD6 [78] FBA_CMD7 [78] FBA_CMD8 [78] FBA_CMD9 [78] FBA_CMD10 [78 ] FBA_CMD11 [78 ] FBA_CMD12 [78 ] FBA_CMD13 [78 ] FBA_CMD14 [78 ] FBA_CMD15 [78 ] FBA_CMD16 [79 ] FBA_CMD17 [79 ] FBA_CMD18 [79 ] FBA_CMD19 [79 ] FBA_CMD20 [79 ] FBA_CMD21 [79 ] FBA_CMD22 [79 ] FBA_CMD23 [79 ] FBA_CMD24 [79 ] FBA_CMD25 [79 ] FBA_CMD26 [79 ] FBA_CMD27 [79 ] FBA_CMD28 [79 ] FBA_CMD29 [79 ] FBA_CMD30 [79 ] FBA_CMD31 [79 ]

DY

1 2

R7501 60D4R2F-G P

DY

1 2

R7503 60D4R2F-G P

FBA_CLK0P [ 78] FBA_CLK0N [78] FBA_CLK1P [ 79] FBA_CLK1N [79]

FBA_WC K01 [7 8] FBA_WC K01# [78] FBA_WC K23 [7 8] FBA_WC K23# [78] FBA_WC K45 [7 9] FBA_WC K45# [79] FBA_WC K67 [7 9] FBA_WC K67# [79]

DA-05691-001_V05 P7

FBA_PLL_AVD D

12

OPS

C7505

C7506

SC10U6D3V3MX-GP

SCD1U10V2KX-5GP

Place under GPU near

4

3 OF 17

OPS

1 2

FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8

FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31

FBB_CMD_RFU0 FBB_CMD_RFU1

FBB_DEBUG0 FBB_DEBUG1

FBB_CLK0#

FBB_CLK1#

FBB_WCK1 FBB_WCK1# FBB_WCK23

FBB_WCK23#

FBB_WCK45

FBB_WCK45#

FBB_WCK67

FBB_WCK67#

FBB_WCKB1 FBB_WCKB1# FBB_WCKB23

FBB_WCKB23#

FBB_WCKB45

FBB_WCKB45#

FBB_WCKB67

FBB_WCKB67#

FBB_PLL_AVDD

GK107GF108

R7525

10KR2J-3-GP

1 2

R7523

10KR2J-3-GP

3 OF 17

FBB_CLK0

FBB_CLK1

D13 E14 F14 A12 B12 C14 B14 G15 F15 E15 D15 A14 D14 A15 B15 C17 D18 E18 F18 A20 B20 C18 B18 G18 G17 F17 D16 A18 D17 A17 B17 E17

C12 C20

G14 G20

D12 E12 E20 F20

F8 E8 A5 A6 D24 D25 B27 C27

D6 D7 C6 B6 F26 E26 A26 A27

H17

FBB_CMD0 FBB_CMD1 FBB_CMD2 FBB_CMD3 FBB_CMD4 FBB_CMD5 FBB_CMD6 FBB_CMD7 FBB_CMD8 FBB_CMD9 FBB_CMD10 FBB_CMD11 FBB_CMD12 FBB_CMD13 FBB_CMD14 FBB_CMD15 FBB_CMD16 FBB_CMD17 FBB_CMD18 FBB_CMD19 FBB_CMD20 FBB_CMD21 FBB_CMD22 FBB_CMD23 FBB_CMD24 FBB_CMD25 FBB_CMD26 FBB_CMD27 FBB_CMD28 FBB_CMD29 FBB_CMD30 FBB_CMD31

FBB_DEBU G0 FBB_DEBU G1

FBB_CLK0P FBB_CLK0N FBB_CLK1P FBB_CLK1N

FBB_WC K01 FBB_WC K01# FBB_WC K23 FBB_WC K23# FBB_WC K45 FBB_WC K45# FBB_WC K67 FBB_WC K67#

C7510

OPS

SCD1U10V2KX-5GP

X7R

12

FBA_PLL_AVD DFB_VREF

FBB_CMD0 [80] FBB_CMD1 [80] FBB_CMD2 [80] FBB_CMD3 [80] FBB_CMD4 [80] FBB_CMD5 [80] FBB_CMD6 [80] FBB_CMD7 [80] FBB_CMD8 [80] FBB_CMD9 [80] FBB_CMD10 [80] FBB_CMD11 [80] FBB_CMD12 [80] FBB_CMD13 [80] FBB_CMD14 [80] FBB_CMD15 [80] FBB_CMD16 [81] FBB_CMD17 [81] FBB_CMD18 [81] FBB_CMD19 [81] FBB_CMD20 [81] FBB_CMD21 [81] FBB_CMD22 [81] FBB_CMD23 [81] FBB_CMD24 [81] FBB_CMD25 [81] FBB_CMD26 [81] FBB_CMD27 [81] FBB_CMD28 [81] FBB_CMD29 [81] FBB_CMD30 [81] FBB_CMD31 [81]

DY

1 2

R7502 60D4R2F-G P

DY

1 2

R7504 60D4R2F-G P

FBB_CLK0P [80] FBB_CLK0N [80] FBB_CLK1P [81] FBB_CLK1N [81]

FBB_WC K01 [8 0] FBB_WC K01# [80] FBB_WC K23 [8 0] FBB_WC K23# [80] FBB_WC K45 [8 1] FBB_WC K45# [81] FBB_WC K67 [8 1] FBB_WC K67# [81]

2

GPU1C

3/17 FBB

3

3/17 FBB

ALL PINS NC FOR GF117/GK208

G9

FBB_D0

E9

FBB_D1

G8

FBB_D2

F9

FBB_D3

F11

FBB_D4

G11

FBB_D5

F12

FBB_D6

G12

FBB_D7

G6

FBB_D8

F5

FBB_D9

E6

FBB_D10

F6

FBB_D11

F4

FBB_D12

G4

FBB_D13

E2

FBB_D14

F3

FBB_D15

C2

FBB_D16

D4

FBB_D17

D3

FBB_D18

C1

FBB_D19

B3

FBB_D20

C4

FBB_D21

B5

FBB_D22

C5

FBB_D23

A11

FBB_D24

C11

FBB_D25

D11

FBB_D26

B11

FBB_D27

D8

FBB_D28

A8

FBB_D29

C8

FBB_D30

B8

FBB_D31

F24

FBB_D32

G23

FBB_D33

E24

FBB_D34

G24

FBB_D35

D21

FBB_D36

E21

FBB_D37

G21

FBB_D38

F21

FBB_D39

G27

FBB_D40

D27

FBB_D41

G26

FBB_D42

E27

FBB_D43

E29

FBB_D44

F29

FBB_D45

E30

FBB_D46

D30

FBB_D47

A32

FBB_D48

C31

FBB_D49

C32

FBB_D50

B32

FBB_D51

D29

FBB_D52

A29

FBB_D53

C29

FBB_D54

B29

FBB_D55

B21

FBB_D56

C23

FBB_D57

A21

FBB_D58

C21

FBB_D59

B24

FBB_D60

C24

FBB_D61

B26

FBB_D62

C26

FBB_D63

E11

FBB_DQM0

E3

FBB_DQM1

A3

FBB_DQM2

C9

FBB_DQM3

F23

FBB_DQM4

F27

FBB_DQM5

C30

FBB_DQM6

A24

FBB_DQM7

D10

FBB_DQS_WP0

D5

FBB_DQS_WP1

C3

FBB_DQS_WP2

B9

FBB_DQS_WP3

E23

FBB_DQS_WP4

E28

FBB_DQS_WP5

B30

FBB_DQS_WP6

A23

FBB_DQS_WP7

D9

FBB_DQS_RN0

E4

FBB_DQS_RN1

B2

FBB_DQS_RN2

A9

FBB_DQS_RN3

D22

FBB_DQS_RN4

D28

FBB_DQS_RN5

A30

FBB_DQS_RN6

B23

FBB_DQS_RN7

N14P-GS-A 1-GP

71.0N14P.00U

OPS

FBB_CMD14 FBB_CMD30

FBB_CMD29 FBB_CMD13

THE FBB_WCKBxx

THE FBB_WCKBxx PINS ARE USED

PINS ARE USED ONLY ON GK107

ONLY ON GK107 THEY ARE NC

THEY ARE NC FOR GF108

FOR GF108

NC

R7517

10KR2J-3-GP

OPS

1 2

R7522

OPS

1 2

10KR2J-3-GP

EC_FB_CLA MP [24,76,83]

1D35V_VGA_S0 1D35V_VGA_S0

1D05V_VGA_S0

L7501

MHC1608S300Q BP-GP

1 2

OPS

68.00335.051

12

0102 remove L75 03 change C7506 to 0603 package

FBB_D[0..31][80]

FBB_D[32..63][81]

FBB_DQM[0..3 ][80 ]

FBB_DQM[4..7 ][81 ]

FBB_EDC[0 ..3][80]

FBB_EDC[4 ..7][81]

30ohm@100MHz ES R=0.2

FBB_D0 FBB_D1 FBB_D2 FBB_D3 FBB_D4 FBB_D5 FBB_D6 FBB_D7 FBB_D8 FBB_D9 FBB_D10 FBB_D11 FBB_D12 FBB_D13 FBB_D14 FBB_D15 FBB_D16 FBB_D17 FBB_D18 FBB_D19 FBB_D20 FBB_D21 FBB_D22 FBB_D23 FBB_D24 FBB_D25 FBB_D26 FBB_D27 FBB_D28 FBB_D29 FBB_D30 FBB_D31 FBB_D32 FBB_D33 FBB_D34 FBB_D35 FBB_D36 FBB_D37 FBB_D38 FBB_D39 FBB_D40 FBB_D41 FBB_D42 FBB_D43 FBB_D44 FBB_D45 FBB_D46 FBB_D47 FBB_D48 FBB_D49 FBB_D50 FBB_D51 FBB_D52 FBB_D53 FBB_D54 FBB_D55 FBB_D56 FBB_D57 FBB_D58 FBB_D59 FBB_D60 FBB_D61 FBB_D62 FBB_D63

FBB_DQM0 FBB_DQM1 FBB_DQM2 FBB_DQM3 FBB_DQM4 FBB_DQM5 FBB_DQM6 FBB_DQM7

FBB_EDC0 FBB_EDC1 FBB_EDC2 FBB_EDC3 FBB_EDC4 FBB_EDC5 FBB_EDC6 FBB_EDC7

1D35V_VGA_S0

12

C7502

C7501

OPS

SC1U6D3V2KX-GP

1D35V_VGA_S0

12

C7503

C7504

OPS

SC1U6D3V2KX-GP

1D35V_VGA_S0

OPS

1 2

12

C7525

OPS

SC1U6D3V2KX-GP

SCD1U10V2KX-5GP

12

C7526

DY

OPS

SCD1U10V2KX-5GP

TP7501TP7501

1

TP7502TP7502

1

R7505

12

OPS

40D2R2F-G P

FB_CAL_TER M_GND

12

R7507

R7508

OPS

60D4R2F-GP

60D4R2F-GP 42D2R2F-GP

42D2R2F-GP

1.35V +/- 3%

4.88A

12

C7507

C7508

SC1U6D3V2KX-GP

OPS

DY

SC1U6D3V2KX-GP

12

C7511

C7512

SC1U6D3V2KX-GP

OPS

SCD1U10V2KX-5GP

1D35V_VGA_S0

AA27 AA30 AB27 AB33 AC27 AD27 AE27 AF27 AG27 B13 B16 B19 E13 E16 E19 H10 H11 H12 H13 H14 H15 H16 H18 H19 H20 H21 H22 H23 H24 H8 H9 L27 M27 N27 P27 R27 T27 T30 T33 V27 W27 W30 W33 Y27

12

C7520

C7521

SC10U6D3V3MX-GP

DY

FBVDDQ_S ENSE

FB_GND_S ENSE

FB_CAL_PD _VDDQ

FB_CAL_PU _GND

12

C7524

SC1U6D3V2KX-GP

DY

4 OF 17

F1

FB_VDDQ_SENSE

F2

FB_GND_SENSE

J27

FB_CAL_PD_VDDQ

H27

FB_CAL_PU_GND

H25

FB_CAL_TERM_GND

N14P-GS-A 1-GP

71.0N14P.00U

OPS

GPU FBVDDQ Deco upling

PLACE CLOSE TO GPU BALLS

12

C7514

C7513

C7522

SC4D7U6D3V3KX-GP

DY

OPS

GPU1D

14/17 FBVDDQ

FBVDDQ_1 FBVDDQ_2 FBVDDQ_3 FBVDDQ_4 FBVDDQ_5 FBVDDQ_6 FBVDDQ_7 FBVDDQ_8

FBVDDQ_9 FBVDDQ_10 FBVDDQ_11 FBVDDQ_12 FBVDDQ_13 FBVDDQ_14 FBVDDQ_15 FBVDDQ_16 FBVDDQ_17 FBVDDQ_18 FBVDDQ_19 FBVDDQ_20 FBVDDQ_21 FBVDDQ_22 FBVDDQ_23 FBVDDQ_24 FBVDDQ_25 FBVDDQ_26 FBVDDQ_27 FBVDDQ_28 FBVDDQ_29 FBVDDQ_30 FBVDDQ_31 FBVDDQ_32 FBVDDQ_33 FBVDDQ_34 FBVDDQ_35 FBVDDQ_36 FBVDDQ_37 FBVDDQ_38 FBVDDQ_39 FBVDDQ_40 FBVDDQ_41 FBVDDQ_42 FBVDDQ_43 FBVDDQ_44

12

C7517

SC10U6D3V3MX-GP

PLACE CLOSE TO GPU BALLS

12

C7515

C7516

C7523

C7527

SC1U6D3V2KX-GP

Title

Size Document N umber Rev

Date: Sheet of

DY

OPS

DY

SC4D7U6D3V3KX-GP

GPU_DP/LVDS/CRT/GPIO(3/5)

A2

Hadley 15"

12

C7519

SC10U6D3V3MX-GP

DY

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih,

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih, Taipei Hs ien 221, Taiwan, R .O.C.

Taipei Hs ien 221, Taiwan, R .O.C.

1

12

C7518

C7529

SC10U6D3V3MX-GP

DY

75 101Friday, June 28, 2013

C7528

C7530

12

SC10U6D3V3MX-GP

DY

12

SC10U6D3V3MX-GP

DY

X02

5

4

3

2

1

SSID = VIDEO

14 OF 17

GPU1N

4/17 DACA

GF108/GK107

GF117

GK208

AG10

DACA_VDD

AP9

DACA_VREF

AP8

DACA_RSET

D D

N14P-GS-A1-GP

71.0N14P.00U

OPS

NC

TSEN_VREF

NC

0102 remove 0R

3D3V_VGA_S0

SML1_DATA[18,24 ,26]

R7607

TP7602TP7602 TP7605TP7605 TP7601TP7601

SML1_CLK[18,24,26 ]

TP7603TP7603

TP7604TP7604

1 1 1

STRAP_REF0_GND_N9

12

OPS

STRAP0 STRAP1

STRAP3 STRAP4

1

OPS

N12P_JTAG_TCK N12P_JTAG_TMS N12P_JTAG_TDI N12P_JTAG_TDO N12P_JTAG_TRST

4

RN7602

SRN10KJ-5-GP

1

2 3

GPU1P

J2 J7 J6 J5 J3

J1

N14P-GS-A1-GP

71.0N14P.00U

OPS

5

P2800_VGA_DXN

P2800_VGA_DXP

12/17 MISC2

STRAP0 STRAP1 STRAP2 STRAP3 STRAP4

GK107/GF117

GK208

MULTI_STRAP_REF

C C

B B

A A

40K2R2F-GP

GF117

NC

NC NC

NC

NC NC

NC

Q7601

3 4

2

1

OPS

K4

K3

AM10

AP11

AM11

AP12 AN11

NC

NC NC

NC

GF108

CEC IS NC FOR

CEC IS NC FOR GK107/GK208/GF117

GK107/GK208/GF117

14 OF 17

GF108/GK107

GK208

I2CA_SCL I2CA_SDA

DACA_HSYNC DACA_VSYNC

DACA_RED

DACA_GREEN

DACA_BLUE

5

2N7002KDW-GP

6

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

GPU1Q

10/19 MISC1

THERMDN

THERMDP

JTAG_TCK JTAG_TMS JTAG_TDI JTAG_TDO JTAG_TRST#

GPIO16

GPIO16 GPIO20

GPIO20

GPIO8

GK208 GF117

N14P-GS-A1-GP

71.0N14P.00U

OPS

ROM_CS#

ROM_SO

ROM_SCLK

BUFRST#

I2CA_SCL

R4

I2CA_SDA

R5

AM9 AN9

AK9

AL10

AL9

SMBD_THERM_NV

SMBC_THERM_NV

NC

NC NC

NC

GF117

GK208

GK208 OVERT

OVERT

NC

GPIO16

NC

GPIO16

NCNC

NCNC NC

NC

GK107

16 OF 17

ROM_CS#

H6

ROM_SI

H5

ROM_SI

ROM_SO

H7

ROM_SCLK

H4

BUFRST#

L2

L3

CEC

DA-05691-001_V 05 P6 NC : N13P-GS

GK107/GF108

GK208

4

OPS

3D3V_VGA_S0

4

OPS

1

2 3

17 OF 17

I2CS_SCL I2CS_SDA

I2CC_SCL I2CC_SDA

I2CB_SCL I2CB_SDA

GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 GPIO8

GPIO9 GPIO10 GPIO11 GPIO12 GPIO13 GPIO16 GPIO20 GPIO21

GF108

R7628

OPS

10KR2J-3-GP

RN7601

RN7601 SRN4K7J-8-GP

SRN4K7J-8-GP

T4 T3

R2 R3

R7 R6

P6 M3 L6 P5 P7 L7 M7 N8 M1 M2 L1 M5 N3 M4 R8 P4 P1

3D3V_VGA_S0

DY

1 2

12

1 23

SMBC_THERM_NV SMBD_THERM_NV

I2CC_SCL I2CC_SDA

I2CB_SCL I2CB_SDA

FB_CLAMP_MON

FB_CLAMP_TGL_REQ#

GPIO8_OVERT# GPIO9_ALERT GPIO10_FBVREF

PWR_LEVEL

RN7603

RN7603 SRN2K2J-1-GP

SRN2K2J-1-GP

DA-05691-001_V05 P15 GPIO20/21 NC : for ALL

R7626

R7626 10KR2J-3-GP

10KR2J-3-GP

3D3V_VGA_S0

180ohm@100MHz DCR=0.3 ohm Max current = 300mA

23 1

4

OPS

1

4

OPS

23

1D05V_VGA_S0

SRN2K2J-1-GP

SRN2K2J-1-GP RN7604

RN7604 RN7605

RN7605 SRN2K2J-1-GP

SRN2K2J-1-GP

VGA_CORE_VID [82]

EA40-HW SC

4

30ohm@100MHz DCR=0.04 ohm Max current = 3000mA

L7601

MHC1608S300QBP-GP

1 2

OPS

68.00335.051

C7605

SCD1U10V2KX-5GP

L7602

MCB1608S181FBP-GP

1 2

OPS

68.00909.261

C7601

SCD1U10V2KX-5GP

3D3V_VGA_S0

GPIO10_FBVREF [78,79,80,81]

VGA_CORE_PSI [82]

EC_FB_CLAMP[24,75,83]

FB_CLAMP_MON

12

OPS

C7603

12

OPS

GPIO9_ALERT GPIO8_OVERT#

GPIO10_FBVREF

3D3V_VGA_S0

12

OPS

3D3V_VGA_S0

12

C7606

C7606 SC2D2U6D3V2MX-GP

SC2D2U6D3V2MX-GP

OPS

C7604

C7602

12

OPS

SC4D7U6D3V3KX-GP

RN7606

2 3

OPS

1

SRN10KJ-5-GP

OPS

R7605

R7605 10KR2J-3-GP

10KR2J-3-GP

D7601

DY

1SS400GPT-GP

83.00400.C1F

2ND = 83.27101.01F

3RD = 83.01426.01F

D7602

OPS

1SS400GPT-GP

83.00400.C1F

2ND = 83.27101.01F

3RD = 83.01426.01F

R7647

R7647 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

1 2

N14P-GT

52mA

112mA

12

OPS

SCD1U10V2KX-5GP

3D3V_VGA_S0

4

12

R7610

R7610 100KR2J-1-GP

100KR2J-1-GP

KA

Q7603

Q7603 2N7002KDW-GP

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.F3F

1

2

3 4

OPS_GC6

NV reques t to need to be ke eped

15 OF 17

NC

GF117GF108/GK107

27MHZ_OUT_R

A00 0618

1 2

R7604

0R0402-PAD-2-GP

OPS

XTAL_OUTBUFF

XTAL_OUT

D

Q7606

G

S

OPS_GC6

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

15 OF 17

J4

H2

A00 0618

R7629

R7629 0R0402-PAD-2-GP

0R0402-PAD-2-GP

1 2

12

C7608

C7608 SC15P50V2JN-2-GP

SC15P50V2JN-2-GP

OPS

VIDEO_THERM_OVERT# [82]

VGA_RST# [73]

D

GPU1O

11/17 XTAL_PLL

GPU_PLL_VDD SP_PLLVDD

VIDEO_CLK_XTAL_SS N12P_XTAL_OUTBUFF

12

R7601

OPS

10KR2J-3-GP

C7607

SC15P50V2JN-2-GP

AC_PRESENT [17,24]

OVER_CURRENT_P8# [24]

3D3V_S0

1 2

6

FB_CLAMP_MON_S

5

11/17 XTAL_PLL

AD8

PLLVDD

AE8

SP_PLLVDD

AD7

VID_PLLVDD

GK208

H1

XTAL_SSIN

OPS

XTAL_IN

N14P-GS-A1-GP

71.0N14P.00U

R7603

1MR2J-1-GP

1 2

DY

X7601

2 3

OPS

XTAL-27MHZ-85-GP- U

82.30034.641

2ND = 82.30034.651

3RD = 82.30034.681

3D3V_VGA_S0

OPS_GC6

OPS

20PF 5% 50V +/-0.25PF 0402

41

Q7604

G

OPS

S

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

VGA_RST#_R

Q7602

G

S

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

R7649

R7649 10KR2J-L-GP

10KR2J-L-GP

1 2

H3

27MHZ_IN 27MHZ_OUT

12

OPS

GPIO9_ALERT

GPIO8_OVERT#

R7650

R7650 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

FB_CLAMP_TGL_REQ#STRAP2

3

PURE_HW_SHUTDOWN# [24,26,36]

3D3V_S03D3V_VGA_ S03D3V_VGA_S0

R7648

R7648 10KR2J-L-GP

10KR2J-L-GP

OPS_GC6

1 2

EC_FB_CLAMP_TGL_REQ# [24]

OPS

12

R7602

R7602 10KR2J-3-GP

10KR2J-3-GP

3D3V_VGA_S0

R7608

4K99R2F-L-GP

ROM_SO

3D3V_VGA_S0 3 D3V_VGA_S0 3D3V_VG A_S0

R7613

10KR2J-3-GP

STRAP4

2

OPS

DY

OPS

12

10KR2J-3-GP

ROM_SI

R7621

R7621 15KR2F-GP

15KR2F-GP

10KR2J-3-GP

R7609

R7609 45K3R2F-L-GP

45K3R2F-L-GP

R7611

R7614

STRAP3

3D3V_VGA_S0

12

DY

12

R7618

R7618 45K3R2F-L-GP

45K3R2F-L-GP

Samsung

12

DY

12

R7625

R7625 4K99R2F-L-GP

4K99R2F-L-GP

OPS

3D3V_VGA_S0

12

R7612

10KR2J-3-GP

DY

ROM_SCLK

12

R7617

R7617 15KR2F-GP

15KR2F-GP

OPS

12

DY

12

R7627

R7627 4K99R2F-L-GP

4K99R2F-L-GP

45K3R2F-L-GP

Reserved

Hadley 15"

1

3D3V_VGA_S0

R7616

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3D3V_VGA_S0

12

R7620

R7615

10KR2J-3-GP

STRAP2

R7620

45K3R2F-L-GP

DY

STRAP1 STRAP0

12

R7619

R7619 24K9R2F-L-GP

24K9R2F-L-GP

OPS

Title

Size Document Number Rev

Custom

Date: Sheet of

OPS

DY

12

R7622

R7622 15KR2F-GP

15KR2F-GP

X02

76 101Friday, June 28, 2013

X02

5

4

3

2

1

SSID = VIDEO

VGA_CORE

6 OF 17

GPU1F

8 OF 17

GPU1H

Under GPU

C7708

C7709

C7725

SC10U6D3V3MX-GP

C7715

OPS

SC1U6D3V2KX-GP

OPS

C7709

OPS

SC4D7U6D3V3KX-GP

C7722

12

OPS

SC4D7U6D3V3KX-GP

C7718

12

OPS

SC1U6D3V2KX-GP

D D

C7716

12

OPS

C C

SC1U6D3V2KX-GP

C7708

12

C7707

SC10U6D3V3MX-GP

OPS

C7723

C7724

12

SC10U6D3V3MX-GP

OPS

SC4D7U6D3V3KX-GP

C7714

C7717

12

OPS

SC1U6D3V2KX-GP

OPS

SC4D7U6D3V3KX-GP

OPS

SCD1U10V2KX-4GP

12

C7706

SC10U6D3V3MX-GP

OPS

C7721

12

C7713

12

N14P-GT : 45A

C7701

C7702

12

OPS

SC4D7U6D3V3KX-GP

C7719

C7720

12

OPS

SC4D7U6D3V3KX-GP

C7711

C7712

12

OPS

SC1U6D3V2KX-GP

OPS

SC4D7U6D3V3KX-GP

OPS

SC4D7U6D3V3KX-GP

OPS

SC1U6D3V2KX-GP

12

NEAR TO GPU

12

C7703

C7705

SC10U6D3V3MX-GP

OPS

B B

12

OPS

12

UMA

R7701

0R3J-0-U-GP

12

C7710

SC10U6D3V3MX-GP

GPU1H

AA12

VDD_1

AA14

VDD_2

AA16

VDD_3

AA19

VDD_4

AA21

VDD_5

AA23

VDD_6

AB13

VDD_7

AB15

VDD_8

AB17

VDD_9

AB18

VDD_10

AB20

VDD_11

AB22

VDD_12

AC12

VDD_13

AC14

VDD_14

AC16

VDD_15

AC19

VDD_16

AC21

VDD_17

AC23

VDD_18

M12

VDD_19

M14

VDD_20

M16

VDD_21

M19

VDD_22

M21

VDD_23

M23

VDD_24

N13

VDD_25

N15

VDD_26

N17

VDD_27

N18

VDD_28

N20

VDD_29

N22

VDD_30

P12

VDD_31

P14

VDD_32

P16

VDD_33

P19

VDD_34

P21

VDD_35

P23

VDD_36

R13

VDD_37

R15

VDD_38

R17

VDD_39

R18

VDD_40

R20

VDD_41

R22

VDD_42

T12

VDD_43

T14

VDD_44

T16

VDD_45

T19

VDD_46

T21

VDD_47

T23

VDD_48

U13

VDD_49

U15

VDD_50

U17

VDD_51

U18

VDD_52

U20

VDD_53

U22

VDD_54

V13

VDD_55

V15

VDD_56

V17

VDD_57

V18

VDD_58

V20

VDD_59

V22

VDD_60

W12

VDD_61

W14

VDD_62

W16

VDD_63

W19

VDD_64

W21

VDD_65

W23

VDD_66

Y13

VDD_67

Y15

VDD_68

Y17

VDD_69

Y18

VDD_70

Y20

VDD_71

Y22

VDD_72

N14P-GS-A1-GP

71.0N14P.00U

OPS

13/17 NVVDD

GPU1F

A2

GND_1

AA17

GND_5

AA18

GND_6

AA20

GND_7

AA22

GND_8

AB12

GND_9

AB14

GND_10

AB16

GND_11

AB19

GND_12

AB2

GND_13

AB21

GND_14

A33

GND_2

AB23

GND_15

AB28

GND_16

AB30

GND_17

AB32

GND_18

AB5

GND_19

AB7

GND_20

AC13

GND_21

AC15

GND_22

AC17

GND_23

AC18

GND_24

AA13

GND_3

AC20

GND_25

AC22

GND_26

AE2

GND_27

AE28

GND_28

AE30

GND_29

AE32

GND_30

AE33

GND_31

AE5

GND_32

AE7

GND_33

AH10

GND_34

AA15

GND_4

AH13

GND_35

AH16

GND_36

AH19

GND_37

AH2

GND_38

AH22

GND_39

AH24

GND_40

AH28

GND_41

AH29

GND_42

AH30

GND_43

AH32

GND_44

AH33

GND_45

AH5

GND_46

AH7

GND_47

AJ7

GND_48

AK10

GND_49

AK7

GND_50

AL12

GND_51

AL14

GND_52

AL15

GND_53

AL17

GND_54

AL18

GND_55

AL2

GND_56

AL20

GND_57

AL21

GND_58

AL23

GND_59

AL24

GND_60

AL26

GND_61

AL28

GND_62

AL30

GND_63

AL32

GND_64

AL33

GND_65

AL5

GND_66

AM13

GND_67

AM16

GND_68

AM19

GND_69

AM22

GND_70

N14P-GS-A1-GP

71.0N14P.00U

OPS

15/17 GND_1/2

6 OF 17

GND_71 GND_72 GND_73 GND_74 GND_75 GND_76 GND_77 GND_78 GND_79 GND_80 GND_81 GND_82 GND_83 GND_84 GND_85 GND_86 GND_87 GND_88 GND_89 GND_90 GND_91 GND_92 GND_93 GND_94 GND_95 GND_96 GND_97 GND_98

GND_99 GND_100 GND_101 GND_102 GND_103 GND_104 GND_105 GND_106 GND_107 GND_108 GND_109 GND_110 GND_111 GND_112 GND_113 GND_114 GND_115 GND_116 GND_117 GND_118 GND_119 GND_120 GND_121 GND_122 GND_123 GND_124 GND_125 GND_126 GND_127 GND_128 GND_129 GND_130 GND_131 GND_132 GND_133 GND_134 GND_135 GND_136 GND_137 GND_138 GND_139 GND_140

AM25 AN1 AN10 AN13 AN16 AN19 AN22 AN25 AN30 AN34 AN4 AN7 AP2 AP33 B1 B10 B22 B25 B28 B31 B34 B4 B7 C10 C13 C19 C22 C25 C28 C7 D2 D31 D33 E10 E22 E25 E5 E7 F28 F7 G10 G13 G16 G19 G2 G22 G25 G28 G3 G30 G32 G33 G5 G7 K2 K28 K30 K32 K33 K5 K7 M13 M15 M17 M18 M20 M22 N12 N14 N16

GPU1G

N19

N2 N21 N23 N28 N30 N32 N33

N5

N7 P13 P15 P17 P18 P20 P22 R12 R14 R16 R19 R21 R23

T13 T15 T17 T18

T2

T20 T22

AG11

N14P-GS-A1-GP

71.0N14P.00U

OPS

GND_141 GND_142 GND_143 GND_144 GND_145 GND_146 GND_147 GND_148 GND_149 GND_150 GND_151 GND_152 GND_153 GND_154 GND_155 GND_156 GND_157 GND_158 GND_159 GND_160 GND_161 GND_162 GND_163 GND_164 GND_165 GND_166 GND_167 GND_168 GND_169

GND_F

Optional CMD GNDs (2)

NC for 4-Lyr cards

16/17 GND_2/2

7 OF 17

GND_170 GND_171 GND_172 GND_173 GND_174 GND_175 GND_176 GND_177 GND_178 GND_179 GND_180 GND_181 GND_182 GND_183 GND_184 GND_185 GND_186 GND_187 GND_188 GND_189 GND_190 GND_191 GND_192 GND_193 GND_194 GND_195 GND_196 GND_197 GND_198

GND_H

GND_OPT_1 GND_OPT_2

T28 T32 T5 T7 U12 U14 U16 U19 U21 U23 V12 V14 V16 V19 V21 V23 W13 W15 W17 W18 W20 W22 W28 Y12 Y14 Y16 Y19 Y21 Y23

AH11

C16 W32

GPU1I

9/17 XVDD

CONFIGURABLE

CONFIGURABLE POWER

POWER CHANNELS

CHANNELS

N14P-GS-A1-GP

71.0N14P.00U

OPS

9 OF 17

XVDD_1 XVDD_2 XVDD_3 XVDD_4 XVDD_5 XVDD_6 XVDD_7 XVDD_8

XVDD_9 XVDD_10 XVDD_11 XVDD_12 XVDD_13 XVDD_14 XVDD_15 XVDD_16

XVDD_17 XVDD_18 XVDD_19 XVDD_20 XVDD_21 XVDD_22

XVDD_23 XVDD_24 XVDD_25 XVDD_26 XVDD_27 XVDD_28 XVDD_29 XVDD_30

XVDD_31 XVDD_32 XVDD_33 XVDD_34 XVDD_35 XVDD_36 XVDD_37 XVDD_38

U1 U2 U3 U4 U5 U6 U7 U8

V1 V2 V3 V4 V5 V6 V7 V8

W2 W3 W4 W5 W7 W8

Y1 Y2 Y3 Y4 Y5 Y6 Y7 Y8

AA1 AA2 AA3 AA4 AA5 AA6 AA7 AA8

C7729

OPS

SCD1U10V2KX-5GP

3.3V +/- 5% 85mA

X7R

12

C7727

OPS

SCD1U10V2KX-5GP

3D3V_VGA_S0

X7R

C7728

OPS

SC1U6D3V2KX-GP

12

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

Custom

Date: Sheet of

3

2

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan, R.O.C.

GPU_POWER(4/5)

77 101Friday, June 28, 2013

1

X02

12

5 OF 17

GK107

3V3MISC

3V3MISC 3V3MISC

3V3MISC

DO NOT

CONNECT

THESE

PINS

5

5 OF 17

GK208

GK208 GF117

GF117

3V3MISC_1 3V3MISC_2

VDD33_1 VDD33_2

DA-05691-001_V0 5 P20 3V3MISC : N13P- GS

J8 K8

L8 M8

12

C7704

OPS

SC1U6D3V2KX-GP

0.1U Under GPU

4.7U NEAR TO GPU

1U NEAR TO GPU

4

GPU1E

17/17 NC/VDD33

AJ28

NC#AJ28

C15

NC#C15

D19

NC#D19

D20

NC#D20

D23

NC#D23

D26

NC#D26

H31

NC#H31

V32

NC#V32

AC6

DNU#AC6

AJ4

DNU#AJ4

AJ5

DNU#AJ5

AL11

DNU#AL11

T8

DNU#T8

N14P-GS-A1-GP

71.0N14P.00U

A A

71.0N14P.00U

OPS

5

SSID = VIDEO

4

3

2

1

Place close VDD ball

1D35V_ VGA_S0

OPS

C7805

SC1U6D3V3KX-2GP

C7805

SC1U6D3V3KX-2GP

C7804

SC10U6D3V3MX-GP

C7804

SC10U6D3V3MX-GP

12

OPS

Place close VDD ball

1D35V_ VGA_S0

OPS

C7820

SCD1U10V2KX-4GP

C7820

SCD1U10V2KX-4GP

C7821

SCD1U10V2KX-4GP

C7821

SCD1U10V2KX-4GP

12

OPS

Place close VDDQ ball

1D35V_ VGA_S0

C7814

SC1U6D3V3KX-2GP

C7814

SC1U6D3V3KX-2GP

OPS

12

OPS

12

OPS

C7807

SC1U6D3V3KX-2GP

C7807

SC1U6D3V3KX-2GP

C7809

SC1U6D3V3KX-2GP

C7809

C7806

SC1U6D3V3KX-2GP

C7806

SC1U6D3V3KX-2GP

OPS

C7822

SCD1U10V2KX-4GP

C7822

SCD1U10V2KX-4GP

SC1U6D3V3KX-2GP

12

OPS

C7823

SCD1U10V2KX-4GP

C7823

SCD1U10V2KX-4GP

C7824

SCD1U10V2KX-4GPDYC7824

SCD1U10V2KX-4GP

12

DY

C7810

SC1U6D3V3KX-2GP

C7810

SC1U6D3V3KX-2GP

C7811

SC1U6D3V3KX-2GP

C7811

SC1U6D3V3KX-2GP

C7812

SC1U6D3V3KX-2GP

C7812

SC1U6D3V3KX-2GP

OPS

12

OPS

Place close VDDQ ball

1D35V_ VGA_S0 1D35V_ VGA_S0

C7817

SCD1U10V2KX-4GP

C7817

C7815

SCD1U10V2KX-4GP

C7815

SCD1U10V2KX-4GP

C7808

SCD1U10V2KX-4GP

C7808

SCD1U10V2KX-4GP

OPS

12

SCD1U10V2KX-4GP

C7816

SCD1U10V2KX-4GP

C7816

SCD1U10V2KX-4GP

OPS

12

OPS

12

C7825

SCD1U10V2KX-4GP

C7825

SCD1U10V2KX-4GP

12

C7819

SCD1U10V2KX-4GP

C7819

SCD1U10V2KX-4GP

C7818

SCD1U10V2KX-4GP

C7818

SCD1U10V2KX-4GP

12

OPS

1D35V_ VGA_S0

FBA_VRE FC0

FBA_VRE FD_L

1D35V_ VGA_S0

C5 C10 D11

G1

G4 G11 G14

L1

L4 L11 L14

P11

R5

R10

B1

B3

B12 B14

D1

D3 D12 D14

E5

E10

F1

F3 F12 F14

G2

G13

H3

H12

K3

K12

L2 L13

M1

M3 M12 M14

N5 N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10 U10

1D35V_ VGA_S0

D D

1D35V_ VGA_S0

C C

FBA_VRE FC0

FBA_VRE FD_L

C7826

SC820P50V2KX-1GP

C7826

SC820P50V2KX-1GP

12

OPS

VRAM1A

C5 C10 D11

G1

G4 G11 G14

L1

L4 L11 L14 P11

R5

R10

B1

B3 B12 B14

D1

D3 D12 D14

E5

E10

F1

F3 F12 F14

G2

G13

H3

H12

K3 K12

L2 L13

M1

M3 M12 M14

N5 N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10

U10

H5GQ2H2 4AFR-T2C-GP

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VREFD VREFD

OPS

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VPP/NC#A5 VPP/NC#U5

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

VPP1 VPP2

TP7801 TPAD14 -OP-GPTP7801 TPAD1 4-OP-GP

1

TP7802 TPAD14 -OP-GPTP7802 TPAD1 4-OP-GP

1

Frame Buffer Patition A-Lower Half

1D35V_ VGA_S0

12

R7805

R7806

549R2F-G P

FBA_VRE FC0

SC820P50V2KX-1GP

12

OPS

GPIO10 _FBVREF[76,7 9,80,81]

FBVREF Termination

Type

Un-termination

549R2F-G P

C7803

12

OPS

R7807

1K33R2F-GP

R7807

1K33R2F-GP

OPS

FBVREF%

70%Termination

549R2F-G P

OPS

R7804

931R2F-1-GP

R7804

931R2F-1-GP

12

OPS

FBA_VRE F_FET_L

D

G

Voltage

0.749V5 0%

1.0617V

FBA_VRE FD_L

R7809

1K33R2F-GP

R7809

1K33R2F-GP

R7803

931R2F-1-GP

R7803

931R2F-1-GP

12

OPS

Q7801

Q7801 2N7002 K-2-GP

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

Description

GPU_GPIO10

High

Low

C7802

SC820P50V2KX-1GP

C7802

SC820P50V2KX-1GP

VRAM2A

VDD

OPS

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VPP/NC#A5

VPP/NC#U5 VREFD VREFD

H5GQ2H2 4AFR-T2C-GP

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 3

1

TP_VPPNC 4

1

C7827

ST330U2VDM-4-GPDYC7827

ST330U2VDM-4-GP

12

DY

OPS

C7813

SC10U6D3V3MX-GP

C7813

SC10U6D3V3MX-GP

OPS

Place close VDD ball

OPS

TP7803 TPAD14 -OP-GPTP7803 TPAD1 4-OP-GP TP7804 TPAD14 -OP-GPTP7804 TPAD1 4-OP-GP

12

R7810

1KR2J-1-GP

R7810

1KR2J-1-GP

FBA_CLK 0P FBA_CLK 0N

OPS

FBA_CMD1 0[75] FBA_CMD7[75] FBA_CMD6[75] FBA_CMD1 1[75] FBA_CMD9[75]

FBA_CMD3[75] FBA_CMD1[75] FBA_CMD2[75] FBA_CMD4[75]

FBA_CMD8[75] FBA_CMD1 5[75] FBA_CMD5[75] FBA_CMD1 2[75] FBA_CMD0[75]

FBA_CMD1 4[75]

FBA_CMD1 3[75]

1D35V_ VGA_S0

R7813

121R2F-GP

R7813

121R2F-GP

12

FBA_DQM 0 FBA_DQM 1 FBA_DQM 2 FBA_DQM 3

R7812 1KR2J-1-G P

FBA_EDC 0 FBA_EDC 1 FBA_EDC 2

B B

Normal(MF=0)

VRAM1B

FBA_CMD6[75] FBA_CMD1 1[75] FBA_CMD1 0[75] FBA_CMD7[75] FBA_CMD9[75]

FBA_CMD2[75] FBA_CMD4[75] FBA_CMD3[75] FBA_CMD1[75]

FBA_CMD8[75] FBA_CMD1 2[75] FBA_CMD0[75] FBA_CMD1 5[75] FBA_CMD5[75]

FBA_CLK 0P[75] FBA_CLK 0N[7 5] FBA_CMD1 4[75]

OPS

FBA_CMD1 3[75]

R7808

121R2F-GP

R7808

121R2F-GP

12

OPS

A A

FBA_CMD6 FBA_CMD1 1 FBA_CMD1 0 FBA_CMD7 FBA_CMD9

FBA_CMD2 FBA_CMD4 FBA_CMD3 FBA_CMD1

FBA_CMD8 FBA_CMD1 2 FBA_CMD0 FBA_CMD1 5 FBA_CMD5

FBA_CLK 0P FBA_CLK 0N FBA_CMD1 4

FBA_DQM 0

FBA_DQM 2

FBA_CMD1 3

FBA_SE N0 FBA_ZQ0 FBA_MF1

R7811

1KR2J-1-GP

R7811

1KR2J-1-GP

FBA_W CK01 FBA_W CK01#

FBA_W CK23 FBA_W CK23#

1 2

5

VRAM1B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBA_D0

A4

FBA_D1

A2

FBA_D2

B4

FBA_D3

B2

FBA_D4

E4

FBA_D5

E2

FBA_D6

F4

FBA_D7

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D16

U11

FBA_D17

U13

FBA_D18

T11

FBA_D19

T13

FBA_D20

N11

FBA_D21

N13

FBA_D22

M11

FBA_D23

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBA_EDC 0

C2 C13

FBA_EDC 2

R13 R2

FBA_EDC 3

FBA_D[0 ..31] [75]

4

R7802

40D2R2F -GP

OPS

C7801

SCD01U1 6V2KX-3GP

12

R7801

R7801 40D2R2F -GP

40D2R2F -GP

OPS

FBA_CLK 0_MIDPT

OPS

1 2

OPS

FBA_W CK23[75] FBA_W CK23#[75] FBA_W CK01[75] FBA_W CK01#[75]

1 2

3

OPS

12

FBA_DQM [0..3] [ 75]FBA_EDC [0..3][75 ]

FBA_CMD1 0 FBA_CMD7 FBA_CMD6 FBA_CMD1 1 FBA_CMD9

FBA_CMD3 FBA_CMD1 FBA_CMD2 FBA_CMD4

FBA_CMD8 FBA_CMD1 5 FBA_CMD5 FBA_CMD1 2 FBA_CMD0

FBA_CMD1 4

FBA_DQM 3

FBA_DQM 1

FBA_CMD1 3

FBA_SE N0 FBA_ZQ1 FBA_MF2

FBA_W CK23 FBA_W CK23#

FBA_W CK01 FBA_W CK01#

Mirrored(MF=1)

VRAM2B

K4

A8/A7

OPS

A9/A1 A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

BA0/A2 BA1/A5 BA2/A4 BA3/A3

J4

ABI# RAS# CS#

L3

CAS# WE#

CK CK#

J3

CKE#

DBI0# DBI1# DBI2#

P2

DBI3#

J2

RESET#

SEN ZQ

J1

MF

WCK01 WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

H5 H4

H11 K10 K11 H10

G3

G12

L12

J12 J11

D2 D13 P13

J10 J13

D4

D5

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBA_D24

A4

FBA_D25

A2

FBA_D26

B4

FBA_D27

B2

FBA_D28

E4

FBA_D29

E2

FBA_D30

F4

FBA_D31

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D8

U11

FBA_D9

U13

FBA_D10

T11

FBA_D11

T13

FBA_D12

N11

FBA_D13

N13

FBA_D14

M11

FBA_D15

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBA_EDC 3

C2 C13

FBA_EDC 1

R13 R2

2

FBA_D[0 ..31] [7 5]

Title

Size Docu ment Numb er Rev

Size Docu ment Numb er Rev Custom

Custom

Friday, June 2 8, 2013

Friday, June 2 8, 2013 Date: Sheet

Date: Sheet

GPU-VRAM1,2 (1/4)

Hadley 15"

1

Wistron Corporation

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 22 1, Taiwan, R.O.C.

Taipei Hsien 22 1, Taiwan, R.O.C.

of

78 101

of

78 101

of

78 101

X02

5

SSID = VIDEO

4

3

2

1

1D35V_ VGA_S0

FBA_VRE FC1

FBA_VRE FD_H

1D35V_ VGA_S0

VRAM4A

C5

VDD

C10

VDD

D11

VDD

G1

VDD

G4

VDD

G11

VDD

G14

VDD

L1

VDD

L4

VDD

L11

VDD

L14

VDD

P11

VDD

R5

VDD

R10

VDD

B1

VDDQ

B3

VDDQ

B12

VDDQ

B14

VDDQ

D1

VDDQ

D3

VDDQ

D12

VDDQ

D14

VDDQ

E5

VDDQ

E10

VDDQ

F1

VDDQ

F3

VDDQ

F12

VDDQ

F14

VDDQ

G2

VDDQ

G13

VDDQ

H3

VDDQ

H12

VDDQ

K3

VDDQ

K12

VDDQ

L2

VDDQ

L13

VDDQ

M1

VDDQ

M3

VDDQ

M12

VDDQ

M14

VDDQ

N5

VDDQ

N10

VDDQ

P1

VDDQ

P3

VDDQ

P12

VDDQ

P14

VDDQ

T1

VDDQ

T3

VDDQ

T12

VDDQ

T14

VDDQ

J14

VREFC

A10

VREFD

U10

VREFD

H5GQ2H2 4AFR-T2C-GP

OPS

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VPP/NC#A5 VPP/NC#U5

1D35V_ VGA_S0

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 7 TP_VPPNC 8

TP7903 TPAD14-O P-GPTP7903 TPAD14 -OP-GP

1

TP7904 TPAD14-O P-GPTP7904 TPAD14 -OP-GP

1

C7907

SC10U6D3V3MX-GP

C7907

SC10U6D3V3MX-GP

12

OPS

12

OPS

C7918

SC10U6D3V3MX-GP

C7918

SC10U6D3V3MX-GP

12

OPS

Place close VDD ball

12

OPS

Place close VDD ball

C7905

SC1U6D3V3KX-2GP

C7905

C7924

SC1U6D3V3KX-2GP

C7924

SC1U6D3V3KX-2GP

12

OPS

1D35V_ VGA_S0

C7911

SCD1U10V2KX-4GP

C7911

SCD1U10V2KX-4GP

C7912

SCD1U10V2KX-4GP

C7912

SCD1U10V2KX-4GP

12

OPS

1D35V_ VGA_S0

C7919

SC1U6D3V3KX-2GP

C7919

SC1U6D3V3KX-2GP

12

OPS

1D35V_ VGA_S0 1D35V_ VGA_S0

C7910

SCD1U10V2KX-4GP

C7910

SCD1U10V2KX-4GP

C7909

SCD1U10V2KX-4GP

C7909

SCD1U10V2KX-4GP

12

OPS

SC1U6D3V3KX-2GP

C7906

SC1U6D3V3KX-2GP

C7906

C7904

SC1U6D3V3KX-2GP

C7904

SC1U6D3V3KX-2GP

12

OPS

SC1U6D3V3KX-2GP

12

OPS

Place close VDD ball

C7920

SCD1U10V2KX-4GP

C7920

C7913

SCD1U10V2KX-4GP

C7913

SCD1U10V2KX-4GP

12

OPS

SCD1U10V2KX-4GP

C7914

SCD1U10V2KX-4GP

C7914

SCD1U10V2KX-4GP

12

OPS

Place close VDDQ ball

SC1U6D3V3KX-2GP

12

OPS

12

OPS

C7917

SC1U6D3V3KX-2GP

C7917

SC1U6D3V3KX-2GP

C7916

SC1U6D3V3KX-2GP

C7916

SC1U6D3V3KX-2GP

C7915

SC1U6D3V3KX-2GP

C7915

Place close VDDQ ball

C7921

SCD1U10V2KX-4GP

C7921

SCD1U10V2KX-4GP

C7922

SCD1U10V2KX-4GP

C7922

SCD1U10V2KX-4GP

12

OPS

C7926

SCD1U10V2KX-4GP

C7926

SCD1U10V2KX-4GP

12

C7925

SCD1U10V2KX-4GPDYC7925

SCD1U10V2KX-4GP

C7923

SCD1U10V2KX-4GP

C7923

SCD1U10V2KX-4GP

12

DY

1D35V_ VGA_S0

D D

1D35V_ VGA_S0

C C

FBA_VRE FC1

FBA_VRE FD_H

SC820P50V2KX-1GP

12

OPS

C7908

VRAM3A

C5 C10 D11

G1

G4 G11 G14

L1

L4 L11 L14 P11

R5

R10

B1

B3 B12 B14

D1

D3

D12 D14

E5 E10

F1

F3 F12 F14

G2

G13

H3

H12

K3 K12

L2

L13

M1

M3

M12 M14

N5

N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10

U10

H5GQ2H2 4AFR-T2C-GP

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VREFD VREFD

OPS

1 OF 2

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1

VSSQ

A3

VSSQ

A12

VSSQ

A14

VSSQ

C1

VSSQ

C3

VSSQ

C4

VSSQ

C11

VSSQ

C12

VSSQ

C14

VSSQ

E1

VSSQ

E3

VSSQ

E12

VSSQ

E14

VSSQ

F5

VSSQ

F10

VSSQ

H2

VSSQ

H13

VSSQ

K2

VSSQ

K13

VSSQ

M5

VSSQ

M10

VSSQ

N1

VSSQ

N3

VSSQ

N12

VSSQ

N14

VSSQ

R1

VSSQ

R3

VSSQ

R4

VSSQ

R11

VSSQ

R12

VSSQ

R14

VSSQ

U1

VSSQ

U3

VSSQ

U12

VSSQ

U14

VSSQ

A5

VPP/NC#A5

U5

VPP/NC#U5

TP_VPPNC 5 TP_VPPNC 6

FBA_EDC [4..7][75 ] FBA_DQM [4..7] [ 75]

TP7901 TPAD14-O P-GPTP7901 TPAD14 -OP-GP

1

TP7902 TPAD14-O P-GPTP7902 TPAD14 -OP-GP

1

FBA_EDC 4 FBA_EDC 5 FBA_EDC 6 FBA_EDC 7

Frame Buffer Patition A-Upper Half

1D35V_ VGA_S0

12

R7903

FBA_VRE FC1

C7902

SC820P50V2KX-1GP

C7902

SC820P50V2KX-1GP

12

OPS

GPIO10 _FBVREF[76,7 8,80,81]

FBVREF Termination

Type

Un-termination

549R2F-G P

12

R7903

OPS

1K33R2F-GP

931R2F-1-GP

R7904

12

OPS

FBA_VRE F_FET_H

OPS

FBVREF%

70%Termination

R7907

R7907 549R2F-G P

549R2F-G P

OPS

931R2F-1-GP

R7902

12

OPS

D

G

Voltage

0.749V50%

1.0617V

FBA_VRE FD_H

R7905

R7901

1K33R2F-GP

R7901

1K33R2F-GP

12

OPS

Q7901

Q7901 2N7002 K-2-GP

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

GPU_GPIO10

12

High

Low

C7903

SC820P50V2KX-1GP

C7903

SC820P50V2KX-1GP

FBA_DQM 4 FBA_DQM 5 FBA_DQM 6 FBA_DQM 7

B B

FBA_CMD2 2[75] FBA_CMD2 7[75] FBA_CMD2 6[75] FBA_CMD2 3[75] FBA_CMD2 5[75]

FBA_CMD1 8[75] FBA_CMD2 0[75] FBA_CMD1 9[75] FBA_CMD1 7[75]

FBA_CMD2 4[75] FBA_CMD2 8[75] FBA_CMD1 6[75] FBA_CMD3 1[75] FBA_CMD2 1[75]

FBA_CLK 1P[75] FBA_CLK 1N[75] FBA_CMD3 0[75]

FBA_CMD2 9[75]

R7912

121R2F-GP

R7912

121R2F-GP

OPS

12

OPS

1 2

A A

FBA_CMD2 2 FBA_CMD2 7 FBA_CMD2 6 FBA_CMD2 3 FBA_CMD2 5

FBA_CMD1 8 FBA_CMD2 0 FBA_CMD1 9 FBA_CMD1 7

FBA_CMD2 4 FBA_CMD2 8 FBA_CMD1 6 FBA_CMD3 1 FBA_CMD2 1

FBA_CLK 1P FBA_CLK 1N FBA_CMD3 0

FBA_DQM 4

FBA_DQM 6

FBA_CMD2 9

FBA_SE N2 FBA_ZQ2 FBA_MF3

R7911

1KR2J-1-GP

R7911

1KR2J-1-GP

FBA_W CK45 FBA_W CK45#

FBA_W CK67 FBA_W CK67#

5

Normal(MF=0) Mirrored(MF=1)

VRAM3B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

VRAM4B

FBA_D32

A4

FBA_D33

A2

FBA_D34

B4

FBA_D35

B2

FBA_D36

E4

FBA_D37

E2

FBA_D38

F4

FBA_D39

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D48

U11

FBA_D49

U13

FBA_D50

T11

FBA_D51

T13

FBA_D52

N11

FBA_D53

N13

FBA_D54

M11

FBA_D55

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBA_EDC 4

C2 C13

FBA_EDC 6

R13 R2

FBA_D[3 2..63] [75]

4

R7906

40D2R2F -GP

OPS

C7901

SCD01U1 6V2KX-3GP

12

FBA_CLK 1_MIDPT

OPS

1 2

OPS

FBA_W CK67[75] FBA_W CK67#[75] FBA_W CK45[75] FBA_W CK45#[75]

R7908

R7908 40D2R2F -GP

40D2R2F -GP

OPS

1D35V_ VGA_S0

R7909

1KR2J-1-GP

R7909

1KR2J-1-GP

OPS

1 2

FBA_CMD2 6[75] FBA_CMD2 3[75] FBA_CMD2 2[75] FBA_CMD2 7[75] FBA_CMD2 5[75]

FBA_CMD1 9[75] FBA_CMD1 7[75] FBA_CMD1 8[75] FBA_CMD2 0[75]

FBA_CMD2 4[75] FBA_CMD3 1[75] FBA_CMD2 1[75] FBA_CMD2 8[75] FBA_CMD1 6[75]

FBA_CMD3 0[75]

FBA_CMD2 9[75]

121R2F-GP

12

3

R7910 1KR2J-1-GP

R7910 1KR2J-1-GP R7913

R7913

OPS

12

FBA_CMD2 6 FBA_CMD2 3 FBA_CMD2 2 FBA_CMD2 7 FBA_CMD2 5

FBA_CMD1 9 FBA_CMD1 7 FBA_CMD1 8 FBA_CMD2 0

FBA_CMD2 4 FBA_CMD3 1 FBA_CMD2 1 FBA_CMD2 8 FBA_CMD1 6

FBA_CLK 1P FBA_CLK 1N FBA_CMD3 0

FBA_DQM 7

FBA_DQM 5

FBA_CMD2 9

FBA_SE N2 FBA_ZQ3 FBA_MF4

FBA_W CK67 FBA_W CK67#

FBA_W CK45 FBA_W CK45#

VRAM4B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBA_D56

A4

FBA_D57

A2

FBA_D58

B4

FBA_D59

B2

FBA_D60

E4

FBA_D61

E2

FBA_D62

F4

FBA_D63

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBA_D40

U11

FBA_D41

U13

FBA_D42

T11

FBA_D43

T13

FBA_D44

N11

FBA_D45

N13

FBA_D46

M11

FBA_D47

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBA_EDC 7

C2 C13

FBA_EDC 5

R13 R2

2

FBA_D[3 2..63] [75]

Wistron Corporation

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 22 1, Taiwan, R.O.C.

Taipei Hsien 22 1, Taiwan, R.O.C.

Title

Size Docu ment Numb er Rev

Size Docu ment Numb er Rev Custom

Custom

Friday, June 2 8, 2013

Friday, June 2 8, 2013 Date: Sheet

Date: Sheet

Taipei Hsien 22 1, Taiwan, R.O.C.

GPU-VRAM3,4 (2/4)

Hadley 15"

1

79 101

of

X02

5

4

3

2

1

SSID = VIDEO

1D35V_ VGA_S0

D D

1D35V_ VGA_S0

C C

FBB_VRE FD_L

SC820P50V2KX-1GP

12

OPS

C8026

VRAM5A

C5 C10 D11

G1

G4 G11 G14

L1

L4 L11 L14 P11

R5

R10

B1

B3 B12 B14

D1

D3

D12 D14

E5 E10

F1

F3 F12 F14

G2

G13

H3

H12

K3 K12

L2

L13

M1

M3

M12 M14

N5

N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10

U10

H5GQ2H2 4AFR-T2C-GP

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VREFD VREFD

OPS

VPP/NC#A5 VPP/NC#U5

1 OF 2

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

B5 B10 D10 G5 G10 H1 H14 K1 K14 L5 L10 P10 T5 T10

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 9 TP_VPPNC 10

TP8001 TPAD14-O P-GPTP8001 TPAD14 -OP-GP

1

TP8002 TPAD14-O P-GPTP8002 TPAD14 -OP-GP

1

Frame Buffer Patition B-Lower Half

SC820P50V2KX-1GP

12

OPS

GPIO10 _FBVREF[76,7 8,79,81]

549R2F-G P

C8022

OPS

R8005

1K33R2F-GP

12

1D35V_ VGA_S0

12

OPS

R8007

931R2F-1-GP

12

OPS

FBB_VRE F_FET_L

OPS

12

R8004

R8004 549R2F-G P

549R2F-G P

OPS

931R2F-1-GP

R8003

12

OPS

D

S

G

FBB_VRE FD_LFBB_VRE FC0

R8006

1K33R2F-GP

R8006

1K33R2F-GP

R8009

12

OPS

Q8001

Q8001 2N7002 K-2-GP

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

FBVREF Termination

Type

Un-termination

FBVREF%

70%Termination

Voltage

0.749V5 0%

1.0617V

GPU_GPIO10

High

Low

C8020

SC820P50V2KX-1GP

C8020

SC820P50V2KX-1GP

1D35V_ VGA_S0

FBB_VRE FC0

FBB_VRE FD_LFBB_VRE FC0

VRAM6A

C5 C10 D11

G1

G4 G11 G14

L1

L4

L11 L14

P11

R5 R10

B1

B3 B12 B14

D1

D3 D12 D14

E5 E10

F1

F3 F12 F14

G2 G13

H3 H12

K3 K12

L2

L13

M1

M3 M12 M14

N5 N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10 U10

H5GQ2H2 4AFR-T2C-GP

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VREFD VREFD

OPS

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VPP/NC#A5 VPP/NC#U5

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 11

1

TP_VPPNC 12

1

Normal(MF=0)

1D35V_ VGA_S0

C8023

SC10U6D3V3MX-GP

C8023

SC10U6D3V3MX-GP

TP8003 TPAD14-O P-GPTP8003 TPAD14 -OP-GP TP8004 TPAD14-O P-GPTP8004 TPAD14 -OP-GP

12

OPS

1D35V_ VGA_S0

C8014

SCD1U10V2KX-4GP

C8014

SCD1U10V2KX-4GP

12

OPS

1D35V_ VGA_S0

C8007

12

OPS

Place close VDD ball

1D35V_ VGA_S0

C8001

SCD1U10V2KX-4GP

C8001

SCD1U10V2KX-4GP

12

OPS

Place close VDD ball

C8021

SC1U6D3V3KX-2GP

C8021

SC1U6D3V3KX-2GP

C8024

SC1U6D3V3KX-2GP

C8024

SC1U6D3V3KX-2GP

C8002

SC1U6D3V3KX-2GP

C8002

SC1U6D3V3KX-2GP

12

OPS

Place close VDD ball

C8017

SCD1U10V2KX-4GP

C8017

OPS

SCD1U10V2KX-4GP

C8016

SCD1U10V2KX-4GP

C8016

SCD1U10V2KX-4GP

12

OPS

C8015

SCD1U10V2KX-4GP

C8015

SCD1U10V2KX-4GP

Place close VDDQ ball

C8004

SC1U6D3V3KX-2GP

C8004

SC1U6D3V3KX-2GP

C8005

SC1U6D3V3KX-2GP

C8005

OPS

SC1U6D3V3KX-2GP

12

OPS

C8008

SC1U6D3V3KX-2GP

C8008

SC1U6D3V3KX-2GP

Place close VDDQ ball

SCD1U10V2KX-4GP

OPS

C8009

SCD1U10V2KX-4GP

C8009

SCD1U10V2KX-4GP

12

OPS

SCD1U10V2KX-4GP

12

OPS

C8010

12

OPS

12

SC1U6D3V3KX-2GP

SCD1U10V2KX-4GP

SC1U6D3V3KX-2GP

OPS

C8003

C8018

C8006

12

SCD1U10V2KX-4GP

12

OPS

1D35V_ VGA_S0

C8011

SCD1U10V2KX-4GP

C8011

SCD1U10V2KX-4GP

12

OPS

C8019

C8013

SCD1U10V2KX-4GP

C8013

SCD1U10V2KX-4GP

C8012

SCD1U10V2KX-4GP

C8012

SCD1U10V2KX-4GP

12

OPS

FBB_EDC [0..3][75 ]

B B

FBB_CMD6[75] FBB_CMD1 1[75] FBB_CMD1 0[75] FBB_CMD7[75] FBB_CMD9[75]

FBB_CMD2[75] FBB_CMD4[75] FBB_CMD3[75] FBB_CMD1[75]

FBB_CMD8[75] FBB_CMD1 2[75] FBB_CMD0[75] FBB_CMD1 5[75] FBB_CMD5[75]

FBB_CLK 0P[75] FBB_CLK 0N[75] FBB_CMD1 4[75]

FBB_CMD1 3[75]

R8008

121R2F-GP

R8008

121R2F-GP

12

OPS

A A

OPS

1 2

FBB_CMD6 FBB_CMD1 1 FBB_CMD1 0 FBB_CMD7 FBB_CMD9

FBB_CMD2 FBB_CMD4 FBB_CMD3 FBB_CMD1

FBB_CMD8 FBB_CMD1 2 FBB_CMD0 FBB_CMD1 5 FBB_CMD5

FBB_CLK 0P FBB_CLK 0N FBB_CLK 0N FBB_CMD1 4

FBB_DQM 0

FBB_DQM 2

FBB_CMD1 3

FBB_SE N0 FBB_ZQ0 FBB_MFB

R8011

1KR2J-1-GP

R8011

1KR2J-1-GP

FBB_W CK01 FBB_W CK01#

FBB_W CK23 FBB_W CK23#

5

VRAM5B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBB_D0

A4

FBB_D1

A2

FBB_D2

B4

FBB_D3

B2

FBB_D4

E4

FBB_D5

E2

FBB_D6

F4

FBB_D7

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D16

U11

FBB_D17

U13

FBB_D18

T11

FBB_D19

T13

FBB_D20

N11

FBB_D21

N13

FBB_D22

M11

FBB_D23

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBB_EDC 0

C2 C13

FBB_EDC 2

R13 R2

FBB_EDC 0 FBB_EDC 1 FBB_EDC 2 FBB_EDC 3

4

FBB_D[0 ..31] [7 5]

R8002

40D2R2F -GP

C8025

SCD01U1 6V2KX-3GP

12

OPS

FBB_CLK 0_MIDPT

OPS

1 2

FBB_W CK23[75] FBB_W CK23#[75] FBB_W CK01[75] FBB_W CK01#[75]

3

R8001

R8001 40D2R2F -GP

40D2R2F -GP

OPS

1 2

FBB_DQM 0 FBB_DQM 1 FBB_DQM 2 FBB_DQM 3

1D35V_ VGA_S0

121R2F-GP

R8010

1KR2J-1-GP

R8010

1KR2J-1-GP

12

OPS

FBB_CMD1 0[75] FBB_CMD7[75] FBB_CMD6[75] FBB_CMD1 1[75] FBB_CMD9[75]

FBB_CMD3[75] FBB_CMD1[75] FBB_CMD2[75] FBB_CMD4[75]

FBB_CMD8[75] FBB_CMD1 5[75] FBB_CMD5[75] FBB_CMD1 2[75] FBB_CMD0[75]

FBB_CMD1 4[75]

FBB_CMD1 3[75]

R8013

OPS

12

R8012 1KR2J-1-GP

FBB_DQM [0..3] [ 75]

FBB_CMD1 0 FBB_CMD7 FBB_CMD6 FBB_CMD1 1 FBB_CMD9

FBB_CMD3 FBB_CMD1 FBB_CMD2 FBB_CMD4

FBB_CMD8 FBB_CMD1 5 FBB_CMD5 FBB_CMD1 2 FBB_CMD0

FBB_CLK 0P

FBB_CMD1 4

FBB_DQM 3

FBB_DQM 1

FBB_CMD1 3

FBB_SE N0 FBB_ZQ1 FBB_MF2

FBB_W CK23 FBB_W CK23#

FBB_W CK01 FBB_W CK01#

Mirrored(MF=1)

VRAM6B

K4

A8/A7

OPS

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBB_D24

A4

FBB_D25

A2

FBB_D26

B4

FBB_D27

B2

FBB_D28

E4

FBB_D29

E2

FBB_D30

F4

FBB_D31

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D8

U11

FBB_D9

U13

FBB_D10

T11

FBB_D11

T13

FBB_D12

N11

FBB_D13

N13

FBB_D14

M11

FBB_D15

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBB_EDC 3

C2 C13

FBB_EDC 1

R13 R2

2

FBB_D[0 ..31] [7 5]

Wistron Corporation

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 22 1, Taiwan, R.O.C.

Taipei Hsien 22 1, Taiwan, R.O.C.

Title

Size Docu ment Numb er Rev

Size Docu ment Numb er Rev Custom

Custom

Friday, June 2 8, 2013

Friday, June 2 8, 2013 Date: Sheet

Date: Sheet

Taipei Hsien 22 1, Taiwan, R.O.C.

GPU-VRAM5,6 (3/4)

Hadley 15"

1

80 101

X02

of

5

SSID = VIDEO

4

3

2

1

1D35V_ VGA_S0

FBB_VRE FC1

FBB_VRE FD_H

1D35V_ VGA_S0

C5 C10 D11

G1

D D

1D35V_ VGA_S0

C C

FBB_VRE FC1

FBB_VRE FD_H

12

OPS

G4 G11 G14

L1

L4 L11 L14 P11

R5

R10

B1

B3 B12 B14

D1

D3

D12 D14

E5 E10

F1

F3 F12 F14

G2

G13

H3

H12

K3 K12

L2 L13

M1

M3 M12 M14

N5

N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10

U10

C8126

SC820P50V2KX-1GP

C8126

SC820P50V2KX-1GP

VRAM7A

VDD

OPS

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VPP/NC#A5

VPP/NC#U5 VREFD VREFD

H5GQ2H2 4AFR-T2C-GP

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 13

TP8101 TPAD14 -OP-GPTP8101 TPAD1 4-OP-GP

1

TP_VPPNC 14

TP8102 TPAD14 -OP-GPTP8102 TPAD1 4-OP-GP

1

Frame Buffer Patition B-Upper Half

1D35V_ VGA_S0

12

R8109

FBB_VRE FC1

SC820P50V2KX-1GP

12

OPS

GPIO10 _FBVREF[76,7 8,79,80]

FBVREF Termination

Type

Un-termination

549R2F-G P

C8102

OPS

R8103

1K33R2F-GP

12

OPS

R8104

931R2F-1-GP

12

OPS

FBB_VRE F_FET_H

OPS

FBVREF%

70%Termination

R8109 549R2F-G P

549R2F-G P

OPS

R8102

931R2F-1-GP

12

OPS

D

G

FBB_VRE FD_H

R8101

1K33R2F-GP

R8101

1K33R2F-GP

R8105

12

OPS

Q8101

Q8101 2N7002 K-2-GP

2N7002 K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

GPU_GPIO10

Voltage

0.749V5 0%

1.0617V

High

Low

C8103

SC820P50V2KX-1GP

C8103

SC820P50V2KX-1GP

Normal(MF=0)

VRAM8A

C5 C10 D11

G1

G4 G11 G14

L1

L4 L11 L14 P11

R5 R10

B1

B3 B12 B14

D1

D3 D12 D14

E5 E10

F1

F3 F12 F14

G2 G13

H3 H12

K3 K12

L2 L13

M1

M3 M12 M14

N5 N10

P1

P3 P12 P14

T1

T3 T12 T14

J14

A10 U10

H5GQ2H2 4AFR-T2C-GP

Mirrored(MF=1)

VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD VDD

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VREFC

VREFD VREFD

OPS

1 OF 2

VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ VSSQ

VPP/NC#A5 VPP/NC#U5

B5

VSS

B10

VSS

D10

VSS

G5

VSS

G10

VSS

H1

VSS

H14

VSS

K1

VSS

K14

VSS

L5

VSS

L10

VSS

P10

VSS

T5

VSS

T10

VSS

A1 A3 A12 A14 C1 C3 C4 C11 C12 C14 E1 E3 E12 E14 F5 F10 H2 H13 K2 K13 M5 M10 N1 N3 N12 N14 R1 R3 R4 R11 R12 R14 U1 U3 U12 U14

A5 U5

TP_VPPNC 15

TP8103 TPAD14 -OP-GPTP8103 TPAD1 4-OP-GP

1

TP_VPPNC 16

TP8104 TPAD14 -OP-GPTP8104 TPAD1 4-OP-GP

1

1D35V_ VGA_S0

C8107

SC10U6D3V3MX-GP

C8107

SC10U6D3V3MX-GP

12

OPS

1D35V_ VGA_S0

SCD1U10V2KX-4GP

12

OPS

1D35V_ VGA_S0

C8117

SC10U6D3V3MX-GP

C8117

SC10U6D3V3MX-GP

12

OPS

Place close VDD ball

1D35V_ VGA_S0 1D35V_V GA_S0

SCD1U10V2KX-4GPDYC8109

SCD1U10V2KX-4GP

12

DY

C8124

SC1U6D3V3KX-2GP

C8124

SC1U6D3V3KX-2GP

12

OPS

C8110

C8111

SCD1U10V2KX-4GP

C8111

SCD1U10V2KX-4GP

12

OPS

C8118

SC1U6D3V3KX-2GP

C8118

SC1U6D3V3KX-2GP

12

OPS

C8108

SCD1U10V2KX-4GP

C8108

SCD1U10V2KX-4GP

C8109

12

OPS

Place close VDD ball

C8104

SC1U6D3V3KX-2GP

C8104

SC1U6D3V3KX-2GP

12

Place close VDD ball

C8112

SCD1U10V2KX-4GP

C8112

SCD1U10V2KX-4GP

12

Place close VDDQ ball

C8114

SC1U6D3V3KX-2GP

C8114

SC1U6D3V3KX-2GP

12

OPS

SC1U6D3V3KX-2GP

C8105

SC1U6D3V3KX-2GP

C8105

SC1U6D3V3KX-2GP

12

OPS

C8113

SCD1U10V2KX-4GP

C8113

SCD1U10V2KX-4GP

12

OPS

C8115

SC1U6D3V3KX-2GP

C8115

SC1U6D3V3KX-2GP

12

OPS

Place close VDDQ ball

C8120

SCD1U10V2KX-4GP

C8120

SCD1U10V2KX-4GP

C8122

SCD1U10V2KX-4GP

C8122

SCD1U10V2KX-4GP

12

OPS

C8106

C8119

C8121

SCD1U10V2KX-4GP

C8121

SCD1U10V2KX-4GP

12

OPS

C8116

C8123

SCD1U10V2KX-4GP

C8123

SCD1U10V2KX-4GP

C8125

SCD1U10V2KX-4GP

C8125

SCD1U10V2KX-4GP

12

OPS

FBB_DQM [4..7] [ 75]

FBB_CMD2 6 FBB_CMD2 3 FBB_CMD2 2 FBB_CMD2 7 FBB_CMD2 5

FBB_CMD1 9 FBB_CMD1 7 FBB_CMD1 8 FBB_CMD2 0

FBB_CMD2 4 FBB_CMD3 1 FBB_CMD2 1 FBB_CMD2 8 FBB_CMD1 6

FBB_CLK 1P FBB_CLK 1N FBB_CMD3 0

FBB_DQM 7

FBB_DQM 5

FBB_CMD2 9

FBB_SE N2 FBB_ZQ3 FBB_MF4

12

FBB_W CK67 FBB_W CK67#

FBB_W CK45 FBB_W CK45#

VRAM8B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBB_D56

A4

FBB_D57

A2

FBB_D58

B4

FBB_D59

B2

FBB_D60

E4

FBB_D61

E2

FBB_D62

F4

FBB_D63

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D40

U11

FBB_D41

U13

FBB_D42

T11

FBB_D43

T13

FBB_D44

N11

FBB_D45

N13

FBB_D46

M11

FBB_D47

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBB_EDC 7

C2 C13

FBB_EDC 5

R13 R2

2

FBB_D[3 2..63] [75]

Wistron Corporation

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih,

21F, 88 , Sec.1, Hsin Tai Wu Rd., H sichih, Taipei Hsien 22 1, Taiwan, R.O.C.

Taipei Hsien 22 1, Taiwan, R.O.C.

Title

Size Docu ment Numb er Rev

Size Docu ment Numb er Rev Custom

Custom

Friday, June 2 8, 2013

Friday, June 2 8, 2013 Date: Sheet

Date: Sheet

Taipei Hsien 22 1, Taiwan, R.O.C.

GPU-VRAM7,8 (4/4)

Hadley 15"

1

81 101

of

X02

R8110

R8110 40D2R2F -GP

40D2R2F -GP

OPS

R8111

1KR2J-1-GP

R8111

1KR2J-1-GP

OPS

1 2

3

FBB_DQM 4 FBB_DQM 5 FBB_DQM 6 FBB_DQM 7

FBB_CMD2 6[75] FBB_CMD2 3[75] FBB_CMD2 2[75] FBB_CMD2 7[75] FBB_CMD2 5[75]

FBB_CMD1 9[75] FBB_CMD1 7[75] FBB_CMD1 8[75] FBB_CMD2 0[75]

FBB_CMD2 4[75] FBB_CMD3 1[75] FBB_CMD2 1[75] FBB_CMD2 8[75] FBB_CMD1 6[75]

FBB_CMD3 0[75]

FBB_CMD2 9[75]

1D35V_ VGA_S0

R8114

121R2F-GP

R8114

121R2F-GP

12

R8112 1KR2J-1-GP

FBB_EDC [4..7][75 ]

B B

2 OF 2

OPS

2 OF 2

DQ0 DQ1 DQ2 DQ3 DQ4 DQ5 DQ6 DQ7 DQ8

DQ9 DQ10 DQ11 DQ12 DQ13 DQ14 DQ15 DQ16 DQ17 DQ18 DQ19 DQ20 DQ21 DQ22 DQ23 DQ24 DQ25 DQ26 DQ27 DQ28 DQ29 DQ30 DQ31

EDC0 EDC1 EDC2 EDC3

FBB_D32

A4

FBB_D33

A2

FBB_D34

B4

FBB_D35

B2

FBB_D36

E4

FBB_D37

E2

FBB_D38

F4

FBB_D39

F2 A11 A13 B11 B13 E11 E13 F11 F13

FBB_D48

U11

FBB_D49

U13

FBB_D50

T11

FBB_D51

T13

FBB_D52

N11

FBB_D53

N13

FBB_D54

M11

FBB_D55

M13 U4 U2 T4 T2 N4 N2 M4 M2

FBB_EDC 4

C2 C13

FBB_EDC 6

R13 R2

VRAM7B

5

VRAM7B

K4

A8/A7

H5

A9/A1

H4

A10/A0

K5

A11/A6

J5

A12/RFU#J5/NC#J5

H11

BA0/A2

K10

BA1/A5

K11

BA2/A4

H10

BA3/A3

J4

ABI#

G3

RAS#

G12

CS#

L3

CAS#

L12

WE#

J12

CK

J11

CK#

J3

CKE#

D2

DBI0#

D13

DBI1#

P13

DBI2#

P2

DBI3#

J2

RESET#

J10

SEN

J13

ZQ

J1

MF

D4

WCK01

D5

WCK01#

P4

WCK23

P5

WCK23#

H5GQ2H2 4AFR-T2C-GP

FBB_CMD2 2[75] FBB_CMD2 7[75] FBB_CMD2 6[75] FBB_CMD2 3[75] FBB_CMD2 5[75]

FBB_CMD1 8[75] FBB_CMD2 0[75] FBB_CMD1 9[75] FBB_CMD1 7[75]

FBB_CMD2 4[75] FBB_CMD2 8[75] FBB_CMD1 6[75] FBB_CMD3 1[75] FBB_CMD2 1[75]

FBB_CLK 1P[75] FBB_CLK 1N[7 5] FBB_CMD3 0[75]

FBB_CMD2 9[75]

A A

OPS

R8106

121R2F-GP

R8106

121R2F-GP

12

OPS

1 2

FBB_CMD2 2 FBB_CMD2 7 FBB_CMD2 6 FBB_CMD2 3 FBB_CMD2 5

FBB_CMD1 8 FBB_CMD2 0 FBB_CMD1 9 FBB_CMD1 7

FBB_CMD2 4 FBB_CMD2 8 FBB_CMD1 6 FBB_CMD3 1 FBB_CMD2 1

FBB_CLK 1P FBB_CLK 1N FBB_CMD3 0

FBB_DQM 4

FBB_DQM 6

FBB_CMD2 9

FBB_SE N2 FBB_ZQ2 FBB_MF3

R8113

1KR2J-1-GP

R8113

1KR2J-1-GP

FBB_W CK45 FBB_W CK45#

FBB_W CK67 FBB_W CK67#

FBB_EDC 4 FBB_EDC 5 FBB_EDC 6 FBB_EDC 7

FBB_D[3 2..63] [75]

4

R8108

40D2R2F -GP

C8101

SCD01U1 6V2KX-3GP

OPS

12

FBB_W CK67[75] FBB_W CK67#[75] FBB_W CK45[75] FBB_W CK45#[75]

12

FBB_CLK 1_MIDPT

OPS

1 2

OPS

5

SSID = PWR.Plane.Regulator_vga_core

EN

D D

0307 DY PR8263, POP PR8265 0521 change resistor value from 12K ohm to 10K

PSI

VGA_CORE _PSI[76]

C C

B B

PWR_VG A_CORE_HG 1 PWR_VG A_CORE_SW 1 PWR_VG A_CORE_LG1

A A

3D3V_VGA_S0

OPS

12

PR8258

PR8258 10KR2J-3-G P

10KR2J-3-G P

PWR_VG A_CORE_PSI

12

PR8259

PR8259 0R2J-2-GP

0R2J-2-GP

PC8238

12

SCD1U10V2KX-4GP

PWR_VG A_CORE_EN

3D3V_VGA_S0

PWR_VG A_CORE_HG 2 PWR_VG A_CORE_SW 2 PWR_VG A_CORE_LG2

PR8263 10KR2J-3-GP

1 2

DY

PR8265

PR8257

1 2

OPS

0R0402-PAD -2-GP

PC8214

1 2

10KR2J-3-G P

OPS

SCD1U10V2KX-4GP

3D3V_VGA_S0

OPS

12

DY

DGPU_PW R_EN[15,83]

Phase1

DCBATOU T

OPS

12

567

DDD

12

PC8229

SC10U25V5KX-GP

SIRA12DP-T1-GE3-GP

8

D

SSS

123

12

PC8221

SC10U25V5KX-GP

OPS

G

4

PC8228

OPS

SC10U25V5KX-GP

12

1 2

VGA_SNB1

12

OPS

12

PC8227

PC8227 SCD1U25V3 KX-GP

SCD1U25V3 KX-GP

PL8201

1 2

OPS

COIL-D15UH -2-GP

PR8226

PR8226 2D2R5F-2- GP

2D2R5F-2- GP

DY

PC8231

PC8231 SC330P50V2KX- 3GP

SC330P50V2KX- 3GP

DY

OPS

12

PU8202

PU8206

OPS

4

G

OPS

G

567

DDD

OPS

PC8220

SIRA14DP-T1-GE3-GP

8

D

SSS

123

SIRA12DP-T1-GE3-GP

8

D

PU8208

SSS

123

5

4

DGPU_PW ROK[15,24,83]

VIDEO_THER M_OVERT#[76]

OPS

PR8213 10KR2J-3-G P

1 2

VGA_CORE _VID[76]

NTC-100K- 10-GP

B=4250K

NTC close Phase 1 MOSFET

DCBATOU T

567

DDD

PU8205

OPS

G

4

567

DDD

PU8207

OPS

G

4

VGA_CORE

PT8210

SE330U2D5VM-14-GP

A00 0621

PT8211

SE330U2D5VM-14-GP

12

OPS

I/P cap: 10U 25 V K0805 X5R/ 78 .10622.51L Inductor: CHIP IND 0.22UH M PC MC063T-R22MN/ 2 .8mohm/ Isat =4 0A rms /68.R221 0.10V O/P cap: CHIP C AP POL 330U 2.5 V M 6.3*4.5 2.3 Arms Matsuti/77 .53371.18L H/S: SIRA14DP-T 1-GE3 / 6.8mohm /8.5mOhm@4.5Vgs / 84.A14DP.037 L/S: SIRA12DP-T 1-GE3 / 4.4mohm /6mOhm@4.5Vgs/ 84.SRA12.037

4

PR82150R 2J-2-GP

1 2

DY

PR8214 0R0402-PAD-2-GP

1 2

OPS

12

PC8216

12

SCD1U10V2 KX-4GP

OPS

PC8224

OPS

81172_AGND

SC10U25V5KX-GP

12

PU8209

SCD1U10V2 KX-4GP

OPS

PC8223

SC10U25V5KX-GP

OPS

G

4

3K92R2F-GP

OPS

12

PC8235

567

DDD

PR8202

PR8268

SIRA14DP-T1-GE3-GP

8

D

SSS

123

SIRA12DP-T1-GE3-GP

8

D

SSS

123

12

OPS

81172_AGND

Phase2

OPS

12

SC10U25V5KX-GP

PC8234

SIRA12DP-T1-GE3-GP

8

D

SSS

123

12

OPS

R2

12

PC8222

SCD01U50V 2KX-1GP

12

SC10U25V5KX-GP

DY

1 2

VGA_SNB2

12

DY

5V_S5

12

OPS

12

PC8211

PC8211 SC1U6D3V2 KX-GP

SC1U6D3V2 KX-GP

OPS

81172_AGND

PWR_VG A_CORE_TSE NSE

PWR_VG A_CORE_REF IN

R3

PR8204

PR8204 2KR2F-3-G P

2KR2F-3-G P

VGA_R1R3

PR8211

1 2

OPS

20KR2F-L-G P

R4

18KR2F-GP

R5

0R0402-PAD -2-GP

OPS

12

PC8236

PC8236 SCD1U25V3 KX-GP

SCD1U25V3 KX-GP

PL8202

1 2

OPS

COIL-D15UH -2-GP

PR8229

PR8229 2D2R5F-2- GP

2D2R5F-2- GP

PC8233

PC8233 SC330P50V2KX- 3GP

SC330P50V2KX- 3GP

3

PR8264

PR8264 2D2R2J-GP

2D2R2J-GP

PWR_VG A_CORE_VCC

81172_AGND

PWR_VG A_CORE_EN PWR_VG A_CORE_PSI

PWR_VG A_CORE_TALE RT#

PWR_VG A_CORE_VID

PWR_VG A_CORE_VRE F

PWR_VG A_CORE_VIDBU F

12

PR8207

PR8207 20KR2F-L-G P

20KR2F-L-G P

OPS

R1

OPS

81172_AGND

PWR_VG A_CORE_REF IN

12

PR8203

OPS

VGA_R4R5

12

PR8201

OPS

81172_AGND

VGA_CORE

OPS

3

PU8201

15

25

3

4 16 14

5

13

8

7

6

9

PWR_VG A_CORE_FS

NCP81172MN TXG-1-GP-U

12

74.81172.A73

PR8208

PR8208 34KR2F-GP

34KR2F-GP

C

OPS

81172_AGND

PT8212

12

SE470UF2VD M-GP

ESR=6mohm

PVCC

PGND

FBRTN

COMP

BST1

BST2

21

22

2

HG1

1 24

PH1

23

LG1

17

HG2

18 19

PH2

20

LG2

10 11

FB

12

VCC

GND

OPS

EN PSI PGOOD TALERT# VID

TSNS

VREF REFIN VIDBUF FS

12

PC8219

PC8219 SC2700P50V2KX -1-GP

SC2700P50V2KX -1-GP

VGA type Co nfig Design

N14P-LP

N14P-GE

N14P-GS

N14P-GT

N14P-GV

N14P-GV2

N14M-GS

N14M-LP

N14M-GL

N14M-GE

N14E-GTX

N14E-GS

N14E-GE-B

N14E-GE

N14E-GL

5V_S5

PC8212

1 2

OPS

SC4D7U6D 3V2MX-GP-U

PR8225

PWR_VG A_CORE_HG 1 PWR_VG A_CORE_BST 1 PWR_VG A_CORE_SW 1 PWR_VG A_CORE_LG1

PWR_VG A_CORE_HG 2 PWR_VG A_CORE_BST 2 PWR_VGA_C ORE_BST2_R PWR_VG A_CORE_SW 2 PWR_VG A_CORE_LG2

PWR_VG A_CORE_FBR TN PWR_VG A_CORE_FB

PWR_VG A_CORE_CO MP

PR8212 0R0402-PAD-2-GP

PR8225

0R3J-0-U- GP

OPS

1 2

OPS

PR8216 21KR2F -GP

OPS

PR8230

0R3J-0-U- GP

PC8218

OPS

1 2

OPS

PR8267

SC100P50V2JN -L-GP

82KR2F-1-G P

1 2

OPS

PC8217

OPS

81172_AGND

PWR_VG A_CORE_BST 1_R

12

1 2

12

SC10P50V2JN -4GP

PR8206

49D9R2F-G P

OPS

2

PC8230

1 2

SCD1U25V3 KX-GP

PC8237

1 2

SCD1U25V3 KX-GP

PR8209

10KR2F-2-G P

OPS

PWR_VG A_CORE_SW 1

OPS

PWR_VG A_CORE_SW 2

OPS

1 2

SC47P50V2JN -3GP

1 2

OPS

PC8215

OPS

12

C8232

C8232 SC1KP25V2JX- GP

SC1KP25V2JX- GP

0R0402-PAD -2-GP

PR8210

1 2

OPS

1 2

OPS

PR8205

0R0402-PAD -2-GP

1225 change P/N

PR8228

1 2

OPS

10R2J-2-GP

PR8227

1 2

OPS

10R2J-2-GP

1

GND_SEN SE [73]

VGA_SENSE [73]

VGA_CORE

N14P-GT iis Con figB

EDP-peak OCP R 1/PR8207 R2/PR8211 R3/PR8204

Current

B

25A

B

27A

B

38A

B

45A

24A 35A

B 20K 20K 2K 18K 0 2.7nF

32A 55A

B

26A 45A

B

22A 35A

B

24.33A 35.42A

C

35A 40.89A

C

95A 125A

A

B

65.16A 87.87A

65.37A 98.6A

B

65.37A 98.6A

B

46.35A 71.83A

B

35A

40A

60A

75A

38.5A<OCP<45.5A

44A<OCP<52A

66A<OCP<78A

82.5A<OCP<97.5A

38.5A<OCP<45.5A

60.5A<OCP<71.5A

49.5A<OCP<58.5A

38.5A<OCP<45.5A

38.96A<OCP<46.0 4A

44.98A<OCP<53.1 6A

137.5A<OCP<162. 5A

96.66A<OCP<114. 2A

108.5A<OCP<128. 2A

79.01A<OCP<93.9 8A

2

20K

20K 20K 2K 1 8K 0 2.7nF

39K

20K

30K

39K

20K

Title

Size Document N umber Rev

Date: Sheet of

Date: Sheet

R4/PR8203 R5/PR8201 C/PC8219

2K

3K

1.5K

2K

A2

18K

24K

30K

18K

NCP81172_VGA_CORE

Hadley 15"

1

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih,

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih, Taipei Hs ien 221, Taiwan, R .O.C.

Taipei Hs ien 221, Taiwan, R .O.C.

0

3K

1.5K

0

2.7nF

1.8nF

1.5nF

2.7nF

X02

of

82 101Friday, June 28, 2013

5

4

3

2

1

SSID = PWR.Plane.Regulator_3p3v_vga, 1p35v_vga, 1p05v_vga

3D3V_VGA_S0

D D

1D05V_VGA_S0

3D3V_VGA_S0 should ramp- up before VGA_Core

VGA_Core should ramp-up before 1D5V_VGA_S0

1D35V_VGA_S0 should ram p-up before 1D05V_VGA_S0

R8314

1D05V_VGA_EN

DGPU_PWROK[15,24,82]

C C

1 2

10KR2J-3-GP

OPS

C8310

SCD1U10V2KX-L1-GP

1 2

1D05V_S0

3D3V_S0

1D05V_VGA_EN

5V_S0

DGPU_PWR_EN[15,82]

C8304

SC1U6D3V2KX-GP

C8302

SC1U6D3V2KX-GP

12

DY

SC1U6D3V2KX-GP

12

DY

3D3V_S0 to 3D3V_VGA_S0 1D05V_S0 to 1D05V_VGA_S0

U8301

1

VIN1#1

2

VIN1#2

3

ON1

4

VBIAS

5

ON2

6

VIN2#6

OPS

VIN2#77VOUT2#8

TPS22966DPUR-GP

74.22966.093

GND VOUT1#14 VOUT1#13

GND

VOUT2#9

15 14 13 12

CT1

11 10

CT2

9 8

VTT_CT_105VC_2

VTT_CT_3VC_1

X01 0322

OPS

12

1D05V_VGA_OUT2

3D3V_VGA_OUT1

C8305

SC220P50V2KX-3GP

C8305

SC220P50V2KX-3GP

OPS

C8309

12

PG8312

1 2

GAP-CLOSE-PWR

SC1KP25V2JX-GP

0307 Add Discharge Circuit

PR8317

10R2J-2-GP

PQ8307

PQ8307 2N7002K-2-GP

2N7002K-2-GP

DGPU_PWR_EN#

VGA_CORE

OPS

G

12

D

OPS

S

1D05V_VGA_S0

PG8313

1 2

GAP-CLOSE-PWR

3D3V_VGA_S0

C8301

SC10U6D3V3MX-GPDYC8301

SC10U6D3V3MX-GP

C8308

12

DY

1 2

OPS

GAP-CLOSE-PWR

PG8314

1 2

GAP-CLOSE-PWR

SCD1U10V2KX-L1-GP

C8307

SC10U6D3V3MX-GPDYC8307

SC10U6D3V3MX-GP

PG8315

1 2

GAP-CLOSE-PWR

12

DY

OPS

3D3V_AUX_S5

C8306

SCD1U10V2KX-L1-GP

1 2

DGPU_PWR_EN#

1 2

OPS

PR8313

PR8313 100KR2J-1-GP

100KR2J-1-GP

PQ8305

2N7002KDW-GP

84.2N702.A3F

2nd = 84.DM601.03F

3rd = 84.2N702.E3F

DGPU_PWR_EN[15,82]

6

123 4

S D

GD S

5

1D05V_VGA_S0

12

10R2J-2-GP

OPS

10R2J-2-GP PR8316

PR8316

84.2N702.J31

OPS

G

1D35V_S3

D

1D35V_VGA_S0

B B

EC_FB_CLAMP[24,75,76]

DGPU_PWROK[15,24,82]

A A

5

4

3D3V_AUX_S5

OPS GC6

D8301

1

3

2

BAT54CPT-2-GP

75.00054.K7D

R8312

1 2

0R2J-2-GP

Non-GC6

AO4468, SO-8 Id=?A, Qg=9~12nC Rdson=17.4~22m ohm

1 2

2nd = 84.DM601.03F

SC10U6D3V3MX-GP

1D5V_VGA_EN#

OPS

PR8311

PR8311 100KR2J-1-GP

100KR2J-1-GP

PQ8304

2N7002KDW-GP

84.2N702.A3F

3rd = 84.2N702.E3F

1D5V_VGA_EN

PC8303

12

OPS

SCD01U50V2KX-1GP

GD S

5

6

123 4

G

S D

OPS

8

D

7

D

6

D

5

SIRA06DP-T1-GE3-GP

84.SRA06.037

PC8302

OPS

PR8312

330KR2J-L1-GP

PR8312

330KR2J-L1-GP

OPS

1D5V_ENABLE

DY

12

PQ8308

S

1

OPS

S

2

S

3

G

4

1D5V_ENABLE_RC

A00 0618

1 2

R8313

0R0402-PAD-2-GP

15V_S5DCBATOUT

12

DY

PR8301

PR8301 10MR2J-L-GP

10MR2J-L-GP

3

3.3V +/- 5%

4.88A

100KR2J-1-GP

PR8310

1D35V_VGA_S0

12

PC8307

PC8307 SC10U6D3V3MX-GP

SC10U6D3V3MX-GP

OPS

0319 modify Discharge Circuit

1D35V_VGA_S0

12

10R2J-2-GP

OPS

PR8315

DIS_1D5V_VGA_S0

PQ8306

2N7002K-2-GP

84.2N702.J31

1D5V_VGA_EN#

D

OPS

S

G

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd. , Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

DISCRETE VGA POWER

Size Document Number Rev

Custom

Date: Sheet of

Date: Sheet

2

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan, R.O.C.

83 101Friday, June 28, 2013

of

83 101Friday, June 28, 2013

of

83 101Friday, June 28, 2013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

84 10 1Friday, June 28, 2 013

of

84 10 1Friday, June 28, 2 013

of

84 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

85 10 1Friday, June 28, 2 013

of

85 10 1Friday, June 28, 2 013

of

85 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = User.Interface

SO1

OPS

D D

1

STF217 R128H83-2-GP

34.4Y702.301

H2

SO2

OPS

1

STF217 R128H83-2-GP

34.4Y702.301

H3

SO3

OPS

1

STF217 R128H83-2-GP

34.4Y702.301

H4

S2

S1

1

SPRING-52 -GP

34.4T025.001

S2

1

SPRING-52 -GP

34.4T025.001

SPRING-52 -GP

34.4T025.001

0116 Add RF CAP

DCBATO UT

S3

1

S4

1

SPRING-52 -GP

34.4T025.001

C1

C1 HOLE19 7R166-1-GP

HOLE19 7R166-1-GP

C2

C2 HOLE19 7R166-1-GP

HOLE19 7R166-1-GP

C3

C3 HOLE19 7R166-1-GP

HOLE19 7R166-1-GP

1

C C

HOLET2 56B315R111 -GP

ZZ.00PAD.M01

1

HT85BE 85R29-U-5-GP

ZZ.00PAD.D41

1

HOLET2 56B315R111 -GP

ZZ.00PAD.M01

12

EC8602

EC8601

DY

SCD1U25V2KX-GP

12

EC8604

EC8603

EC8605

DY

SCD1U25V2KX-GP

1

ZZ.00PAD.V71

1

ZZ.00PAD.V71

1

ZZ.00PAD.V71

0528 Add NPTH hole

0117 Add EMC CAP

PAD1

1

PAD-3P-G P

B B

3

2

DCBATO UT

12

EC8606

EC8607

DY

SCD1U25V2KX-GP

5V_S0 3D3V_ S0 VGA_ CORE 1D05 V_S0

12

DY

12

EC8614

EC8615

DY

EC8613

12

EC8608

EC8609

DY

SCD1U25V2KX-GP

12

EC8616

DY

12

EC8610

EC8612

EC8611

DY

SCD1U25V2KX-GP

DY

SCD1U25V2KX-GP

12

EC8620

DY

12

EC8621

EC8622

DY

SCD1U25V2KX-GP

A A

5

4

SCD1U25V2KX-GP

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

UNUSED PARTS/EMI Capacitors

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

3

2

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

86 10 1

of

86 10 1

of

86 10 1

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

87 10 1Friday, June 28, 2 013

of

87 10 1Friday, June 28, 2 013

of

87 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Reserved

Size Documen t Number Rev

A3

Date: Sheet of

Reserved

Taipei Hsien 221, Taiwan , R.O.C.

Hadley 15"

88 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

89 10 1

of

89 10 1

of

89 10 1

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

1

90 10 1

of

90 10 1

of

90 10 1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

91 10 1

of

91 10 1

of

91 10 1

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

92 10 1Friday, June 28, 2 013

of

92 10 1Friday, June 28, 2 013

of

92 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Reserved

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

93 10 1Friday, June 28, 2 013

of

93 10 1Friday, June 28, 2 013

of

93 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

Hadley 15"

94 10 1Friday, June 28, 2 013

of

94 10 1Friday, June 28, 2 013

of

94 10 1Friday, June 28, 2 013

1

X02

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

Reserved

95 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

SSID = XDP

D D

3D3V_S 5

1

23

RN9602

SRN1KJ -11-GP-U

C C

XDP

4

SYS_PW ROK [17,2 4]

PM_PW RBTN# [17,2 4]

CFG0 CFG12 CFG1

CFG2 CFG3 CFG15

CFG4 CFG5

CFG6 CFG7

CFG8 CFG9

CFG10 CFG11

CPU XDP

TP9624TP9624

1

TP9623TP9623

1

TP9622TP9622

1

TP9621TP9621

1

TP9609TP9609

1

TP9608TP9608

1

TP9607TP9607

1

TP9606TP9606

1

TP9629TP9629

1

TP9630TP9630

1

TP9631TP9631

1

TP9632TP9632

1

TP9639TP9639 TP9640TP9640

CFG13

CFG14

CFG17 CFG16

CFG19 CFG18

1 1

TP9635TP9635

1

TP9636TP9636

1

TP9637TP9637

1

TP9638TP9638

1

TP9627TP9627

1

TP9628TP9628

1

TP9633TP9633

1

TP9634TP9634

1

PCIE_CLK _XDP_P PCIE_CLK _XDP_N

PCIE_CLK _XDP_P [18] PCIE_CLK _XDP_N [1 8]

XDP_BP M0 XDP_BP M1 XDP_BP M2 XDP_BP M3 XDP_BP M4 XDP_BP M5 XDP_BP M6 XDP_BP M7

CFG[19:0 ]

XDP_BP M[7:0]

XDP_PR EQ#

XDP_PR DY#

TP9601TP9601

1

TP9602TP9602

1

TP9612TP9612

1

TP9613TP9613

1

TP9614TP9614

1

TP9615TP9615

1

TP9616TP9616

1

TP9617TP9617

1

TP9618TP9618

1

TP9619TP9619

1

CFG[19:0 ][6]

XDP_BP M[7:0][4]

XDP_PR EQ#[4 ]

XDP_PR DY#[4]

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

Size Documen t Number Rev A3

A3

Friday, June 28, 2 013

Date: Sheet of

Date: Sheet

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

CPU XDP

96 10 1

1

of

X02

A

Name Schematics Notes

B

C

Processor StrappingPCH Strapping

Pin Name Strap Description Configuration (Default value for each bit is

1 unless specified otherwise)

D

Default Value

E

4 4

POWER PLANE

VOLTAGE DESCRIPTION

Voltage Rails

ACTIVE IN

3 3

2 2

SMBus ADDRESSES

2

PCIE Routing

LANE1 X

LANE2

LANE3

LANE4

1 1

LANE5

LANE6

LANE7

LANE8

X

Mini Card1(WLAN)

X

SATA Table

SATA

Pair

0

1

2

3

4

5

Device

HDD1

mSATA

USB Table

Pair

0

1

2

3

4

5

6

7

Device

USB port 1,with Power Share

USB 2.0 HDMI

USB port2 (usb redriver)

X

Touch Panel

Card Reader

BLUETOOTH

CAMERA

I C / SMBus Addresses

Device EC SMBus 1 Battery 0 CHARGER PS8122(HDMI Switch) (Bottom Do ck) USB3.0 redriver PS8710 (Bottom Dock)

EC SMBus 2 Battery 1 PCH Discrete VGA Thermal SML1_CLK/SML1_DATA PS8321 HDMI level shifter NCT7718W

EC SMBus 3 NCT5605Y-0 NCT5605Y-1

PCH SMBus SO-DIMMA SO-DIMMB Intel LAN 82579 G-Sensor MINI WWAN INTEL LAN82579

0x96 & 0x94 0x9C or 0x9E 0x96 & 0X97 0x98 or 0x99

CHIEF RIVER ORB

Address Bus

0x16 0x12 0x9E 0x40

0x16

0x30 0x32 SMB2_CL K/SMB2_DATA

BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA BAT_SCL/BAT_SDA

SML1_CLK/SML1_DATA SML1_CLK/SML1_DATA

SMB2_CLK/SMB2_DATA SMB2_CLK/SMB2_DATA

PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK PCH_SMBDATA/PCH_SMBCLK

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Size Documen t Number Rev

A3

Date: Sheet of

Date: Sheet

Taipei Hsien 221, Taiwan , R.O.C.

Table of Content

Hadley 15"

97 10 1Friday, June 28, 2 013

of

X02

5

D D

C C

4

3

2

1

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, S ec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan , R.O.C.

Taipei Hsien 221, Taiwan , R.O.C.

Title

Change History

Size Documen t Number Rev

Date: Sheet of

Hadley 15"

Taipei Hsien 221, Taiwan , R.O.C.

98 10 1Friday, June 28, 2 013

1

X02

5

4

3

2

1

Intel-Power Up Sequence

D D

C C

(AC mode)

+RTC_VCCT2T1

RTC_RST#

DCBATOUT

3D3V_AUX_S5

S5_ENABLE

5V_S5

3D3V_S5

PM_RSMRST#

PCH_SUSCLK_KBC

AC_PRESENT

KBC_PWRBTN#

PM_PWRBTN#

PM_SLP_S4#

1D35V_S3

1.35V_VTT_PWRGD

PM_SLP_S3#

1D5V_S0

1D05V_S0

1.05VTT_PWRGD / RUNPWROK

5V_S0

3D3V_S0

DDR_VTT_PG_CTRL

0D675V_S0

>9ms

T10

Red printings:KB C GPIO involved

T3

T4

T5

T6

T7

T11

T12

T13

KBC GPIO34 control

>5msT8

<90ms

0ms<

T9

T15T14

T16

T17

T18

T19

T20

T21

KBC GPIO43 to PCH

KBC GPIO84 control

+5V_RUN & +3.3V_RUN need meet 0.7V difference

T22

(DC mode)

+RTC_VCC T1

RTC_RST#

DCBATOUT

3D3V_AUX_S5

KBC_PWRBTN#

S5_ENABLE

3D3V_S5

5V_S5

PM_PWRBTN#

PCH_RSMRST#

PCH_SUSCLK_KBC

PM_SLP_S4#

1D35V_S3

1.35V_VTT_PWRGD

PM_SLP_S3#

1D5V_S0

1D05V_S0

1.05VTT_PWRGD / RUNPWROK

5V_S0

3D3V_S0

Red printings:KB C GPIO involved

T2

T3

T4

T5

T6

T7

T8

T9 T10 >5ms

T11

T12

T13

T15T14

T16

T17

T18

T19

T21

+5V_RUN & +3.3V_RUN need meet 0.7V difference

T20

B B

A A

43

RUNPWROK

H_VCCST_PWRGD

PM_SLP_S3#

PCH_PWROK

H_VR_ENABLE

VCC_CORE

IMVP_PWRGD

SYS_PWROK

H_CPU_SVIDDAT

PLT_RST#

5

T23

T24

T25

T26

T27

T28

4

3

DDR_VTT_PG_CTRL

0D675V_S0

RUNPWROK

H_VCCST_PWRGD

PM_SLP_S3#

PCH_PWROK

H_VR_ENABLE

VCC_CORE

IMVP_PWRGD

SYS_PWROK

H_CPU_SVIDDAT

PLT_RST#

T23

T24

T25

T26

T27

T28

2

T22

Title

Power Sequence

Size Document Number Rev

Date: Sheet of

1

Hadley 15"

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

99 101Friday, June 28, 2013

X02

5

4

3

Wistron SHARK BAY POWER UP SEQUENCE DIAGRAM

2

1

D D

C C

B B

DC

Battery

-7

Page43

AC

Adapter in

Page42

+DC_IN

SLP_S3# de-asse rt, delay 20ms; PCH_PWROK asser t.

BT+

SWITCH

Page44

SWITCH

Page44

Charger

BQ24715

ACOK

AD+

Page44

7

-6

AC_IN

KBC_PWRBTN#

PM_SLP_S4#

PM_SLP_S3#

6

PCH_PWROK

11

H_CPU_SVIDDAT

H_VR_ENABLE

DCBATOUT

-5

DCBATOUT

1

VDIO

VR_ON

-3

S5_ENABLE

EN1

EN2

TPS51225CRUKR

VIN

DC/DC

(3.3V/5V)

3D3V_AUX_S5

SWITCH

-4

Page24

3D3V_AUX_KBC

PSL_IN1#

KBC

PSL_IN2#

NPCE985

GPIO8

GPIO01

GPIO80

S0_PWR_GOOD

10

SLP_S3# de-assert, delay 200m s; S0_PWR_GOOD assert.

TPS51622

CSD97374

PGOOD

Page46

PWR_VCC_PWM1

VSW

Page47

VCC_CORE

Page41

GPIO34

GPIO43

GPIO20

Page24

9

8

3D3V_S5

-2

5V_S5

-3

S5_ENABLE

-1

RSMRST#_KBC

PM_PWRBTN#

2

DPWROK

Haswell ULT CPU

RSMRST#

PWRBTN#

with Lynx Point PCH

APWROK

PCH_PWROK

5

H_VCCST_PWRGD

SYS_PWROK be as serted after S0 _PWR_GOOD assertion and C PU core VR powe r good assertion.

S0_PWR_GOOD

IMVP_PWRGD

4

PM_SLP_S3#

DDR_VTT_PG_CTRL

DDR_PG_CTL

VCCST_PWRGD

EN PGOOD

4

SYS_PWROK

PM_SLP_S4#

DCBATOUT

VIN

TPS51367

1D35V_S3

TPS51206

3

Page48

VIDSOUT

PLTRST#

VR_READY

SW

VR_EN

Page46

4a

1D05V_S0

RUNPWROK

4b

0D675V_S0

H_VR_ENABLE

H_CPU_SVIDDAT

11

12

PCI_PLTRST#

DCBATOUT

3a

TPS51367

EN

VIN

PGOOD

Page48

1D35V_S3

SW

RUNPWROK

4b

RUNPWROK

4b

7

RUNPWROK

3D3V_S5

SWITCH

Page36

SWITCH

Page36

Level Shifter

Page7

5V_S0

3D3V_S0

H_VCCST_PWRGD

5

4a

PM_SLP_S3#

TPS51312

EN

VIN

4

VOUT

PGOOD

Page51

1D5V_S0

RUNPWROK

4b

A A

4b 5 6 7 8 9 10 11 121 2 3a 4 4a

Wistron Corporation

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih,

21F, 88, Sec.1, H sin Tai Wu R d., Hsichih, Taipei Hs ien 221, Taiwan, R .O.C.

Taipei Hs ien 221, Taiwan, R .O.C.

Hadley 15"

1

Taipei Hs ien 221, Taiwan, R .O.C.

100 101Frida y, June 28, 2013

X02

Title

Power Block Diagram

Size Document N umber Rev

Date: Sheet of

5

4

3

2

Date: Sheet of

Dell Inspiron 7437, Inspiron 7537, Inspiron 7737 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual