Dell Inspiron 13-7347 Schematics

5

D D

4

3

2

1

Cottonwood Schematic

Broadwell-ULT

C C

2014-06-09

REV : A00

DY : None Installed

B B

https://t.me/schematicslaptop https://t.me/biosarchive

A A

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Tuesday, June 17, 2 014

Date: Sheet

5

4

3

2

Date: Sheet

Cover Page

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

1 104

of

1

of

A00

5

Project code:4PD01V010001

Cottonwood Block Diagram

PCB P/N: 13321 Revision: A00

D D

HDMI V1.4a

13.3" 16:9 eDP

Touch Panel

C C

USB3.0 Port1

Power share

USB3.0 Port2

MIC_IN/GND

29

Combo Jack

B B

HP_R/L

2CH SPEAKER (2CH 2W/4ohm)

29

54

52

34

USB2.0

HDA CODEC

Realtek ALC3234

USB PowerShare

TI TPS2544RTER

27

4

HDMI

eDP

USB2.0 x 1

USB3.0

USB2.0

34

USB3.0

USB2.0

HDA

Intel CPU

Broadwell ULT

15W (UMA)

WPT-LP

8 USB 2.0/1.1 ports

4 USB 3.0 ports

High Definition Audio

4 SATA ports

6 PCIE ports

LPC I/F

ACPI 4.0a

3

DDR3L 1600MHz C hannel A

PCIe x 1

USB2.0 x 1

USB2.0

USB2.0 x 1

Sensor Hub

ST STM32L151CBU6TR

Camera / ALS

IO Board

66

52

I2C

2

DDR3L1600

SODIMM A

NGFF WLAN & BT combo module

Card reader

RealTek RTS5176E

USB2.0 Port3

Gyro

ST L3GD20

G + E-compass

ST LSM303D

HOME button BD on Panel side

G Sensor

LNG3DMTR

66

12

SD/SDHC/MMC

1

CHARGER

BQ24770RUYR-GP

INPUTS

AD+

BT+

SYSTEM DC/DC

TPS51225RUKR-GP

INPUTS

DCBATOUT

CPU Core Power

TPS51624RSMR-GP

INPUTS

DCBATOUT

DDR3L SUS

TPS51716RUKR-GP

INPUTS OUTPUTS

DCBATOUT 1D35V_S3

CPU 1.05V

SY8208DQNC-GP-U

DCBATOUT

CPU 1D5V_S0

TLV70215DBVR-GP

3D3V_S5

OUTPUTS

DCBATOUT

OUTPUTS

3D3V_AUX_S5 5V_AUX_S5 5V_S5 3D3V_S5

OUTPUTS

VCC_CORE

0D65V_S0

OUTPUTSINPUTS

1D05V_S0

OUTPUTSINPUTS

1D5V_S0

Switches

46,47

33

36 83

44

45

49

48

51

INPUTS OUTPUTS

63

52

1D35V_S3 1D35V_S0

5V_S5 5V_S0

3D3V_S03D3V_S5

PCB LAYER

L1:Top L2:VCC L3:Signal L4:Signal L5:GND L6:Signal

INT2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document Number Rev

C

Date: Sheet of

2

Date: Sheet of

Taipei Hsien 221, Taiwan, R.O.C.

Block Diagram

Cottonwood

1

A00

2 104Tuesday, June 17, 2014

A00

PS2

LPC BUS

24

62

4

SPI

Flash ROM

8MB Quad Read

I2C

SATA(Gen3) x 1

25

3

HDD

56

LPC debug port

Thermal

NUVOTON NCT7718W

A A

PWM FAN

SMBUS

26

Int. KB

5

65

KBC

NUVOTON

NPCE285P

Image sensor

62

Touch PAD

5

D D

4

3

2

1

(Blanking)

C C

B B

Wistron Corporation

A A

Title

(Reserved)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

(Reserved)

Cottonwood

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

3 104Tuesday, June 17, 2014

1

A00

5

4

3

2

1

SSID = CPU

1D05S_VCCST

RN401

https://t.me/schematicslaptop

D D

https://t.me/biosarchive

XDP_TMS XDP_TDI

XDP_TDO

XDP_TRST# XDP_TCLK

R402 51R2J-2-GP

R402 51R2J-2-GP R406 51R2J-2-GPR406 51R2J-2-GP

RN401

1 2 3

DY

4 5

SRN51J-1-GP

DY

1 2 1 2

8 7 6

1D05S_VCCST

12

R401

62R2J-GP

Layout Note:

C C

Impedance control:50 ohm

H_PROCHOT#[24,44,46]

10KR2J-3-GP

DDR_PG_CTRL[12]

B B

R407 200R2F-L-GPR407 200R2F-L-GP

1 2

R408 121R2F-GPR408 121R2F-GP

1 2

R409 100R2F-L1-GP-UR409 100R2F-L1-GP-U

1 2

TP402TP402

H_PECI[24]

1 2

R403

56R2J-4-GP

12

R405

SM_RCOMP_0

SM_RCOMP_1

SM_RCOMP_2

H_CATERR#

1

H_PROCHOT#_R XDP_TRST#

H_CPUPWRGD

SM_RCOMP_0 SM_RCOMP_1 SM_RCOMP_2 SM_DRAMRST# DDR_PG_CTRL

CPU1B

D61

PROC_DETECT#

K61

CATERR#

N62

PECI

K63

PROCHOT#

C61

PROCPWRGD

AU60

SM_RCOMP0

AV60

SM_RCOMP1

AU61

SM_RCOMP2

AV15

SM_DRAMRST#

AV61

SM_PG_CNTL1

HASWELL-6-GP-U

SM_DRAMRST#

Layout Note:

Design Guideline:

MISC

THERMAL

PWR

DDR3L

HSW_ULT_DDR3L

1D35V_S3

12

R410

R410 470R2J-2-GP

470R2J-2-GP

JTAG

X02 0414

R404

1 2

0R0402-PAD-2-GP

2 OF 19

XDP_PRDY#

J62

PRDY#

PREQ#

PROC_TCK

PROC_TMS

PROC_TRST#

PROC_TDI

PROC_TDO

BPM#0 BPM#1 BPM#2 BPM#3 BPM#4 BPM#5 BPM#6 BPM#7

K62 E60 E61 E59 F63 F62

J60 H60 H61 H62 K59 H63 K60 J61

XDP_PREQ# XDP_TCLK XDP_TMS

XDP_TDI XDP_TDO

XDP_BPM0 XDP_BPM1 XDP_BPM2 XDP_BPM3 XDP_BPM4 XDP_BPM5 XDP_BPM6 XDP_BPM7

Layout Note:

Place close to DIMM

DDR3_DRAMRST# [12]

XDP_PRDY# [96] XDP_PREQ# [96] XDP_TCLK [96] XDP_TMS [96] XDP_TRST# [96] XDP_TDI [96] XDP_TDO [96]

XDP_BPM[7:0]

XDP_BPM[7:0] [96]

SM_RCOMP keep routing length less than 500 mils.

Wistron Corporation

A A

Title

CPU (THERMAL/MISC/PM)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

CPU (THERMAL/MISC/PM)

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cottonwood

4 104Tuesday, June 17, 2014

1

A00

5

4

3

2

1

SSID = CPU

DDR3L ball type: Non-Interleaved Type

HSW_ULT_DDR3L

CPU1D

AW31

AW29

AW27

AW25

AM29

AM26

AW23

AW21

AW19

AW17

AY31

AY29

AV31 AU31 AV29 AU29 AY27

AY25

AV27 AU27 AV25 AU25

AK29 AL28 AK28 AR29 AN29 AR28 AP28 AN26 AR26 AR25 AP25 AK26

AK25 AL25 AY23

AY21

AV23 AU23 AV21 AU21 AY19

AY17

AV19 AU19 AV17 AU17 AR21 AR22 AL21 AM22 AN22 AP21 AK21 AK22 AN20 AR20 AK18 AL18 AK20 AM20 AR18 AP18

CPU1D

SB_DQ0 SB_DQ1 SB_DQ2 SB_DQ3 SB_DQ4 SB_DQ5 SB_DQ6 SB_DQ7 SB_DQ8 SB_DQ9 SB_DQ10 SB_DQ11 SB_DQ12 SB_DQ13 SB_DQ14 SB_DQ15 SB_DQ16 SB_DQ17 SB_DQ18 SB_DQ19 SB_DQ20 SB_DQ21 SB_DQ22 SB_DQ23 SB_DQ24 SB_DQ25 SB_DQ26 SB_DQ27 SB_DQ28 SB_DQ29 SB_DQ30 SB_DQ31 SB_DQ32 SB_DQ33 SB_DQ34 SB_DQ35 SB_DQ36 SB_DQ37 SB_DQ38 SB_DQ39 SB_DQ40 SB_DQ41 SB_DQ42 SB_DQ43 SB_DQ44 SB_DQ45 SB_DQ46 SB_DQ47 SB_DQ48 SB_DQ49 SB_DQ50 SB_DQ51 SB_DQ52 SB_DQ53 SB_DQ54 SB_DQ55 SB_DQ56 SB_DQ57 SB_DQ58 SB_DQ59 SB_DQ60 SB_DQ61 SB_DQ62 SB_DQ63

HSW_ULT_DDR3L

CPU1C

AM63 AM62

AM61 AM60

AM57

AM54

AW58

AW56

AW54

AW52

AH63 AH62 AK63 AK62 AH61 AH60 AK61 AK60

AP63 AP62

AP61 AP60 AP58 AR58

AK57 AL58 AK58 AR57 AN57 AP55 AR55

AK54 AL55 AK55 AR54 AN54 AY58

AY56

AV58 AU58 AV56 AU56 AY54

AY52

AV54 AU54 AV52 AU52 AK40 AK42 AM43 AM45 AK45 AK43 AM40 AM42 AM46 AK46 AM49 AK49 AM48 AK48 AM51 AK51

CPU1C

SA_DQ0 SA_DQ1 SA_DQ2 SA_DQ3 SA_DQ4 SA_DQ5 SA_DQ6 SA_DQ7 SA_DQ8 SA_DQ9 SA_DQ10 SA_DQ11 SA_DQ12 SA_DQ13 SA_DQ14 SA_DQ15 SA_DQ16 SA_DQ17 SA_DQ18 SA_DQ19 SA_DQ20 SA_DQ21 SA_DQ22 SA_DQ23 SA_DQ24 SA_DQ25 SA_DQ26 SA_DQ27 SA_DQ28 SA_DQ29 SA_DQ30 SA_DQ31 SA_DQ32 SA_DQ33 SA_DQ34 SA_DQ35 SA_DQ36 SA_DQ37 SA_DQ38 SA_DQ39 SA_DQ40 SA_DQ41 SA_DQ42 SA_DQ43 SA_DQ44 SA_DQ45 SA_DQ46 SA_DQ47 SA_DQ48 SA_DQ49 SA_DQ50 SA_DQ51 SA_DQ52 SA_DQ53 SA_DQ54 SA_DQ55 SA_DQ56 SA_DQ57 SA_DQ58 SA_DQ59 SA_DQ60 SA_DQ61 SA_DQ62 SA_DQ63

M_A_DQ[63:0][12]

D D

C C

M_A_DQ[63:0]

M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ3 M_A_DQ4 M_A_DQ5 M_A_DQ6 M_A_DQ7 M_A_DQ8 M_A_DQ9 M_A_DQ10 M_A_DQ11 M_A_DQ12 M_A_DQ13 M_A_DQ14 M_A_DQ15 M_A_DQ16 M_A_DQ17 M_A_DQ18 M_A_DQ19 M_A_DQ20 M_A_DQ21 M_A_DQ22 M_A_DQ23 M_A_DQ24 M_A_DQ25 M_A_DQ26 M_A_DQ27 M_A_DQ28 M_A_DQ29 M_A_DQ30 M_A_DQ31 M_A_DQ32 M_A_DQ33 M_A_DQ34 M_A_DQ35 M_A_DQ36 M_A_DQ37 M_A_DQ38 M_A_DQ39 M_A_DQ40 M_A_DQ41 M_A_DQ42 M_A_DQ43 M_A_DQ44 M_A_DQ45 M_A_DQ46 M_A_DQ47 M_A_DQ48 M_A_DQ49 M_A_DQ50 M_A_DQ51 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ56 M_A_DQ57 M_A_DQ58 M_A_DQ59 M_A_DQ60 M_A_DQ61 M_A_DQ62 M_A_DQ63

HSW_ULT_DDR3L

DDR CHANNEL A

3 OF 19

SA_CLK#0

SA_CLK0

SA_CLK#1

SA_CLK1

SA_CKE0 SA_CKE1 SA_CKE2 SA_CKE3

SA_CS#0 SA_CS#1

SA_ODT0

SA_RAS#

SA_WE#

SA_CAS#

SA_BA0 SA_BA1 SA_BA2

SA_MA0 SA_MA1 SA_MA2 SA_MA3 SA_MA4 SA_MA5 SA_MA6 SA_MA7 SA_MA8

SA_MA9 SA_MA10 SA_MA11 SA_MA12 SA_MA13 SA_MA14 SA_MA15

SA_DQSN0 SA_DQSN1 SA_DQSN2 SA_DQSN3 SA_DQSN4 SA_DQSN5 SA_DQSN6 SA_DQSN7

SA_DQSP0 SA_DQSP1 SA_DQSP2 SA_DQSP3 SA_DQSP4 SA_DQSP5 SA_DQSP6 SA_DQSP7

SM_VREF_CA SM_VREF_DQ0 SM_VREF_DQ1

AU37 AV37 AW36 AY36

AU43 AW43 AY42 AY43

AP33 AR32

AP32

AY34 AW34 AU34

AU35 AV35 AY41

AU36 AY37 AR38 AP36 AU39 AR36 AV40 AW39 AY39 AU40 AP35 AW41 AU41 AR35 AV42 AU42

AJ61 AN62 AM58 AM55 AV57 AV53 AL43 AL48

AJ62 AN61 AN58 AN55 AW57 AW53 AL42 AL49

AP49 AR51 AP51

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQS#0 M_A_DQS#1 M_A_DQS#2 M_A_DQS#3 M_A_DQS#4 M_A_DQS#5 M_A_DQS#6 M_A_DQS#7

M_A_DQS0 M_A_DQS1 M_A_DQS2 M_A_DQS3 M_A_DQS4 M_A_DQS5 M_A_DQS6 M_A_DQS7

+V_SM_VREF_C NT

M_A_DIMA_CLK_DD R#0 [12] M_A_DIMA_CLK_DD R0 [12] M_A_DIMA_CLK_DD R#1 [12] M_A_DIMA_CLK_DD R1 [12]

M_A_DIMA_CKE0 [12] M_A_DIMA_CKE1 [12]

M_A_DIMA_CS#0 [12] M_A_DIMA_CS#1 [12]

TP_M_A_DIMA_ODT 0

M_A_RAS# [12]

M_A_WE# [12]

M_A_CAS# [12]

M_A_BS0 [12] M_A_BS1 [12] M_A_BS2 [12]

M_A_A[15:0] [12]

M_A_DQS#[7:0] [ 12]

M_A_DQS[7:0] [12]

+V_SM_VREF_C NT [37] DDR_W R_VREF01 [37]

TP501TP501

1

HSW_ULT_DDR3L

DDR CHANNEL B

4 OF 19

SB_CK#0

SB_CK0

SB_CK#1

SB_CK1

SB_CKE0 SB_CKE1 SB_CKE2 SB_CKE3

SB_CS#0 SB_CS#1

SB_ODT0

SB_RAS#

SB_WE#

SB_CAS#

SB_BA0 SB_BA1 SB_BA2

SB_MA0 SB_MA1 SB_MA2 SB_MA3 SB_MA4 SB_MA5 SB_MA6 SB_MA7 SB_MA8

SB_MA9 SB_MA10 SB_MA11 SB_MA12 SB_MA13 SB_MA14 SB_MA15

SB_DQSN0 SB_DQSN1 SB_DQSN2 SB_DQSN3 SB_DQSN4 SB_DQSN5 SB_DQSN6 SB_DQSN7

SB_DQSP0 SB_DQSP1 SB_DQSP2 SB_DQSP3 SB_DQSP4 SB_DQSP5 SB_DQSP6 SB_DQSP7

AM38 AN38 AK38 AL38

AY49 AU50 AW49 AV50

AM32 AK32

AL32

AM35 AK35 AM33

AL35 AM36 AU49

AP40 AR40 AP42 AR42 AR45 AP45 AW46 AY46 AY47 AU46 AK36 AV47 AU47 AK33 AR46 AP46

AW30 AV26 AN28 AN25 AW22 AV18 AN21 AN18

AV30 AW26 AM28 AM25 AV22 AW18 AM21 AM18

HASWELL- 6-GP-U

B B

A A

5

4

3

HASWELL- 6-GP-U

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

A2

Date: Sheet

2

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C.

CPU (DDR)

Cottonwood

1

A00

5 104Tuesday, June 17, 2014

A00

of

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

CPU1S

HSW_ULT_DDR3L

19 OF 19

#514405

CFG[19:0][96]

C C

PCH strap pin:

#514405

B B

CFG[19:0]

1 2

R601

R601 49D9R2F -GP

49D9R2F -GP

1 2

R603

R603 8K2R2F-1 -GP

8K2R2F-1 -GP

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCO MP

TD_IREF

CFG3

CFG4

AC60 AC62 AC63 AA63 AA60

Y61 Y60 V62 V61 V60 U60 T63 T62 T61 T60

AA62

U63

AA61

U62

V63

H18 B12

Y62

J20

A5

E1 D1

CFG0 CFG1 CFG2 CFG3 CFG4 CFG5 CFG6 CFG7 CFG8 CFG9 CFG10 CFG11 CFG12 CFG13 CFG14 CFG15

CFG16 CFG18 CFG17 CFG19

CFG_RCOMP

RSVD#A5

RSVD#E1 RSVD#D1 RSVD#J20 RSVD#H18 TD_IREF

12

DY

12

R604

R604 1KR2J-1-G P

1KR2J-1-G P

R605

R605 1KR2J-1-G P

1KR2J-1-G P

RSVD_TP#AV63 RSVD_TP#AU63

RSVD_TP#C63 RSVD_TP#C62

RSVD#B43

RSVD_TP#A51 RSVD_TP#B51

RESERVED

RSVD_TP#L60

RSVD#N60

RSVD#W23

RSVD#Y22

PROC_OPI_RCOMP

RSVD#AV62

RSVD#D58

VSS VSS

RSVD#P20 RSVD#R20

PHYSICAL_DEBUG_ ENABLED (DFX P RIVACY)

0 : ENABLED

CFG[3]

SET DFX ENABLED BIT IN DEBUG INTERFACE MSR

1 : DISABLED

DISPLAY PORT PR ESENCE STRAP

0 : ENABLED

CFG[4]

AN EXTERNAL DIS PLAY PORT DEVI CE IS CONNECTED TO THE EMBEDD ED DISPLAY POR T

1 : DISABLED

NO PHYSICAL DIS PLAY PORT ATTA CHED TO EMBEDDE D DISPLAY PORT

AV63 AU63

C63 C62 B43

A51 B51

L60

N60

W23

PROC_OP I_COMP3

Y22

PROC_OP I_COMP

AY15

AV62 D58

P22 N21

HVM_CLK #

P20

HVM_CLK

R20

RSVDAV6 3 RSVDAU6 3

RSVDC63 RSVDC62 EDP_SPA RE

RSVDA51 RSVDB51

RSVDL60

TP601TP601

1

TP602TP602

1

TP603TP603

1

TP604TP604

1

TP605TP605

1

TP606TP606

1

TP607TP607

1

TP608TP608

1

Intel Recommend

R606 49D 9R2F-GP

1 2

DY

R602 49D 9R2F-GPR602 49D 9R2F-GP

1 2

1

TP619TP619

1

TP620TP620

Layout Note:

1.Referenced "continuous" VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3.Trace width: 12~15mil

4.Isolation Spacing: 12mil

5.Max length: 500mil

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (CFG)

Cottonwood

1

6 104Tuesday, June 17, 2 014

of

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SSID = CPU

4

3

2

1

VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC VCC

C36 C40 C44 C48 C52 C56 E23 E25 E27 E29 E31 E33 E35 E37 E39 E41 E43 E45 E47 E49 E51 E53 E55 E57 F24 F28 F32 F36 F40 F44 F48 F52 F56 G23 G25 G27 G29 G31 G33 G35 G37 G39 G41 G43 G45 G47 G49 G51 G53 G55 G57 H23 J23 K23 K57 L22 M23 M57 P57 U57 W57

VCC_COR E

HSW_ULT_DDR3L

CPU1L

AH26

AJ31 AJ33

AJ37 AN33 AP43 AR48 AY35 AY40 AY44 AY50

N58

AC58

AB23

AD23 AA23 AE59

N63

C59

D63 H59

N59 N61

AD60 AD59 AA59 AE60 AC59

AG58

U59

AC22 AE22 AE23

AB57 AD57

AG57

C24 C28 C32

L59

F59

E63

A59 E20

L62

L63 B59 F60

P62 P60 P61

T59

V59

J58

CPU1L

RSVD#L59 RSVD#J58

VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ VDDQ

VCC RSVD#N58 RSVD#AC58

VCC_SENSE RSVD#AB23 VCCIO_OUT VCCIOA_OUT RSVD#AD23 RSVD#AA23 RSVD#AE59

VIDALERT# VIDSCLK VIDSOUT VCCST_PWRGD VR_EN VR_READY

VSS PWR_DEBUG# VSS RSVD_TP#P60 RSVD_TP#P61 RSVD_TP#N59 RSVD_TP#N61 RSVD#T59 RSVD#AD60 RSVD#AD59 RSVD#AA59 RSVD#AE60 RSVD#AC59 RSVD#AG58 RSVD#U59 RSVD#V59

VCCST VCCST VCCST

VCC VCC VCC VCC VCC VCC

HASW ELL-6-GP-U

D D

1D35V_S 3

1D05S_V CCST

NC#1

VCC

A

DY

GND3Y

VR_SVID_A LERT#

H_CPU_S VIDDAT

3D3V_S5

1D05S_V CCST

12

DY

C702

5

4

12

R709

R709 47KR2F-G P

47KR2F-G P

DY

12

R706

R706 10KR2J-3 -GP

10KR2J-3 -GP

DY

12

EC701

Layout Note:

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Length match<25mil

H_VCCST _PWRGD [96 ]

SCD1U10V2KX-5GP

VR_SVID_A LERT#[46]

H_CPU_S VIDCLK[46] H_CPU_S VIDDAT[46]

H_VR_EN ABLE[46]

PWR_ DEBUG[96]

1D05V_S 0

0R0603-P AD-2-GP-U

1D05S_V CCST

X02 0414

R711

1 2

VCC_SEN SE[46]

1D05S_V CCST

VCC_COR E

12

R702

100R2F-L 1-GP-U

TP701TP701

43R2J-GP

1 2

H_CPU_S VIDCLK H_CPU_S VIDDAT

R710 10K R2J-3-GP

1 2

IMVP_PW RGD_R

150R2J-L 1-GP-U

150R2J-L 1-GP-U R705

R705

1 2

TP702TP702 TP703TP703 TP704TP704

TP705TP705

0.1A

C701

SC22U6D3V3MX-1-GPDYC701

SC22U6D3V3MX-1-GP

C703

SC1U6D3V2KX-GPDYC703

DY

SC1U6D3V2KX-GP

12

DY

+VCCIOA_O UT

R701

H_VCCST _PWRGD

DY

1 1 1 1

VCC_COR E

TP_VCCIO_ OUT

1

H_CPU_S VIDALRT#

PWR_ DEBUG

RSVDP60 RSVDP61 RSVDN59 RSVDN61

1D05S_V CCST

R703 75R 2F-2-GPR703 75R 2F-2-GP

1 2

R704 130 R2F-1-GPR704 130 R2F-1-GP

1 2

#487822

C C

SCD1U10 V2KX-5GP

U701

1

1D05V_V TT_PWRGD[36,48]

B B

2

74LVC1G 07GW-GP

73.01G07.0HG

1 2

R707

R707 100KR2F -L1-GP

100KR2F -L1-GP

Need to fine tu ne to 1.05V.

HSW_ULT_DDR3L

HSW ULT POWER

12 OF 19

IMVP_PW RGD[24,46]

A A

5

4

1 2

R713

R713 100KR2F -L1-GP

100KR2F -L1-GP

IMVP_PW RGD_R

12

R712

R712 47KR2F-G P

47KR2F-G P

3

DY

12

EC702

SCD1U10V2KX-5GP

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Tuesday, June 17, 2 014

Date: Sheet

CPU (VCC CORE)

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

7 104

of

1

of

A00

5

4

3

2

1

SSID = CPU

D D

HSW_ULT_DDR3L

CPU1A

HSW_ULT_DDR3L

1 OF 19

HDMI_DATA 2#[54]

HDMI_DATA 2[54]

HDMI

C C

HDMI_DATA 1#[54]

HDMI_DATA 1[54]

HDMI_DATA 0#[54]

HDMI_DATA 0[54]

HDMI_CLK#[54]

HDMI_CLK[54]

C54

DDI1_TXN0

C55

DDI1_TXP0

B58

DDI1_TXN1

C58

DDI1_TXP1

B55

DDI1_TXN2

A55

DDI1_TXP2

A57

DDI1_TXN3

B57

DDI1_TXP3

C51

DDI2_TXN0

C50

DDI2_TXP0

C53

DDI2_TXN1

B54

DDI2_TXP1

C49

DDI2_TXN2

B50

DDI2_TXP2

A53

DDI2_TXN3

B53

DDI2_TXP3

HASW ELL-6-GP-U

EDPDDI

EDP_RCOMP

EDP_DISP_UTIL

EDP_TXN0 EDP_TXP0 EDP_TXN1 EDP_TXP1

EDP_TXN2 EDP_TXP2 EDP_TXN3 EDP_TXP3

EDP_AUXN EDP_AUXP

C45 B46 A47 B47

C47 C46 A49 B49

A45 B45

D20 A43

EDP_COM P EDP_BRIGH TNESS

EDP_TX0 _DN [52] EDP_TX0 _DP [52] EDP_TX1 _DN [52] EDP_TX1 _DP [52]

EDP_AUX _DN [52] EDP_AUX _DP [52 ]

1

TP801TP801

R801

24D9R2F -L-GP

+VCCIOA_O UT

Design Guidelin e: EDP_COMP keep r outing length max 100 mils.

12

Trace Width:20 mils.

B B

A A

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (DDI/EDP)

Cottonwood

8 104Tuesday, June 17, 2 014

of

A00

5

4

3

2

1

SSID = CPU

HSW_ULT_DDR3L

CPU1P

D33

VSS

D34

D D

C C

B B

VSS

D35

VSS

D37

VSS

D38

VSS

D39

VSS

D41

VSS

D42

VSS

D43

VSS

D45

VSS

D46

VSS

D47

VSS

D49

VSS

D5

VSS

D50

VSS

D51

VSS

D53

VSS

D54

VSS

D55

VSS

D57

VSS

D59

VSS

D62

VSS

D8

VSS

E11

VSS

E17

VSS

F20

VSS

F26

VSS

F30

VSS

F34

VSS

F38

VSS

F42

VSS

F46

VSS

F50

VSS

F54

VSS

F58

VSS

F61

VSS

G18

VSS

G22

VSS

G3

VSS

G5

VSS

G6

VSS

G8

VSS

H13

VSS

HASWELL-6-GP-U

HSW_ULT_DDR3L

16 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

VSS VSS VSS

VSS_SENSE

VSS

H17 H57 J10 J22 J59 J63 K1 K12 L13 L15 L17 L18 L20 L58 L61 L7 M22 N10 N3 P59 P63 R10 R22 R8 T1 T58 U20 U22 U61 U9 V10 V3 V7 W20 W22 Y10 Y59 Y63

V58 AH46 V23 E62 AH16

VSS_SENSE

12

VSS_SENSE [46]

Layout Note:

R901

100R2F-L1-GP-U

1. Place close to CPU

2. VCC_SENSE/ VSS_SENSE impedance=50 ohm

3. Length match<25mil

Wistron Corporation

A A

Title

CPU (VSS)

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

CPU (VSS)

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cottonwood

9 104Tuesday, June 17, 2014

1

A00

5

4

3

2

1

SSID = CPU

1D35V_S 3

D D

SC10U6D3V3MX-GP

C1001

12

C C

SC10U6D3V3MX-GP

C1002

C1003

C1018

BDW CAP

SC2D2U6D3V2MX-GP

C1003

12

C1019

12

C1017

SC2D2U6D3V2MX-GP

SC10U6D3V3MX-GP

SC2200P50V2KX-2GP

BDW CAP

SC10U6D3V3MX-GP

C1004

12

DY

C1020

SC2200P50V2KX-2GP

C1020

SC2200P50V2KX-2GP

12

SC10U6D3V3MX-GP

C1006

C1005

12

DY

Layout Note:

Direct tie to CPU VccIn/Vss balls

Layout Note:

As close to CPU as possible

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP1)

Size Document N umber Rev

A3

Date: Sheet

CPU (Power CAP1)

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

10 104Tuesday, June 17, 2 014

of

1

of

A00

5

4

3

2

1

MAX: 1.92A

1.838A 41mA 42mA

D D

X02 0414

R1101

1 2

0R0805-P AD-2-GP-U

+V1.05DX _MODPHY_PCH1D05V_H SIO

C1102

SC1U6D3V2KX-GP

C1102

SC1U6D3V2KX-GP

C1101

SC1U6D3V2KX-GP

C1101

12

SC1U6D3V2KX-GP

12

CAP need close to pin K9 L10

1D05V_H SIO

X02 0414

L1101

1 2

0R0603-P AD-2-GP-U

12

CAP need close to pin B18

+V1.05S_ AUSB3PLL

C1103

SC1U6D3V2KX-GP

C1103

SC1U6D3V2KX-GP

12

DY

+V1.05S_ AUSB3PLL

12

DY

C1104

C1123

SC10U6D3V5KX-1GP

1D05V_H SIO

X02 0414

L1102

1 2

0R0603-P AD-2-GP-U

12

CAP need close to pin B11

+V1.05S_ ASATA3PLL

C1105

SC1U6D3V2KX-GP

C1105

SC1U6D3V2KX-GP

12

DY

+V1.05S_ ASATA3PLL

12

DY

C1106

SC10U6D3V5KX-1GP

C1107

SC10U6D3V5KX-1GP

57mA 62mA

12

DY

+V1.05S_ APLLOPI

C1110

SC10U6D3V3MX-GPDYC1110

SC10U6D3V3MX-GP

DY

X02 0414X02 0414

R1103

C1124

SC10U6D3V3MX-GPDYC1124

SC10U6D3V3MX-GP

12

1 2

0R0603-P AD-2-GP-U

CAP need close to pin AC9

+V3.3A_P SUS3D3V_S5 _PCH

SC10U6D3V3MX-GP

C1108

12

DY

L1103 IND-2 D2UH-196-GP

1 2

68.2R21D.10R

CAP need close to pin J18

1D05V_S 0

C C

R1102

1 2

0R0603-P AD-2-GP-U

+V1.05S_ APLLOPI

C1109

SC1U6D3V2KX-GP

C1109

SC1U6D3V2KX-GP

12

CAP need close to pin AA21

185mA

12

C1111

SC1U6D3V2KX-GP

C1111

SC1U6D3V2KX-GP

+V1.05S_ AXCK_DCB

C1112

SC10U6D3V3MX-GPDYC1112

SC10U6D3V3MX-GP

12

DY

+V1.05S_ AXCK_DCB1D05V_S 0

C1125

SC10U6D3V3MX-GPDYC1125

SC10U6D3V3MX-GP

12

31mA 658mA 1.632A 1mA

X02 0414

1D05V_S 0

IND-2D2UH-1 96-GP

IND-2D2UH-1 96-GP L1104

L1104

1 2

68.2R21D.10R

B B

+V1.05S_ AXCK_LCPLL

C1113

SC1U6D3V2KX-GP

C1113

SC1U6D3V2KX-GP

12

DY

C1114

CAP need close to pin A20

1D05V_S 0

SC10U6D3V5KX-1GP

CAP need close to pin AE9

R1104

1 2

0R0603-P AD-2-GP-U

DY

C1115

SC10U6D3V3MX-GPDYC1115

SC10U6D3V3MX-GP

C1116

SC1U6D3V2KX-GP

C1116

12

SC1U6D3V2KX-GP

12

1D05V_S 0

0R0805-P AD-2-GP-U

X02 0414

R1105

1 2

SC1U6D3V2KX-GP

C1117

C1118

SC1U6D3V2KX-GP

C1118

SC1U6D3V2KX-GP

12

+V1.05S_ CORE_PCH+1.05M_A SW

C1119

SC10U6D3V3MX-GPDYC1119

SC10U6D3V3MX-GP

12

DY

CAP need close to pin AE8 J11

RTC_AUX _S5

C1121

SCD1U10V2KX-5GP

C1121

SCD1U10V2KX-5GP

C1122

SC1U6D3V2KX-GP

C1122

C1120

SCD1U10V2KX-5GPDYC1120

SCD1U10V2KX-5GP

12

SC1U6D3V2KX-GP

12

DY

CAP need close to pin AG10

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (Power CAP2)

Size Document N umber Rev

A3

Date: Sheet

CPU (Power CAP2)

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

11 104Tuesday, June 17, 2 014

of

1

of

A00

5

4

3

2

1

SSID = MEMORY

SA0_DIMA SA1_DIMA

DIMM1

D D

M_VREF_CA_D IMMA

12

C1201

C1218

C1202

C C

B B

A A

SCD1U10V2KX-5GP

12

DY

C1204

SCD1U10V2KX-5GP

0D675V_S0

12

C1214

DY

SC1U6D3V2KX-GP

Layout Note:

All VREF traces should have width=20mil; spacing=20 mil

SCD1U10V2KX-5GP

M_VREF_DQ_D IMMA

12

C1205

SC2D2U10V3KX-1GP

12

C1215

SC1U6D3V2KX-GP

5

SCD1U10V2KX-5GP

12

C1206

SCD1U10V2KX-5GP

C1216

SC1U6D3V2KX-GP

M_A_A[15:0][5]

M_A_DQ[63:0][5]

Layout Note:

Place these caps close to VREF_CA

Layout Note:

Place these caps close to VREF_DQ

Layout Note:

Place these caps close to VTT1 and VTT2.

M_A_DQS#[7:0][5]

M_A_DQS[7:0][5]

M_VREF_CA_D IMMA M_VREF_DQ_D IMMA

DDR3_DR AMRST#[4]

M_A_BS2[5]

M_A_BS0[5] M_A_BS1[5]

M_A_DIMA_ODT0 M_A_DIMA_ODT1

12

ED1217

ED1217 AZ5725-01FDR 7G-GP

AZ5725-01FDR 7G-GP

close to dimm

0D675V_S0

M_A_A0 M_A_A1 M_A_A2 M_A_A3 M_A_A4 M_A_A5 M_A_A6 M_A_A7 M_A_A8 M_A_A9 M_A_A10 M_A_A11 M_A_A12 M_A_A13 M_A_A14 M_A_A15

M_A_DQ13 M_A_DQ8 M_A_DQ14 M_A_DQ10 M_A_DQ9 M_A_DQ12 M_A_DQ15 M_A_DQ11 M_A_DQ29 M_A_DQ28 M_A_DQ30 M_A_DQ31 M_A_DQ25 M_A_DQ24 M_A_DQ27 M_A_DQ26 M_A_DQ44 M_A_DQ41 M_A_DQ43 M_A_DQ47 M_A_DQ45 M_A_DQ40 M_A_DQ42 M_A_DQ46 M_A_DQ51 M_A_DQ50 M_A_DQ49 M_A_DQ48 M_A_DQ52 M_A_DQ53 M_A_DQ54 M_A_DQ55 M_A_DQ0 M_A_DQ1 M_A_DQ2 M_A_DQ6 M_A_DQ5 M_A_DQ4 M_A_DQ3 M_A_DQ7 M_A_DQ21 M_A_DQ20 M_A_DQ17 M_A_DQ16 M_A_DQ18 M_A_DQ19 M_A_DQ22 M_A_DQ23 M_A_DQ36 M_A_DQ33 M_A_DQ34 M_A_DQ38 M_A_DQ37 M_A_DQ32 M_A_DQ35 M_A_DQ39 M_A_DQ62 M_A_DQ58 M_A_DQ60 M_A_DQ61 M_A_DQ63 M_A_DQ59 M_A_DQ56 M_A_DQ57

M_A_DQS#1 M_A_DQS#3 M_A_DQS#5 M_A_DQS#6 M_A_DQS#0 M_A_DQS#2 M_A_DQS#4 M_A_DQS#7

M_A_DQS1 M_A_DQS3 M_A_DQS5 M_A_DQS6 M_A_DQS0 M_A_DQS2 M_A_DQS4 M_A_DQS7

DIMM1

98

A0

97

A1

96

A2

95

A3

92

A4

91

A5

90

A6

86

A7

89

A8

85

A9

107

A10/AP

84

A11

83

A12

119

A13

80

A14

78

A15

79

A16/BA2

109

BA0

108

BA1

5

DQ0

7

DQ1

15

DQ2

17

DQ3

4

DQ4

6

DQ5

16

DQ6

18

DQ7

21

DQ8

23

DQ9

33

DQ10

35

DQ11

22

DQ12

24

DQ13

34

DQ14

36

DQ15

39

DQ16

41

DQ17

51

DQ18

53

DQ19

40

DQ20

42

DQ21

50

DQ22

52

DQ23

57

DQ24

59

DQ25

67

DQ26

69

DQ27

56

DQ28

58

DQ29

68

DQ30

70

DQ31

129

DQ32

131

DQ33

141

DQ34

143

DQ35

130

DQ36

132

DQ37

140

DQ38

142

DQ39

147

DQ40

149

DQ41

157

DQ42

159

DQ43

146

DQ44

148

DQ45

158

DQ46

160

DQ47

163

DQ48

165

DQ49

175

DQ50

177

DQ51

164

DQ52

166

DQ53

174

DQ54

176

DQ55

181

DQ56

183

DQ57

191

DQ58

193

DQ59

180

DQ60

182

DQ61

192

DQ62

194

DQ63

10

DQS0#

27

DQS1#

45

DQS2#

62

DQS3#

135

DQS4#

152

DQS5#

169

DQS6#

186

DQS7#

12

DQS0

29

DQS1

47

DQS2

64

DQS3

137

DQS4

154

DQS5

171

DQS6

188

DQS7

116

ODT0

120

ODT1

126

VREF_CA

1

VREF_DQ

30

RESET#

203

VTT1

204

VTT2

SKT_DDR 204P SMD

DDR3-204P- 215-GP-U

62.10024.M31

4

RAS#

CAS#

CKE0 CKE1

EVENT#

VDDSPD

NC#1 NC#2

NC#/TEST

VDD1 VDD2 VDD3 VDD4 VDD5 VDD6 VDD7 VDD8

VDD9 VDD10 VDD11 VDD12 VDD13 VDD14 VDD15 VDD16 VDD17 VDD18

CS0# CS1#

CK0#

CK1#

NP1

NP2

110 113

WE#

115

114 121

73 74

101

CK0

103

102

CK1

104

11

DM0

28

DM1

46

DM2

63

DM3

136

DM4

153

DM5

170

DM6

187

DM7

200

SDA

202

SCL

198

199

SA0_DIMA

197

SA0

SA1_DIMA

201

SA1

77 122 125

75 76 81 82 87 88 93 94 99 100 105 106 111 112 117 118 123 124

2

VSS

3

VSS

8

VSS

9

VSS

13

VSS

14

VSS

19

VSS

20

VSS

25

VSS

26

VSS

31

VSS

32

VSS

37

VSS

38

VSS

43

VSS

44

VSS

48

VSS

49

VSS

54

VSS

55

VSS

60

VSS

61

VSS

65

VSS

66

VSS

71

VSS

72

VSS

127

VSS

128

VSS

133

VSS

134

VSS

138

VSS

139

VSS

144

VSS

145

VSS

150

VSS

151

VSS

155

VSS

156

VSS

161

VSS

162

VSS

167

VSS

168

VSS

172

VSS

173

VSS

178

VSS

179

VSS

184

VSS

185

VSS

189

VSS

190

VSS

195

VSS

196

VSS

205

VSS

206

VSS

1D35V_S3

M_A_RAS# [5] M_A_WE# [5] M_A_CAS# [5]

M_A_DIMA_CS#0 [5] M_A_DIMA_CS#1 [5]

M_A_DIMA_CKE0 [5] M_A_DIMA_CKE1 [5]

M_A_DIMA_CLK_DD R0 [5] M_A_DIMA_CLK_DD R#0 [5]

M_A_DIMA_CLK_DD R1 [5] M_A_DIMA_CLK_DD R#1 [5]

PCH_SMBDAT A [18,67,96] PCH_SMBCLK [18,67,96]

X02 0414

0R0402-PAD-2- GP

3D3V_S0

12

C1203

DY

SCD1U16V2KX-3GP

1D35V_S3

X01 0224

C1210

Layout Note:

Place these Caps near SO-DIMMA.

3

12

R1202

BDW CAP

C1207

12

TC1201

DY

BDW CAP

ST330U2VDM-4-GP

12

C1211

SC1KP50V2KX-1GP

DDR_PG_CT RL[4]

Q1201 must use Vth=1V.

SC2D2U10V3KX-1GP

12

SCD1U10V2KX-5GP

X02 0414

Note: SA0 DIM0 = 0, SA1_DIM0 = 0

12

SO-DIMMA SPD Address is 0xA0

R1201

0R0402-PAD-2- GP

SO-DIMMA TS Address is 0x30

BDW CAP

C1208

SC2D2U6D3V2MX-GP

C1208

SC2D2U6D3V2MX-GP

C1209

SC2D2U10V3KX-1GP

C1209

SC2D2U10V3KX-1GP

12

C1213

C1212

SC1U6D3V2KX-GP

R1205

1 2

0R0402-PAD-2- GP

12

C1221

C1222

C1220

SCD1U10V2KX-5GP

C1222

SCD1U10V2KX-5GP

1D35V_S3

S D

3rd = 84.3K329.031

G

Q1201

FDV301N-NL -GP

Vth = 1V max.

D

84.00301.A31

2nd = 84.05067.031

2

5V_S5

12

DY

R1208

R1208 220KR2J-L2-GP

220KR2J-L2-GP

DDR_VTT_P G_CTRLDDR_PG_CT RL_R

R1204

R1204 2MR2-GP

2MR2-GP

1D35V_S3

D

G

Q1202

Q1202 2N7002K-2-GP

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

S

M_A_B_DIMM_ODT

DDR_VTT_P G_CTRL [49]

R1206 66D5R2F-GPR1206 66D5R2F-GP

1 2

R1207 66D5R2F-GPR1207 66D5R2F-GP

1 2

Title

Size Document Num ber Rev

Size Document Num ber Rev A2

A2

Date: Sheet

Tuesday, June 17, 2014

DDR3-SODIMM1

Cottonwood

M_A_DIMA_ODT0

M_A_DIMA_ODT1

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

12 104

1

12 104

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

(Reserved)DDR3-SODIMM2

Size Document N umber Rev

Size Document N umber Rev A3

A3

Tuesday, June 17, 2 014

Date: Sheet

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

13 104

of

1

of

A00

5

D D

4

3

2

1

C C

(Blanking)

B B

Wistron Corporation

A A

Title

(Reserved)_SODIMM _SODIMM4

Size Document Number Rev

A4

Date: Sheet of

5

4

3

Date: Sheet of

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Cottonwood

14 104Tuesday, June 17, 2014

1

A00

5

4

3

2

1

SSID = CPU

D D

3D3V_S0

1

23

RN1501

RN1501 SRN2K2J -1-GP

HSW_ULT_DDR3L

eDP SIDEBAND

PCIE

HSW_ULT_DDR3L

DISPLAY

CPU1I

L_BKLT_ CTRL[5 2] L_BKLT_ EN[24] EDP_VDD _EN[52]

X02 0414

PIRQA#[19]

C C

3D3V_S0

SRN10KJ -6-GP

1 2 3 4 5

RN1505

RN1505 SRN10KJ -6-GP

SRN10KJ -6-GP

1 2 3 4 5

RN1506

B B

RN1506

8 7 6

PIRQD# PIRQB#

MCP_GPIO5 4 MCP_GPIO5 2 PIRQC#

MCP_GPIO1 7 [20 ] MCP_GPIO3 5 [19 ]

HDD_FAL L_INT[66,67]

R1501

1 2

0R0402-P AD-2-GP

MCP_GPIO5 1[20]

SENSOR_ HUB_RST#[66]

TP1501TP1501

MCP_GPIO5 5[19,20]

1

PIRQB# PIRQC# PIRQD# PCI_PME#

MCP_GPIO5 5 MCP_GPIO5 2 MCP_GPIO5 4

B8

EDP_BKLCTL

A9

EDP_BKLEN

C6

EDP_VDDEN

U6

PIRQA#/GPIO77

P4

PIRQB#/GPIO78

N4

PIRQC#/GPIO79

N2

PIRQD#/GPIO80

AD4

PME#

U7

GPIO55

L1

GPIO52

L3

GPIO54

R5

GPIO51

L4

GPIO53

HASW ELL-6-GP-U

9 OF 19

HDMI

DDPB_CTRLCLK

DDPB_CTRLDATA

DDPC_CTRLCLK

DDPC_CTRLDATA

DDPB_AUXN DDPC_AUXN

DDPB_AUXP

DDPC_AUXP

DDPB_HPD DDPC_HPD

EDP_HPD

B9 C9 D9 D11

C5 B6 B5 A6

C8 A8 D6

SRN2K2J -1-GP

4

DDPC_CT RLDATA

HDMI_PCH_ DET [54]

EDP_HPD [52]

PCH_HDM I_CLK [54] PCH_HDM I_DATA [54]

TP1502TP1502

1

https://t.me/schematicslaptop https://t.me/biosarchive

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH ( EDP/GPIO/DDI )

Cottonwood

15 104Tuesday, June 17, 2 014

of

1

of

A00

5

4

3

2

1

SSID = PCH

HSW_ULT_DDR3L

CPU1K

F10

PERN5_L0

E10

https://t.me/schematicslaptop

D D

C C

B B

https://t.me/biosarchive

PCIE_PRX_ WLANTX_N3[63] PCIE_PRX_ WLANTX_P3[63]

PCIE_PTX_ WLANRX_N3 _C[63] PCIE_PTX_ WLANRX_P3 _C[63]

+V1.05S_ AUSB3PLL

C1601

C1602 SCD1U10 V2KX-5GPC1602 SCD1U10V2K X-5GP

Layout Note:

1. PCIE_RCOMP/ PCIE_IREF trac e width=12~15mi l

2. Isolation Sp acing: 12mil

3. Total trace length<500mil

1 2 1 2

R1601

3KR2F-GP

1 2

SCD1U10 V2KX-5GP

PCIE_PTX_ WLANRX_N3 PCIE_PTX_ WLANRX_P3

PCIE_RCOM P

PERP5_L0

C23

PETN5_L0

C22

PETP5_L0

F8

PERN5_L1

E8

PERP5_L1

B23

PETN5_L1

A23

PETP5_L1

H10

PERN5_L2

G10

PERP5_L2

B21

PETN5_L2

C21

PETP5_L2

E6

PERN5_L3

F6

PERP5_L3

B22

PETN5_L3

A21

PETP5_L3

G11

PERN3

F11

PERP3

C29

PETN3

B30

PETP3

F13

PERN4

G13

PERP4

B29

PETN4

A29

PETP4

G17

PERN1/USB3RN3

F17

PERP1/USB3RP3

C30

PETN1/USB3TN3

C31

PETP1/USB3TP3

F15

PERN2/USB3RN4

G15

PERP2/USB3RP4

B31

PETN2/USB3TN4

A31

PETP2/USB3TP4

E15

RSVD#E15

E13

RSVD#E13

A27

PCIE_RCOMP

B27

PCIE_IREF

WLAN

HASW ELL-6-GP-U

HSW_ULT_DDR3L

PCIE USB

11 OF 19

USB2N0 USB2P0

USB2N1 USB2P1

USB2N2 USB2P2

USB2N3 USB2P3

USB2N4 USB2P4

USB2N5 USB2P5

USB2N6 USB2P6

USB2N7 USB2P7

USB3RN1 USB3RP1

USB3TN1

USB3TP1

USB3RN2 USB3RP2

USB3TN2

USB3TP2

USBRBIAS#

USBRBIAS RSVD#AN10 RSVD#AM10

OC0/GPIO40# OC1/GPIO41# OC2/GPIO42# OC3/GPIO43#

AN8 AM8

AR7 AT7

AR8 AP8

AR10 AT10

AM15 AL15

AM13 AN13

AP11 AN11

AR13 AP13

G20 H20

C33 B34

E18 F18

B33 A33

AJ10 AJ11 AN10 AM10

AL3 AT1 AH2 AV3

USB_COM P

USB_OC# 0_1 USB_OC# 2_3 USB_OC# 4_5 USB_OC# 6_7

PM_SUSW ARN#_R[17]

USB 2.0 Table

Pair

USB_PN0 [34] USB_PP0 [3 4]

USB_PN1 [35] USB_PP1 [3 5]

USB_PN2 [63] USB_PP2 [6 3]

USB_PN3 [66] USB_PP3 [6 6]

USB_PN4 [52] USB_PP4 [5 2]

USB_PN5 [63] USB_PP5 [6 3]

USB_PN6 [52] USB_PP6 [5 2]

USB_PN7 [63] USB_PP7 [6 3]

USB3_PR X_CTX_N0 [34 ] USB3_PR X_CTX_P0 [34]

USB3_PT X_CRX_N0 [34 ] USB3_PT X_CRX_P0 [34]

USB3_PR X_CTX_N1 [34 ] USB3_PR X_CTX_P1 [34]

USB3_PT X_CRX_N1 [34 ] USB3_PT X_CRX_P1 [34]

Layout Note:

1 2

R1602

R1602 22D6R2F -L1-GP

22D6R2F -L1-GP

USB_OC# 0_1 [18,35] USB_OC# 2_3 [63]

USB_OC# 4_5 [20]

USB_OC# 2_3

MCP_GPIO7 3[18]

USB_OC# 6_7

1. USB_COMP usi ng 50 ohm sing le-ended impeda nce

2. Isolation Sp acing :15mil

3. Total trace length<500mil

RN1601

8 7 6

SRN10KJ -6-GP

3D3V_S5 _PCH

1 2 3 45

Device

USB3.0 port2

0

USB3.0 Port1 (Debug Port)

1

USB2.0 Port3 (IOBD)

2

Sensor HUB

3

CAMERA

4

WLAN

5

Touch Panel

6

Card Reader

7

#515621

PCIE Table

Port

1

2

3

4

5(L0~L3)

A A

6(L3)

6(L2)

6(L0~L1)

5

Device

N/A

WLAN

N/A

HDD

N/A

Share BUS

USB3.0_3

USB3.0_4

SATA0

SATA1

GPU GPU GPU GPU

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

GPU GPU GPU GPU

Title

Size Document N umber Rev

A3

Date: Sheet

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

PCH (PCIE/USB)

Cottonwood

16 104Tuesday, June 17, 2 014

1

A00

of

A00

5

4

3

2

1

SSID = PCH

https://t.me/schematicslaptop https://t.me/biosarchive

RN1703

1

D D

R1717 10KR2J-3-GP

XDP_DBR ESET#[96]

SYS_PW ROK[24,96] PCH_PW ROK[24,26,36]

C C

PM_SUSW ARN#_R[16]

PM_PW RBTN#[24,96] AC_PRES ENT[24]

AC_PRES ENT

12

DY

EC1707

SCD1U10V2KX-5GP

DY

12

EC1702

4

DY

SC1KP50V2KX-1GP

SCD1U10V2KX-5GP

(CRB#514469)

12

DY

EC1703

SC1KP50V2KX-1GP

5

BATLOW # AC_PRES ENT

PM_SUS_ STAT#

3D3V_S5

RN1701

2 3 1

SRN10KJ -5-GP

B B

A A

SRN10KJ -5-GP

R1703

1 2

1KR2J-1-G P

3D3V_S5 _PCH

1 2

R1724 10KR2J-3 -GP

DY

EC1706

SC1KP50V2KX-1GP

2 3

SRN10KJ -5-GP

DY

R1706

0R0402-P AD-2-GP

PCH_W AKE#

12

DY

EC1704

SC1KP50V2KX-1GP

12

4

12

EC1705

3D3V_S0

12

1 2

X02 0414

PLT_RST #[24,63,65]

100KR2J -1-GP

XDP_DBR ESET#

12

DY

SC1KP50V2KX-1GP

PM_RSMR ST# PM_PCH_ PWROK

SYS_PW ROK

R1701

R1701 10KR2J-3 -GP

10KR2J-3 -GP

R1715

SYS_PW ROK PLT_RST # PCH_PW ROK KBC_DPW ROK

R1707

1 2

0R0402-P AD-2-GP

1

TP1706TP1706

1

TP1705TP1705

X02 0414

1 2

0R0402-P AD-2-GP

12

DY

PM_SUSA CK#_R XDP_DBR ESET# PCH_DPW ROK PM_RSMR ST# SYS_PW ROK

PM_PCH_ PWROK

MPWR OK PCI_PLTRS T#

PM_RSMR ST# PM_SUSW ARN#_R PM_PW RBTN# AC_PRES ENT BATLOW # PCH_SLP _S0# PCH_SLP _WLAN#

PCI_PLTRS T#

R1713

C1701

C1701 SC220P5 0V2KX-3GP

SC220P5 0V2KX-3GP

4

CPU1H

AK2

SUSACK#

AC3

SYS_RESET#

AG2

SYS_PWROK

AY7

PCH_PWROK

AB5

APWROK

AG7

PLTRST#

AW6

RSMRST#

AV4

SUSWARN#/SUSPWRDNACK#/GPIO30

AL7

PWRBTN#

AJ8

ACPRESENT/GPIO31

AN4

BATLOW#/GPIO72

AF3

SLP_S0#

AM5

SLP_WLAN#/GPIO29

HASW ELL-6-GP-U

PM_SUSA CK#[24]

PM_SUSW ARN#[24]

HSW_ULT_DDR3L

SYSTEM POWER MANAGEMENT

NON DS3

R1708

1 2

0R2J-2-GP

SRN0J-6-G P

1

4

2 3

DS3

RN1702

3D3V_AU X_S5

R1726

R1726 10KR2J-3 -GP

10KR2J-3 -GP

1 2

3V_5V_P OK#

SUS_STAT#/GPIO61

PM_SUSA CK#_RPM_SUSW ARN#_R

PM_SUSA CK#_R PM_SUSW ARN#_R

R1727

100KR2J -1-GP

1 2

NON DS3

Q1701

5

6

2N7002K DW-GP

84.2N702.A3F

2nd = 84.2N702.E3F

3rd = 75.00601.07C

4th = 84.DMN66.03F

3

PCH strap pin:

DSWODVREN

8 OF 19

DSWVRMEN

DPWROK

WAKE#

CLKRUN#/GPIO32

SUSCLK/GPIO62

SLP_S5#/GPIO63

SLP_S4# SLP_S3#

SLP_A# SLP_SUS# SLP_LAN#

34

2

1

On Die DSW VR Enable

Low = Disable High = Enable (default)

*

DSWO DVREN

AW7 AV5

PCH_W AKE#

AJ5

PM_CLKR UN#

V5

PM_SUS_ STAT#

AG4

SUS_CLK _PCH

AE6

PM_SLP_ S5#

AP5

PM_SLP_ S4#

AJ6

PM_SLP_ S3#

AT4

PM_SLP_ A#

AL5

PM_SLP_ SUS#

AP4

PM_SLP_ LAN#

AJ7

PCH_DPW ROK

A00 0609

1KR2J-1-G P

1KR2J-1-G P R1702

PM_RSMR ST#

3V_5V_P OK_C

R1702

1 2

R1728

1 2

NON DS3

0R2J-2-GP

1 2

0R0402-P AD-2-GP

R1704

0R2J-2-GP

NON DS3

1 2 1 2

DY

R1705 0R2 J-2-GP

R1705: DY for O BFF disable

1

1 2

0R0402-P AD-2-GP

TP1702TP1702

1 2

0R0402-P AD-2-GP

TP1703TP1703

TP1704TP1704

TP1707TP1707

R1709

R1710

A00 0604

A00 0609

R1718

1 2

0R0402-P AD-2-GP

R1725

DS3

100KR2F -L1-GP

1 2

RSMRST# _KBC [24]

3V_5V_P OK [45]

R1729

PM_SLP_ SUS#

2

DSWO DVREN

PCIE_W AKE# [20,24 ]

PM_CLKR UN#_EC [24]

SUS_CLK [24]

PM_SLP_ S4# [24,49]

PM_SLP_ S3# [24,36,48,4 9,51]

PM_SLP_ SUS# [24,38 ]

KBC_DPW ROK [24]

PM_CLKR UN#

SUS_CLK _PCH

Title

Size Document N umber Rev

A3

Date: Sheet

R1720

330KR2J -L1-GP

1 2

DY

R1721

330KR2J -L1-GP

R1714

8K2R2F-1 -GP

1 2

RTC_AUX _S5

3D3V_S0

EC1701

SC4D7P5 0V2CN-1GP

PCH (PM)

Cottonwood

EC1701

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

17 104Tuesday, June 17, 2 014

1

DY

1 2

A00

of

A00

SSID = PCH

5

4

3

2

1

D D

3D3V_S0

RN1801

SRN10KJ-5-GP

LPC_AD1 LPC_AD2

CLK_PCIE_WLAN_REQ3#

4

Based on the swap report.

RN1806

8 7 6

SRN0J-7-GP-U

LPC_FRAME#[24,65]

SPI_CLK_R[24,25] SPI_CS0#_R[24,2 5]

SPI_SI_R[24 ,25]

SPI_SO_R[24,25]

SPI_WP#[25] SPI_HOLD#[25]

3D3V_S5

1

23

4

MCP_GPIO37 [19 ]

CLK_PCIE_REQ#[19]

LPC_LAD0_PCHLPC_AD0

1

LPC_LAD1_PCH

2

LPC_LAD2_PCH

3

LPC_LAD3_PCHLPC_AD3

45

RN1802

RN1802 SRN1KJ-7-GP

SRN1KJ-7-GP

PCH_SPI_DQ3

PCH_SPI_DQ2

R1801

0R0402-PAD-2-GP

R1807

0R0402-PAD-2-GP

X02 0414

CLK_PCIE_REQ#

CLK_PCIE_WLAN_REQ3#

CLK_PCIE_REQ#

1 2

1 2 1 2

1 2 1 2 1 2 1 2

LPC_LAD0_PCH LPC_LAD1_PCH LPC_LAD2_PCH LPC_LAD3_PCH LPC_LFRAME#_PCH

PCH_SPI_CLK

R180633R2J-2-GP R180633R2J-2-GP

PCH_SPI_CS0#

PCH_SPI_SI

R18080R0402-PAD-2-GP R18080R0402-PAD-2-G P

PCH_SPI_SO

R18090R0402-PAD-2-GP R18090R0402-PAD-2-G P

PCH_SPI_DQ2

R18110R0402-PAD-2-GP R18110R0402-PAD-2-G P

PCH_SPI_DQ3

R18120R0402-PAD-2-GP R18120R0402-PAD-2-G P

CPU1F

C43

CLKOUT_PCIE_N0

C42

CLKOUT_PCIE_P0

U2

PCIECLKRQ0#/GPIO18

B41

CLKOUT_PCIE_N1

A41

CLKOUT_PCIE_P1

Y5

PCIECLKRQ1#/GPIO19

C41

CLKOUT_PCIE_N2

B42

CLKOUT_PCIE_P2

AD1

PCIECLKRQ2#/GPIO20

B38

CLKOUT_PCIE_N3

C37

CLKOUT_PCIE_P3

N1

PCIECLKRQ3#/GPIO21

A39

CLKOUT_PCIE_N4

B39

CLKOUT_PCIE_P4

U5

PCIECLKRQ4#/GPIO22

B37

CLKOUT_PCIE_N5

A37

CLKOUT_PCIE_P5

T2

PCIECLKRQ5#/GPIO23

HASWELL-6-GP-U

CPU1G

AU14

LAD0

AW12

LAD1

AY12

LAD2

AW11

LAD3

AV12

LFRAME#

AA3

SPI_CLK

Y7

SPI_CS0#

Y4

SPI_CS1#

AC2

SPI_CS2#

AA2

SPI_MOSI

AA4

SPI_MISO

Y6

SPI_IO2

AF1

SPI_IO3

HASWELL-6-GP-U

HSW_ULT_DDR3L

WLAN

HSW_ULT_DDR3L

LPC

CLOCK

SIGNALS

SMBUS

C-LINKSPI

DIFFCLK_BIASREF

CLKOUT_ITPXDP_P

SMBALERT#/GPIO11

SML0ALERT#/GPIO60

SML1ALERT#/PCHHOT#/GPIO73

SML1DATA/GPIO74

6 OF 19

XTAL24_IN

XTAL24_OUT

RSVD#K21

RSVD#M21

TESTLOW_C35 TESTLOW_C34

TESTLOW_AK8

TESTLOW_AL8

CLKOUT_LPC_0 CLKOUT_LPC_1

CLKOUT_ITPXDP#

7 OF 19

SMBCLK

SMBDATA

SML0CLK

SML0DATA

SML1CLK/GPIO75

CL_CLK

CL_DATA

CL_RST#

A25 B25

K21 M21 C26

C35 C34 AK8 AL8

AN15 AP15

B35 A35

AN2 AP2 AH1

AL2 AN1 AK1 AU4 AU3 AH3

AF2 AD2 AF4

XTAL24_IN XTAL24_OUT

XCLK_BIASREF

MCP_TESTLOW1 MCP_TESTLOW2 MCP_TESTLOW3 MCP_TESTLOW4

CLK_PCI_LPC_R CLK_PCI_KBC_R

MCP_GPIO11 SMB_CLK SMB_DATA CARD_PWR_EN SML0_CLK SML0_DATA MCP_GPIO73 SML1_CLK SML1_DATA

TP_CL_CLK TP_CL_DATA TP_CL_RST#

R1803 3KR2F-GPR1803 3KR2F-GP

1 2

SRN10KJ-5-GP

4

RN1803

DEBUG

R1804 0R2J-2-GP

1 2

R1805 33R2J-2-GPR1805 33R2J-2-GP

1 2

MCP_GPIO73 [16 ] SML1_CLK [24,26] SML1_DATA [24,26]

TP1801TP1801

1

TP1802TP1802

1

TP1803TP1803

1

SMB_DATA

84.2N702.A3F

2nd = 84.2N702.E3F

3rd = 75.00601.07C

4th = 84.DMN66.03F

+V1.05S_AXCK_LCPLL

23 1

4

1 2 3

CLK_PCIE_WLAN_N3[63] CLK_PCIE_WLAN_P3[63]

CLK_PCIE_WLAN_REQ3#[63]

C C

LPC_AD[3..0][24,65]

B B

LPC_AD[3..0]

DY

12

SRN10KJ-5-GP

1 23

RN1804

EC1801

SC10P50V2JN-4GPDYEC1801

SC10P50V2JN-4GP

DY

12

3D3V_S0

2N7002KDW-GP

6

5

Q1801

XTAL24_IN

XTAL24_OUT

EC1802

SC10P50V2JN-4GPDYEC1802

SC10P50V2JN-4GP

https://t.me/schematicslaptop https://t.me/biosarchive

SMB_CLK

X02 0414

0R0402-PAD-2-GP

12

CLK_PCI_LPC [65] CLK_PCI_KBC [24 ]

PCIE_CLK_XDP_N [96] PCIE_CLK_XDP_P [96]

USB_OC#0_1[16,35]

EC_SCI#[20,24]

1

2

34

R1810

1 2

R1802

R1802 1MR2J-1-GP

1MR2J-1-GP

23

SML0_DATA SML0_CLK SMB_CLK SMB_DATA

CARD_PWR_EN

MCP_GPIO11

SML1_DATA SML1_CLK

RN1810

4

SRN10KJ-5-GP

XTAL24_IN_R

4 1

23 1

PCH_SMBDATA [12,67,96]

PCH_SMBCLK [12,67,96]

C1801

12

SC15P50V2JN-2-GP

X1801

X1801 XTAL-24MHZ-86-GP

XTAL-24MHZ-86-GP

82.30004.891

2nd = 82.30004.841

C1802

12

SC15P50V2JN-2-GP

RN1807

8 7 6

SRN2K2J-4-GP

RN1809

SRN10KJ-6-GP

8 7 6

SRN2K2J-1-GP

4

RN1811

3D3V_S0

3D3V_S5_PCH

1 2 3 45

23 1

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (CLOCK/SMBUS/CL/LPC/SPI)

Size Document Number Rev

Custom

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cottonwood

1

18 104Tuesday, June 17, 2014

of

A00

5

4

3

2

1

SSID = CPU

RTC_X1

1 2

R1915 10MR2J-L -GPR1915 10MR2J-L -GP

X1901

41

X-32D768 KHZ-65-GP

82.30001.A41

HSW_ULT_DDR3L

RTC

AUDIO SATA

HDA_SDIN0[27]

R1903

TP1902TP1902

TP1901TP1901

RTC_AUX _S5

12

1

R1901

R1901 1MR2J-1-G P

1MR2J-1-G P

RTC_X1 RTC_X2

SM_INTRUD ER#

PCH_INTVR MEN SRTC_RS T# RTC_RST #

HDA_BITCL K HDA_SYNC HDA_RST # HDA_SDIN0

HDA_SDO UT TP_HDA_ DOCK_EN#

PCH_JTA G_TRST# PCH_JTA G_TCK PCH_JTA G_TDI PCH_JTA G_TDO PCH_JTA G_TMS

XDP_TCK _JTAGX

SC12P50 V2JN-3GP

C1903

CPU1E

AW5

RTCX1

AY5

RTCX2

AU6

INTRUDER#

AV7

INTVRMEN

AV6

SRTCRST#

AU7

RTCRST#

AW8

HDA_BCLK/I2S0_SCLK

AV11

HDA_SYNC/I2S0_SFRM

AU8

HDA_RST#/I2S_MCLK#

AY10

HDA_SDI0/I2S0_RXD

AU12

HDA_SDI1/I2S1_RXD

AU11

HDA_SDO/I2S0_TXD

AW10

HDA_DOCK_EN#/I2S1_TXD#

AV10

HDA_DOCK_RST#/I2S1_SFRM#

AY8

I2S1_SCLK

AU62

PCH_TRST#

AE62

PCH_TCK

AD61

PCH_TDI

AE61

PCH_TDO

AD62

PCH_TMS

AL11

RSVD#AL11

AC4

RSVD#AC4

AE63

JTAGX

AV2

RSVD#AV2

HASW ELL-6-GP-U

1 2

2 3

2nd = 82.30001.841

JTAG

D D

C C

R1913

DY

PCH_INTVR MEN

1 2

330KR2J -L1-GP

Integrated SUS 1V VRM Enable

INTVRMEN

Low = External VRs High = Internal VRs

RTCRST_ ON[24]

*

R1902

10KR2J-3 -GP

RTC_AUX _S5

RN1901

SRN20KJ -1-GP

Q1901

G

12

S

2N7002K -2-GP

84.2N702.J31

2ND = 84.2N702.031

D

(#514849)

21

12

G1901

C1901

GAP-OPEN

SC1U6D3V2KX-GP

1

23

4

12

C1902

C1902 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

330KR2J -L1-GP

Layout: Place a t the open doo r area.

R1907 33R2J-2-GPR190 7 33R2J-2-G P

HDA_COD EC_BITCLK[27]

HDA_COD EC_SYNC[27]

HDA_COD EC_RST#[27,29]

1 2

R1908 0R0402-PAD -2-GPR1908 0R0402-PAD -2-GP

1 2

R1911 33R2J-2-GPR191 1 33R2J-2-G P

1 2

HDA_BITCL K

HDA_SYNC

HDA_RST #

X02 0414

R1912 33R2J-2-GPR191 2 33R2J-2-G P

Flash Descriptor Security Overide/ Intel ME Debug Mode

HDA_SDOUT

The internal pull-down is disabled a fter PLTRST# deasserts

B B

Low = Default High = Enable

*

HDA_COD EC_SDOUT[27]

ME_UNLO CK[24]

1D05S_V CCST

1 2

R1909 1KR2J-1-GPR1909 1KR2J-1-GP

1 2

DY

DY DY

DY

12

R1916 51R 2J-2-GP

R1917 51R 2J-2-GP

R1918 51R 2J-2-GP

R1919 1KR 2J-1-GP

HDA_SDO UT

PCH_JTA G_TDI

PCH_JTA G_TDO

PCH_JTA G_TMS

XDP_TCK _JTAGX

X01 0224

HDA_COD EC_BITCLK SATA_LE D#

1 2

EC1901

EC1901 SC10P50 V2JN-4GP

SC10P50 V2JN-4GP

1 2

DY

R1920 51R 2J-2-GP

PCH_JTA G_TCK

https://t.me/schematicslaptop https://t.me/biosarchive

RTC_X2

X02 0414X02 0414

SC12P50 V2JN-3GP

SC12P50 V2JN-3GP C1904

C1904

1 2

5 OF 19

SATA_RN0/PERN6_L3

SATA_RP0/PERP6_L3 SATA_TN0/PETN6_L3

SATA_TP0/PETP6_L3

SATA_RN1/PERN6_L2

SATA_RP1/PERP6_L2 SATA_TN1/PETN6_L2

SATA_TP1/PETP6_L2

SATA_RN2/PERN6_L1

SATA_RP2/PERP6_L1 SATA_TN2/PETN6_L1

SATA_TP2/PETP6_L1

SATA_RN3/PERN6_L0

SATA_RP3/PERP6_L0 SATA_TN3/PETN6_L0

SATA_TP3/PETP6_L0

SATA0GP/GPIO34 SATA1GP/GPIO35 SATA2GP/GPIO36 SATA3GP/GPIO37

SATA_IREF

RSVD#L11 RSVD#K10

SATA_RCOMP

SATALED#

PIRQA#[15]

INT_SERIRQ[20,24]

CLK_PCIE_ REQ#[1 8]

MCP_GPIO5 5[15,20]

J5 H5 B15 A15

J8 H8 A17 B17

J6 H6 B14 C15

F5 E5 C17 D17

V1 U1 V6 AC1

A12 L11 K10 C12 U3

EC_SMI#

SATA_IREF

SATA_RC OMP SATA_LE D#

SATA3_P RX_HDDTX_N0 [56] SATA3_P RX_HDDTX_P0 [56] SATA3_P TX_HDDRX_N0 [56] SATA3_P TX_HDDRX_P0 [56]

EC_SMI# [20,24] MCP_GPIO3 5 [15 ]

MCP_GPIO3 6 [20]

MCP_GPIO3 7 [18 ]

Layout Note:

4mil trace at b reak-out and 3 12-15mil trace with <0.2 ohms and length tota l <= 500mils.

RN1902

1 2 3 4 5

SRN10KJ -6-GP

R1904

0R0402-P AD-2-GP

8 7 6

R1905

DY

10KR2J-3 -GP

3D3V_S0

12

HDD1

X02 0414

+V1.05S_ ASATA3PLL

1 2

R1906

R1906 3KR2F-GP

3KR2F-GP

3D3V_S0

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

PCH (RTC/SATA/HDA/JTAG)

Size Document N umber Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

Cottonwood

1

19 104Tuesday, June 17, 2 014

of

A00

5

4

3

2

1

SSID = CPU

3D3V_S5

RN2006

MCP_GPIO12

1

4

MCP_GPIO27

2 3

SRN10KJ-5-G P

D D

2nd = 83.R2004.C8F

83.R2004.G8F

RB751V-40H-G P

D2001

INT_TP#_C

0R2J-2-GP

R20020R0402-PAD-2-GP R20020R0402-PAD- 2-GP R20090R0402-PAD-2-GP R20090R0402-PAD- 2-GP R20100R0402-PAD-2-GP R20100R0402-PAD- 2-GP R20200R0402-PAD-2-GP R20200R0402-PAD- 2-GP R20150R0402-PAD-2-GP R20150R0402-PAD- 2-GP R20160R0402-PAD-2-GP R20160R0402-PAD- 2-GP R20190R0402-PAD-2-GP R20190R0402-PAD- 2-GP R20280R0402-PAD-2-GP R20280R0402-PAD- 2-GP

R201710KR2J-3-GP R201710KR2J-3-GP R200410KR2J-3-GP R200410KR2J-3-GP R200110KR2J-3-GP R200110KR2J-3-GP R202110KR2J-3-GP R202110KR2J-3-GP

EC_SWI#

RTC_DET# MCP_GPIO59

MCP_GPIO50

DBC_EN BLUETOOTH _EN

INT2_SELECT

BOARD_ID1

HDD_DEVSL P

K A

0R0402-PAD-2- GP

R2026

R2027

MCP_GPIO44 MCP_GPIO26 MCP_GPIO56 MCP_GPIO47 MCP_GPIO14 MCP_GPIO28 MCP_GPIO13 MCP_GPIO45

MCP_GPIO8 MCP_GPIO46 AD_IA_HW AD_IA_HW2

R2008

1 2

DY

1 2

DY

USB_OC#4_5 [16]

MCP_GPIO51 [15]

INT_TP#[24,62]

MCP_GPIO55[15,19]

MCP_GPIO46

3D3V_S5_PCH

MCP_GPIO8

12

R2022

R2022 10KR2J-3-GP

10KR2J-3-GP

1 2

MCP_R

C C

3D3V_S5_PCH

3D3V_S0

B B

1 2 1 2 1 2 1 2 1 2 1 2 1 2

1 2 1 2 1 2 1 2

RN2012

RN2012 SRN10KJ-6-G P

SRN10KJ-6-G P

1

8

2

7

3

6

4 5

RN2011

RN2011 SRN10KJ-6-G P

SRN10KJ-6-G P

1

8

2

7

3

6

4 5

1 2

R2025 10KR2J-3-GPR2025 10KR2J-3-GP

1 2

R2023 10KR2J-3-GPR2023 10KR2J- 3-GP

1 2

DY

R2024 10KR2J-3-GP

A00 0604

X02 0414

A00 0604

MCP_GPIO17[15] RTC_DET#[25]

PCIE_WAKE#[17,24]

R2005

R2005 0R2J-2-GP

0R2J-2-GP

AD_IA_HW2[44] AD_IA_HW[44]

ALS_INT#[52,66]

HSIOPC[21]

EC_SCI#[18,24]

HDA_SPKR[27]

INT2_SELECT[67]

1 2

DY

TP2008TP2008

TP2002TP2002

TP2005TP2005 TP2006TP2006

MCP_GPIO8 MCP_GPIO12 MCP_GPIO15 MCP_GPIO16

1

MCP_GPIO17

MCP_GPIO27 MCP_GPIO28 MCP_GPIO26

MCP_GPIO56

MCP_GPIO59 MCP_GPIO44 MCP_GPIO47 BOARD_ID1 ALS_INT# MCP_GPIO50

MCP_GPIO13 MCP_GPIO14 CAMERA_PW R_EN

1

MCP_GPIO45 MCP_GPIO46

EC_SWI#

HDD_DEVSL P MCP_GPIO70

1

MCP_GPIO38

1

HDA_SPKR

CPU1J

P1

BMBUSY#/GPIO76

AU2

GPIO8

AM7

LAN_PHY_PWR_CTRL/GPIO12

AD6

GPIO15

Y1

GPIO16

T3

GPIO17

AD5

GPIO24

AN5

GPIO27

AD7

GPIO28

AN3

GPIO26

AG6

GPIO56

AP1

GPIO57

AL4

GPIO58

AT5

GPIO59

AK4

GPIO44

AB6

GPIO47

U4

GPIO48

Y3

GPIO49

P3

GPIO50

Y2

HSIOPC/GPIO71

AT3

GPIO13

AH4

GPIO14

AM4

GPIO25

AG5

GPIO45

AG3

GPIO46

AM3

GPIO9

AM2

GPIO10

P2

DEVSLP0/GPIO33

C4

SDIO_POWER_EN/GPIO70

L2

DEVSLP1/GPIO38

N5

DEVSLP2/GPIO39

V2

SPKR/GPIO81

HASWELL- 6-GP-U

PCH strap pin:

HDA_SPKR

The internal pull-down is disabled after PLTRST# deasserts

Top-Block Swap Override mode

SDIO_D0 / GPIO66

The internal pull-down is disabled after PLTRST# deasserts

HSW_ULT_DDR3L

GPIO

NO REBOOT

Low = Disable (Default)

*

High = Enable

High = Enable "Top-Block swap" mode (Default) Low = Disable "Top-Block swap" mode

*

CPU/

CPU/ MISC

MISC

SERIAL IO

10 OF 19

THRMTRIP#

RCIN#/GPIO82

SERIRQ

PCH_OPI_RCOMP

RSVD#AF20

RSVD#AB21

GSPI0_CS#/GPIO83

GSPI0_CLK/GPIO84 GSPI0_MISO/GPIO85 GSPI0_MOSI/GPIO86

GSPI1_CS#/GPIO87

GSPI1_CLK/GPIO88 GSPI1_MISO/GPIO89

GSPI_MOSI/GPIO90 UART0_RXD/GPIO91

UART0_TXD/GPIO92 UART0_RTS#/GPIO93 UART0_CTS#/GPIO94

UART1_RXD/GPIO0

UART1_TXD/GPIO1 UART1_RST#/GPIO2 UART1_CTS#/GPIO3

I2C0_SDA/GPIO4

I2C0_SCL/GPIO5

I2C1_SDA/GPIO6

I2C1_SCL/GPIO7

SDIO_CLK/GPIO64

SDIO_CMD/GPIO65

SDIO_D0/GPIO66 SDIO_D1/GPIO67 SDIO_D2/GPIO68 SDIO_D3/GPIO69

3D3V_S0

12

R2011

DY

1KR2J-1-GP

PCH_THER MTRIP

D60

H_RCIN#

V4

INT_SERIRQ

T4

PCH_OPIRCOM P

AW15 AF20 AB21

R6 L6

SATA_ODD_PW RGT

N6

LPSS_GSPI0_MOSI_BBS0_R

L8 R7 L5 N7

MCP_GPIO90

K2

KB_LED_BL_DET

J1 K3 J2 G1

MCP_GPIO0

K4

MCP_GPIO1

G2 J3 J4

I2C0_SDA

F2

I2C0_SCL

F3

I2C1_SDA

G4

I2C1_SCL

F1

COLOR_ENG INE

E3 F4

LPSS_SDIO_D0_CMN HDR

D3 E4

MCP_GPIO68

C3 E2

1KR2J-1-GP

1KR2J-1-GP R2006

R2006

HDA_SPKR

1 2

DY

LPSS_SDIO_D0_CMN HDR

DBC_EN [52] CAMERA_DET # [52]

1

TP2007TP2007

1

TP2009TP2009

BLUETOOTH _EN [63]

1

1 2

R2003

R2003 49D9R2F-GP

49D9R2F-GP

1

1 1

X01 0214

I2C1_SDA [62]

I2C1_SCL [62]

TP2003TP2003

1

Need SW double confirm if that 's needed Top-Block swap

TLS Confidentiality

Low = Disable Intel ME Crypto TLS

*

GPIO15

The internal pull-down is disabled after RSMRST# deasserts.

High = Enable Intel ME Crypto TLS

3D3V_S5_PCH

12

R2014

DY

1KR2J-1-GP

MCP_GPIO15

TP2004TP2004

TP2014TP2014 TP2015TP2015

TP2019TP2019

1D05S_VCCST

12

R2018

R2018 1KR2J-1-GP

1KR2J-1-GP

H_RCIN# [24]

INT_SERIRQ [19,24]

Layout Note:

1.Referenced "continuous" VSS plane only.

2.Avoid routing next to clock pins or noisy signals.

3. Trace width: 12~15mil

4. Isolation Spacing: 12mil

5. Max length: 500mil

X02 0417

ALS_INT# H_RCIN#

EC_SMI#[19,24]

MCP_GPIO36[19]

8 7 6

RN2002

SRN10KJ-6-G P

X01 0214

RN2007

4

SRN10KJ-5-G P

RN2008

4

SRN2K2J-1-G P

R2007 100KR2J-1-GPR 2007 100KR2J-1-GP

1 2 1 2

R2013 100KR2J-1-GPR 2013 100KR2J-1-GP

X01 0303

I2C0_SCL I2C0_SDA

I2C1_SDA I2C1_SCL

HSIOPC CAMERA_DET #

3D3V_S0

1 2 3 45

3D3V_S0

1 23

Boot BIOS Strap Bit BBS

*

Low = SPI High = LPC

Boot BIOS Destination

The internal pull-down is disabled after PLTRST# deasserts

3D3V_S0

12

R2012

DY

1KR2J-1-GP

LPSS_GSPI0_MOSI_BBS0_R

Need double confirm, GPIO tabl e set to GPI if that's needed PH or PL

A A

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Num ber Rev

A2

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C.

CPU (GPIO/MISC)

Cottonwood

1

A00

20 104Tuesday, June 17, 2014

A00

of

SSID = CPU

5

4

3

2

3D3V_S5 _PCH

DSW

X02 0414

1

+3.3A_DS W_PRTCSUS

C2105

SC1U6D3V2KX-GPDYC2105

SC1U6D3V2KX-GP

12

C2116

SC1U6D3V2KX-GP

C2116

SC1U6D3V2KX-GP

12

+V1.05DX _MODPHY_PCH

+V1.05S_ AIDLE

+V1.05S_ AUSB3PLL

+V1.05S_ ASATA3PLL

TP2102TP2102

TP2107TP2107

TP2108TP2108

TP2103TP2103 TP2104TP2104 TP2101TP2101

TP_VCCA PLLOPI_VAL

1

+V1.05S_ APLLOPI

+V1.05A_ VCCUSB3SUS

1

+V3.3A_1 .5A_HDA

+V1.05A_ USB2SUS

1

+V3.3A_P SUS

+V3.3A_D SW_P

C2123

12

SC10U6D 3V3MX-GP

+V1.05S_ AXCK_DCB

+V1.05S_ AXCK_LCPLL

+V1.05S_ SSCF100

+V1.05S_ SSCFF

TP_V1.05 S_SSCF100

1

TP_V1.05 S_AXCK_DCB

1

TP_V1.05 S_SSCFF

1

+V3.3A_P SUS

R2123

1 2

HSIO

0R2J-2-GP

5V_S5

1D05V_S 0

+V3.3S_P CORE

HSIOPC_R

HSIO

12

C2141

C2141 SC4D7U6 D3V3KX-GP

SC4D7U6 D3V3KX-GP

CPU1M

K9

VCCHSIO

L10

VCCHSIO

M9

VCCHSIO

N8

VCC1_05

P9

VCC1_05

B18

VCCUSB3PLL

B11

VCCSATA3PLL

Y20

RSVD#Y20

AA21

VCCAPLL

W21

VCCAPLL

J13

DCPSUS3

AH14

VCCHDA

AH13

DCPSUS2

AC9

VCCSUS3_3

AA9

VCCSUS3_3

AH10

VCCDSW3_3

V8

VCC3_3

W9

VCC3_3

J18

VCCCLK

K19

VCCCLK

A20

VCCACLKPLL

J17

VCCCLK

R21

VCCCLK

T21

VCCCLK

K18

RSVD#K18

M20

RSVD#M20

V21

RSVD#V21

AE20

VCCSUS3_3

AE21

VCCSUS3_3

HASW ELL-6-GP-U

A00 0604

0R0805-P AD-2-GP-U

U2101

1

VDD

2

D#2

3

D#3 D#44S#5

HSIO

SLG59M1 470VTR-GP

74.59147.093

R2122

1 2

9

ON

GND

S#7 S#6

GPIO/LPC

LPT LP POWER

8 7 6 5

HSW_ULT_DDR3L

HSIO

OPI

USB3

HDA

VRM

1D05V_H SIO1D05V_S0

HSIO_OUT

RTC

SPI

CORE

THERMAL SENSOR

SERIAL IO

SUS OSCILLATOR

USB2

1 2

13 OF 19

VCCSUS3_3

VCCRTC DCPRTC

VCCSPI

VCCASW VCCASW

VCC1_05 VCC1_05 VCC1_05 VCC1_05

VCC1_05 DCPSUSBYP#AG19 DCPSUSBYP#AG20

VCCASW

DCPSUS1#AD10

DCPSUS1#AD8

VCCTS1_5

VCC3_3 VCC3_3

VCCSDIO VCCSDIO

DCPSUS4

RSVD#AC20

VCC1_05

1D05V_H SIO

R2114

R2114 0R5J-5-GP

0R5J-5-GP

HSIO

AH11 AG10

+VCCRTC EXT

AE7

Y8

AG14 AG13

J11 H11 H15 AE8 AF22 AG19 AG20 AE9 AF9 AG8

+V1.05A_ SUS_PCH

AD10 AD8

J15 K14 K16

U8 T9

+V1.05A_ AOSCSUS

AB8

TP_V1.05 S_APLLOPI

AC20 AG16 AG17

12

C2142

C2142 SC10U6D 3V5KX-1GP

SC10U6D 3V5KX-1GP

SCD1U16 V2KX-3GP

1D05V_S 0

+V1.05S_ CORE_PCH

+1.05M_A SW

1D5V_S0

+V3.3S_1 .8S_LPSS_SDIO

D D

X02 0414

1D05V_S 0

R2105

1 2

0R0402-P AD-2-GP

DY

+V3.3A_1 .5A_HDA3D3V_S5 _PCH

R2108

X02 0414

3D3V_S5 3D3V_ S0

C C

1D05V_S 0

B B

A A

X02 0414

R2101

1 2

0R0402-P AD-2-GP

X02 0414

R2117

1 2

0R0402-P AD-2-GP

X02 0414

R2118

1 2

0R0402-P AD-2-GP

DY

12

+V3.3A_D SW_P

C2136

C2136 SCD1U16 V2KX-3GP

SCD1U16 V2KX-3GP

+V1.05S_ SSCF100

C2137

SC1U6D3V2KX-GP

C2137

SC1U6D3V2KX-GP

+V1.05S_ SSCFF

C2138

SC1U6D3V2KX-GP

C2138

SC1U6D3V2KX-GP

1 2

0R0603-P AD-2-GP-U

X02 0414

R2112

1 2

0R0402-P AD-2-GP

HSIOPC[20]

R2102

1 2

12

0R0603-P AD-2-GP-U

C2109

C2109 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

RTC_AUX _S5

1 2

C2110

Broadwell(#5148 49): No series resistors (0 o hm). Haswell(#486713 ):Series resis tor:5 ohm.

R2110

R2110 5D1R2F-G P

5D1R2F-G P

1 2

BDW/HSW

1

3D3V_S0

+V3.3S_1 .8S_LPSS_SDIO

PCH_VCC DSW_R+PCH_V CCDSW

TP2106TP2106

WistronSKB: match Intel design_20130417 (#489999_2013WW15)

12

TP2109TP2109

1

TP2105TP2105

1

C2135

SC1U6D3V2KX-GP

C2135

SC1U6D3V2KX-GP

12

Intel Recommend

3D3V_S5

12

C2147

SCD1U16 V2KX-3GP

C2114

C2114 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

1 2

C2101

+V3.3A_D SW_P +PC H_VCCDSW

C2128

SC1U6D3V2KX-GP

C2128

SC1U6D3V2KX-GP

1 2

SCD47U1 0V2KX-GP

1D05V_S 0

X02 0414

R2103

1 2

0R0402-P AD-2-GP

12

C2104

SC1U6D3 V2KX-GP

3D3V_S0

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU (POWER2)

Cottonwood

21 104Tuesday, June 17, 2 014

1

A00

of

A00

5

4

3

2

1

SSID = PCH

D D

HSW_ULT_DDR3L

CPU1Q

HSW_ULT_DDR3L

17 OF 19

DC_TEST_AY2_AW2

TP2201TP2201

TP2204TP2204

C C

B B

TP_DC_TEST_AY60

1

DC_TEST_AY61_AW61 DC_TEST_AY62_AW62

1

DC_TEST_A3_B3 DC_TEST_A61_B61 DC_TEST_B62_B63

AY2

DAISY_CHAIN_NCTF_AY2

AY3

DAISY_CHAIN_NCTF_AY3

AY60

DAISY_CHAIN_NCTF_AY60

AY61

DAISY_CHAIN_NCTF_AY61

AY62

DAISY_CHAIN_NCTF_AY62

B2

DAISY_CHAIN_NCTF_B2

B3

DAISY_CHAIN_NCTF_B3

B61

DAISY_CHAIN_NCTF_B61

B62

DAISY_CHAIN_NCTF_B62

B63

DAISY_CHAIN_NCTF_B63

C1

DAISY_CHAIN_NCTF_C1

C2

DAISY_CHAIN_NCTF_C2

HASWELL-6-GP-U

CPU1R

AT2

RSVD#AT2

AU44

RSVD#AU44

AV44

RSVD#AV44

D15

RSVD#D15

F22

RSVD#F22

H22

RSVD#H22

J21

RSVD#J21

HASWELL-6-GP-U

HSW_ULT_DDR3L

DAISY_CHAIN_NCTF_A3 DAISY_CHAIN_NCTF_A4

DAISY_CHAIN_NCTF_A60 DAISY_CHAIN_NCTF_A61 DAISY_CHAIN_NCTF_A62

DAISY_CHAIN_NCTF_AV1 DAISY_CHAIN_NCTF_AW1 DAISY_CHAIN_NCTF_AW2 DAISY_CHAIN_NCTF_AW3

DAISY_CHAIN_NCTF_AW61 DAISY_CHAIN_NCTF_AW62 DAISY_CHAIN_NCTF_AW63

18 OF 19

RSVD#N23 RSVD#R23

RSVD#T23

RSVD#U10

RSVD#AL1

RSVD#AM11

RSVD#AP7 RSVD#AU10 RSVD#AU15

RSVD#AW14

RSVD#AY14

DC_TEST_A3_B3

A3

TP_DC_TEST_A4DC_TEST_AY3_AW3

A4

TP_DC_TEST_A60

A60

DC_TEST_A61_B61

A61

TP_DC_TEST_A62TP_DC_TEST_B2

A62

TP_DC_TEST_AV1

AV1

TP_DC_TEST_AW1

AW1

DC_TEST_AY2_AW2

AW2

DC_TEST_AY3_AW3

AW3

DC_TEST_AY61_AW61DC_TEST_C1_C2

AW61

DC_TEST_AY62_AW62

AW62

TP_DC_TEST_AW63

AW63

N23 R23 T23 U10

AL1 AM11 AP7 AU10 AU15 AW14 AY14

TP2202TP2202

1

TP2203TP2203

1

TP2205TP2205

1

TP2206TP2206

1

TP2207TP2207

1

TP2208TP2208

1

https://t.me/schematicslaptop https://t.me/biosarchive

A A

5

4

3

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

CPU (RSVD)

Size Document Number Rev

A4

Date: Sheet of

2

CPU (RSVD)

Cottonwood

22 104Tuesday, June 17, 2014

1

A00

5

4

3

2

1

SSID = PCH

D D

HSW_ULT_DDR3L

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HSW_ULT_DDR3L

CPU1N

A11 A14 A18 A24 A28 A32 A36 A40 A44 A48 A52 A56

AA1 AA58 AB10 AB20 AB22

AB7 AC61 AD21

AD3 AD63

C C

B B

AE10

AE5 AE58 AF11 AF12 AF14 AF15 AF17 AF18

AG1 AG11 AG21 AG23 AG60 AG61 AG62 AG63 AH17 AH19 AH20 AH22 AH24 AH28 AH30 AH32 AH34 AH36 AH38 AH40 AH42 AH44 AH49 AH51 AH53 AH55 AH57

AJ13 AJ14 AJ23 AJ25 AJ27 AJ29

HASW ELL-6-GP-U

14 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AJ35 AJ39 AJ41 AJ43 AJ45 AJ47 AJ50 AJ52 AJ54 AJ56 AJ58 AJ60 AJ63 AK23 AK3 AK52 AL10 AL13 AL17 AL20 AL22 AL23 AL26 AL29 AL31 AL33 AL36 AL39 AL40 AL45 AL46 AL51 AL52 AL54 AL57 AL60 AL61 AM1 AM17 AM23 AM31 AM52 AN17 AN23 AN31 AN32 AN35 AN36 AN39 AN40 AN42 AN43 AN45 AN46 AN48 AN49 AN51 AN52 AN60 AN63 AN7 AP10 AP17 AP20

AP22 AP23 AP26 AP29

AP3 AP31 AP38 AP39 AP48 AP52 AP54 AP57 AR11 AR15 AR17 AR23 AR31 AR33 AR39 AR43 AR49

AR5 AR52 AT13 AT35 AT37 AT40 AT42 AT43 AT46 AT49 AT61 AT62 AT63

AU1 AU16 AU18 AU20 AU22 AU24 AU26 AU28 AU30 AU33 AU51 AU53 AU55 AU57 AU59 AV14 AV16 AV20 AV24 AV28 AV33 AV34 AV36 AV39 AV41 AV43 AV46 AV49 AV51 AV55

HSW_ULT_DDR3L

CPU1O

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

HASW ELL-6-GP-U

15 OF 19

VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS VSS

AV59 AV8 AW16 AW24 AW33 AW35 AW37 AW4 AW40 AW42 AW44 AW47 AW50 AW51 AW59 AW60 AY11 AY16 AY18 AY22 AY24 AY26 AY30 AY33 AY4 AY51 AY53 AY57 AY59 AY6 B20 B24 B26 B28 B32 B36 B4 B40 B44 B48 B52 B56 B60 C11 C14 C18 C20 C25 C27 C38 C39 C57 D12 D14 D18 D2 D21 D23 D25 D26 D27 D29 D30 D31

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

Taipei Hsien 221, Taiwan, R.O.C.

CPU(VSS)

Cottonwood

23 104Tuesday, June 17, 2 014

of

1

of

A00

5

SSID = KBC

X02 0414

1D05V_S0

D D

Layout Note:

Need very close to EC

ALL_SYS_PWRGD assert, delay 10ms; PCH_PWROK assert.

C C

LCD_TST[52]

LCD_TST_EN[52]

ALL_SYS_PWRGD de-assert, delay 100ms; SYS_PWROK assert.

B B

LVDS backlight Control from PS 8625

eDP backlight Control from PCH

3D3V_S0

12

C2412SCD1U16V2KX-3GP C2412SCD1U16V2KX-3GP

L_BKLT_EN[15]

R2401

1 2

0R0402-PAD-2-GP

12

C2413

DY

SC2D2U10V3KX-1GP

X02 0414

R2417

1 2

0R0402-PAD-2-GP

X01 0219

INT_TP#[20,62]

EC_AGND

X02 0414

R2444

1 2

0R0402-PAD-2-GP

EC_VTT

12

C2401

C2414

1 2

TP_LOCK#[62]

X02 0414

R2426

R2426 0R0402-PAD-2-GP

0R0402-PAD-2-GP

SCD1U16V2KX-3GP

USBCHARGER_CB0[35]

BATT_WHITE_LED#[63]

CHG_AMBER_LED#[63]

AD_IA[44]

USB_PWR_EN#[35,63] USB_CHG_EN[35]

ALL_SYS_PWRGD[36]

HDMI_EC_DET#[54]

KBC_DPWROK[17]

1 2

PM_CLKRUN#_EC[17]

VBAT

SCD1U16V2KX-3GP

PSID_EC[42]

PCH_PWROK[17,26,36]

PM_SLP_SUS#[17,38] BOOST_MON[44]

P_SYS[44]

IMVP_PWRGD[7,46]

BAT_SCL[43,44] BAT_SDA[43,44]

SML1_CLK[18,26]

SML1_DATA[18,26 ] TP_ON#[62] RTCRST_ON[19]

VOL_DOWN#[63]

X02 0414

TPCLK[62]

TPDATA[62]

KB_DISABLE[ 66]

PANEL_SIZE[52]

BLON_OUT[52]

FAN_TACH1[26]

PM_PWRBTN#[17,96]

VOL_UP#[63]

PM_SLP_S3#[17,36,48,49,51 ]

KBC_BEEP[27]

FAN_PWM1[26] KB_BL_CTRL[62]

VD_IN1[26]

VD_OUT1#[26] AC_PRESENT[17]

SYS_PWROK[17,96]

KB_CLOSE#_2[64]

WIFI_RF_EN[63]

PM_SUSWARN#[17]

TP2409TP2409

TP2408TP2408

AMP_MUTE#[27]

12

R2447

100KR2J-1-GP

VBAT

12

C2404

SC2D2U10V3KX-1GP

SCD1U16V2KX-3GP

EC_AGND

PCB_VER_AD

MODEL_ID_DET

PROCHOT_EC LCD_TST_ENLCD_TST_EN

TP_LOCK#_C

R2437

1 2

0R0402-PAD-2-GP

1 2

DY

R2449 1KR2J-1-GP

EC_GPIO10

1

TP_WAKE_KBC# E51_TxD

1

L_BKLT_EN_EC

12

C2405

DY

BAT_SCL BAT_SDA

KB_DISABLE

3D3V_AUX_KBC_VCC

115

102

EC_VTT

100 108

101 105 106 107

119 120

123

117

118

VD1_EN#

104

110 112

124 121 111

12

C2406SCD1U16V2KX-3GP C2406SCD1U16V2KX-3GP

KBC24

19

VCC

46

VCC

76

VCC

88

VCC VCC

AVCC

4

VDD

12

VTT

97

GPIO90/AD0

98

GPIO91/AD1

99

GPIO92/AD2 GPIO93/AD3 GPIO05/AD4

96

GPIO04/AD5

95

GPIO03/EXT_PURST#/AD6

94

GPIO07/AD7/VD_IN2

GPIO94/DA0 GPIO95/DA1 GPIO96/DA2 GPIO97/DA3

70

GPIO17/SCL1/N2TCK

69

GPIO22/SDA1/N2TMS

67

GPIO73/SCL2/N2TCK

68

GPIO74/SDA2/N2TMS GPIO23/SCL3/N2TCK GPIO31/SDA3/N2TMS

24

GPIO47/SCL4A/N2TCK

28

GPIO53/SDA4A/N2TMS

26

GPIO51/TA3/N2TCK GPIO67/SOUT1/N2TMS

72

GPIO37/PSCLK1

71

GPIO35/PSDAT1

10

GPIO26/PSCLK2

11

GPIO27/PSDAT2

25

GPIO50/PSCLK3

27

GPIO52/PSDAT3

31

GPIO56/TA1 GPIO20/TA2/IOX_DIN_DIO

63

GPIO14/TB1

64

GPIO01/TB2

32

GPIO15/A_PWM GPIO21/B_PWM

62

GPIO13/C_PWM

65

GPIO32/D_PWM

22

GPIO45/E_PWM/DTR1#_BOUT1

16

GPIO40/F_PWM/1_WIRE/RI1#

81

GPIO66/G_PWM/PSL_GPIO66

66

GPO33/H_PWM/VD1_EN#

GPIO80/VD_IN1

GPIO82/IOX_LDSH/VD_OUT1 GPIO84/IOX_SCLK/VD_OUT2

84

GPIO77/SPI_MISO

83

GPIO76/SPI_MOSI

82

GPIO75/SPI_SCK

79

GPIO02/SPI_CS#

GPIO10/LPCPD# GPIO85/GA20 GPIO83/SOUT_CR

9

GPIO65/SMI#

8

GPIO11/CLKRUN#

30

GPIO55/CLKOUT/IOX_DIN_DIO

NPCE285PA0DX-GP

071.00285.000G

12

DY

C2407SCD1U16V2KX-3GPDYC2407SCD1U16V2KX-3GP

EC_GPIO47 High Active

R2438

R2438 0R2J-2-GP

0R2J-2-GP

1 2

DY

Q2401

G

S

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

R2442

100KR2J-1-GP

PROCHOT_EC

12

DY

A A

5

4

X02 0414

R2402

1 2

0R0603-PAD-2-GP-U

12

DY

C2408SCD1U16V2KX-3GPDYC2408SCD1U16V2KX-3GP

C2409SCD1U16V2KX-3GP C2409SCD1U16V2KX-3GP

KBSIN0/GPIOA0/N2TCK KBSIN1/GPIOA1/N2TMS

KBSIN2/GPIOA2 KBSIN3/GPIOA3 KBSIN4/GPIOA4 KBSIN5/GPIOA5 KBSIN6/GPIOA6 KBSIN7/GPIOA7

KBSOUT0/GPOB0/SOUT_CR/JENK#

KBSOUT1/GPIOB1/TCK KBSOUT2/GPIOB2/TMS

KBSOUT3/GPIOB3/TDI

KBSOUT4/GPOB4

KBSOUT5/GPIOB5/TDO

KBSOUT6/GPIOB6/RDY#

KBSOUT7/GPIOB7 KBSOUT8/GPIOC0

KBSOUT9/GPOC1/SDP_VIS# KBSOUT10/P80_CLK/GPIOC2 KBSOUT11/P80_DAT/GPIOC3

KBSOUT12/GPO64/TEST#

KBSOUT13/GP(I)O63/TRIST# KBSOUT14/GP(I)O62/XORTR# KBSOUT15/GPIO61/XOR_OUT

GPIO60/KBSOUT16/DSR1# GPIO57/KBSOUT17/DCD1#

LAD0/GPIOF1 LAD1/GPIOF2 LAD2/GPIOF3 LAD3/GPIOF4

LCLK/GPIOF5 LFRAME#/GPIOF6 LRESET#/GPIOF7

GPIOC6/F_CS0#

GPIOC7/F_SCK

GPIO30/F_WP#/RTS1#

GPIO41/F_WP#/PSL_GPIO41

GPIOC5/F_SDIO/F_SDIO0

GPIOC4/F_SDI/F_SDIO1

GPIO81/F_WP#/F_SDIO2

GPIO00/32KCLKIN/F_SDIO3

PSL_IN1#/GPI70

PSL_IN2#/GPI06/EXT_PURST#

PSL_OUT#/GPIO71

ECSCI#/GPIO54

KBRST#/GPIO86

SERIRQ/GPIOF0

GPIO36/TB3/CTS1#

GPIO44/SCL4B PSL_IN4#/GPI43 PSL_IN3#/GPI42

GPIO46/SDA4B/CIRRXM

GPIO87/CIRRXM/SIN_CR

GPIO34/SIN1/CIRRXL

H_PROCHOT#_EC

D

0R0402-PAD-2-GP

4

3D3V_AUX_KBC

R2403

2D2R3-1-U-GP

12

C2410SCD1U16V2KX-3GP C2410SCD1U16V2KX-3GP

EXT_RST#

VSBY VBKUP VCORF

PECI

GPIO24

GND GND GND GND GND GND

AGND

X02 0414

R2440

1 2

54

55 56 57 58 59 60 61

53

52

51

50 49 48 47

43

42 41 40 39 38 37

36 35

34

33

126 127 128 1 2 3 7

90

92

109 80

87

86 91

77

73

93 74

29 85 122

75 114 44

13

125

6

15

21

20

17

23

113 14

5

18

45

78

89

116

103

DY

C2411SC2D2 U10V3KX-1GP C2411SC2D2U10V3KX-1GP

1 2

12

EC_AGND

12

PCB_VER_AD

KROW0 KROW1 KROW2 KROW3 KROW4 KROW5 KROW6 KROW7

KCOL0 KCOL1 KCOL2 KCOL3 KCOL4 KCOL5 KCOL6 KCOL7 KCOL8 KCOL9 KCOL10 KCOL11 KCOL12 KCOL13 KCOL14 KCOL15 KCOL16 HOME_BTN#

LPC_AD0 LPC_AD1 LPC_AD2 LPC_AD3

PLT_RST#_EC

EC_SPI_CS#_C EC_SPI_CLK_C

BAT_IN# EC_SPI_DI_C EC_SPI_DO_C

SUSCLK_KBC

PSL_IN1# PSL_IN2# PSL_OUT#

ECSCI#_KBC ECRST#

EC_VBKUP KBC_VCORF PECI

ECSMI#_KBC

USB_DET#

PCIE_WAKE#

EC_AGND

C2421

C2421 SC47P50V2JN-3GP

SC47P50V2JN-3GP

VBAT

12

C2402

DY

1 2

EC_AGND

SCD1U16V2KX-3GP

KROW[0..7] [62]

KCOL[0..16] [62]

LPC_AD[3..0] [18,65]

CLK_PCI_KBC [18] LPC_FRAME# [18,65 ]

R2422 33R2J-2-GPR2422 33R2J-2-GP R2423 33R2J-2-GPR2423 33R2J-2-GP

R2441

1 2

0R0402-PAD-2-GP

H_RCIN# [20]

X02 0414

R2428

1 2

0R0402-PAD-2-GP

INT_SERIRQ [19,20]

RSMRST#_KBC [17]

PM_SLP_S4# [17,49]

LID_CLOSE# [63] ME_UNLOCK [19 ]

PCIE_WAKE# [17,20] S5_ENABLE [36]

X02 0414

12

R2435

R2435 0R0402-PAD-2-GP

0R0402-PAD-2-GP

Layout Note:

Connect GND and AGND planes vi a either 0R resistor or connect directl y.

H_PROCHOT# [4,44,46]

PCB VERSION A/D(PIN98) PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

A00 0609

R2404

R2404 64K9R2F-1-GP

64K9R2F-1-GP

R2406

R2406 100KR2F-L1-GP

100KR2F-L1-GP

X01

X02

X03

A00

Reserved

Reserved 100.0 K 215.0K 1.048V

HOME_BTN#

0R0402-PAD-2-GP

33R2J-2-GPR2419 33R2J-2-GPR2419

12

33R2J-2-GPR2420 33R2J-2-GPR2420

12

12 12

X02 0414

Layout Note:

Need very close to EC

SPI_CS0#_R [18,25] SPI_CLK_R [18,25] CAP_LED# [62] BAT_IN# [43,44] SPI_SI_R [18,25] SPI_SO_R [18,25]

PM_SUSACK# [17]

SUS_CLK [17]

3D3V_AUX_S5 RTC_AUX_S5

1 2

R2429

C2422

SC100P50V2JN-3GPDYC2422

SC100P50V2JN-3GP

43R2J-GP

12

DY

D2401

LID_CLOSE#

K A

RB751V-40H-GP

83.R2004.G8F

2nd = 83.R2004.C8F

C2416 SC1U6D3V2KX-GPC2416 SC1U6D3V2KX-GP

1 2

PURE_HW_SHUTDOWN#[26,36]

https://t.me/schematicslaptop https://t.me/biosarchive

3

100.0KX00

100.0K

100.0K 1.358V

10.0K

20.0K

33.0K

47.0K

64.9K

76.8

100.0K

143.0K

174.0KReserved 100.0 K

A00 0609

R2457

1 2

DY

1 2

A00 0609

R2416

1 2

0R0402-PAD-2-GP

C2415

C2415 SC220P50V2KX-3GP

SC220P50V2KX-3GP

HOME_BTN#_C [52]

Power Switch Logic(PSL)

H_PECI [4]

Layout Note:

Need very close to EC

TOUCH_PANEL_INTR# [5 2]

3D3V_AUX_S5

R2424

0R2J-2-GP

12

1 2

R2439

10KR2J-3-GP

Q2404

MMBT3906-4-GP

84.T3906.A11

2nd = 84.03906.P11

3

USB_DET#

KBC_ON#_GATE_L

PLT_RST# [17,63,65]

KBC_PWRBTN#[63]

AC_IN#[44]

DY

E

B

C

DY

3.0V

2.75V

2.48V

2.24V

2.0V

1.87V

1.65VReserved

1.204V

12

C2418

X02 0414

0R0402-PAD-2-GP

SC1U6D3V2KX-GP

X02 0414

R2453

1 2

0R0402-PAD-2-GP

D2402

1

DY

2

BAT54C-7-F-3-GP

75.00054.E7D

X01 0219

R2427

1 2

R2430

1 2

PSL_OUT#

ECRST#

MODEL_ID_DET

3

3D3V_AUX_S5

1 2

R2432

1 2

1KR2J-1-GP

2

C2403

SCD1U16V2KX-3GP

R2425

R2425 330KR2J-L1-GP

330KR2J-L1-GP

PSL_IN2#

PSL_IN1#

KBC_ON#_GATE_L

2

VBAT

12

MODEL

12

1 2

DY

EC_AGND

USBDET_CON# [34]

MODEL_ID_DET(GPIO07)

TBD

R2405

R2405 10KR2F-2-GP

10KR2F-2-GP

R2407

R2407 100KR2F-L1-GP

100KR2F-L1-GP

3D3V_AUX_S5 3D3V_AUX_S5

TBD TBD TBD 2.702V TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD TBD

ECSCI#_KBC

ECSMI#_KBC

R2431

R2431 330KR2J-L1-GP

330KR2J-L1-GP

1 2

KBC_ON#_GATE

1 2

R2433

R2433 20KR2F-L-GP

20KR2F-L-GP

PULL-LOW RESISTOR PULL-HIGH RESISTOR VOLTAGE

USB_DET#

BAT_SCL BAT_SDA

ECRST# HOME_BTN#

AC_IN# BAT_IN#

FAN_TACH1

TOUCH_PANEL_INTR#

Touch Panel PH internally.

VOL_UP#

VOL_DOWN#

LID_CLOSE#

USB_PWR_EN#

TP_ON#

PCIE_WAKE#

TP_LOCK#_C

C2417 SCD1U1 6V2KX-3GPC2417 SCD1U16V 2KX-3GP

1 2

G

Q2402

Q2402 DMP2130L-7-GP

DMP2130L-7-GP

84.02130.031

2ND = 84.03413.A31

G

S

1

100.0K 3.0V

100.0K

S

G

D

Q2403

2N7002K-2-GP

84.2N702.J31

2ND = 84.2N702.031

10.0K(64.10025 .6DL)

13.7K(64.13725 .6DL)

17.8K(64.17825 .6DL)

22.1K(64.22125 .6DL)

27.0K(64.27025 .6DL)

32.4K(64.32425 .6DL)

37.4K(64.37425 .6DL)

43.2K(64.43225 .6DL)

57.6K(64.57625 .6DL)

64.9K(64.64925 .6DL)

73.2K(64.73225 .6DL) 1.905V

82.5K(64.82525 .6DL) 1.808V

93.1K(64.93125 .6DL) 107K(64.10735 .6DL) 120K(64.12035 .6DL) 137K(64.13735 .6DL) 154K(64.15435 .6DL) 200K(64.20035 .6DL) 1.099V 232K(64.23236 .6DL)

R24080R0402-P AD-1-GP R24080R0 402-PAD-1-GP

1 2

PANEL_SIZE

R2451 10KR2J-3-GPR2451 10KR2J-3-GP

1 2

RN2401

1 2 3

SRN4K7J-8-GP

R2418 10KR2J-3-GPR2418 10KR2J-3-GP

1 2

R2454 10KR2J-3-GPR2454 10KR2J-3-GP

1 2

R2413 100KR2J-1-GP

1 2

DY

R2414 10KR2J-3-GPR2414 10KR2J-3-GP

1 2

R2415 10KR2J-3-GPR2415 10KR2J-3-GP

1 2

R2443 10KR2J-3-GP

1 2

DY

R2446 10KR2J-3-GPR2446 10KR2J-3-GP

1 2

R2448 10KR2J-3-GPR2448 10KR2J-3-GP

1 2

R2421 100K R2J-1-GPR2421 100KR2J-1-GP

1 2

R2412 100K R2J-1-GP

1 2

DY

R2445 100K R2J-1-GPR2445 100KR2J-1-GP

1 2

R2450 100K R2J-1-GPR2450 100KR2J-1-GP

1 2

R2455 100K R2J-1-GPR2455 100KR2J-1-GP

1 2

R2434

DY

0R2J-2-GP

1 2

3D3V_AUX_KBC

D

Title

Size Document Number Rev

Size Document Number Rev Custom

Custom

Cottonwood

Tuesday, June 17, 2014

Tuesday, June 17, 2014 Date: Sheet of

Date: Sheet

EC_SCI# [18,20]

R24090R0402-P AD-1-GP R24090R0 402-PAD-1-GP

EC_SMI# [19,20]

3D3V_AUX_KBC

12

R2452

R2452 10KR2J-3-GP

10KR2J-3-GP

3D3V_AUX_S5

3D3V_AUX_KBC

4

3D3V_AUX_KBC

3D3V_S0

3D3V_S5

3D3V_AUX_KBC

12

R2436

R2436 10KR2J-3-GP

10KR2J-3-GP

Wistron Corporation

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih,

21F, 88, Sec.1, Hsin Tai Wu Rd ., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

KBC Nuvoton NPCE885

1

2.902V

2.801V

2.598V

2.492V

2.402V

2.304V

2.201V49.9K(64.49925 .6DL)

2.093V

2.001V

1.709V

1.594V

1.499V

1.392V

1.299V

0.994V

S5_ENABLE

of

24 104

A00

5

SSID = Flash.ROM

4

3

2

1

R2501

4K7R2J-2 -GP

3D3V_S5

1 2

C2501

SC10U6D 3V5KX-1GP

SPI Flash ROM(8M) for PCH

D D

DY

3D3V_S5

12

C2502

C2502 SCD1U16 V2KX-3GP

SCD1U16 V2KX-3GP

Single SPI shared flash connection (SPI Quad I/O mode)

X02 0422

SPI25

SPI_CS0#_ R[18,24]

SPI_SO_R[1 8,24]

SPI_WP #[18]

12

EC2502

DY

SC4D7P5 0V2CN-1GP

C C

DY

1

CS#

2

SO/SIO1

3

SIO2 GND4SI/SIO0

MX25L64 73EM21-10G-GP

72.25647.00A

VCC SIO3

SCLK

X01 0219

3D3V_S5

8 7 6 5

EC2501

SC4D7P5 0V2CN-1GP

Source

72.25647.00A

072.25B64.0001

SPI_HOLD# [18 ] SPI_CLK_R [18 ,24] SPI_SI_R [18,24 ]

12

DY

EC2503

EC2503 SC10P50 V2JN-4GP

SC10P50 V2JN-4GP

QUAD/DUAL fast read DUAL fast read

O

Refer to "NCPE985x/ NPCE995x board design reference guide"

SSID = RBATT

B B

https://t.me/schematicslaptop https://t.me/biosarchive

12

R2504

R2504 10MR2J-L -GP

10MR2J-L -GP

A A

5

4

D2501

1

2

BAS40C-2 -GP

75.00040.07D

2nd = 75.00040.C7D

3rd = 75.00040.A7D

Q2505

G

S

2N7002K -2-GP

84.2N702.J31

2ND = 84.2N702.031

RTC_AUX _S5+RTC_VC C 3D3V_AU X_S5

3

12

C2503

C2503 SCD47U1 0V2KX-GP

SCD47U1 0V2KX-GP

D

3

RTC_DET # [20]

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Tuesday, June 17, 2 014

Date: Sheet

2

Date: Sheet

Flash/RTC

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

25 104

of

1

of

A00

5

4

3

2

1

SSID = Thermal

D D

84.03904.P11

2nd = 84.03904.T11

C

Q2603

CH3904P T-GP

E

2.System Sensor, Put on palm rest

C C

3D3V_S0

R2603 7K5R2F-1-GPR2603 7K5R2F-1-GP

R2604 7K5R2F-1-GPR2604 7K5R2F-1-GP

3D3V_S0

SML1_DA TA[18 ,24]

84.2N702.A3F

2nd = 84.2N702.E3F

12

C2601

C2602

DY

12

C2606

B

Layout Note:

Both DXN and DX P routing 10 m il trace width and 10 mil spa cing.

C2606 SC470P5 0V3JN-2GP

SC470P5 0V3JN-2GP

DY

C2602 SCD1U16 V2KX-3GP

SCD1U16 V2KX-3GP

SC10U6D3V3MX-GP

NCT7718 _DXP

12

C2607

C2607 SC2200P 50V2KX-2GP

SC2200P 50V2KX-2GP

NCT7718 _DXN

Layout Note:

C2607 close THM 2601

T_CRIT#

X02 0414

12

R2601

R2601 0R0402-P AD-2-GP

0R0402-P AD-2-GP

2nd = 84.2N702.E3F

3rd = 75.00601.07C

4th = 84.DMN66.03F

SML1_CL K[18,24]

THM261

1

VDD

2

D+

3

DT_CRIT#4GND

NCT7718 W-GP

74.07718.0B9

PCH_PW ROK[17,24,36 ]

THERM_S YS_SHDN#

SCL SDA

ALERT#

A00 0604

1 2

ALERT#

T_CRIT#

8 7 6 5

3D3V_S0 3 D3V_S0

2N7002K DW-GP

1

6

2

5

34

Q2601

ALERT#

Q2602

G

S

2N7002K -2-GP

84.2N702.J31

2ND = 84.2N702.031

3rd = 84.07002.I31

4th = 84.2N702.W31

D

1

4

DY

23

RN2602

RN2602 SRN2K2J -1-GP

SRN2K2J -1-GP

12

DY

C2608

SCD1U16V2KX-3GP

12

DY

THM_SML 1_DATA

THM_SML 1_CLK

THM_SML 1_CLK THM_SML 1_DATA

12

C2609

SCD1U16V2KX-3GP

C2610

SCD1U16V2KX-3GP

PURE_HW _SHUTDOW N# [24,36]

KBC T8

THERM_S YS_SHDN#

X02 0414

5V_S0

R2612

1 2

0R0402-P AD-2-GP

FAN_TAC H1[2 4]

FAN_PW M1[24]

3D3V_S0

R2607 2KR2F-3-GPR2607 2KR2F -3-GP

1 2

R2602 0R2J-2-GP

DY

PWM FAN1

FAN_VCC _1

C2604

SC4D7U6D3V3KX-GP

C2604

SC4D7U6D3V3KX-GP12C2605

SCD1U10V2KX-5GP

C2605

SCD1U10V2KX-5GP

KA

D2601

RB551V30-1-GPDYD2601

12

A00 0609

0R4P2R-P AD

2 3 1

RN2601

RB551V30-1-GP

DY

FAN_VCC _1

FAN_TAC H1_C FAN_PW M1_C

4

RN

AFTP260 4AFTP2 604

Layout Note:

Signal Routing Guideline: Trace width = 15mil

C2603

SC2200P50V2KX-2GPDYC2603

SC2200P50V2KX-2GP

12

FAN1

1

2 3 4

ACES-CON 4-29-GP

1

20.F1639.004

FAN_TAC H1_C

FAN_PW M1_C

FAN_VCC _1

VD_OUT1 # [24]

AFTP260 1AFTP2 601

1

AFTP260 2AFTP2 602

1

AFTP260 3AFTP2 603

1

5

6

Close to KBC

B B

Close to Thermal sensor

3D3V_AU X_KBC3D3V_S0

12

R2608

R2608 24K3R2F -1-GP

24K3R2F -1-GP

DY

12

R2609

R2609 10R2F-L-G P

10R2F-L-G P

VD_IN1 for system thermal sensor

12

C2612

R2610

NTC-100K -8-GP

A A

https://t.me/schematicslaptop

12

SCD1U16 V2KX-3GP

VD_IN1_C

12

C2613

SC100P5 0V2JN-3GP

https://t.me/biosarchive

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet

5

4

3

2

Date: Sheet

VD_IN1 [24]

R2611

1 2

0R0402-P AD-2-GP

A00 0609

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

THERMAL NCT7718W/Fan

Cottonwood

Tuesday, June 17, 2 014

1

26 104

of

A00

5

4

3

2

1

SSID = AUDIO

D D

Reserved for ALC3234

12

R2711

R2711 100KR2J-1-GP

100KR2J-1-GP

C2702

SC10U6D3V3MX-GP

12

LDO1_CAP

26

27

25

AVSS1

AVDD1

LDO1-CAP

LINE2_L/PORT-E-L

LINE2_R/PORT-E-R

LINE1_L/PORT-C-L

LINE1_R/PORT-C-R

NC#20

MIC-CAP

MONO-OUT

MIC2/LINE2_JD/JD2

HP/LINE1_JD/JD1

12

AUD_PC_BEEP

+3V_AVDD

MIC2_VREFO [29]

AUD_AGND

+5V_AVDD

AUD_AGND

24

23

22

21

V3D3_STB

20

MIC_CAP

19

18

17

16

JDREF

15

14

AUD_SENSE_A

13

X02 0414

moat

R2703

1 2

0R0603-PAD-2- GP-U

12

C2710

C2711

Layout Note:

Place close to Pin 26

SCD1U16V2KX-3GP

AUD_AGND

SC4D7U6D3V3KX-GP

LINE1_L [29]

LINE1_R [29]

R2712 0R2 J-2-GPR 2712 0R2J-2-G P

1 2

SLEEVE [29]

RING2 [29]

DY

R2709

Layout Note:

Place close to Pin 13

1 2

AUD_SENSE

C2713 SC 10U6D3V3MX-GPC2713 SC10U6D3V3MX -GP

R2707 20KR2F-L-GP

1 2

200KR2F-L-GP

HDA_SPKR[20]

KBC_BEEP[24]

X02 0417

AUD_AGND

A00 0609

0R4P2R-PAD

2 3 1

RN2701

moat

EC2707 SC1KP50V2KX-1G P

1 2

DY

EC2706 SC1KP50V2KX-1G P

1 2

DY

EC2705 SC1KP50V2KX-1G P

1 2

DY

EC2704 SC1KP50V2KX-1G P

1 2

DY

EC2703 SC1KP50V2KX-1G P

1 2

DY

5V_S0+5V_AVDD

Layout Note:

AUD_SENSE [29]

AUD_AGND

X02 0414

AUD_AGND

3D3V_S5

Width>40mil, to improve Headpohone Crosstalk noise Change it to sharp will be better. Add 2 vias (>0.5A) when trace layer change.

AUD_SENSE_A

DY

R2706

1 2

0R0603-PAD-2- GP-U

Layout Note:

Tied at point only under Codec or near the Codec

100KR2J-1-GP

R2722

1 2

moat

D2701

HDA_SPKR_R

4

RN

KBC_BEEP_R

D2701

2

1

BAT54C-7-F- 3-GP

75.00054.E7D

AUD_PC_BEEP _C

3

12

+3V_AVDD

C2720

1 2

R2717

R2717 1KR2J-1-GP

1KR2J-1-GP

AUD_PC_BEEP

SCD1U16V2KX- 3GP

LINE1_VREFO_R[29]

LINE1_VREFO_L[29]

+3V_1D5V_AVDD

+5V_PVDD

1

AUD_HP1_JAC K_L[29]

AUD_HP1_JAC K_R[29]

12

CBP

LDO2_CAP

AUD_SPK_L+

AUD_SPK_L-

AUD_SPK_R-

AUD_SPK_R+

EAPD#

COMBO-GPI

SC4D7U6D3V 3KX-GP

A00 0604

R27140R0402-PAD-2-GP R27140R0402-PAD-2-GP

1 2

R27160R2J-2-GP R27160R2J-2-G P

1 2

C2703

C2703 SC1U10V2KX-1G P

SC1U10V2KX-1G P

HDA27

37

CBP

38

AVSS2

39

LDO2-CAP

40

AVDD2

41

PVDD1

42

SPK-OUT-L+

43

SPK-OUT-L-

44

SPK-OUT-R-

45

SPK-OUT-R+

46

PVDD2

47

PDB

48

SPDIF-OUT/GPIO2

49

GND

ALC3234-CG-G P

+3V_AVDD

12

C2716

R27190R0402-PAD-2-GP R27190R0402-PAD-2-GP

1 2

R27200R2J-2-GP R27200R2J-2-G P

1 2

R27180R0402-PAD-2-GP R27180R0402-PAD-2-GP

1 2

HDA_CODE C_SYNC

HDA_CODE C_RST#

SC1U10V2KX-1G P

C2704

1 2

+3V_AVDD

CPVEE

CBN

33

34

35

32

36

CPVDD

DVDD1GPIO0/DMIC-DATA2GPIO1/DMIC-CLK3DVSS4SDATA-OUT5BCLK6LDO3-CAP7SDATA-IN8DVDD-IO9SYNC10RESET#11PCBEEP

C2717

12

SCD1U16V2KX-3GP

DMIC_DATA_R

DMIC_CLK_R

CODEC_SD OUT_R

CODEC_BITC LK_R

HDA_CODE C_SDIN0

CBN

CPVEE

71.03234.003

31

LINE1-VREFO-L

HPOUT-L/PORT-I-L

HPOUT-R/PORT-I-R

C2705

SC2D2U6D3V2MX-GP

12

AUD_VREF

28

30

29

VREF

MIC2-VREFO

LINE1-VREFO-R

MIC2_R/PORT-F-R/SLEEVE

MIC2_L/PORT-F-L/RING

SPDIFO/FRONT_JD/JD3/GPIO3

LDO3_CAP

C2718SC4D7U6D3V3K X-GP C2718SC4D7U6D3V3K X-GP

C2719SCD1U16V2KX-3GP C2719SCD1U16V2KX-3GP

12

3D3V_S0 +3V_AVDD

25mA

R2701 0R0402-PAD-2- GPR 2701 0R 0402-PAD-2-GP

1 2

X02 0414

1.5A

5V_S0 +5V_PVDD

R2704

1 2

0R0805-PAD-2- GP-U

C C

moat

X02 0414

1D5V_S0

3D3V_S0

R2705 0R0402-PAD-2- GPR 2705 0R 0402-PAD-2-GP

1 2

R2710 0R2J-2-GP

1 2

DY

Azalia I/F EMI

X01 0224

B B

HDA_CODE C_SDOUT HDA_CODE C_BITCLK

EC2708

12

EC2709

SC22P50V2JN-4GP

X01 0227

12

C2701

SC4D7U6D3V 3KX-GP

Close pin36

C2706

12

SC4D7U6D3V3KX-GP

Layout Note:

Close pin41

C2707

12

SCD1U16V2KX-3GP

C2709

C2708

12

SCD1U16V2KX-3GP

SC4D7U6D3V3KX-GP

Layout Note:

Close pin46

Speaker trace width >40mil @ 2W4ohm speaker power

+3V_1D5V_AVDD

12

C2715

SC4D7U6D3V 3KX-GP

Close pin40

AUD_AGND

DMIC_DATA_R

EC2701

SC10P50V2JN-4GPDYEC2701

SC10P50V2JN-4GP

DY

12

AUD_AGND

Layout Note:

AMP_MUTE#[24]

DMIC_CLK[52]

SC22P50V2JN-4G P

Close pin3

C2723

1 2

0R0402-PAD-2- GP

X02 0414

DY

1 2

C2712 SC10U6D3V3MX-GPC2712 SC10U6D3V3MX- GP

1 2

AUD_SPK_L+[2 9]

AUD_SPK_L-[29]

AUD_SPK_R-[29]

AUD_SPK_R+[29]

R2708

TP2702TP2702

DMIC_DATA[52]

HDA_CODE C_SDOUT[19]

HDA_CODE C_BITCLK[19]

HDA_SDIN0[19]

HDA_CODE C_SYNC[19]

HDA_CODE C_RST#[19,29]

https://t.me/schematicslaptop https://t.me/biosarchive

A A

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Title

Size Document Numb er Rev

A2

Date: Sheet

5

4

3

2

Date: Sheet

Taipei Hsie n 221, Taiwan, R.O.C.

Audio Codec ALC3223

Cottonwood

1

27 104Tuesday, June 17, 2014

A00

of

5

4

3

2

1

SSID = AUDIO

D D

(Blanking)

C C

B B

A A

5

4

3

2

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

Title

Size Document N umber Rev

A3

Date: Sheet

Cottonwood

Taipei Hsien 221, Taiwan, R.O.C.

AUDIO AMP

1

28 107Tuesday, June 17, 2 014

of

A00

5

SSID = AUDIO

4

3

2

1

Layout Note:

Speaker trace width >40mil @ 2W4ohm speaker power

D D

AUD_SPK _R+[27 ]

AUD_SPK _R-[27] AUD_SPK _L+[27] AUD_SPK _L-[27]

X01 0224

12

EC2902

SC1KP50V2KX-1GP

EC2902

SC1KP50V2KX-1GP

EC2901

SC1KP50V2KX-1GP

EC2901

SC1KP50V2KX-1GP

C C

SRN2K2J -1-GP

SRN2K2J -1-GP RN2901

RN2901

1

MIC2_VREF O[27]

RING2[27 ]

AUD_HP1 _JACK_L[2 7]

LINE1_L[27]

LINE1_VRE FO_L[27]

AUD_HP1 _JACK_R[27]

LINE1_R[27]

LINE1_VRE FO_R[27]

SLEEVE[27]

C2907

C2907 SC4D7U6 D3V3KX-GP

SC4D7U6 D3V3KX-GP

C2908

C2908 SC4D7U6 D3V3KX-GP

SC4D7U6 D3V3KX-GP

1 2

LINE1-L_C

LINE1-L_R

4

2 3

R2908 10R2F-L-G PR2908 1 0R2F-L-GP

1 2

R2922 1KR2J-1-G PR2922 1 KR2J-1-GP

1 2

R2912 4K7R2J-2 -GPR2912 4 K7R2J-2-GP

1 2

R2910 10R2F-L-G PR2910 1 0R2F-L-GP

1 2

R2921 1KR2J-1-G PR2921 1 KR2J-1-GP

1 2

R2913 4K7R2J-2 -GPR2913 4 K7R2J-2-GP

1 2

AUD_HP1 _JACK_L1

AUD_HP1 _JACK_R1

EC2908

SC100P50V2JN-3GPDYEC2908

SC100P50V2JN-3GP

R2920

10KR2J-3-GPDYR2920

10KR2J-3-GP

12

DY

EC2903

SC1KP50V2KX-1GP

EC2903

SC1KP50V2KX-1GP

EC2907

SC100P50V2JN-3GPDYEC2907

SC100P50V2JN-3GP

12

DY

12

EC2904

SC1KP50V2KX-1GP

EC2904

SC1KP50V2KX-1GP

EC2906

SC100P50V2JN-3GPDYEC2906

SC100P50V2JN-3GP

R2919

10KR2J-3-GPDYR2919

10KR2J-3-GP

12

DY

X02 0414

1 2

1 2 1 2 1 2

R29040R0603-P AD-2-GP-U R29040R0603-PAD -2-GP-U

R29030R0603-P AD-2-GP-U R29030R0603-PAD -2-GP-U R29020R0603-P AD-2-GP-U R29020R0603-PAD -2-GP-U R29010R0603-P AD-2-GP-U R29010R0603-PAD -2-GP-U

AUD_SPK _R+_C

AUD_SPK _R-_C AUD_SPK _L+_C AUD_SPK _L-_C

Speaker

SPK1

1

2 3 4

ACES-CON 4-29-GP

20.F1639.004

AUD_SPK _L-_C AUD_SPK _L+_C AUD_SPK _R-_C

AUD_SPK _R+_C

5

6

CONN Pin

Pin1

Pin2

Pin3

Pin4

AFTP290 1AFTP2 901

1

AFTP290 2AFTP2 902

1

AFTP290 3AFTP2 903

1

AFTP290 4AFTP2 904

1

Net name

SPK_R+

SPK_R-

SPK_L+

SPK_L_

Combo Jack

1 2

JACK_PO WER

R2923

R2923 0R2J-2-GP

0R2J-2-GP

AUD_AGN D

AUD_POR TA_L_R_B AUD_POR TA_R_R_B

JACK_PL UG

JACK_PO WER

AFTP290 6AFTP2 906

1

AFTP290 7AFTP2 907

1

AFTP290 8AFTP2 908

1

AFTP290 9AFTP2 909

1

AFTP291 0AFTP2 910

1

X02 0414

HPMIC1

RING2_R AUD_POR TA_L_R_B

JACK_PO WER JACK_PL UG AUD_POR TA_R_R_B SLEEVE_ R

AUD_AGN D

Delay

1 2

R29060R0603-P AD-2-GP-U R29060R0603-PAD -2-GP-U R29070R0603-P AD-2-GP-U R29070R0603-PAD -2-GP-U

R29090R0603-P AD-2-GP-U R29090R0603-PAD -2-GP-U R29110R0603-P AD-2-GP-U R29110R0603-PAD -2-GP-U

1 2 1 2

R2916 10K R2J-3-GP

3D3V_S0

EC2905

SC100P50V2JN-3GPDYEC2905

SC100P50V2JN-3GP

12

1 2 1 2

DY

HPMIC1

3 1

5 6 2 4

MS

Audio(IP/NK comb)

AUDIO-JK44 3-GP

022.10002.0141

Non-Delay

AUD_AGN D

Delay circuit

B B

AUD_AGN D A UD_AGND

AUD_POR TA_R_R_B

AUD_POR TA_L_R_B

RING2_R

JACK_PL UG

SLEEVE_ R

JACK_PO WER

AZ2025-01H-R7G-GP

DY

AZ2025-01H-R7G-GP

ED2903

ED2904

DY

1 2

AZ2025-01H-R7G-GP

ED2905

ED2906

DY

1 2

4

AZ2025-01H-R7G-GP

DY

AZ2025-01H-R7G-GP

ED2902

1 2

AZ2025-01H-R7G-GP

ED2901

DY

ED2901

1 2

A A

moat

5

12

R2915

DY

470KR2J -2-GP

AUD_AGN D

4th = 84.DMN66.03F

3rd = 75.00601.07C

2nd = 84.2N702.E3F

84.2N702.A3F

U2901

S

5

D

6

2N7002K DW-GP

DY

3

R2918

100KR2J -1-GP

D

34

GG

MUTE_CT RLSLEEVE_C TRL

2

S

1

+3V_AVD D5V_PW R_2

12

DY

12

DY

R2917

DY

0R3J-0-U-G P

C2901

C2901 SC1U6D3 V2KX-GP

SC1U6D3 V2KX-GP

12

HDA_COD EC_RST# [1 9,27]

SLEEVE [27]

2

JACK_PL UG

R2905

100KR2J -1-GP

AUD_AGN D

12

Delay

Title

Size Document N umber Rev

Size Document N umber Rev A3

A3

Date: Sheet

C2902

Delay

1 2

AUD_AGN D

1 2

DY

R2914

R2914 0R3J-6-GP

0R3J-6-GP

Speaker/HPMIC

Cottonwood

Tuesday, June 17, 2 014

SC10U6D3V3MX-L-GP

G

S

Delay

D

Wistron Corporation

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,

21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih, Taipei Hsien 221, Taiwan, R.O.C.

Taipei Hsien 221, Taiwan, R.O.C.

AUD_AGN D

Q2901

Q2901 2N7002K -2-GP

2N7002K -2-GP

84.2N702.J31

2nd = 84.2N702.W31

3rd = 84.07002.I31

AUD_SEN SE [27]

29 104

1

A00

of

A00

5

D D

C C

4

3

2

1

(Blanking)

B B

A A

Wistron Corporation

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,

21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih, Taipei Hsie n 221, Taiwan, R.O.C.

Taipei Hsie n 221, Taiwan, R.O.C.

Cottonwood

1

Taipei Hsie n 221, Taiwan, R.O.C.

30 104Tues day, June 17, 2014

A00

of

Title

LAN RTL8111/RTL8106

Size Document Num ber Rev

A2

Date: Sheet

5

4

3

2

Date: Sheet

Dell Inspiron 13-7347 Schematics

Specifications and Main Features

Frequently Asked Questions

User Manual