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VM9/VM8 Block Diagram
AA
FAN & THERMAL
EMC1423-1-AIZL-TR
CLOCK
SLG8SP513V
(QFN-64)
LVDS
PG 31
PG 17
POWER
AC/BATT
CONNECTOR
PG 42
SYSTEM
RESET CIRCUIT
BATT
CHARGER
RUN POWER SW
+3.3V_SUS/+5V_SUS
+5V/+3.3V/+1.8V
PG 35
PG 36
PG 41
Celeron M540
(478 Pin)
PG 3,4
533 MHz FSB
Crestline
BB
DDR2-SODIMM*2
533 MHZ DDR II
965GM
1299 uFCBGA
VGA
POWER
+1.5V_RUN/+1.05V_VCCP
REGULATOR
+1.8V_SUS/+1.25V_RUN
/+0.9V_DDR_VTT
PG 37
CPU VR REGULATOR
REGULATOR
+3.3V_ALW/+5V_SUS/+15V_ALW
PG 38
Panel Connector
(WXGA)
CRT CONN.
PG 39
PG 40
PG 18
PG 19
PG 15,16
PG 5,6,7,8,9,10
SATA-ODD
PG 28
SATA-HDD
PG 28
CC
Bluetooth
PG 26
SATA
SATA
USB 2.0
IHDA
DMI interface
ICH8-M
676 BGA
PG 11,12,13,14
USB2.0 x 2
PCIE
PCIE
USB conn x 2
RTL8102EL
(10/100)
MINI-CARD
WLAN
PG 34
PG 27
RJ45/Magnetics
PG 34
PG 26
AUDIO/AMP
CX20561-12Z
TPA6017A2
PG 32
Audio SPK
conn 2Wx1
Audio
Jacks x3
PG 32
PG 32
DD
1
MODEM (AMOM)
CX20548-11Z
PG 33
RJ-11conn
PG 33
FLASH
2M bytes
2
LPC
KBC
ITE8502
18X8
PG 23
SPIPS/2
Touchpad
PG 24PG 29
3
Keyboard
USER
INTERFACE
4
PG 29
33MHz PCI
PG 20
3-in-1 Card Reader
PCMCIA
IEEE1394
R5C847
5
PG 20
6
1394
1394 CONN.
Card Reader CONN.
PCMCIA CONN.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
COMPUTER
Schematic Block Diagram
Schematic Block Diagram
Schematic Block Diagram
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
PG 22
PG 21
PG 21
153 Friday, July 18, 2008
153 Friday, July 18, 2008
153 Friday, July 18, 2008
8
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Table of ContentsPower States
PAGEDESCRIPTION
Schematic Block Diagram
1
2
Front Page
3-4
Merom
Crestline
5-10
ICH8M
AA
BB
CC
11-14
15-16
DDRII SO-DIMM(200P)
Clock Generator
17
18
HDMI
LCD Conn. & SSP
23
CRT Conn
24
SATA Conn
25
CARD READER/Conn & 1394
26-27
Express Card & Smart Card
28
Mini Card
29-30
SIO (ITE8512)
31
FLASH/RTC
32
33
USB
35
TP / KEYBOARD
SWITCH /LED
36
37
FAN & Thermal
38-39
Audio CODEC(ALC888)/Phone Jack
LOM / Switch
40-41
System Reset Circuit
44
Battery Selector & Charger
46
1.05VCCP / 1.5VRUJN
48
DDR2_1.8VSUS, 0.9V
49
CPU_ISL6266(2phase)
51
52
MAX8744 (+5.5V,+3,3V)
RUN Power Switch
53
DCIN,Batt
54
PAD& SCREW
55
EMI CAP
56
SMBUS BLOCK
57
Power Block Dianram
58
POWER PLANE
+PWR_SRC
+RTC_CELL
+3.3V_ALW
+5V_ALW
+15V_ALW
+3.3V_LAN
+5V_SUS
+3.3V_SUS
+1.8V_SUS
+0.9V_DDR_VTT
+5V_RUN
+3.3V_RUN
+1.8V_RUN
+1.5V_RUN
+1.25V_RUN
+1.05V_VCCP
+VCC_CORE
+LCDVCC
+5V_MOD
+5V_HDD
+PBATT
+SBATT
10V~+19V
+3.0V~+3.3V
+3.3V
+5V
+15V
+3.3V
+5V
+3.3V
+1.8V
+0.9V
+5V
+3.3V
+1.8V
+1.5V
+1.25V
+1.05V
+0.7V~+1.77V
+3.3V
+5V
+5V
+10V~+17V
+10V~+17V
GND PLANEPAGE
8731AGND
AGND_0.9V
AGND_DC/DC
AGND_DC2
AGND_DDR
AGND_ISL6260
GND
46
49
52
48
49
51
ALL
4,26,32,34,46,48,49,51,52,56
11,14,31,32
3,31,32,34,36,37,38,44,46,49,52,53,54
35,36,46,48,49,52,53,54,56
26,36,37,52,53
42,43
14,38,51,53
3,11,12,13,14,26,30,37,38,43,48,49,51,53
6,8,9,15,48,49,53
16,49,53
14,18,27,36,37,38,39,40,41,53
14,18,27,36,37,38,39,40,41,53
18,38,53
4,9,14,30,33,34,48,53,56
6,9,14,49,53
3,4,5,6,8,9,11,14,48,56
4,51,56
26
36
36
DESCRIPTION
DESCRIPTION
MAIN POWER
RTC
8051 POWER
LCD/CHARGE POWER
LARGE POWER
LAN POWER
SLP_S5# CTRLD POWER
SLP_S5# CTRLD POWER
SODIMM POWER
SODIMM POWER
SLP_S3# CTRLD POWER
SLP_S3# CTRLD POWER
SDVO POWER
CALISTOGA/ICH8 POWER
CALISTOGA/ICH8 POWER
CPU/CALISTOGA/ICH8 POWER
CPU CORE POWER
LCD Power
Module Power
HDD Power
MAIN BATTERY
SECOND BATTERY
CONTROL
SIGNAL
ALWON
ALWON
+5V_ALW
AUX_ON
SUS_ON
3.3V_SUS_ON
DDR_ON
0.9V_DDR_VTT_ON
RUN_ON
3.3V_RUN_ON
RUN_ON
1.5V_RUN_ON
1.25V_RUN_ON
1.05V_RUN_ON
IMVP_VR_ON
LCDVCC_TST_EN
& ENVDD
MODC_EN#
HDDC_EN#
CHG_PBATT
CHG_SBATT
ACTIVE IN VOLTAGEPAGE
S0~S5
S0~S5
S0~S5
S0~S5
S0~S5
DD
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
1
2
3
4
5
6
Date:Sheet of
COMPUTER
Index & Power Status
Index & Power Status
Index & Power Status
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
253 Tuesday, May 27, 2008
253 Tuesday, May 27, 2008
253 Tuesday, May 27, 2008
8
1 2 3 4 5 6
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H_A#[3..16] 5
AA
H_ADSTB#0 5
H_REQ#[0..4] 5
H_A#[17..35] 5
BB
H_ADSTB#1 5
H_A20M# 11
H_FERR# 11
H_IGNNE# 11
H_STPCLK# 11
H_INTR 11
H_NMI 11
H_SMI# 11
H_A#[3..16]
H_REQ#[0..4]
H_A#[17..35]
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_REQ#0
H_REQ#1
H_REQ#2
H_REQ#3
H_REQ#4
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
For EA test use
H_DSTBN#0
1
ET11ET11
H_DSTBN#2
1
ET17ET17
H_DSTBP#2
1
ET16ET16
H_D#41
1
ET15ET15
H_DSTBN#3
1
ET22ET22
H_DSTBP#3
1
ET21ET21
H_D#50
1
ET20ET20
H_D#58
1
ET19ET19
CC
Populate ITP700Flex for bringup
+1.05V_VCCP
+3.3V_SUS
DD
ITP_TCK
ITP_TRST#
J4
L5
L4
K5
M3
N2
J1
N3
P5
P2
L2
P4
P1
R1
M1
K3
H2
K2
J3
L1
Y2
U5
R3
W6
U4
Y5
U1
R4
T5
T3
W2
W5
Y4
U2
V4
W3
AA4
AB2
AA3
V1
A6
A5
C4
D5
C6
B4
A3
M4
N5
T2
V3
B2
C3
D2
D22
D3
F6
R19
R19
150
150
R18
R18
39/F
39/F
R1351R13
51
R3150 R3150
R1527/F R1527/F
R16649/F R16649/F
U22A
U22A
A[3]#
A[4]#
A[5]#
A[6]#
A[7]#
A[8]#
A[9]#
A[10]#
A[11]#
A[12]#
A[13]#
A[14]#
A[15]#
A[16]#
ADSTB[0]#
REQ[0]#
REQ[1]#
REQ[2]#
REQ[3]#
REQ[4]#
A[17]#
A[18]#
A[19]#
A[20]#
A[21]#
A[22]#
A[23]#
A[24]#
A[25]#
A[26]#
A[27]#
A[28]#
A[29]#
A[30]#
A[31]#
A[32]#
A[33]#
A[34]#
A[35]#
ADSTB[1]#
A20M#
FERR#
IGNNE#
STPCLK#
LINT0
LINT1
SMI#
RSVD[01]
RSVD[02]
RSVD[03]
RSVD[04]
RSVD[05]
RSVD[06]
RSVD[07]
RSVD[08]
RSVD[09]
RSVD[10]
1 2
1 2
1 2
1 2
1 2
1 2
DEFER#
ADDR GROUP 0
ADDR GROUP 0
CONTROL XDP/ITP SIGNALS
CONTROL XDP/ITP SIGNALS
RESET#
BPM[0]#
ADDR GROUP 1
ADDR GROUP 1
BPM[1]#
BPM[2]#
BPM[3]#
THERMAL
THERMAL
PROCHOT#
THERMDA
THERMDC
ICH
ICH
THERMTRIP#
H CLK
H CLK
BCLK[0]
BCLK[1]
RESERVED
RESERVED
47387-4784
47387-4784
ITP_TDI
ITP_TMS
ITP_TDO
ITP_DBRESET#
H1
ADS#
E2
BNR#
G5
BPRI#
H5
F21
DRDY#
E1
DBSY#
F1
BR0#
IERR#
INIT#
LOCK#
RS[0]#
RS[1]#
RS[2]#
TRDY#
HIT#
HITM#
PRDY#
PREQ#
TCK
TDO
TMS
TRST#
DBR#
H_IERR#
D20
B3
H4
C1
F3
F4
G3
G2
G6
E4
AD4
AD3
AD1
AC4
AC2
AC1
ITP_TCK
AC5
ITP_TDI
AA6
TDI
ITP_TDO
AB3
ITP_TMS
AB5
ITP_TRST#
AB6
ITP_DBRESET#
C20
R6756R67
H_PROCHOT#
D21
H_THERMDA
A24
H_THERMDC
B25
H_THERM
H_THERM
C7
R4456R44
1 2
A22
A21
C487*2200P_NC
C487*2200P_NC
H_THERMDA H_THERMDC
For EA test use
ET5ET5
ET12ET12
ET1ET1
ET4ET4
ET6ET6
ET7ET7
Layout Note:
Place R74,R26,
R19, R23, R16
, R17 close to CPU
H_ADS#5
H_BNR#5
H_BPRI#5
H_DEFER#5
H_DRDY#5
H_DBSY#5
H_BR0#5
R6256 R6256
1 2
H_INIT#11
H_LOCK#5
R4100603R4100603
1 2
H_RS#05
H_RS#15
H_RS#25
H_TRDY#5
H_HIT#5
H_HITM#5
1 2
1 2
50
50
H_ADSTB#0
1
H_A#14
1
H_A#16
1
H_ADSTB#1
1
H_A#21
1
H_A#26
1
ITP_DBRESET#13
+1.05V_VCCP
H_THERMDA31
H_THERMDC31
+1.05V_VCCP
CLK_CPU_BCLK17
CLK_CPU_BCLK#17
56
56
4
+1.05V_VCCP
10
T3 PAD T3 PAD
+1.05V_VCCP
1 2
R40
R40
51/F
51/F
Layout Note:
Place voltage
divider within
0.5" of GTLREF
pin
+1.05V_VCCP
+1.05V_VCCP
H_PROCHOT#
H_THERM
Q6
Q6
MMST3904-7-F
MMST3904-7-F
Layout Note:
Place R44
close to
CPU.
H_RESET#5
R380
R380
1K/F
1K/F
1 2
1 2
R379
R379
2K/F
2K/F
+3.3V_ALW
2
1 2
3 1
Q7
Q7
*2N7002W_NC
*2N7002W_NC
+3.3V_RUN
R51
R51
10M
10M
1 2
2
Signal
C68
C68
0.1U
0.1U
1 3
10
10
ITP disable guidelines
Resistor Value
TDI
150 ohm +/- 5%
TMS
39 ohm +/- 5%
TRST#
680 ohm +/- 5%
TCK
27 ohm +/- 5%
Open
TDO
ITP_EN
R268 Depop
H_D#[0..63] 5
H_DSTBN#0 5
H_DSTBP#0 5
H_DINV#0 5
H_D#[0..63] 5
H_DSTBN#1 5
H_DSTBP#1 5
H_DINV#1 5
CPU_MCH_BSEL0 6,17
CPU_MCH_BSEL1 6,17
CPU_MCH_BSEL2 6,17
Voltage Level shift
R50
R50
*2.2K_NC
*2.2K_NC
CPU_PROCHOT#
3 1
Q5
2N7002WQ52N7002W
2
H_D#[0..63] H_D#[0..63]
H_D#[0..63]
H_THERMTRIP#6,23,31,40
Connect To
VTT
VTT
GND
GND
VTT
+3VRUN
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
V_CPU_GTLREF
CPU_TEST1
CPU_TEST2
CPU_TEST3
CPU_TEST4
CPU_TEST5
CPU_TEST6
R75*1K/F_NC R75*1K/F_NC
R74*1K/F_NC R74*1K/F_NC
C509*0.1U_NC
C509*0.1U_NC
10
10
R373*0_NC R373*0_NC
Place C close to the
CPU_TEST4 pin. Make sure
CPU_TEST4 routing is
reference to GND and away
from other noisy signal.
Resistor Placement
Within 2.0" of the ITP
Within 2.0" of the ITP
Within 2.0" of the ITP
Within 2.0" of the ITP
Within 2.0" of the ITP
Close to CK410M Pin8
U22B
U22B
E22
D[0]#
F24
D[1]#
E26
D[2]#
G22
D[3]#
F23
D[4]#
G25
D[5]#
E25
D[6]#
E23
K24
G24
J24
J23
H22
F26
K22
H23
J26
H26
H25
N22
K25
P26
R23
L23
M24
L22
M23
P25
P23
P22
T24
R24
L25
T25
N25
L26
M26
N24
AD26
C23
D25
C24
AF26
AF1
A26
B22
B23
C21
CPU_TEST1
1 2
CPU_TEST2
1 2
CPU_TEST4
1 2
CPU_TEST6
D[7]#
D[8]#
D[9]#
D[10]#
D[11]#
D[12]#
D[13]#
D[14]#
D[15]#
DSTBN[0]#
DSTBP[0]#
DINV[0]#
D[16]#
D[17]#
D[18]#
D[19]#
D[20]#
D[21]#
D[22]#
D[23]#
D[24]#
D[25]#
D[26]#
D[27]#
D[28]#
D[29]#
D[30]#
D[31]#
DSTBN[1]#
DSTBP[1]#
DINV[1]#
GTLREF
TEST1
TEST2
TEST3
TEST4
TEST5
TEST6
BSEL[0]
BSEL[1]
BSEL[2]
47387-4784
47387-4784
DATA GRP 0 DATA GRP 1
DATA GRP 0 DATA GRP 1
DATA GRP 2 DATA GRP 3
DATA GRP 2 DATA GRP 3
MISC
MISC
For the purpose of testability, route these signals
through a ground referenced Z0 = 55ohm trace that
ends in a via that is near a GND via and is
accessible through an oscilloscope connection.
FSB
53300
667
800
6
Y22
D[32]#
AB24
D[33]#
V24
D[34]#
V26
D[35]#
V23
D[36]#
T22
D[37]#
U25
D[38]#
U23
D[39]#
Y25
D[40]#
W22
D[41]#
Y23
D[42]#
W24
D[43]#
W25
D[44]#
AA23
D[45]#
AA24
D[46]#
AB25
D[47]#
Y26
DSTBN[2]#
AA26
DSTBP[2]#
U22
DINV[2]#
AE24
D[48]#
AD24
D[49]#
AA21
D[50]#
AB22
D[51]#
AB21
D[52]#
AC26
D[53]#
AD20
D[54]#
AE22
D[55]#
AF23
D[56]#
AC25
D[57]#
AE21
D[58]#
AD21
D[59]#
AC22
D[60]#
AD23
D[61]#
AF22
D[62]#
AC23
D[63]#
AE25
DSTBN[3]#
AF24
DSTBP[3]#
AC20
DINV[3]#
R26
COMP[0]
U26
COMP[1]
AA1
COMP[2]
Y1
COMP[3]
E5
DPRSTP#
B5
DPSLP#
D24
DPWR#
D6
PWRGOOD
D7
SLP#
AE6
PSI#
T145 PAD T145 PAD
T146 PAD T146 PAD
BCLK
133
166
200
Comp0,2 connect with Zo=27.4ohm,Comp1,3
connect with Zo=55ohm, make those traces
length shorter than 0.5".Trace should be
at least 25 mils away from any other
toggling signal.
Title
Title
Title
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
Merom Processor (HOST BUS)
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
VM9/VM81A
VM9/VM81A
VM9/VM81A
Date:Sheet of
Date:Sheet of
Date:Sheet of
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#[0..63]
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
COMP0
COMP1
COMP2
COMP3
CPU_TEST3
CPU_TEST5
Note:
H_DPRTSTP need to daisy chain
from ICH8 to IMVP6 to CPU.
BSEL2BSEL1BSEL0
0
1
COMP0
COMP1
COMP2
COMP3
R36
R36
54.9/F
54.9/F
1 2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
7
H_D#[0..63]5
H_DSTBN#25
H_DSTBP#25
H_DINV#25
H_D#[0..63]5
H_DSTBN#35
H_DSTBP#35
H_DINV#35
H_DPRSTP#6,11,39
H_DPSLP#11
H_DPWR#5
H_PWRGOOD11
H_CPUSLP#5
H_PSI#39
1
0 011
R35
R35
27.4/F
27.4/F
1 2
1 2
R38
R38
54.9/F
54.9/F
R42
R42
27.4/F
27.4/F
1 2
353 Monday, June 23, 2008
353 Monday, June 23, 2008
353 Monday, June 23, 2008
8
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
7
8
+VCC_CORE +VCC_CORE
+VCC_CORE
All use 10U 4V(+-20%,X6S,0805)Pb-Free.
55
1 2
AA
+VCC_CORE
1 2
C50
C50
*10U_NC
*10U_NC
0805
0805
4
4
C45
C45
10U
10U
0805
0805
4
4
1 2
C49
C49
10U
10U
0805
0805
4
4
1 2
C48
C48
10U
10U
0805
0805
4
4
1 2
C47
C47
10U
10U
0805
0805
4
4
1 2
C46
C46
10U
10U
0805
0805
4
4
55
C44
C44
10U
10U
0805
0805
4
4
1 2
1 2
C43
C43
*10U_NC
*10U_NC
0805
0805
4
4
1 2
C52
C52
10U
10U
0805
0805
4
4
1 2
C53
C53
10U
10U
0805
0805
4
4
8 inside cavity, north side, secondary layer.
+VCC_CORE
C71
C71
10U
10U
0805
0805
4
4
C499
C499
*10U_NC
*10U_NC
0805
0805
4
4
1 2
1 2
1 2
BB
+VCC_CORE
1 2
C76
C76
10U
10U
0805
0805
4
4
C500
C500
*10U_NC
*10U_NC
0805
0805
4
4
1 2
1 2
C73
C73
10U
10U
0805
0805
4
4
C69
C69
*10U_NC
*10U_NC
0805
0805
4
4
1 2
1 2
C503
C503
10U
10U
0805
0805
4
4
C496
C496
*10U_NC
*10U_NC
0805
0805
4
4
1 2
C60
C60
10U
10U
0805
0805
4
4
1 2
C497
C497
*10U_NC
*10U_NC
0805
0805
4
4
8 inside cavity, south side, secondary layer.
+VCC_CORE
55
C74
C74
10U
10U
0805
0805
4
4
1 2
C498
C498
10U
10U
0805
0805
4
4
1 2
C66
C66
10U
10U
0805
0805
4
4
1 2
C72
C72
10U
10U
0805
0805
4
4
1 2
C70
C70
10U
10U
0805
0805
4
4
1 2
C495
C495
10U
10U
0805
0805
4
4
1 2
6 inside cavity, north side, primary layer.
+VCC_CORE
CC
1 2
C508
C508
10U
10U
0805
0805
4
4
1 2
C507
C507
10U
10U
0805
0805
4
4
1 2
C506
C506
10U
10U
0805
0805
4
4
1 2
C504
C504
10U
10U
0805
0805
4
4
1 2
C505
C505
10U
10U
0805
0805
4
4
1 2
C75
C75
10U
10U
0805
0805
4
4
6 inside cavity, south side, primary layer.
+1.05V_VCCP
1 2
Layout out:
Place these inside socket cavity on North side secondary.
DD
C55
C55
0.1U
0.1U
10
10
1 2
C56
C56
0.1U
0.1U
10
10
1 2
C54
C54
0.1U
0.1U
10
10
1 2
C65
C65
0.1U
0.1U
10
10
1 2
C58
C58
0.1U
0.1U
10
10
1 2
C64
C64
0.1U
0.1U
10
10
+PWR_SRC
63
+
+
C523
C523
100U
100U
25
25
Layout Note:
Need to add 100uF cap on PWR_SRC for cap singing.
Place on PWR_SRC near +VCC_CORE.
AA10
AA12
AA13
AA15
AA17
AA18
AA20
AC10
AB10
AB12
AB14
AB15
AB17
AB18
A7
A9
A10
A12
A13
A15
A17
A18
A20
B7
B9
B10
B12
B14
B15
B17
B18
B20
C9
C10
C12
C13
C15
C17
C18
D9
D10
D12
D14
D15
D17
D18
E7
E9
E10
E12
E13
E15
E17
E18
E20
F7
F9
F10
F12
F14
F15
F17
F18
F20
AA7
AA9
AB9
U22C
U22C
VCC[001]
VCC[002]
VCC[003]
VCC[004]
VCC[005]
VCC[006]
VCC[007]
VCC[008]
VCC[009]
VCC[010]
VCC[011]
VCC[012]
VCC[013]
VCC[014]
VCC[015]
VCC[016]
VCC[017]
VCC[018]
VCC[019]
VCC[020]
VCC[021]
VCC[022]
VCC[023]
VCC[024]
VCC[025]
VCC[026]
VCC[027]
VCC[028]
VCC[029]
VCC[030]
VCC[031]
VCC[032]
VCC[033]
VCC[034]
VCC[035]
VCC[036]
VCC[037]
VCC[038]
VCC[039]
VCC[040]
VCC[041]
VCC[042]
VCC[043]
VCC[044]
VCC[045]
VCC[046]
VCC[047]
VCC[048]
VCC[049]
VCC[050]
VCC[051]
VCC[052]
VCC[053]
VCC[054]
VCC[055]
VCC[056]
VCC[057]
VCC[058]
VCC[059]
VCC[060]
VCC[061]
VCC[062]
VCC[063]
VCC[064]
VCC[065]
VCC[066]
VCC[067]
47387-4784
47387-4784
+
+
C519
C519
*100U_NC
*100U_NC
25
25
VCC[068]
VCC[069]
VCC[070]
VCC[071]
VCC[072]
VCC[073]
VCC[074]
VCC[075]
VCC[076]
VCC[077]
VCC[078]
VCC[079]
VCC[080]
VCC[081]
VCC[082]
VCC[083]
VCC[084]
VCC[085]
VCC[086]
VCC[087]
VCC[088]
VCC[089]
VCC[090]
VCC[091]
VCC[092]
VCC[093]
VCC[094]
VCC[095]
VCC[096]
VCC[097]
VCC[098]
VCC[099]
VCC[100]
VCCP[01]
VCCP[02]
VCCP[03]
VCCP[04]
VCCP[05]
VCCP[06]
VCCP[07]
VCCP[08]
VCCP[09]
VCCP[10]
VCCP[11]
VCCP[12]
VCCP[13]
VCCP[14]
VCCP[15]
VCCP[16]
VCCA[01]
VCCA[02]
VID[0]
VID[1]
VID[2]
VID[3]
VID[4]
VID[5]
VID[6]
VCCSENSE
VSSSENSE
AB20
AB7
AC7
AC9
AC12
AC13
AC15
AC17
AC18
AD7
AD9
AD10
AD12
AD14
AD15
AD17
AD18
AE9
AE10
AE12
AE13
AE15
AE17
AE18
AE20
AF9
AF10
AF12
AF14
AF15
AF17
AF18
AF20
G21
V6
J6
K6
M6
J21
K21
M21
N21
N6
R21
R6
T21
T6
V21
W21
B26
C26
AD6
AF5
AE5
AF4
AE3
AF3
AE2
AF7
AE7
.
.
+
+
C518
C518
*100U_NC
*100U_NC
25
25
VCCSENSE
VSSSENSE
+1.05V_VCCP
1 2
+
+
C502
C502
220U
220U
7343
7343
2.5
2.5
VID039
VID139
VID239
VID339
VID439
VID539
VID639
VCCSENSE39
VSSSENSE39
55
+1.5V_RUN
1 2
Layout Note:
Place C468 near PIN
B26.
VCCSENSE
VSSSENSE
Route VCCSENSE and VSSSENSE
traces at 27.4ohms and
length matched to within 25
mil. Place PU and PD within
2 inch of CPU.
C493
C493
0.01U
0.01U
25
25
+VCC_CORE
1 2
1 2
1 2
R32
R32
100/F
100/F
R33
R33
100/F
100/F
C494
C494
10U
10U
0805
0805
4
4
U22D
U22D
A4
VSS[001]
A8
VSS[002]
A11
VSS[003]
A14
VSS[004]
A16
VSS[005]
A19
VSS[006]
A23
VSS[007]
AF2
VSS[008]
B6
VSS[009]
B8
VSS[010]
B11
VSS[011]
B13
VSS[012]
B16
VSS[013]
B19
VSS[014]
B21
VSS[015]
B24
VSS[016]
C5
VSS[017]
C8
VSS[018]
C11
VSS[019]
C14
VSS[020]
C16
VSS[021]
C19
VSS[022]
C2
VSS[023]
C22
VSS[024]
C25
VSS[025]
D1
VSS[026]
D4
VSS[027]
D8
VSS[028]
D11
VSS[029]
D13
VSS[030]
D16
VSS[031]
D19
VSS[032]
D23
VSS[033]
D26
VSS[034]
E3
VSS[035]
E6
VSS[036]
E8
VSS[037]
E11
VSS[038]
E14
VSS[039]
E16
VSS[040]
E19
VSS[041]
E21
VSS[042]
E24
VSS[043]
F5
VSS[044]
F8
VSS[045]
F11
VSS[046]
F13
VSS[047]
F16
VSS[048]
F19
VSS[049]
F2
VSS[050]
F22
VSS[051]
F25
VSS[052]
G4
VSS[053]
G1
VSS[054]
G23
VSS[055]
G26
VSS[056]
H3
VSS[057]
H6
VSS[058]
H21
VSS[059]
H24
VSS[060]
J2
VSS[061]
J5
VSS[062]
J22
VSS[063]
J25
VSS[064]
K1
VSS[065]
K4
VSS[066]
K23
VSS[067]
K26
VSS[068]
L3
VSS[069]
L6
VSS[070]
L21
VSS[071]
L24
VSS[072]
M2
VSS[073]
M5
VSS[074]
M22
VSS[075]
M25
VSS[076]
N1
VSS[077]
N4
VSS[078]
N23
VSS[079]
N26
VSS[080]
VSS[081]P3VSS[162]
47387-4784
47387-4784
VSS[082]
VSS[083]
VSS[084]
VSS[085]
VSS[086]
VSS[087]
VSS[088]
VSS[089]
VSS[090]
VSS[091]
VSS[092]
VSS[093]
VSS[094]
VSS[095]
VSS[096]
VSS[097]
VSS[098]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[163]
P6
P21
P24
R2
R5
R22
R25
T1
T4
T23
T26
U3
U6
U21
U24
V2
V5
V22
V25
W1
W4
W23
W26
Y3
Y6
Y21
Y24
AA2
AA5
AA8
AA11
AA14
AA16
AA19
AA22
AA25
AB1
AB4
AB8
AB11
AB13
AB16
AB19
AB23
AB26
AC3
AC6
AC8
AC11
AC14
AC16
AC19
AC21
AC24
AD2
AD5
AD8
AD11
AD13
AD16
AD19
AD22
AD25
AE1
AE4
AE8
AE11
AE14
AE16
AE19
AE23
AE26
A2
AF6
AF8
AF11
AF13
AF16
AF19
AF21
A25
AF25
.
.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
6
Date:Sheet of
COMPUTER
Merom Processor (POWER)
Merom Processor (POWER)
Merom Processor (POWER)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
453 Friday, May 30, 2008
453 Friday, May 30, 2008
453 Friday, May 30, 2008
8
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
7
8
U20A
H_D#[0..63]
H_SWING
H_RCOMP
H_SCOMP
H_SCOMP#
H_RESET# 3
H_CPUSLP# 3
H_REF
1 2
C121
C121
0.1U
0.1U
10
10
Layout Note:
Place the 0.1 uF
decoupling capacitor
within 100 mils from
GMCH pins.
H_D#0
H_D#1
H_D#2
H_D#3
H_D#4
H_D#5
H_D#6
H_D#7
H_D#8
H_D#9
H_D#10
H_D#11
H_D#12
H_D#13
H_D#14
H_D#15
H_D#16
H_D#17
H_D#18
H_D#19
H_D#20
H_D#21
H_D#22
H_D#23
H_D#24
H_D#25
H_D#26
H_D#27
H_D#28
H_D#29
H_D#30
H_D#31
H_D#32
H_D#33
H_D#34
H_D#35
H_D#36
H_D#37
H_D#38
H_D#39
H_D#40
H_D#41
H_D#42
H_D#43
H_D#44
H_D#45
H_D#46
H_D#47
H_D#48
H_D#49
H_D#50
H_D#51
H_D#52
H_D#53
H_D#54
H_D#55
H_D#56
H_D#57
H_D#58
H_D#59
H_D#60
H_D#61
H_D#62
H_D#63
C107
C107
0.1U
0.1U
1 2
10
10
H_D#[0..63] 3
+1.05V_VCCP
1 2
1 2
R94
R94
1K/F
1K/F
R96
R96
2K/F
2K/F
AA
+1.05V_VCCP
1 2
R93
R93
221/F
221/F
H_SWING
1 2
R92
R92
100/F
100/F
BB
+1.05V_VCCP
R139
R139
R141
R141
54.9/F
54.9/F
54.9/F
54.9/F
1 2
1 2
1 2
CC
DD
H_SCOMP
H_SCOMP#
H_RCOMP
R91
R91
24.9/F
24.9/F
Layout Note:
H_RCOMP trace should be
10-mil wide with 20-mil
spacing.
U20A
E2
H_D#_0
G2
H_D#_1
G7
H_D#_2
M6
H_D#_3
H7
H_D#_4
H3
H_D#_5
G4
H_D#_6
F3
H_D#_7
N8
H_D#_8
H2
H_D#_9
M10
H_D#_10
N12
H_D#_11
N9
H_D#_12
H5
H_D#_13
P13
H_D#_14
K9
H_D#_15
M2
H_D#_16
W10
H_D#_17
Y8
H_D#_18
V4
H_D#_19
M3
H_D#_20
J1
H_D#_21
N5
H_D#_22
N3
H_D#_23
W6
H_D#_24
W9
H_D#_25
N2
H_D#_26
Y7
H_D#_27
Y9
H_D#_28
P4
H_D#_29
W3
H_D#_30
N1
H_D#_31
AD12
H_D#_32
AE3
H_D#_33
AD9
H_D#_34
AC9
H_D#_35
AC7
H_D#_36
AC14
H_D#_37
AD11
H_D#_38
AC11
H_D#_39
AB2
H_D#_40
AD7
H_D#_41
AB1
H_D#_42
Y3
H_D#_43
AC6
H_D#_44
AE2
H_D#_45
AC5
H_D#_46
AG3
H_D#_47
AJ9
H_D#_48
AH8
H_D#_49
AJ14
H_D#_50
AE9
H_D#_51
AE11
H_D#_52
AH12
H_D#_53
AJ5
H_D#_54
AH5
H_D#_55
AJ6
H_D#_56
AE7
H_D#_57
AJ7
H_D#_58
AJ2
H_D#_59
AE5
H_D#_60
AJ3
H_D#_61
AH2
H_D#_62
AH13
H_D#_63
B3
H_SWING
C2
H_RCOMP
W1
H_SCOMP
W2
H_SCOMP#
B6
H_CPURST#
E5
H_CPUSLP#
B9
H_AVREF
A9
H_DVREF
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
H_ADSTB#_0
H_ADSTB#_1
H_BREQ#
H_DEFER#
H_DBSY#
HPLL_CLK
HOST
HOST
HPLL_CLK#
H_DPWR#
H_DRDY#
H_LOCK#
H_TRDY#
H_DINV#_0
H_DINV#_1
H_DINV#_2
H_DINV#_3
H_DSTBN#_0
H_DSTBN#_1
H_DSTBN#_2
H_DSTBN#_3
H_DSTBP#_0
H_DSTBP#_1
H_DSTBP#_2
H_DSTBP#_3
H_REQ#_0
H_REQ#_1
H_REQ#_2
H_REQ#_3
H_REQ#_4
For EA test use
H_DSTBP#0
1
ET10ET10
H_D#7
1
ET2ET2
H_D#12
1
ET14ET14
H_DSTBN#1
1
ET9ET9
H_DSTBP#1
1
ET8ET8
H_D#29
1
ET13ET13
H_D#21
1
ET3ET3
H_D#32
1
ET18ET18
H_A#_3
H_A#_4
H_A#_5
H_A#_6
H_A#_7
H_A#_8
H_A#_9
H_A#_10
H_A#_11
H_A#_12
H_A#_13
H_A#_14
H_A#_15
H_A#_16
H_A#_17
H_A#_18
H_A#_19
H_A#_20
H_A#_21
H_A#_22
H_A#_23
H_A#_24
H_A#_25
H_A#_26
H_A#_27
H_A#_28
H_A#_29
H_A#_30
H_A#_31
H_A#_32
H_A#_33
H_A#_34
H_A#_35
H_ADS#
H_BNR#
H_BPRI#
H_HIT#
H_HITM#
H_RS#_0
H_RS#_1
H_RS#_2
J13
B11
C11
M11
C15
F16
L13
G17
C14
K16
B13
L16
J17
B14
K19
P15
R17
B16
H20
L19
D17
M17
N16
J19
B18
E19
B17
B15
E17
C18
A19
B19
N19
G12
H17
G20
C8
E8
F12
D6
C10
AM5
AM7
H8
K7
E4
C6
G10
B7
K5
L2
AD13
AE13
M7
K3
AD2
AH11
L7
K2
AC2
AJ10
M14
E13
A11
H13
B12
E12
D7
D8
76
H_A#3
H_A#4
H_A#5
H_A#6
H_A#7
H_A#8
H_A#9
H_A#10
H_A#11
H_A#12
H_A#13
H_A#14
H_A#15
H_A#16
H_A#17
H_A#18
H_A#19
H_A#20
H_A#21
H_A#22
H_A#23
H_A#24
H_A#25
H_A#26
H_A#27
H_A#28
H_A#29
H_A#30
H_A#31
H_A#32
H_A#33
H_A#34
H_A#35
H_A#[3..35]
H_ADS#3
H_ADSTB#03
H_ADSTB#13
H_BNR#3
H_BPRI#3
H_BR0#3
H_DEFER#3
H_DBSY#3
CLK_MCH_BCLK17
CLK_MCH_BCLK#17
H_DPWR#3
H_DRDY#3
H_HIT#3
H_HITM#3
H_LOCK#3
H_TRDY#3
H_DINV#03
H_DINV#13
H_DINV#23
H_DINV#33
H_DSTBN#03
H_DSTBN#13
H_DSTBN#23
H_DSTBN#33
H_DSTBP#03
H_DSTBP#13
H_DSTBP#23
H_DSTBP#33
H_REQ#03
H_REQ#13
H_REQ#23
H_REQ#33
H_REQ#43
H_RS#03
H_RS#13
H_RS#23
6
H_A#[3..35]3
+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP +1.05V_VCCP
C113
C131
C131
*0.1U_NC
*0.1U_NC
1 2
10
10
+1.05V_VCCP +1.05V_VCCP +1.05V_VCCP
C141
C141
*0.1U_NC
*0.1U_NC
1 2
10
10
Layout Note:
C131 should be near AB1,AB2,AC2,Y3
C113
*0.1U_NC
*0.1U_NC
1 2
10
10
C165
C165
*0.1U_NC
*0.1U_NC
1 2
10
10
1 2
1 2
C145
C145
*0.1U_NC
*0.1U_NC
10
10
C159
C159
*0.1U_NC
*0.1U_NC
10
10
C142
C142
*0.1U_NC
*0.1U_NC
1 2
10
10
C90 should be near AD2,AE2,AG3,AE3
C113 should be near
AC5,AC6,AD7,AC7,AC9,AD9,AD11,AC11,AD12,AD13,AC14
C127 should be near E2,F3,H2,H3,G4,H5,G7,H7
C129 should be near
M6,L7,K9,M7,N8,N9,M10,M11,N12,P13
C149 should be near
H13,J13,L13,M14,L16,K16,J17,H17
C146 should be near
E13,G17,F16,C15,B14,C11,B11,A11,B12
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
COMPUTER
Crestline (HOST)
Crestline (HOST)
Crestline (HOST)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
553 Monday, June 02, 2008
553 Monday, June 02, 2008
553 Monday, June 02, 2008
8
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
U20C
U20B
+1.8V_SUS
R179
R179
1K/F
1K/F
SM_RCOMP_VOH
1 2
AA
SM_RCOMP_VOL
1 2
Santa Rosa Platform MOW WW15
For 4Gb DRAM support,
change Pin-BJ29 to DDR_A_MA14,
change Pin-BE24 to DDR_B_MA14.
+3.3V_RUN
BB
+1.05V_VCCP
Layout Note:
Location of all MCH_CFG strap
resistors needs to be close to
minmize stub.
CC
+3.3V_RUN
DD
1 2
C238
C238
0.01U
0.01U
25
25
1 2
C241
C241
0.01U
0.01U
25
25
DDR_A_MA14 15,16
DDR_B_MA14 15,16
R12510K R12510K
1 2
R12110K R12110K
1 2
R13256R132
1 2
CPU_MCH_BSEL0 3,17
CPU_MCH_BSEL1 3,17
CPU_MCH_BSEL2 3,17
PAD
PAD
R117*4.02K/F_NC R117*4.02K/F_NC
PAD
PAD
PAD
PAD
R100*4.02K/F_NC R100*4.02K/F_NC
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
R129*4.02K/F_NC R129*4.02K/F_NC
PAD
PAD
PAD
PAD
R127*4.02K/F_NC R127*4.02K/F_NC
R120*4.02K/F_NC R120*4.02K/F_NC
PM_BMBUSY# 13
H_DPRSTP# 3,11,39
PM_EXTTS#0 15
PM_EXTTS#1 15
ICH_PWRGD 13,35
DPRSLPVR 13,39
SB_NB_PCIE_RST# 12
PLTRST# 12,23,26,34
C232
C232
2.2U
2.2U
0805
0805
10
10
C237
C237
2.2U
2.2U
0805
0805
10
10
56
THERMTRIP_MCH#
T15 PAD T15 PAD
T140
T140
1 2
T29 PAD T29 PAD
T16
T16
T22
T22
1 2
T30
T30
T26
T26
T23
T23
T12
T12
T13
T13
T24
T24
1 2
T27
T27
T25
T25
1 2
1 2
1 2
1 2
R178
R178
3.01K/F
3.01K/F
R175
R175
1K/F
1K/F
1 2
PM_EXTTS#0
PM_EXTTS#1
CFG3
CFG4
CFG5
CFG6
CFG7
CFG8
CFG9
CFG10
CFG11
CFG12
CFG13
CFG14
CFG15
CFG16
CFG17
CFG18
CFG19
CFG20
PM_EXTTS#0
PM_EXTTS#1
PLTRST#_R
THERMTRIP_MCH#
*0_NC
*0_NC
R148
R148
U20B
P36
RSVD1
P37
RSVD2
R35
RSVD3
N35
RSVD4
AR12
RSVD5
AR13
RSVD6
AM12
RSVD7
AN13
RSVD8
J12
RSVD9
AR37
RSVD10
AM36
RSVD11
AL36
RSVD12
AM37
RSVD13
D20
RSVD14
H10
RSVD20
B51
RSVD21
BJ20
RSVD22
BK22
RSVD23
BF19
RSVD24
BH20
RSVD25
BK18
RSVD26
BJ18
RSVD27
BF23
RSVD28
BG23
RSVD29
BC23
RSVD30
BD24
RSVD31
BJ29
RSVD32
BE24
RSVD33
BH39
RSVD34
AW20
RSVD35
BK20
RSVD36
C48
RSVD37
D47
RSVD38
B44
RSVD39
C44
RSVD40
A35
RSVD41
B37
RSVD42
B36
RSVD43
B34
RSVD44
C34
RSVD45
P27
CFG_0
N27
CFG_1
N24
CFG_2
C21
CFG_3
C23
CFG_4
F23
CFG_5
N23
CFG_6
G23
CFG_7
J20
CFG_8
C20
CFG_9
R24
CFG_10
L23
CFG_11
J23
CFG_12
E23
CFG_13
E20
CFG_14
K23
CFG_15
M20
CFG_16
M24
CFG_17
L32
CFG_18
N33
CFG_19
L35
CFG_20
G41
PM_BM_BUSY#
L39
PM_DPRSTP#
L36
PM_EXT_TS#_0
J36
PM_EXT_TS#_1
AW49
PWROK
AV20
RSTIN#
N20
THERMTRIP#
G36
DPRSLPVR
BJ51
NC_1
BK51
NC_2
BK50
NC_3
BL50
NC_4
BL49
NC_5
BL3
NC_6
BL2
NC_7
BK1
NC_8
BJ1
NC_9
E1
NC_10
A5
NC_11
C51
NC_12
B50
NC_13
A50
NC_14
A49
NC_15
BK2
NC_16
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
R149
R149
100
100
PLTRST#_R
1 2
DDR MUXING CLK DMI
DDR MUXING CLK DMI
CFG RSVD
CFG RSVD
PM
PM
GRAPHICS VID ME
GRAPHICS VID ME
NC
NC
MISC
MISC
SM_CK_0
SM_CK_1
SM_CK_3
SM_CK_4
SM_CK#_0
SM_CK#_1
SM_CK#_3
SM_CK#_4
SM_CKE_0
SM_CKE_1
SM_CKE_3
SM_CKE_4
SM_CS#_0
SM_CS#_1
SM_CS#_2
SM_CS#_3
SM_ODT_0
SM_ODT_1
SM_ODT_2
SM_ODT_3
SM_RCOMP
SM_RCOMP#
SM_RCOMP_VOH
SM_RCOMP_VOL
SM_VREF_0
SM_VREF_1
DPLL_REF_CLK
DPLL_REF_CLK#
DPLL_REF_SSCLK
DPLL_REF_SSCLK#
PEG_CLK
PEG_CLK#
DMI_RXN_0
DMI_RXN_1
DMI_RXN_2
DMI_RXN_3
DMI_RXP_0
DMI_RXP_1
DMI_RXP_2
DMI_RXP_3
DMI_TXN_0
DMI_TXN_1
DMI_TXN_2
DMI_TXN_3
DMI_TXP_0
DMI_TXP_1
DMI_TXP_2
DMI_TXP_3
GFX_VID_0
GFX_VID_1
GFX_VID_2
GFX_VID_3
GFX_VR_EN
CL_CLK
CL_DATA
CL_PWROK
CL_RST#
CL_VREF
SDVO_CTRL_CLK
SDVO_CTRL_DATA
CLK_REQ#
ICH_SYNC#
TEST_1
TEST_2
AV29
BB23
BA25
AV23
AW30
BA23
AW25
AW23
BE29
AY32
BD39
BG37
BG20
BK16
BG16
BE13
BH18
BJ15
BJ14
BE16
BL15
BK14
BK31
BL31
AR49
AW4
B42
C42
H48
H47
K44
K45
AN47
AJ38
AN42
AN46
AM47
AJ39
AN41
AN45
AJ46
AJ41
AM40
AM44
AJ47
AJ42
AM39
AM43
E35
A39
C38
B39
E36
AM49
AK50
AT43
AN49
AM50
H35
K36
G39
G40
A37
R32
M_CLK_DDR015
M_CLK_DDR115
M_CLK_DDR315
M_CLK_DDR415
M_CLK_DDR#015
M_CLK_DDR#115
M_CLK_DDR#315
M_CLK_DDR#415
DDR_CKE0_DIMMA15,16
DDR_CKE1_DIMMA15,16
DDR_CKE3_DIMMB15,16
DDR_CKE4_DIMMB15,16
DDR_CS0_DIMMA#7,15,16
DDR_CS1_DIMMA#15,16
DDR_CS2_DIMMB#15,16
DDR_CS3_DIMMB#7,15,16
M_ODT015,16
M_ODT115,16
M_ODT215,16
M_ODT315,16
SMRCOMPP
SMRCOMPN
SM_RCOMP_VOH
SM_RCOMP_VOL
V_DDR_MCH_REF
T10
T10
T144
T144
T143
T143
T142
T142
T141
T141
MCH_CLVREF
T17
T17
T28
T28
CLK_3GPLLREQ#17
MCH_ICH_SYNC#13
2
R134
R134
20K
20K
1
1 2
MCH_DREFCLK17
MCH_DREFCLK#17
DREF_SSCLK17
DREF_SSCLK#17
CLK_MCH_3GPLL17
CLK_MCH_3GPLL#17
DMI_MRX_ITX_N012
DMI_MRX_ITX_N112
DMI_MRX_ITX_N212
DMI_MRX_ITX_N312
DMI_MRX_ITX_P012
DMI_MRX_ITX_P112
DMI_MRX_ITX_P212
DMI_MRX_ITX_P312
DMI_MTX_IRX_N012
DMI_MTX_IRX_N112
DMI_MTX_IRX_N212
DMI_MTX_IRX_N312
DMI_MTX_IRX_P012
DMI_MTX_IRX_P112
DMI_MTX_IRX_P212
DMI_MTX_IRX_P312
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
PAD
CL_CLK013
CL_DATA013
ICH_CL_PWROK13,23
ICH_CL_RST0#13
PAD
PAD
PAD
PAD
SJ5SJ5
2
1
BIA_PWM 18
PANEL_BKEN 23
L_IBG
R123
R123
2.4K/F
2.4K/F
1 2
UMA
SMRCOMPP
SMRCOMPN
+1.8V_SUS
R180
R180
20/F
20/F
R177
R177
20/F
20/F
LCD_DDCCLK 18
LCD_DDCDAT 18
ENVDD 18
T21 PAD T21 PAD
LCD_ACLK- 18
LCD_ACLK+ 18
LCD_A0- 18
LCD_A1- 18
LCD_A2- 18
1 2
LCD_A0+ 18
LCD_A1+ 18
LCD_A2+ 18
1 2
7
+1.25V_RUN
Non-iAMT
MCH_CLVREF
C214
C214
0.1U
0.1U
1 2
10
10
H_THERMTRIP# 3,23,31,40
R116
R116
150/F
150/F
1 2
SDVO_CRTL_DATASDVO Present.
CFG5
CFG9
CFG16
CFG19
CFG20
G_CLK_DDC2 19
G_DAT_DDC2 19
R119
R119
150/F
150/F
1 2
R166
R166
1K/F
1K/F
1 2
1 2
R165
R165
392/F
392/F
VGA_BLU 19
VGA_GRN 19
VGA_RED 19
VGAHSYNC 19
VGAVSYNC 19
R43*0_NC R43*0_NC
VGA_BLU
VGA_GRN
VGA_RED
R103
R103
Layout Note:
150/F
150/F
Place 150 ohm
termination resistors
1 2
close to GMCH.
DMI X2 Select
PCI Express
Graphic Lane
FSB Dynamic
ODT
DMI Lane
Reversal
SDVO/PCIE
Concurrent
Operation
R10430/F R10430/F
R3621.3K/F R3621.3K/F
R9930/F R9930/F
LCD_DDCCLK
LCD_DDCDAT
L_IBG
T19 PAD T19 PAD
T11 PAD T11 PAD
T14 PAD T14 PAD
T4 PAD T4 PAD
T6 PAD T6 PAD
T9 PAD T9 PAD
T5 PAD T5 PAD
T7 PAD T7 PAD
R675/F R675/F
R875/F R875/F
R1475/F R1475/F
21
VGA_BLU
VGA_GRN
VGA_RED
1 2
1 2
1 2
THERMTRIP_MCH#
UMA
Low=DMIx2
High=DMIx4(Default)
Low= Reveise Lane
High=Normal operation
Low=Dynamic ODT Disable
High=Dynamic ODT Enable(default).
Low=Normal(default).
High=Lane Reversed
Low=Only SDVO or PCIEx1 is
operational (defaults)
High=SDVO and PCIEx1 are operating
simultaneously via PEG port
Low=No SDVO Device Present
(default)
High=SDVO Device Present
U20C
J40
L_BKLT_CTRL
H39
L_BKLT_EN
E39
L_CTRL_CLK
E40
L_CTRL_DATA
C37
L_DDC_CLK
D35
L_DDC_DATA
K40
L_VDD_EN
L41
LVDS_IBG
L43
LVDS_VBG
N41
LVDS_VREFH
N40
LVDS_VREFL
D46
LVDSA_CLK#
C45
LVDSA_CLK
D44
LVDSB_CLK#
E42
LVDSB_CLK
G51
LVDSA_DATA#_0
E51
LVDSA_DATA#_1
F49
LVDSA_DATA#_2
G50
LVDSA_DATA_0
E50
LVDSA_DATA_1
F48
LVDSA_DATA_2
G44
LVDSB_DATA#_0
B47
LVDSB_DATA#_1
B45
LVDSB_DATA#_2
E44
LVDSB_DATA_0
A47
LVDSB_DATA_1
A45
LVDSB_DATA_2
E27
TVA_DAC
G27
TVB_DAC
K27
TVC_DAC
F27
TVA_RTN
J27
TVB_RTN
L27
TVC_RTN
M35
TV_DCONSEL_0
P33
TV_DCONSEL_1
H32
CRT_BLUE
G32
CRT_BLUE#
K29
CRT_GREEN
J29
CRT_GREEN#
F29
CRT_RED
E29
CRT_RED#
K33
CRT_DDC_CLK
G35
CRT_DDC_DATA
F33
CRT_HSYNC
C32
CRT_TVO_IREF
E33
CRT_VSYNC
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
6
LVDS
LVDS
TV VGA
TV VGA
7
VCC3G_PCIE_R
N43
PEG_COMPI
PEG_COMPO
PEG_RX#_10
PEG_RX#_11
PEG_RX#_12
PEG_RX#_13
PEG_RX#_14
PEG_RX#_15
PEG_TX#_10
PEG_TX#_11
PCI-EXPRESS GRAPHICS
PCI-EXPRESS GRAPHICS
PEG_TX#_12
PEG_TX#_13
PEG_TX#_14
PEG_TX#_15
+3.3V_RUN
R1022.2K R1022.2K
R1052.2K R1052.2K
Title
Title
Title
Crestline (VGA,DMI)
Crestline (VGA,DMI)
Crestline (VGA,DMI)
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
VM9/VM81A
VM9/VM81A
VM9/VM81A
Date:Sheet of
Date:Sheet of
Date:Sheet of
7
M43
J51
PEG_RX#_0
L51
PEG_RX#_1
N47
PEG_RX#_2
T45
PEG_RX#_3
T50
PEG_RX#_4
U40
PEG_RX#_5
Y44
PEG_RX#_6
Y40
PEG_RX#_7
AB51
PEG_RX#_8
W49
PEG_RX#_9
AD44
AD40
AG46
AH49
AG45
AG41
J50
PEG_RX_0
L50
PEG_RX_1
M47
PEG_RX_2
U44
PEG_RX_3
T49
PEG_RX_4
T41
PEG_RX_5
W45
PEG_RX_6
W41
PEG_RX_7
AB50
PEG_RX_8
Y48
PEG_RX_9
AC45
PEG_RX_10
AC41
PEG_RX_11
AH47
PEG_RX_12
AG49
PEG_RX_13
AH45
PEG_RX_14
AG42
PEG_RX_15
N45
PEG_TX#_0
U39
PEG_TX#_1
U47
PEG_TX#_2
N51
PEG_TX#_3
R50
PEG_TX#_4
T42
PEG_TX#_5
Y43
PEG_TX#_6
W46
PEG_TX#_7
W38
PEG_TX#_8
AD39
PEG_TX#_9
AC46
AC49
AC42
AH39
AE49
AH44
M45
PEG_TX_0
T38
PEG_TX_1
T46
PEG_TX_2
N50
PEG_TX_3
R51
PEG_TX_4
U43
PEG_TX_5
W42
PEG_TX_6
Y47
PEG_TX_7
Y39
PEG_TX_8
AC38
PEG_TX_9
AD47
PEG_TX_10
AC50
PEG_TX_11
AD43
PEG_TX_12
AG39
PEG_TX_13
AE50
PEG_TX_14
AH43
PEG_TX_15
1 2
1 2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
LCD_DDCCLK
LCD_DDCDAT
8
R12624.9/F R12624.9/F
1 2
UMA
653 Thursday, June 12, 2008
653 Thursday, June 12, 2008
653 Thursday, June 12, 2008
8
+VCC_PEG
1
hexainf@hotmail.com
GRATIS - FOR FREE
2
3
4
5
6
7
8
DDR_A_D[0..63] 15
AA
BB
CC
DDR_A_D0
DDR_A_D1
DDR_A_D2
DDR_A_D3
DDR_A_D4
DDR_A_D5
DDR_A_D6
DDR_A_D7
DDR_A_D8
DDR_A_D9
DDR_A_D10
DDR_A_D11
DDR_A_D12
DDR_A_D13
DDR_A_D14
DDR_A_D15
DDR_A_D16
DDR_A_D17
DDR_A_D18
DDR_A_D19
DDR_A_D20
DDR_A_D21
DDR_A_D22
DDR_A_D23
DDR_A_D24
DDR_A_D25
DDR_A_D26
DDR_A_D27
DDR_A_D28
DDR_A_D29
DDR_A_D30
DDR_A_D31
DDR_A_D32
DDR_A_D33
DDR_A_D34
DDR_A_D35
DDR_A_D36
DDR_A_D37
DDR_A_D38
DDR_A_D39
DDR_A_D40
DDR_A_D41
DDR_A_D42
DDR_A_D43
DDR_A_D44
DDR_A_D45
DDR_A_D46
DDR_A_D47
DDR_A_D48
DDR_A_D49
DDR_A_D50
DDR_A_D51
DDR_A_D52
DDR_A_D53
DDR_A_D54
DDR_A_D55
DDR_A_D56
DDR_A_D57
DDR_A_D58
DDR_A_D59
DDR_A_D60
DDR_A_D61
DDR_A_D62
DDR_A_D63
U20D
U20D
AR43
SA_DQ_0
AW44
SA_DQ_1
BA45
SA_DQ_2
AY46
SA_DQ_3
AR41
SA_DQ_4
AR45
SA_DQ_5
AT42
SA_DQ_6
AW47
SA_DQ_7
BB45
SA_DQ_8
BF48
SA_DQ_9
BG47
SA_DQ_10
BJ45
SA_DQ_11
BB47
SA_DQ_12
BG50
SA_DQ_13
BH49
SA_DQ_14
BE45
SA_DQ_15
AW43
SA_DQ_16
BE44
SA_DQ_17
BG42
SA_DQ_18
BE40
SA_DQ_19
BF44
SA_DQ_20
BH45
SA_DQ_21
BG40
SA_DQ_22
BF40
SA_DQ_23
AR40
SA_DQ_24
AW40
SA_DQ_25
AT39
SA_DQ_26
AW36
SA_DQ_27
AW41
SA_DQ_28
AY41
SA_DQ_29
AV38
SA_DQ_30
AT38
SA_DQ_31
AV13
SA_DQ_32
AT13
SA_DQ_33
AW11
SA_DQ_34
AV11
SA_DQ_35
AU15
SA_DQ_36
AT11
SA_DQ_37
BA13
SA_DQ_38
BA11
SA_DQ_39
BE10
SA_DQ_40
BD10
SA_DQ_41
BD8
SA_DQ_42
AY9
SA_DQ_43
BG10
SA_DQ_44
AW9
SA_DQ_45
BD7
SA_DQ_46
BB9
SA_DQ_47
BB5
SA_DQ_48
AY7
SA_DQ_49
AT5
SA_DQ_50
AT7
SA_DQ_51
AY6
SA_DQ_52
BB7
SA_DQ_53
AR5
SA_DQ_54
AR8
SA_DQ_55
AR9
SA_DQ_56
AN3
SA_DQ_57
AM8
SA_DQ_58
AN10
SA_DQ_59
AT9
SA_DQ_60
AN9
SA_DQ_61
AM9
SA_DQ_62
AN11
SA_DQ_63
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
DDR_A_BS0
BB19
SA_BS_0
SA_BS_1
SA_BS_2
SA_CAS#
SA_DM_0
SA_DM_1
SA_DM_2
SA_DM_3
SA_DM_4
SA_DM_5
SA_DM_6
SA_DM_7
SA_DQS_0
SA_DQS_1
SA_DQS_2
SA_DQS_3
SA_DQS_4
SA_DQS_5
SA_DQS_6
SA_DQS_7
SA_DQS#_0
SA_DQS#_1
SA_DQS#_2
SA_DQS#_3
SA_DQS#_4
SA_DQS#_5
SA_DQS#_6
SA_DQS#_7
SA_MA_0
SA_MA_1
SA_MA_2
SA_MA_3
SA_MA_4
SA_MA_5
SA_MA_6
SA_MA_7
SA_MA_8
SA_MA_9
SA_MA_10
SA_MA_11
SA_MA_12
SA_MA_13
SA_RAS#
SA_RCVEN#
DDR SYSTEM MEMORY A
DDR SYSTEM MEMORY A
SA_WE#
BK19
BF29
BL17
AT45
BD44
BD42
AW38
AW13
BG8
AY5
AN6
AT46
BE48
BB43
BC37
BB16
BH6
BB2
AP3
AT47
BD47
BC41
BA37
BA16
BH7
BC1
AP2
BJ19
BD20
BK27
BH28
BL24
BK28
BJ27
BJ25
BL28
BA28
BC19
BE28
BG30
BJ16
BE18
AY20
BA19
DDR_A_BS1
DDR_A_BS2
DDR_A_CAS#
DDR_A_DM0
DDR_A_DM1
DDR_A_DM2
DDR_A_DM3
DDR_A_DM4
DDR_A_DM5
DDR_A_DM6
DDR_A_DM7
DDR_A_DQS0
DDR_A_DQS1
DDR_A_DQS2
DDR_A_DQS3
DDR_A_DQS4
DDR_A_DQS5
DDR_A_DQS6
DDR_A_DQS7
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA1
DDR_A_MA2
DDR_A_MA3
DDR_A_MA4
DDR_A_MA5
DDR_A_MA6
DDR_A_MA7
DDR_A_MA8
DDR_A_MA9
DDR_A_MA10
DDR_A_MA11
DDR_A_MA12
DDR_A_MA13
DDR_A_RAS#
DDR_A_WE#
DDR_A_BS015,16
DDR_A_BS115,16
DDR_A_BS215,16
DDR_A_CAS#15,16
DDR_A_DM[0..7]15
DDR_A_DQS[0..7]15
DDR_A_DQS#[0..7]15
DDR_A_MA[0..13]15,16
DDR_A_RAS#15,16
T38PAD T38PAD
DDR_A_WE#15,16
DDR_B_D[0..63] 15
DDR_B_D0
DDR_B_D1
DDR_B_D2
DDR_B_D3
DDR_B_D4
DDR_B_D5
DDR_B_D6
DDR_B_D7
DDR_B_D8
DDR_B_D9
DDR_B_D10
DDR_B_D11
DDR_B_D12
DDR_B_D13
DDR_B_D14
DDR_B_D15
DDR_B_D16
DDR_B_D17
DDR_B_D18
DDR_B_D19
DDR_B_D20
DDR_B_D21
DDR_B_D22
DDR_B_D23
DDR_B_D24
DDR_B_D25
DDR_B_D26
DDR_B_D27
DDR_B_D28
DDR_B_D29
DDR_B_D30
DDR_B_D31
DDR_B_D32
DDR_B_D33
DDR_B_D34
DDR_B_D35
DDR_B_D36
DDR_B_D37
DDR_B_D38
DDR_B_D39
DDR_B_D40
DDR_B_D41
DDR_B_D42
DDR_B_D43
DDR_B_D44
DDR_B_D45
DDR_B_D46
DDR_B_D47
DDR_B_D48
DDR_B_D49
DDR_B_D50
DDR_B_D51
DDR_B_D52
DDR_B_D53
DDR_B_D54
DDR_B_D55
DDR_B_D56
DDR_B_D57
DDR_B_D58
DDR_B_D59
DDR_B_D60
DDR_B_D61
DDR_B_D62
DDR_B_D63
U20E
U20E
AP49
SB_DQ_0
AR51
SB_DQ_1
AW50
SB_DQ_2
AW51
SB_DQ_3
AN51
SB_DQ_4
AN50
SB_DQ_5
AV50
SB_DQ_6
AV49
SB_DQ_7
BA50
SB_DQ_8
BB50
SB_DQ_9
BA49
SB_DQ_10
BE50
SB_DQ_11
BA51
SB_DQ_12
AY49
SB_DQ_13
BF50
SB_DQ_14
BF49
SB_DQ_15
BJ50
SB_DQ_16
BJ44
SB_DQ_17
BJ43
SB_DQ_18
BL43
SB_DQ_19
BK47
SB_DQ_20
BK49
SB_DQ_21
BK43
SB_DQ_22
BK42
SB_DQ_23
BJ41
SB_DQ_24
BL41
SB_DQ_25
BJ37
SB_DQ_26
BJ36
SB_DQ_27
BK41
SB_DQ_28
BJ40
SB_DQ_29
BL35
SB_DQ_30
BK37
SB_DQ_31
BK13
SB_DQ_32
BE11
SB_DQ_33
BK11
SB_DQ_34
BC11
SB_DQ_35
BC13
SB_DQ_36
BE12
SB_DQ_37
BC12
SB_DQ_38
BG12
SB_DQ_39
BJ10
SB_DQ_40
BL9
SB_DQ_41
BK5
SB_DQ_42
BL5
SB_DQ_43
BK9
SB_DQ_44
BK10
SB_DQ_45
BJ8
SB_DQ_46
BJ6
SB_DQ_47
BF4
SB_DQ_48
BH5
SB_DQ_49
BG1
SB_DQ_50
BC2
SB_DQ_51
BK3
SB_DQ_52
BE4
SB_DQ_53
BD3
SB_DQ_54
BJ2
SB_DQ_55
BA3
SB_DQ_56
BB3
SB_DQ_57
AR1
SB_DQ_58
AT3
SB_DQ_59
AY2
SB_DQ_60
AY3
SB_DQ_61
AU2
SB_DQ_62
AT2
SB_DQ_63
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
DDR_B_BS0
AY17
SB_BS_0
SB_BS_1
SB_BS_2
SB_CAS#
SB_DM_0
SB_DM_1
SB_DM_2
SB_DM_3
SB_DM_4
SB_DM_5
SB_DM_6
SB_DM_7
SB_DQS_0
SB_DQS_1
SB_DQS_2
SB_DQS_3
SB_DQS_4
SB_DQS_5
SB_DQS_6
SB_DQS_7
SB_DQS#_0
SB_DQS#_1
SB_DQS#_2
SB_DQS#_3
SB_DQS#_4
SB_DQS#_5
SB_DQS#_6
SB_DQS#_7
SB_MA_0
SB_MA_1
SB_MA_2
SB_MA_3
SB_MA_4
SB_MA_5
SB_MA_6
SB_MA_7
SB_MA_8
SB_MA_9
SB_MA_10
SB_MA_11
SB_MA_12
SB_MA_13
SB_RAS#
SB_RCVEN#
SB_WE#
DDR SYSTEM MEMORY B
DDR SYSTEM MEMORY B
BG18
BG36
BE17
AR50
BD49
BK45
BL39
BH12
BJ7
BF3
AW2
AT50
BD50
BK46
BK39
BJ12
BL7
BE2
AV2
AU50
BC50
BL45
BK38
BK12
BK7
BF2
AV3
BC18
BG28
BG25
AW17
BF25
BE25
BA29
BC28
AY28
BD37
BG17
BE37
BA39
BG13
AV16
AY18
BC17
DDR_B_BS1
DDR_B_BS2
DDR_B_CAS#
DDR_B_DM0
DDR_B_DM1
DDR_B_DM2
DDR_B_DM3
DDR_B_DM4
DDR_B_DM5
DDR_B_DM6
DDR_B_DM7
DDR_B_DQS0
DDR_B_DQS1
DDR_B_DQS2
DDR_B_DQS3
DDR_B_DQS4
DDR_B_DQS5
DDR_B_DQS6
DDR_B_DQS7
DDR_B_DQS#0
DDR_B_DQS#1
DDR_B_DQS#2
DDR_B_DQS#3
DDR_B_DQS#4
DDR_B_DQS#5
DDR_B_DQS#6
DDR_B_DQS#7
DDR_B_MA0
DDR_B_MA1
DDR_B_MA2
DDR_B_MA3
DDR_B_MA4
DDR_B_MA5
DDR_B_MA6
DDR_B_MA7
DDR_B_MA8
DDR_B_MA9
DDR_B_MA10
DDR_B_MA11
DDR_B_MA12
DDR_B_MA13
DDR_B_RAS#
DDR_B_WE#
DDR_B_BS015,16
DDR_B_BS115,16
DDR_B_BS215,16
DDR_B_CAS#15,16
DDR_B_DM[0..7]15
DDR_B_DQS[0..7]15
DDR_B_DQS#[0..7]15
DDR_B_MA[0..13]15,16
DDR_B_RAS#15,16
T39PAD T39PAD
DDR_B_WE#15,16
For EA test use
76
DD
1
ET42ET42
ET37ET37
ET31ET31
ET39ET39
ET32ET32
ET44ET44
ET28ET28
ET27ET27
ET23ET23
ET26ET26
ET40ET40
DDR_A_CAS#
1
DDR_A_RAS#
1
DDR_A_WE#
1
DDR_CS0_DIMMA#
1
DDR_A_MA9
1
DDR_A_MA13
1
DDR_A_DQS0
1
DDR_A_DQS#0
1
DDR_A_D63
1
DDR_A_D55
1
DDR_A_D22
1
DDR_CS0_DIMMA#6,15,16 DDR_CS3_DIMMB#6,15,16
2
3
4
76
5
For EA test use
DDR_B_CAS#
1
ET36ET36
DDR_B_RAS#
1
ET29ET29
DDR_B_WE#
1
ET33ET33
DDR_CS3_DIMMB#
1
ET38ET38
DDR_B_MA11
1
ET35ET35
DDR_B_MA1
1
ET41ET41
DDR_B_DQS0
1
ET24ET24
DDR_B_DQS#0
1
ET25ET25
DDR_B_D6
1
ET30ET30
DDR_B_D8
1
ET34ET34
DDR_B_D41
1
ET43ET43
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
6
Date:Sheet of
COMPUTER
Crestline (DDR2)
Crestline (DDR2)
Crestline (DDR2)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
753 Friday, May 30, 2008
753 Friday, May 30, 2008
753 Friday, May 30, 2008
8
5 4 3 2
hexainf@hotmail.com
GRATIS - FOR FREE
+1.05V_VCCP
DD
+1.8V_SUS
CC
+1.05V_VCCP
BB
AA
U20G
U20G
AT35
VCC_1
AT34
VCC_2
AH28
VCC_3
AC32
VCC_5
AC31
VCC_4
AK32
VCC_6
AJ31
VCC_7
AJ28
VCC_8
AH32
VCC_9
AH31
VCC_10
AH29
VCC_11
AF32
VCC_12
R30
VCC_13
AU32
VCC_SM_1
AU33
VCC_SM_2
AU35
VCC_SM_3
AV33
VCC_SM_4
AW33
VCC_SM_5
AW35
VCC_SM_6
AY35
VCC_SM_7
BA32
VCC_SM_8
BA33
VCC_SM_9
BA35
VCC_SM_10
BB33
VCC_SM_11
BC32
VCC_SM_12
BC33
VCC_SM_13
BC35
VCC_SM_14
BD32
VCC_SM_15
BD35
VCC_SM_16
BE32
VCC_SM_17
BE33
VCC_SM_18
BE35
VCC_SM_19
BF33
VCC_SM_20
BF34
VCC_SM_21
BG32
VCC_SM_22
BG33
VCC_SM_23
BG35
VCC_SM_24
BH32
VCC_SM_25
BH34
VCC_SM_26
BH35
VCC_SM_27
BJ32
VCC_SM_28
BJ33
VCC_SM_29
BJ34
VCC_SM_30
BK32
VCC_SM_31
BK33
VCC_SM_32
BK34
VCC_SM_33
BK35
VCC_SM_34
BL33
VCC_SM_35
AU30
VCC_SM_36
R20
VCC_AXG_1
T14
VCC_AXG_2
W13
VCC_AXG_3
W14
VCC_AXG_4
Y12
VCC_AXG_5
AA20
VCC_AXG_6
AA23
VCC_AXG_7
AA26
VCC_AXG_8
AA28
VCC_AXG_9
AB21
VCC_AXG_10
AB24
VCC_AXG_11
AB29
VCC_AXG_12
AC20
VCC_AXG_13
AC21
VCC_AXG_14
AC23
VCC_AXG_15
AC24
VCC_AXG_16
AC26
VCC_AXG_17
AC28
VCC_AXG_18
AC29
VCC_AXG_19
AD20
VCC_AXG_20
AD23
VCC_AXG_21
AD24
VCC_AXG_22
AD28
VCC_AXG_23
AF21
VCC_AXG_24
AF26
VCC_AXG_25
AA31
VCC_AXG_26
AH20
VCC_AXG_27
AH21
VCC_AXG_28
AH23
VCC_AXG_29
AH24
VCC_AXG_30
AH26
VCC_AXG_31
AD31
VCC_AXG_32
AJ20
VCC_AXG_33
AN14
VCC_AXG_34
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
VCC CORE
VCC CORE
POWER
POWER
VCC SM VCC GFX
VCC SM VCC GFX
VCC_AXG_NCTF_1
VCC_AXG_NCTF_2
VCC_AXG_NCTF_3
VCC_AXG_NCTF_4
VCC_AXG_NCTF_5
VCC_AXG_NCTF_6
VCC_AXG_NCTF_7
VCC_AXG_NCTF_8
VCC_AXG_NCTF_9
VCC_AXG_NCTF_10
VCC_AXG_NCTF_11
VCC_AXG_NCTF_12
VCC_AXG_NCTF_13
VCC_AXG_NCTF_14
VCC_AXG_NCTF_15
VCC_AXG_NCTF_16
VCC_AXG_NCTF_17
VCC_AXG_NCTF_18
VCC_AXG_NCTF_19
VCC_AXG_NCTF_20
VCC_AXG_NCTF_21
VCC_AXG_NCTF_22
VCC_AXG_NCTF_23
VCC_AXG_NCTF_24
VCC_AXG_NCTF_25
VCC_AXG_NCTF_26
VCC_AXG_NCTF_27
VCC_AXG_NCTF_28
VCC_AXG_NCTF_29
VCC_AXG_NCTF_30
VCC_AXG_NCTF_31
VCC_AXG_NCTF_32
VCC_AXG_NCTF_33
VCC_AXG_NCTF_34
VCC_AXG_NCTF_35
VCC_AXG_NCTF_36
VCC_AXG_NCTF_37
VCC_AXG_NCTF_38
VCC_AXG_NCTF_39
VCC_AXG_NCTF_40
VCC_AXG_NCTF_41
VCC_AXG_NCTF_42
VCC_AXG_NCTF_43
VCC_AXG_NCTF_44
VCC_AXG_NCTF_45
VCC_AXG_NCTF_46
VCC_AXG_NCTF_47
VCC_AXG_NCTF_48
VCC_AXG_NCTF_49
VCC_AXG_NCTF_50
VCC_AXG_NCTF_51
VCC_AXG_NCTF_52
VCC_AXG_NCTF_53
VCC_AXG_NCTF_54
VCC_AXG_NCTF_55
VCC GFX NCTF
VCC GFX NCTF
VCC_AXG_NCTF_56
VCC_AXG_NCTF_57
VCC_AXG_NCTF_58
VCC_AXG_NCTF_59
VCC_AXG_NCTF_60
VCC_AXG_NCTF_61
VCC_AXG_NCTF_62
VCC_AXG_NCTF_63
VCC_AXG_NCTF_64
VCC_AXG_NCTF_65
VCC_AXG_NCTF_66
VCC_AXG_NCTF_67
VCC_AXG_NCTF_68
VCC_AXG_NCTF_69
VCC_AXG_NCTF_70
VCC_AXG_NCTF_71
VCC_AXG_NCTF_72
VCC_AXG_NCTF_73
VCC_AXG_NCTF_74
VCC_AXG_NCTF_75
VCC_AXG_NCTF_76
VCC_AXG_NCTF_77
VCC_AXG_NCTF_78
VCC_AXG_NCTF_79
VCC_AXG_NCTF_80
VCC_AXG_NCTF_81
VCC_AXG_NCTF_82
VCC_AXG_NCTF_83
VCC_SM_LF1
VCC_SM_LF2
VCC_SM_LF3
VCC_SM_LF4
VCC_SM_LF5
VCC_SM_LF6
VCC_SM_LF7
VCC SM LF
VCC SM LF
T17
T18
T19
T21
T22
T23
T25
U15
U16
U17
U19
U20
U21
U23
U26
V16
V17
V19
V20
V21
V23
V24
Y15
Y16
Y17
Y19
Y20
Y21
Y23
Y24
Y26
Y28
Y29
AA16
AA17
AB16
AB19
AC16
AC17
AC19
AD15
AD16
AD17
AF16
AF19
AH15
AH16
AH17
AH19
AJ16
AJ17
AJ19
AK16
AK19
AL16
AL17
AL19
AL20
AL21
AL23
AM15
AM16
AM19
AM20
AM21
AM23
AP15
AP16
AP17
AP19
AP20
AP21
AP23
AP24
AR20
AR21
AR23
AR24
AR26
V26
V28
V29
Y31
AW45
BC39
BE39
BD17
BD4
AW8
AT6
Layout Note:
370 mils from edge.
Layout Note:
370 mils from edge.
C192
C192
0.1U
0.1U
10
10
1 2
+
+
C114
C114
*220U_NC
*220U_NC
7343
7343
2.5
2.5
1 2
C170
C170
0.1U
0.1U
10
10
1 2
C191
C191
0.1U
0.1U
10
10
1 2
+
+
C124
C124
*220U_NC
*220U_NC
7343
7343
2.5
2.5
Layout Note:
Inside GMCH cavity for VCC_AXG.
1 2
C167
C167
0.1U
0.1U
10
10
VCCSM_LF1
VCCSM_LF2
VCCSM_LF3
VCCSM_LF4
VCCSM_LF5
VCCSM_LF6
VCCSM_LF7
1 2
+1.05V_VCCP
+
+
55
1 2
C161
C161
0.47U
0.47U
0603
0603
10
10
1 2
C219
C219
0.22U
0.22U
0603
0603
10
10
1 2
C136
C136
*220U_NC
*220U_NC
7343
7343
6.3
6.3
65
1 2
+
+
C468
C468
220U
220U
7343
7343
2.5
2.5
1 2
+
+
C477
C477
*220U_NC
*220U_NC
7343
7343
6.3
6.3
1 2
1 2
C182
C182
1U
1U
0603
0603
10
10
C158
C158
10U
10U
0603
0603
6.3
6.3
1 2
1 2
C218
C218
0.22U
0.22U
0603
0603
10
10
+3.3V_RUN
1 2
C151
C151
22U
22U
0805
0805
4
4
Layout Note:
Inside GMCH cavity.
+1.05V_VCCP
+1.05V_VCCP
1 2
C150
C150
22U
22U
0805
0805
4
4
+1.05V_VCCP
Non-iAMT
Layout Note:
Place close to GMCH edge.
1 2
C215
C215
C216
C216
1U
1U
0.47U
0.47U
0603
0603
0603
0603
10
10
10
10
R8610 R8610
1 2
1 2
C155
C155
0.22U
0.22U
0603
0603
10
10
1 2
C178
C178
0.1U
0.1U
10
10
1 2
C458
C458
22U
22U
0805
0805
4
4
1 2
C202
C202
1U
1U
0603
0603
10
10
D8
+VCC_GMCH_L
1 2
C181
C181
0.22U
0.22U
0603
0603
10
10
Layout Note:
Inside GMCH cavity.
1 2
1 2
D8
SDMK0340L-7-F
SDMK0340L-7-F
1 2
C168
C168
0.1U
0.1U
10
10
1 2
C179
C177
C177
0.1U
0.1U
10
10
C188
C188
0.22U
0.22U
0603
0603
10
10
C179
0.1U
0.1U
10
10
1 2
C187
C187
0.22U
0.22U
0603
0603
10
10
+1.8V_SUS
1 2
Layout Note:
Place C195 where LVDS
and DDR2 taps.
C204
C204
0.1U
0.1U
10
10
U20F
2 1
U20F
AB33
VCC_NCTF_1
AB36
VCC_NCTF_2
AB37
VCC_NCTF_3
AC33
VCC_NCTF_4
AC35
VCC_NCTF_5
AC36
VCC_NCTF_6
AD35
VCC_NCTF_7
AD36
VCC_NCTF_8
AF33
VCC_NCTF_9
AF36
VCC_NCTF_10
AH33
VCC_NCTF_11
AH35
VCC_NCTF_12
AH36
VCC_NCTF_13
AH37
VCC_NCTF_14
AJ33
VCC_NCTF_15
AJ35
VCC_NCTF_16
AK33
VCC_NCTF_17
AK35
VCC_NCTF_18
AK36
VCC_NCTF_19
AK37
VCC_NCTF_20
AD33
VCC_NCTF_21
AJ36
VCC_NCTF_22
AM35
VCC_NCTF_23
AL33
VCC_NCTF_24
AL35
VCC_NCTF_25
AA33
VCC_NCTF_26
AA35
VCC_NCTF_27
AA36
VCC_NCTF_28
AP35
VCC_NCTF_29
AP36
VCC_NCTF_30
AR35
VCC_NCTF_31
AR36
VCC_NCTF_32
Y32
VCC_NCTF_33
Y33
VCC_NCTF_34
Y35
VCC_NCTF_35
Y36
VCC_NCTF_36
Y37
VCC_NCTF_37
T30
VCC_NCTF_38
T34
VCC_NCTF_39
T35
VCC_NCTF_40
U29
VCC_NCTF_41
U31
VCC_NCTF_42
U32
VCC_NCTF_43
U33
VCC_NCTF_44
U35
VCC_NCTF_45
U36
VCC_NCTF_46
V32
VCC_NCTF_47
V33
VCC_NCTF_48
V36
VCC_NCTF_49
V37
VCC_NCTF_50
AL24
VCC_AXM_NCTF_1
AL26
VCC_AXM_NCTF_2
AL28
VCC_AXM_NCTF_3
AM26
VCC_AXM_NCTF_4
AM28
VCC_AXM_NCTF_5
AM29
VCC_AXM_NCTF_6
AM31
VCC_AXM_NCTF_7
AM32
VCC_AXM_NCTF_8
AM33
VCC_AXM_NCTF_9
AP29
VCC_AXM_NCTF_10
AP31
VCC_AXM_NCTF_11
AP32
VCC_AXM_NCTF_12
AP33
VCC_AXM_NCTF_13
AL29
VCC_AXM_NCTF_14
AL31
VCC_AXM_NCTF_15
AL32
VCC_AXM_NCTF_16
AR31
VCC_AXM_NCTF_17
AR32
VCC_AXM_NCTF_18
AR33
VCC_AXM_NCTF_19
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
VCC NCTF
VCC NCTF
POWER
POWER
VCC AXM NCTF
VCC AXM NCTF
55
1 2
+
+
C451
C451
220U
220U
7343
7343
2.5
2.5
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
2
Date:Sheet of
1 2
C235
C235
22U
22U
0805
0805
4
4
Layout Note:
Place on the edge.
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
Crestline (VCC,NCTF)
VM9/VM81A
VM9/VM81A
VM9/VM81A
VSS_NCTF_1
VSS_NCTF_2
VSS_NCTF_3
VSS_NCTF_4
VSS_NCTF_5
VSS_NCTF_6
VSS_NCTF_7
VSS_NCTF_8
VSS_NCTF_9
VSS_NCTF_10
VSS_NCTF_11
VSS_NCTF_12
VSS_NCTF_13
VSS_NCTF_14
VSS_NCTF_15
VSS_NCTF_16
VSS NCTF
VSS NCTF
VSS_NCTF_17
VSS_NCTF_18
VSS_NCTF_19
VSS_NCTF_20
VSS_NCTF_21
VSS_SCB1
VSS_SCB2
VSS_SCB3
VSS_SCB4
VSS_SCB5
VSS_SCB6
VSS SCB VCC AXM
VSS SCB VCC AXM
VCC_AXM_1
VCC_AXM_2
VCC_AXM_3
VCC_AXM_4
VCC_AXM_5
VCC_AXM_6
VCC_AXM_7
VCC_SM
1 2
C224
C224
22U
22U
0805
0805
4
4
1
T27
T37
U24
U28
V31
V35
AA19
AB17
AB35
AD19
AD37
AF17
AF35
AK17
AM17
AM24
AP26
AP28
AR15
AR19
AR28
A3
B2
C1
BL1
BL51
A51
+1.05V_VCCP
AT33
AT31
AK29
AK24
AK23
AJ26
AJ23
853 Tuesday, May 27, 2008
853 Tuesday, May 27, 2008
853 Tuesday, May 27, 2008
1
5 4 3 2
hexainf@hotmail.com
GRATIS - FOR FREE
+3.3V_RUN
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
+3.3V_RUN
DD
Non-iAMT
+1.25V_RUN
L15BLM11A05S
L15BLM11A05S
L16BLM11A05S
L16BLM11A05S
R147
R147
1 2
+VCCA_MPLL_L
1 2
C457
C457
22U
22U
1206
1206
CC
10
10
L33BLM18PG181SN1D
L33BLM18PG181SN1D
0603
0603
45mA MAx.
FB_120ohm+-25%_100mHz
_200mA_0.2ohm DC
+VCCA_HPLL
0603
0603
1 2
C459
C459
22U
22U
1206
1206
10
10
+VCCA_MPLL
0603
0603
0.5/F
0.5/F
0603
0603
1 2
C173
C173
0.1U
0.1U
10
10
1 2
C185
C185
0.1U
0.1U
10
10
+VCCA_CRTDAC
+1.25V_RUN
0.1Caps should be
placed 200 mils
with in its pins.
+1.25V_RUN
Non-iAMT
+1.25V_RUN
+1.25V_RUN
FB_220ohm+-25%_100MHz
_2A_0.1ohm DC
BB
22nF & 0.1uF for
VCC_TVDACA:C_R should
be placed with in 250
mils from Crestline.
+VCC_TVBG_R +VCC_TVBG
AA
2 1
TV DAC Voltage Follower Circuit -700 mV.
BLM21P221SGPT
BLM21P221SGPT
0805
0805
+VCCA_PEG_PLL
1 2
R131
R131
1/F
1/F
0603
0603
1 2
C140
C140
10U
10U
0603
0603
6.3
6.3
1 2
L14
L14
FB_180ohm+-25%_100mHz_1500mA_0.09ohm DC
L10
+3.3V_RUN
L10
BLM18PG181SN1D
BLM18PG181SN1D
0603
0603
1 2
7
R690.033/F
1 2
C81
C81
0.1U
0.1U
10
10
R49*10_NC R49*10_NC
1 2
R690.033/F
2010
2010
+3.3V_RUN +1.5V_RUN
R3700 R3700
1
3
C483
C483
2
*22nF_NC
*22nF_NC
D7
D7
+VCC_TVDAC_L
*SDMK0340L-7-F_NC
*SDMK0340L-7-F_NC
1 2
C147
C147
0.1U
0.1U
10
10
C101
C101
10U
10U
0603
0603
6.3
6.3
R3610 R3610
3
C473
C473
2
*22nF_NC
*22nF_NC
1
+VCCA_CRTDAC_R
1 2
1 2
C482
C482
0.1U
0.1U
10
10
40mA MAx.
10uH+-20%_100mA
L3210uH
L3210uH
L3110uH
L3110uH
0805
0805
0805
0805
55
65
1 2
1 2
+VCCA_DPLLA
1 2
C469
C469
+
+
220U
220U
7343
7343
2.5
2.5
+VCCA_DPLLB
1 2
C467
C467
+
+
220U
220U
7343
7343
2.5
2.5
1 2
C471
C471
0.1U
0.1U
10
10
1 2
C466
C466
0.1U
0.1U
10
10
55
1 2
C454
C454
+
+
*100U_NC
*100U_NC
7343
7343
6.3
6.3
1 2
C220
C220
22U
22U
0805
0805
4
4
+1.25V_RUN
1 2
C176
C176
0.1U
0.1U
10
10
+VCC_TVDACA +VCC_TVDACA_R
1 2
+VCC_TVDACB
1 2
1 2
1 2
C475
C475
0.1U
0.1U
10
10
C480
C480
0.1U
0.1U
10
10
C485
C485
0.1U
0.1U
10
10
C189
C189
4.7U
4.7U
0603
0603
1 2
6.3
6.3
1 2
C206
C206
1U
1U
0603
0603
10
10
Non-iAMT
1 2
C148
C148
0.1U
0.1U
10
10
R3600 R3600
1 2
123
C474
C474
*22nF_NC
*22nF_NC
R3580 R3580
1 2
123
C478
C478
*22nF_NC
*22nF_NC
R3680 R3680
1 2
123
C484
C484
*22nF_NC
*22nF_NC
+1.8V_SUS
1 2
+3.3V_RUN
1 2
C212
C212
22U
22U
0805
0805
4
4
1 2
C209
C209
1U
1U
0603
0603
10
10
+VCC_TVDACB_R
+VCC_TVDACC_R +VCC_TVDACC
C133
C133
0.1U
0.1U
10
10
1 2
C132
C132
0.1U
0.1U
10
10
1 2
1 2
C99
C99
1000P 50
1000P 50
C211
C211
22U
22U
0805
0805
4
4
C222
C222
0.1U
0.1U
10
10
+VCCA_CRTDAC_R
+VCC_TVBG_R
+VCCA_DPLLA
+VCCA_DPLLB
+VCCA_HPLL
+VCCA_MPLL
+VCC_TX_LVDS
1 2
+VCCA_PEG_PLL
+VCCA_SM
1 2
C180
C180
1U
1U
0603
0603
10
10
+VCCA_SM_CK
+VCC_TVDACA_R
+VCC_TVDACB_R
+VCC_TVDACC_R
+VCCD_TVDAC_R
+VCCQ_TVDAC_R
+VCCA_PEG_PLL
+VCCD_LVDS
+1.5V_RUN
1 2
C127
C127
1U
1U
0603
0603
10
10
R352100 R352100
1 2
U20H
U20H
J32
VCCSYNC
A33
VCCA_CRT_DAC_1
B33
VCCA_CRT_DAC_2
A30
VCCA_DAC_BG
B32
VSSA_DAC_BG
B49
VCCA_DPLLA
H49
VCCA_DPLLB
AL2
VCCA_HPLL
AM2
VCCA_MPLL
A41
VCCA_LVDS
B41
VSSA_LVDS
K50
VCCA_PEG_BG
K49
VSSA_PEG_BG
U51
VCCA_PEG_PLL
AW18
VCCA_SM_1
AV19
VCCA_SM_2
AU19
VCCA_SM_3
AU18
VCCA_SM_4
AU17
VCCA_SM_5
AT22
VCCA_SM_7
AT21
VCCA_SM_8
AT19
VCCA_SM_9
AT18
VCCA_SM_10
AT17
VCCA_SM_11
AR17
VCCA_SM_NCTF_1
AR16
VCCA_SM_NCTF_2
BC29
VCCA_SM_CK_1
BB29
VCCA_SM_CK_2
C25
VCCA_TVA_DAC_1
B25
VCCA_TVA_DAC_2
C27
VCCA_TVB_DAC_1
B27
VCCA_TVB_DAC_2
B28
VCCA_TVC_DAC_1
A28
VCCA_TVC_DAC_2
M32
VCCD_CRT
L29
VCCD_TVDAC
N28
VCCD_QDAC
AN2
VCCD_HPLL
U48
VCCD_PEG_PLL
J41
VCCD_LVDS_1
H42
VCCD_LVDS_2
1 2
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
C130
C130
*10U_NC
*10U_NC
0603
0603
6.3
6.3
+VTTLF1
+VTTLF2
+VTTLF3
1 2
C465
C465
0.1U
0.1U
10
10
+VCCQ_TVDAC
1 2
C462
C462
1U
1U
0603
0603
10
10
CRT PLL A PEG A SM TV
CRT PLL A PEG A SM TV
POWER
POWER
A CK A LVDS
A CK A LVDS
D TV/CRT LVDS
D TV/CRT LVDS
1 2
C166
C166
0.47U
0.47U
0603
0603
10
10
R3500 R3500
1 2
123
C463
C463
*22nF_NC
*22nF_NC
R3510 R3510
1 2
123
C464
C464
*22nF_NC
*22nF_NC
AXD
AXD
VCC_AXD_NCTF
SM CK
SM CK
HV
HV
VCC_RXR_DMI_1
VCC_RXR_DMI_2
DMI
DMI
1 2
C109
C109
0.47U
0.47U
0603
0603
10
10
+VCCD_TVDAC_R
+VCCQ_TVDAC_R
VTT_1
VTT_2
VTT_3
VTT_4
VTT_5
VTT_6
VTT_7
VTT_8
VTT_9
VTT_10
VTT_11
VTT_12
VTT_13
VTT_14
VTT
VTT
VTT_15
VTT_16
VTT_17
VTT_18
VTT_19
VTT_20
VTT_21
VTT_22
VCC_AXD_1
VCC_AXD_2
VCC_AXD_3
VCC_AXD_4
VCC_AXD_5
VCC_AXD_6
VCC_AXF_1
VCC_AXF_2
VCC_AXF_3
AXF
AXF
VCC_DMI
VCC_SM_CK_1
VCC_SM_CK_2
VCC_SM_CK_3
VCC_SM_CK_4
VCC_TX_LVDS
VCC_HV_1
VCC_HV_2
VCC_PEG_1
VCC_PEG_2
VCC_PEG_3
VCC_PEG_4
VCC_PEG_5
PEG
PEG
VTTLF1
VTTLF2
VTTLF3
VTTLF
VTTLF
1 2
C108
C108
0.47U
0.47U
0603
0603
10
10
U13
U12
U11
U9
U8
U7
U5
U3
U2
U1
T13
T11
T10
T9
T7
T6
T5
T3
T2
R3
R2
R1
AT23
AU28
AU24
AT29
AT25
AT30
AR29
B23
B21
A21
AJ50
BK24
BK23
BJ24
BJ23
A43
C40
B40
AD51
W50
W51
V49
V50
AH50
AH51
A7
F2
AH1
+VCC_SM_CK
+VCC_TX_LVDS
+3.3V_RUN
+VCC_RXR_DMI
+VTTLF1
+VTTLF2
+VTTLF3
+1.05V_VCCP
1 2
C137
C137
2.2U
2.2U
0603
0603
6.3
6.3
1 2
C134
C134
4.7U
4.7U
0603
0603
6.3
6.3
Place on the edge.
C138
C138
0.47U
0.47U
6.3
6.3
1 2
C157
C157
4.7U
4.7U
0603
0603
6.3
6.3
1 2
Place on the edge.
+VCC_AXD_L +VCC_AXD_R
C201
C201
1U
1U
0603
0603
10
10
+1.25V_RUN
65
55
1 2
C242
C242
22U
22U
1206
1206
10
10
Place caps close
to VCC_AXD.
C105
C105
1 2
1000P
1000P
50
50
+VCC_PEG
1 2
+
+
C460
C460
220U
220U
7343
7343
2.5
2.5
1 2
+
+
C455
C455
*220U_NC
*220U_NC
7343
7343
4
4
+VCC_SM_CK
1 2
C245
C245
22U
22U
1206
1206
10
10
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
1 2
1 2
C106
C106
0.1U
0.1U
10
10
2
+1.05V_VCCP
65
1 2
+
+
C461
C461
220U
220U
7343
7343
2.5
2.5
Reserved L81 pad for
inductor.
+1.25V_RUN
1 2
C230
C230
0.1U
0.1U
10
10
NonÂiAMT
+1.25V_RUN
55
R8701206R8701206
1 2
For EMI
fine tune.
R34901206R34901206
1 2
For EMI
fine tune.
R34801206R34801206
1 2
For EMI
fine tune.
R18401206R18401206
1 2
R183
R183
1/F
1/F
0603
0603
+VCC_SM_CK_L
1 2
C246
C246
10U
10U
0603
0603
6.3
6.3
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
Crestline (POWER)
Crestline (POWER)
Crestline (POWER)
VM9/VM81A
VM9/VM81A
VM9/VM81A
1 2
1 2
C476
C476
*220U_NC
*220U_NC
+
+
7343
7343
4
4
1 2
C146
C146
10U
10U
0603
0603
6.3
6.3
1 2
C456
C456
10U
10U
0603
0603
6.3
6.3
C221
C221
0.1U
0.1U
10
10
1
VCC_HV
D9
D9
*SDMK0340L-7-F_NC
*SDMK0340L-7-F_NC
1 2
Place caps close
to VCC_AXF
+1.05V_VCCP
+1.05V_VCCP
1 2
For EMI
fine tune.
1
C117
C117
1U
1U
0603
0603
10
10
+1.8V_SUS
+1.05V_VCCP
2 1
1 2
+3.3V_RUN
+1.25V_RUN
1 2
+1.8V_SUS
953 Monday, June 02, 2008
953 Monday, June 02, 2008
953 Monday, June 02, 2008
+VCC_HV_L
R89
R89
*10_NC
*10_NC
C111
C111
10U
10U
0603
0603
6.3
6.3
5 4 3 2
hexainf@hotmail.com
GRATIS - FOR FREE
U20J
U20I
U20I
A13
VSS_1
A15
VSS_2
A17
VSS_3
A24
VSS_4
AA21
VSS_5
AA24
VSS_6
AA29
VSS_7
DD
CC
BB
AA
AB20
VSS_8
AB23
VSS_9
AB26
VSS_10
AB28
VSS_11
AB31
VSS_12
AC10
VSS_13
AC13
VSS_14
AC3
VSS_15
AC39
VSS_16
AC43
VSS_17
AC47
VSS_18
AD1
VSS_19
AD21
VSS_20
AD26
VSS_21
AD29
VSS_22
AD3
VSS_23
AD41
VSS_24
AD45
VSS_25
AD49
VSS_26
AD5
VSS_27
AD50
VSS_28
AD8
VSS_29
AE10
VSS_30
AE14
VSS_31
AE6
VSS_32
AF20
VSS_33
AF23
VSS_34
AF24
VSS_35
AF31
VSS_36
AG2
VSS_37
AG38
VSS_38
AG43
VSS_39
AG47
VSS_40
AG50
VSS_41
AH3
VSS_42
AH40
VSS_43
AH41
VSS_44
AH7
VSS_45
AH9
VSS_46
AJ11
VSS_47
AJ13
VSS_48
AJ21
VSS_49
AJ24
VSS_50
AJ29
VSS_51
AJ32
VSS_52
AJ43
VSS_53
AJ45
VSS_54
AJ49
VSS_55
AK20
VSS_56
AK21
VSS_57
AK26
VSS_58
AK28
VSS_59
AK31
VSS_60
AK51
VSS_61
AL1
VSS_62
AM11
VSS_63
AM13
VSS_64
AM3
VSS_65
AM4
VSS_66
AM41
VSS_67
AM45
VSS_68
AN1
VSS_69
AN38
VSS_70
AN39
VSS_71
AN43
VSS_72
AN5
VSS_73
AN7
VSS_74
AP4
VSS_75
AP48
VSS_76
AP50
VSS_77
AR11
VSS_78
AR2
VSS_79
AR39
VSS_80
AR44
VSS_81
AR47
VSS_82
AR7
VSS_83
AT10
VSS_84
AT14
VSS_85
AT41
VSS_86
AT49
VSS_87
AU1
VSS_88
AU23
VSS_89
AU29
VSS_90
AU3
VSS_91
AU36
VSS_92
AU49
VSS_93
AU51
VSS_94
AV39
VSS_95
AV48
VSS_96
AW1
VSS_97
AW12
VSS_98
AW16
VSS_99
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
VSS
VSS
VSS_100
VSS_101
VSS_102
VSS_103
VSS_104
VSS_105
VSS_106
VSS_107
VSS_108
VSS_109
VSS_110
VSS_111
VSS_112
VSS_113
VSS_114
VSS_115
VSS_116
VSS_117
VSS_118
VSS_119
VSS_120
VSS_121
VSS_122
VSS_123
VSS_124
VSS_125
VSS_126
VSS_127
VSS_128
VSS_129
VSS_130
VSS_131
VSS_132
VSS_133
VSS_134
VSS_135
VSS_136
VSS_137
VSS_138
VSS_139
VSS_140
VSS_141
VSS_142
VSS_143
VSS_144
VSS_145
VSS_146
VSS_147
VSS_148
VSS_149
VSS_150
VSS_151
VSS_152
VSS_153
VSS_154
VSS_155
VSS_156
VSS_157
VSS_158
VSS_159
VSS_160
VSS_161
VSS_162
VSS_163
VSS_164
VSS_165
VSS_166
VSS_167
VSS_168
VSS_169
VSS_170
VSS_171
VSS_172
VSS_173
VSS_174
VSS_175
VSS_176
VSS_177
VSS_178
VSS_179
VSS_180
VSS_181
VSS_182
VSS_183
VSS_184
VSS_185
VSS_186
VSS_187
VSS_188
VSS_189
VSS_190
VSS_191
VSS_192
VSS_193
VSS_194
VSS_195
VSS_196
VSS_197
VSS_198
AW24
AW29
AW32
AW5
AW7
AY10
AY24
AY37
AY42
AY43
AY45
AY47
AY50
B10
B20
B24
B29
B30
B35
B38
B43
B46
B5
B8
BA1
BA17
BA18
BA2
BA24
BB12
BB25
BB40
BB44
BB49
BB8
BC16
BC24
BC25
BC36
BC40
BC51
BD13
BD2
BD28
BD45
BD48
BD5
BE1
BE19
BE23
BE30
BE42
BE51
BE8
BF12
BF16
BF36
BG19
BG2
BG24
BG29
BG39
BG48
BG5
BG51
BH17
BH30
BH44
BH46
BH8
BJ11
BJ13
BJ38
BJ4
BJ42
BJ46
BK15
BK17
BK25
BK29
BK36
BK40
BK44
BK6
BK8
BL11
BL13
BL19
BL22
BL37
BL47
C12
C16
C19
C28
C29
C33
C36
C41
U20J
C46
VSS_199
C50
VSS_200
C7
VSS_201
D13
VSS_202
D24
VSS_203
D3
VSS_204
D32
VSS_205
D39
VSS_206
D45
VSS_207
D49
VSS_208
E10
VSS_209
E16
VSS_210
E24
VSS_211
E28
VSS_212
E32
VSS_213
E47
VSS_214
F19
VSS_215
F36
VSS_216
F4
VSS_217
F40
VSS_218
F50
VSS_219
G1
VSS_220
G13
VSS_221
G16
VSS_222
G19
VSS_223
G24
VSS_224
G28
VSS_225
G29
VSS_226
G33
VSS_227
G42
VSS_228
G45
VSS_229
G48
VSS_230
G8
VSS_231
H24
VSS_232
H28
VSS_233
H4
VSS_234
H45
VSS_235
J11
VSS_236
J16
VSS_237
J2
VSS_238
J24
VSS_239
J28
VSS_240
J33
VSS_241
J35
VSS_242
J39
VSS_243
K12
VSS_245
K47
VSS_246
K8
VSS_247
L1
VSS_248
L17
VSS_249
L20
VSS_250
L24
VSS_251
L28
VSS_252
L3
VSS_253
L33
VSS_254
L49
VSS_255
M28
VSS_256
M42
VSS_257
M46
VSS_258
M49
VSS_259
M5
VSS_260
M50
VSS_261
M9
VSS_262
N11
VSS_263
N14
VSS_264
N17
VSS_265
N29
VSS_266
N32
VSS_267
N36
VSS_268
N39
VSS_269
N44
VSS_270
N49
VSS_271
N7
VSS_272
P19
VSS_273
P2
VSS_274
P23
VSS_275
P3
VSS_276
P50
VSS_277
R49
VSS_278
T39
VSS_279
T43
VSS_280
T47
VSS_281
U41
VSS_282
U45
VSS_283
U50
VSS_284
V2
VSS_285
V3
VSS_286
LE82GM965-SLA5T-MM#891181
LE82GM965-SLA5T-MM#891181
VSS
VSS
VSS_287
VSS_288
VSS_289
VSS_290
VSS_291
VSS_292
VSS_293
VSS_294
VSS_295
VSS_296
VSS_297
VSS_298
VSS_299
VSS_300
VSS_301
VSS_302
VSS_303
VSS_304
VSS_305
VSS_306
VSS_307
VSS_308
VSS_309
VSS_310
VSS_311
VSS_312
VSS_313
W11
W39
W43
W47
W5
W7
Y13
Y2
Y41
Y45
Y49
Y5
Y50
Y11
P29
T29
T31
T33
R28
AA32
AB32
AD32
AF28
AF29
AT27
AV25
H50
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
2
Date:Sheet of
COMPUTER
Crestline (VSS)
Crestline (VSS)
Crestline (VSS)
VM9/VM81A
VM9/VM81A
VM9/VM81A
1
1053 Tuesday, May 27, 2008
1053 Tuesday, May 27, 2008
1053 Tuesday, May 27, 2008
1
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
7
8
R218
R218
*56_NC
*56_NC
1153 Thursday, June 12, 2008
1153 Thursday, June 12, 2008
1153 Thursday, June 12, 2008
+1.05V_VCCP
R22356R223
56
1 2
R337
R337
10K
10K
1 2
8
1 2
+3.3V_RUN
1 2
R22456R224
56
R338
R338
10K
10K
+RTC_CELL +RTC_CELL
1 2
R231
R231
332K/F
332K/F
ICH_INTVRMEN ICH_LAN100_SLP
R236
R236
*0_NC
*0_NC
ICH8M LAN100 SLP Strap
Low = Internal VR Disabled
High = Internal VR Enabled(Default)
AG25
RTCX1
AF24
RTCX2
AF23
RTCRST#
AD22
INTRUDER#
AF25
INTVRMEN
AD21
LAN100_SLP
B24
GLAN_CLK
D22
LAN_RSTSYNC
C21
LAN_RXD0
B21
LAN_RXD1
C22
LAN_RXD2
D21
LAN_TXD0
E20
LAN_TXD1
C20
LAN_TXD2
AH21
GLAN_DOCK#/GPIO13
D25
GLAN_COMPI
C25
GLAN_COMPO
AJ16
HDA_BIT_CLK
AJ15
HDA_SYNC
AE14
HDA_RST#
AJ17
HDA_SDIN0
AH17
HDA_SDIN1
AH15
HDA_SDIN2
AD13
HDA_SDIN3
AE13
1 2
1 2
HDA_SDOUT
AE10
HDA_DOCK_EN#/GPIO33
AG14
HDA_DOCK_RST#/GPIO34
AF10
SATALED#
AF6
SATA0RXN
AF5
SATA0RXP
AH5
SATA0TXN
AH6
SATA0TXP
AG3
SATA1RXN
AG4
SATA1RXP
AJ4
SATA1TXN
AJ3
SATA1TXP
AF2
SATA2RXN
AF1
SATA2RXP
AE4
SATA2TXN
AE3
SATA2TXP
AB7
SATA_CLKN
AC6
SATA_CLKP
AG1
SATARBIAS#
AG2
SATARBIAS
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
U19A
U19A
+3.3V_RUN
1 2
1 2
R189
R189
*1K_NC
*1K_NC
ACZ_SDOUT
R326
R326
*1K_NC
*1K_NC
RTC
RTC
LAN / GLAN
LAN / GLAN
IHDA
IHDA
SATA
SATA
(Internal VR for VccLAN1.05 and VccCL1.05)
ICH_LAN100_SLP
FWH0/LAD0
FWH1/LAD1
FWH2/LAD2
FWH3/LAD3
FWH4/LFRAME#
LPC
LPC
LDRQ0#
LDRQ1#/GPIO23
A20GATE
A20M#
DPRSTP#
DPSLP#
FERR#
CPUPWRGD/GPIO49
IGNNE#
INIT#
INTR
CPU
CPU
RCIN#
SMI#
STPCLK#
THRMTRIP#
DD10
DD11
DD12
DD13
DD14
DD15
IDE
IDE
DCS1#
DCS3#
DIOR#
DIOW#
DDACK#
IDEIRQ
IORDY
DDREQ
ICH_RSVD13
DD0
DD1
DD2
DD3
DD4
DD5
DD6
DD7
DD8
DD9
DA0
DA1
DA2
1 2
R227
R227
332K/F
332K/F
H_DPRSTP#
H_DPSLP#
R210
R210
*0_NC
*0_NC
Low = Internal VR Disabled
High = Internal VR Enabled(Default)
E5
F5
G8
F6
C4
G9
E6
AF13
AG26
AF26
AE26
AD24
AG29
AF27
AE24
AC20
AH14
AD23
NMI
AG28
AA24
AE27
AA23
TP8
V1
U2
V3
T1
V4
T5
AB2
T6
T3
R2
T4
V6
V5
U1
V2
U6
AA4
AA1
AB3
Y6
Y5
W4
W3
Y2
IDE_IRQ
Y3
IDE_DIORDY
Y1
W5
SIO_A20GATE
H_DPRSTP#
H_DPSLP#
H_FERR#
SIO_RCIN#
THERMTRIP#_ICH
T115 PAD T115 PAD
T111 PAD T111 PAD
T113 PAD T113 PAD
T109 PAD T109 PAD
T110 PAD T110 PAD
T71 PAD T71 PAD
T121 PAD T121 PAD
T70 PAD T70 PAD
T107 PAD T107 PAD
T105 PAD T105 PAD
T72 PAD T72 PAD
T64 PAD T64 PAD
T62 PAD T62 PAD
T112 PAD T112 PAD
T114 PAD T114 PAD
T68 PAD T68 PAD
T58 PAD T58 PAD
T120 PAD T120 PAD
T119 PAD T119 PAD
T67 PAD T67 PAD
T60 PAD T60 PAD
T116 PAD T116 PAD
T117 PAD T117 PAD
T118 PAD T118 PAD
6
T85 PAD T85 PAD
T88 PAD T88 PAD
T65 PAD T65 PAD
T66 PAD T66 PAD
LPC_LAD023,26
LPC_LAD123,26
LPC_LAD223,26
LPC_LAD323,26
LPC_LFRAME#23,26
SIO_A20GATE23
H_A20M#3
H_DPRSTP#3,6,39
H_DPSLP#3
H_FERR#3
H_PWRGOOD3
H_IGNNE#3
H_INIT#3
H_INTR3
SIO_RCIN#23
H_NMI3
H_SMI#3
H_STPCLK#3
R2358.2K R2358.2K
R3194.7K R3194.7K
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
H_FERR#
THERMTRIP#_ICH
1 2
1 2
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
COMPUTER
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
ICH8-M (CPU,IDE,SATA,LPC,AC97,LAN)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
+3.3V_RUN
R222
R222
*56_NC
*56_NC
1 2
SIO_A20GATE
SIO_RCIN#
1 2
W2
W2
1 4
2 3
32.768KHZ
32.768KHZ
R202
R202
20K
20K
1 2
ICH_RTCRST#
ICH_INTRUDER#
1 2
C266
C266
1U
1U
0603
0603
10
10
R32210M R32210M
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
1 2
ICH_RTCX2 ICH_RTCX1
Reserved for
Intel Nineveh
design.
+1.5V_PCIE_ICH
ICH_AZ_CODEC_SDIN0 32
CLK_PCIE_SATA# 17
Place within 500mils
of ICH8 ball
CLK_PCIE_SATA 17
1 2
C439
C439
12P
12P
50
50
T99
T99
PAD
PAD
T100
T100
PAD
PAD
T101
T101
PAD
PAD
T93
T93
PAD
PAD
T92
T92
PAD
PAD
T82
T82
PAD
PAD
T94PAD T94PAD
R325*10K_NC R325*10K_NC
+3.3V_SUS
+3.3V_SUS
SATA_ACT# 30
SATA_RX0- 28
SATA_RX0+ 28
SATA_RX1- 28
SATA_RX1+ 28
1 2
R27224.9/F R27224.9/F
1 2
T127
T127
PAD
PAD
T124
T124
PAD
PAD
T56
T56
PAD
PAD
R209*10K_NC R209*10K_NC
R331*10K_NC R331*10K_NC
T51
T51
PAD
PAD
T50
T50
PAD
PAD
R32124.9/F R32124.9/F
1 2
XOR Chain Entrance Strap
ICH RSVDHDA SDOUT
0
0
1
1
0
1
0
1
ICH8M Internal VR Enable Strap
(Internal VR for VccSus1.05, VccSus1.5, VccCL1.5)
ICH_INTVRMEN
ICH_RTCX1
ICH_RTCX2
ICH_RTCRST#
ICH_INTRUDER#
ICH_INTVRMEN
ICH_LAN100_SLP
GLAN_CLK
LAN_RXD0
LAN_RXD1
LAN_RXD2
LAN_TXD0
LAN_TXD1
LAN_TXD2
GLAN_COMP
ACZ_BIT_CLK
ACZ_SYNC
ACZ_RST#
ACZ_SDOUT
SATA_TX0-_C
SATA_TX0+_C
SATA_TX1-_C
SATA_TX1+_C
SATABIAS
Description
RSVD
Enter XOR Chain
Normal Operation (Default)
Set PCIE port config bit 1
32.768KHZ
1 2
C440
AA
C440
12P
12P
50
50
+RTC_CELL
1 2
R2251MR225
1M
38
R32833 R32833
L37
L37
22uH
22uH
0402
0402
R32933 R32933
R19933 R19933
R20033 R20033
SATA_TX0-_C
SATA_TX0+_C
SATA_TX1-_C
SATA_TX1+_C
1 2
1 2
1 2
1 2
ICH_AZ_CODEC_BITCLK 32
BB
1 2
C445
C445
27P
27P
1 2
50
50
ICH_AZ_CODEC_SYNC 32
ICH_AZ_CODEC_RST# 23,32
ICH_AZ_CODEC_SDOUT 32
Place all series terms close to ICH8 except for SDIN input
lines,which should be close to source.
CC
SATA_TX0- 28
SATA_TX0+ 28
SATA_TX1- 28
SATA_TX1+ 28
Distance between the ICH-8 M and cap on the "P"
signal should be identical distance between the
ICH-8 M and cap on the "N" signal for same pair.
DD
C4333900P 25C4333900P 25
C4323900P 25C4323900P 25
C4293900P 25C4293900P 25
C4303900P 25C4303900P 25
1 2
1 2
1 2
1 2
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
U19D
Place TX DC blocking caps close ICH8.
MiniWWAN
C3230.1U 10C3230.1U 10
PCIE_TX2- 26
PCIE_TX2+ 26
PCIE_TX6-/GLAN_TX- 34
AA
PCIE_TX6+/GLAN_TX+ 34
For EA test use
PCIE_RX2+
1
ET45ET45
PCIE_RX6-/GLAN_RX-
1
ET51ET51
PCIE_RX6+/GLAN_RX+
1
ET50ET50
ICH_SPI_CS1#_R
PCI_GNT0#
BB
WWAN Noise - ICH improvements
OC3#
OC6#
OC4#
OC5#
OC7#
OC8#
OC2#
USB_OC0_1#
OC9#
1 2
R264
R264
*1K_NC
*1K_NC
1 2
C249*0.1U_NC 10C249*0.1U_NC 10
1 2
C253*0.1U_NC 10C253*0.1U_NC 10
1 2
C251*0.1U_NC 10C251*0.1U_NC 10
1 2
C436*0.1U_NC 10C436*0.1U_NC 10
1 2
C435*0.1U_NC 10C435*0.1U_NC 10
1 2
C252*0.1U_NC 10C252*0.1U_NC 10
1 2
C441*0.1U_NC 10C441*0.1U_NC 10
1 2
C431*0.1U_NC 10C431*0.1U_NC 10
1 2
C434*0.1U_NC 10C434*0.1U_NC 10
1 2
1 2
C3240.1U 10C3240.1U 10
1 2
C3330.1U 10C3330.1U 10
1 2
C3260.1U 10C3260.1U 10
1 2
76
Boot BIOS Strap
R259
R259
*1K_NC
*1K_NC
11 LPC
PCI
SPI1001
PCIE_TXN2_C
PCIE_TXP2_C
GLAN_TXN_C
GLAN_TXP_C
GNT0#SPI_CS1#
No stuff
No stuff
No stuff
Stuff
Stuff
No stuff
Non-iAMT
OC6#
OC2# OC5#
OC8#
OC4#
+3.3V_SUS
OC3#
PCIE_RX2- 26
PCIE_RX2+ 26
MiniWLAN
MiniWPAN
Express Card
PCIE_RX6-/GLAN_RX- 34
PCIE_RX6+/GLAN_RX+ 34
10/100 LOM
T91PAD T91PAD
T98PAD T98PAD
T87PAD T87PAD
T95PAD T95PAD
USB_OC0_1# 27
RP41
RP41
6
7
8
9
10
10KX8
10KX8
R18810K R18810K
1 2
+3.3V_SUS
5
4
3
2
1
PCIE_TXN2_C
PCIE_TXP2_C
GLAN_TXN_C
GLAN_TXP_C
ICH_SPI_CS1#_R
USB_OC0_1#
OC2#
OC3#
OC4#
OC5#
OC6#
OC7#
OC8#
OC9#
OC7#
OC9#
USB_OC0_1#
+3.3V_SUS
U19D
P27
PERN1
P26
PERP1
N29
PETN1
N28
PETP1
M27
PERN2
M26
PERP2
L29
PETN2
L28
PETP2
K27
PERN3
K26
PERP3
J29
PETN3
J28
PETP3
H27
PERN4
H26
PERP4
G29
PETN4
G28
PETP4
F27
PERN5
F26
PERP5
E29
PETN5
E28
PETP5
D27
PERN6/GLAN_RXN
D26
PERP6/GLAN_RXP
C29
PETN6/GLAN_TXN
C28
PETP6/GLAN_TXP
C23
SPI_CLK
B23
SPI_CS0#
E22
SPI_CS1#
D23
SPI_MOSI
F21
SPI_MISO
AJ19
OC0#
AG16
OC1#/GPIO40
AG15
OC2#/GPIO41
AE15
OC3#/GPIO42
AF15
OC4#/GPIO43
AG17
OC5#/GPIO29
AD12
OC6#/GPIO30
AJ18
OC7#/GPIO31
AD14
OC8#
AH18
OC9#
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
Short F2 and F3 at the package
and keep length to less than
500mils. Trace Impedance
should be 60ohms +/- 15%.
USB
USB
PCI-Express
PCI-Express
Direct Media Interface
Direct Media Interface
DMI_ZCOMP
DMI_IRCOMP
SPI
SPI
USBRBIAS#
DMI0RXN
DMI0RXP
DMI0TXN
DMI0TXP
DMI1RXN
DMI1RXP
DMI1TXN
DMI1TXP
DMI2RXN
DMI2RXP
DMI2TXN
DMI2TXP
DMI3RXN
DMI3RXP
DMI3TXN
DMI3TXP
DMI_CLKN
DMI_CLKP
USBP0N
USBP0P
USBP1N
USBP1P
USBP2N
USBP2P
USBP3N
USBP3P
USBP4N
USBP4P
USBP5N
USBP5P
USBP6N
USBP6P
USBP7N
USBP7P
USBP8N
USBP8P
USBP9N
USBP9P
USBRBIAS
V27
V26
U29
U28
Y27
Y26
W29
W28
AB26
AB25
AA29
AA28
AD27
AD26
AC29
AC28
T26
T25
Y23
Y24
G3
G2
H5
H4
H2
H1
J3
J2
K5
K4
K2
K1
L3
L2
M5
M4
M2
M1
N3
N2
F2
F3
DMI_COMP
USBRBIAS
DMI_MTX_IRX_N06
DMI_MTX_IRX_P06
DMI_MRX_ITX_N06
DMI_MRX_ITX_P06
DMI_MTX_IRX_N16
DMI_MTX_IRX_P16
DMI_MRX_ITX_N16
DMI_MRX_ITX_P16
DMI_MTX_IRX_N26
DMI_MTX_IRX_P26
DMI_MRX_ITX_N26
DMI_MRX_ITX_P26
DMI_MTX_IRX_N36
DMI_MTX_IRX_P36
DMI_MRX_ITX_N36
DMI_MRX_ITX_P36
CLK_PCIE_ICH#17
CLK_PCIE_ICH17
R24224.9/F R24224.9/F
1 2
ICH_USBP0-27
ICH_USBP0+27
ICH_USBP1-27
ICH_USBP1+27
ICH_USBP4-18
ICH_USBP4+18
ICH_USBP6-26
ICH_USBP6+26
ICH_USBP8-26
ICH_USBP8+26
R260
R260
22.6/F
22.6/F
1 2
+1.5V_PCIE_ICH
Place within 500mils of ICH8
Side pair Top / left
T78 PAD T78 PAD
T102 PAD T102 PAD
T76 PAD T76 PAD
T77 PAD T77 PAD
T104 PAD T104 PAD
T103 PAD T103 PAD
T74 PAD T74 PAD
T73 PAD T73 PAD
T106 PAD T106 PAD
T108 PAD T108 PAD
Side pair bottom / right
Pair 1 top / left
Pair 1 bottom / right
Camera
Mini Card (WWAN)
Bluetooth
Express Card
Mini Card (WLAN)
Biometric
PCI Pullups
8
PCI_STOP#
PCI_PIRQD#
+3.3V_RUN
PCI_PIRQE#
PCI_REQ0#
PCI_PLOCK#
PCI_PERR#
+3.3V_RUN
PCI_REQ2#
PCI_REQ3#
7
RP40
RP40
6
7
8
9
10
8.2KX8
8.2KX8
RP39
RP39
6
7
8
9
10
8.2KX8
8.2KX8
R2798.2K R2798.2K
R3108.2K R3108.2K
1 2
1 2
5
4
3
2
1
5
4
3
2
1
+3.3V_RUN
PCI_FRAME# PCI_DEVSEL#
ICH_IRQH_GPIO5 PCI_REQ1#
PCI_TRDY#
PCI_SERR#
+3.3V_RUN
PCI_PIRQC#
PCI_PIRQB#
PCI_PIRQA#
PCI_IRDY#
+3.3V_RUN
8
U19B
PCI_AD[0..31] 20,25
CC
DD
PCI_PIRQA# 20
PCI_PIRQB# 20
PCI_PIRQD# 25
PCI_AD0
PCI_AD1
PCI_AD2
PCI_AD3
PCI_AD4
PCI_AD5
PCI_AD6
PCI_AD7
PCI_AD8
PCI_AD9
PCI_AD10
PCI_AD11
PCI_AD12
PCI_AD13
PCI_AD14
PCI_AD15
PCI_AD16
PCI_AD17
PCI_AD18
PCI_AD19
PCI_AD20
PCI_AD21
PCI_AD22
PCI_AD23
PCI_AD24
PCI_AD25
PCI_AD26
PCI_AD27
PCI_AD28
PCI_AD29
PCI_AD30
PCI_AD31
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQC#
PCI_PIRQD#
U19B
D20
AD0
E19
D19
A20
D17
A21
A19
C19
A18
B16
A12
E16
A14
G16
A15
B6
C11
A9
D11
B12
C12
D10
C7
F13
E11
E13
E12
D8
A6
E8
D6
A3
F9
B5
C5
A10
PCI
PCI
AD1
AD2
AD3
AD4
AD5
AD6
AD7
AD8
AD9
AD10
AD11
AD12
AD13
AD14
AD15
AD16
AD17
AD18
AD19
AD20
AD21
AD22
AD23
AD24
AD25
AD26
AD27
AD28
AD29
AD30
AD31
Interrupt I/F
Interrupt I/F
PIRQA#
PIRQB#
PIRQC#
PIRQD#
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
REQ0#
GNT0#
REQ1#/GPIO50
GNT1#/GPIO51
REQ2#/GPIO52
GNT2#/GPIO53
REQ3#/GPIO54
GNT3#/GPIO55
C/BE0#
C/BE1#
C/BE2#
C/BE3#
IRDY#
PAR
PCIRST#
DEVSEL#
PERR#
PLOCK#
SERR#
STOP#
TRDY#
FRAME#
PLTRST#
PCICLK
PME#
PIRQE#/GPIO2
PIRQF#/GPIO3
PIRQG#/GPIO4
PIRQH#/GPIO5
PCI_REQ0#
A4
PCI_GNT0#
D7
PCI_REQ1#
E18
PCI_GNT1#
C18
PCI_REQ2#
B19
PCI_GNT2#
F18
PCI_REQ3#
A11
PCI_GNT3#
C10
C17
E15
F16
E17
PCI_IRDY#
C8
D9
PCI_RST#_G
G6
PCI_DEVSEL#
D16
PCI_PERR#
A7
PCI_PLOCK#
B7
PCI_SERR#
F10
PCI_STOP#
C16
PCI_TRDY#
C9
PCI_FRAME#
A17
PCI_PLTRST#
AG24
CLK_PCI_ICH CLK_PCI_ICH
B10
G7
PCI_PIRQE#
F8
SB_WLAN_PCIE_RST#
G11
SB_NB_PCIE_RST#
F12
ICH_IRQH_GPIO5
B3
PCI_REQ0#20
PCI_GNT0#20
PCI_REQ1#25
PCI_GNT1#25
T86 PAD T86 PAD
T89 PAD T89 PAD
PCI_C_BE0#20,25
PCI_C_BE1#20,25
PCI_C_BE2#20,25
PCI_C_BE3#20,25
PCI_IRDY#20,25
PCI_PAR20,25
PCI_DEVSEL#20,25
PCI_PERR#20,25
PCI_PLOCK#
PCI_SERR#20,25
PCI_STOP#20,25
PCI_TRDY#20,25
PCI_FRAME#20,25
CLK_PCI_ICH17
ICH_PME#20,23,25
PCI_PIRQE#25
SB_WLAN_PCIE_RST#26
SB_NB_PCIE_RST#6 PCI_PIRQC# 20
T96 PAD T96 PAD
A16 away override strap.
SB_NB_PCIE_RST#
For EA test use
PCI_AD1
1
ET47ET47
PCI_AD3
1
ET60ET60
PCI_AD7
1
ET55ET55
PCI_AD14
1
ET59ET59
PCI_AD29
1
ET48ET48
PCI_AD13
1
ET46ET46
PCI_AD19
1
ET57ET57
PCI_IRDY#
1
ET53ET53
PCI_TRDY#
1
ET56ET56
PCI_FRAME#
1
ET58ET58
PCI_STOP#
1
ET54ET54
PCI_DEVSEL#
1
ET52ET52
PCI_GNT0#
1
ET49ET49
PCI_REQ0#
1
ET61ET61
PCI_GNT3#
1 2
Low = A16 swap override enabled.
High = Default.
Reserved for
EMI.Place
resister and cap
close to ICH.
R271
R271
*1K_NC
*1K_NC
R275
R275
*10_NC
*10_NC
C344
C344
*8.2P_NC
*8.2P_NC
6
Non-iAMT
C335
C335
0.047U 10
0.047U 10
PCI_RST#_G
C247
C247
0.047U 10
0.047U 10
PCI_PLTRST#
1 2
1 2
16
16
SB_WLAN_PCIE_RST#
SB_NB_PCIE_RST#
BIOS should not enable the
internal GPIO pull up resistor.
+3.3V_SUS
1 2
5
U14
U14
2
1
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
+3.3V_SUS
1 2
5
U13
U13
2
1
TC7SZ32FU(T5L,F,T)
TC7SZ32FU(T5L,F,T)
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
COMPUTER
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
ICH8-M (USB,DMI,PCIE,PCI)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
R25720K R25720K
R26320K R26320K
Add Buffers as needed for
Loading and fanout concerns.
4
4
1 2
1 2
PCI_RST#20,25
PLTRST#6,23,26,34
1253 Friday, May 30, 2008
1253 Friday, May 30, 2008
1253 Friday, May 30, 2008
8
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
7
8
+3.3V_SUS
RP23
RP23
1
3
2.2KX2
2.2KX2
AA
+3.3V_SUS
1
3
ICH_SMBCLKICH_SMLINK0
ICH_SMBDATAICH_SMLINK1
+3.3V_RUN
R340
R340
8.2K
8.2K
1 2
1 2
R333
R333
*10_NC
BB
CC
DD
*10_NC
Option to " Disable "
clkrun. Pulling it down
will keep the clks
running.
R208*10K_NC R208*10K_NC
+3.3V_RUN
R324*2.2K_NC R324*2.2K_NC
R33910K R33910K
+3.3V_RUN
R327*10K_NC R327*10K_NC
1 2
R19810K R19810K
R19710K R19710K
+3.3V_SUS
R19610K R19610K
R19110K R19110K
R19410K R19410K
RP22
RP22
*10KX2_NC
*10KX2_NC
CLKRUN#
Non-iAMT
ICH_SMBDATA
2
ICH_SMBCLK
4
ICH_SMLINK0
2
ICH_SMLINK1
4
1 2
1 2
1 2
1 2
1 2
1 2
ASF 2.0 Non-iAMT
PCIE_MCARD1_DET# 26
MCH_ICH_SYNC# 6
PLTRST_DELAY#
IMVP_PWRGD
PCIE_MCARD1_DET#
MCH_ICH_SYNC#_R
IRQ_SERIRQ
THERM_ALERT#
SIO_EXT_SMI#
USB_MCARD1_DET#
RSV_WOL_EN
+3.3V_SUS
R193*10K_NC R193*10K_NC
R19510K R19510K
R23810K R23810K
R1901K R1901K
ICH_SMBCLK 26
ICH_SMBDATA 26
ITP_DBRESET# 3
PM_BMBUSY# 6
USB_MCARD1_DET# 26
H_STP_PCI# 17
H_STP_CPU# 17
CLKRUN# 20,23,25
PCIE_WAKE# 26,34
IRQ_SERIRQ 20,23,25
THERM_ALERT# 31
IMVP_PWRGD 23,35,39
SIO_EXT_WAKE# 23
SIO_EXT_SMI# 23
SIO_EXT_SCI# 23
PCIE_MCARD1_DET#
WLAN_RADIO_DIS# 26
SATA_CLKREQ# 17
ICH_RSVD 11
SPKR
1 2
T43PAD T43PAD
T61PAD T61PAD
T69
T69
PAD
PAD
T84PAD T84PAD
T125PAD T125PAD
T41PAD T41PAD
T128PAD T128PAD
T46PAD T46PAD
T53PAD T53PAD
T44PAD T44PAD
T54PAD T54PAD
T49PAD T49PAD
T126PAD T126PAD
T57PAD T57PAD
SPKR 32
MCH_ICH_SYNC#_R
+3.3V_RUN
1 2
*1K_NC
*1K_NC
No Reboot strap.
1 2
1 2
1 2
ICH_SMBCLK
ICH_SMBDATA
RSV_ICH_CL_RST1#
ICH_SMLINK0
ICH_SMLINK1
ICH_RI#
RSV_LPCPD#
USB_MCARD1_DET#
CLKRUN#
PCIE_WAKE#
IRQ_SERIRQ
THERM_ALERT#
IMVP_PWRGD
SIO_EXT_SMI#
SIO_EXT_SCI#
PLTRST_DELAY#
SPKR
R220
R220
SPKR
Low = Default.
High = No Reboot.
Non-iAMT
RSV_ICH_CL_RST1#
ICH_RI#
SIO_EXT_SCI#
PCIE_WAKE#
U19C
U19C
AJ26
SMBCLK
AD19
SMBDATA
AG21
LINKALERT#
AC17
SMLINK0
AE19
SMLINK1
AF17
RI#
F4
SUS_STAT#/LPCPD#
AD15
SYS_RESET#
AG12
BMBUSY#/GPIO0
AG22
SMBALERT#/GPIO11
AE20
STP_PCI#/GPIO15
AG18
STP_CPU#/GPIO25
AH11
CLKRUN#/GPIO32
AE17
WAKE#
AF12
SERIRQ
AC13
THRM#
AJ20
VRMPWRGD
AJ22
TP7
AJ8
TACH1/GPIO1
AJ9
TACH2/GPIO6
AH9
TACH3/GPIO7
AE16
GPIO8
AC19
GPIO12
AG8
TACH0/GPIO17
AH12
GPIO18
AE11
GPIO20
AG10
SCLOCK/GPIO22
AH25
QRT_STATE0/GPIO27
AD16
QRT_STATE1/GPIO28
AG13
SATACLKREQ#/GPIO35
AF9
SLOAD/GPIO38
AJ11
SDATAOUT0/GPIO39
AD10
SDATAOUT1/GPIO48
AD9
SPKR
AJ13
MCH_SYNC#
AJ21
TP3
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
SMbus address D2
These are for
backdrive issue.
ICH_SMBDATA 26 MEM_SDATA15
SMB
SMB
SYS
SYS
GPIO
GPIO
GPIO
GPIO
MISC
MISC
Q10
Q10
2N7002W
2N7002W
Q13
Q13
2N7002W
2N7002W
SATA
SATA
GPIO
GPIO
Clocks
Clocks
Power MGT Controller Link
Power MGT Controller Link
SATA0GP/GPIO21
SATA1GP/GPIO19
SATA2GP/GPIO36
SATA3GP/GPIO37
CLK14
CLK48
SUSCLK
SLP_S3#
SLP_S4#
SLP_S5#
S4_STATE#/GPIO26
PWROK
DPRSLPVR/GPIO16
BATLOW#
PWRBTN#
LAN_RST#
RSMRST#
CK_PWRGD
CLPWROK
SLP_M#
CL_CLK0
CL_CLK1
CL_DATA0
CL_DATA1
CL_VREF0
CL_VREF1
CL_RST#
MEM_LED/GPIO24
ME_EC_ALERT/GPIO10
EC_ME_ALERT/GPIO14
WOL_EN/GPIO9
+3.3V_RUN
2
4
2
1
3 1
+3.3V_RUN
3 1
3
2
RP15
RP15
2.2KX2
2.2KX2
AJ12
AJ10
AF11
AG11
AG9
G5
D3
AG23
AF21
AD18
AH27
AE23
AJ14
AE21
C2
AH20
AG27
E1
E3
AJ25
F23
AE18
F22
AF19
D24
AH23
AJ23
AJ27
AJ24
AF22
AG19
+3.3V_RUN
R206
R206
8.2K
8.2K
1 2
CLK_ICH_14M
CLK_ICH_48M
ICH_SUSCLK
ICH_PWRGD
DPRSLPVR
ICH_BATLOW#
RSV_ICH_LAN_RST#
ICH_RSMRST#
ICH_CL_PWROK
RSV_ICH_CL_CLK1
RSV_ICH_CL_DATA1
CL_VREF0
CL_VREF1
RSV_GPIO10
RSV_GPIO14
RSV_WOL_EN
Non-iAMT
MEM_SCLK15 ICH_SMBCLK 26
R2198.2K R2198.2K
R2288.2K R2288.2K
CLK_ICH_14M17
CLK_ICH_48M17
T90 PAD T90 PAD
SIO_SLP_S3#23
T52 PAD T52 PAD
SIO_SLP_S5#23
ICH_PWRGD6,35
DPRSLPVR6,39
1 2
+3.3V_SUS
SIO_PWRBTN#23
T40 PAD T40 PAD
ICH_RSMRST#23
CLK_PWRGD17
ICH_CL_PWROK6,23
T130 PAD T130 PAD
CL_CLK06
T55 PAD T55 PAD
CL_DATA06
T48 PAD T48 PAD
T42 PAD T42 PAD
ICH_CL_RST0#6
T131 PAD T131 PAD
T63 PAD T63 PAD
T45 PAD T45 PAD
1 2
+3.3V_SUS
6
Place these close to ICH8.
CLK_ICH_48M
CLK_ICH_14M
1 2
1 2
1 2
1 2
6
ICH_PWRGD
DPRSLPVR
ICH_RSMRST#
RSV_ICH_LAN_RST#
Non-iAMT
ICH_CL_PWROK
RSV_GPIO10
Non-iAMT
CL_VREF0
1 2
C325
C325
0.1U
0.1U
10
10
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
COMPUTER
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
ICH8-M (PM,GPIO,SMB,CL)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
R21110K R21110K
R330100K R330100K
R32310K R32310K
R19210K R19210K
R2651M R2651M
R18710K R18710K
+3.3V_RUN
R258
R258
3.24K/F
3.24K/F
1 2
1 2
R262
R262
453/F
453/F
1 2
1 2
CL_VREF1
1 2
C256
C256
*0.1U_NC
*0.1U_NC
10
10
1 2
1 2
1 2
1 2
+3.3V_SUS
R256
R256
*10_NC
*10_NC
C321
C321
*4.7P_NC
*4.7P_NC
50
50
R201
R201
*10_NC
*10_NC
C250
C250
*4.7P_NC
*4.7P_NC
50
50
+3.3V_SUS
R205
R205
*3.24K/F_NC
*3.24K/F_NC
1 2
1 2
R203
R203
*453/F_NC
*453/F_NC
1353 Saturday, June 21, 2008
1353 Saturday, June 21, 2008
1353 Saturday, June 21, 2008
8
1 2 3 4 5 6
hexainf@hotmail.com
GRATIS - FOR FREE
+RTC_CELL
R311100 R311100
+1.5V_RUN
55
+1.5V_RUN
1 2
D22
D22
2 1
SDMK0340L-7-F
SDMK0340L-7-F
R313100 R313100
1 2
D23
D23
2 1
SDMK0340L-7-F
SDMK0340L-7-F
L21
L21
BLM21PG331SN1D
BLM21PG331SN1D
0805
0805
1 2
+
+
C405
C405
220U
220U
7343
7343
2.5
2.5
+VCCSATPLL_L
1 2
L18
L18
10uH
10uH
0805
0805
10uH+-20%_100mA
+VCCSATPLL
1 2
C265
C265
1U
1U
0603
0603
10
10
+5V_RUN
+3.3V_RUN
AA
Non-iAMT
+5V_SUS
+3.3V_SUS
BB
65
CC
1 2
C254
C254
1U
1U
0603
0603
10
10
+ICH_V5REF_RUN
1 2
C403
C403
1U
1U
0603
0603
10
10
+ICH_V5REF_SUS
1 2
C406
C406
1U
1U
0603
0603
10
10
FB_330ohm+-25%_100mHz_
1.5A_0.09 ohm DC
1 2
1 2
C297
C297
22U
22U
1206
1206
10
10
C257
C257
10U
10U
0603
0603
6.3
6.3
1 2
C340
C340
22U
22U
1206
1206
10
10
+1.5V_RUN
Non-iAMT
DD
+3.3V_RUN
+1.5V_PCIE_ICH
C283
C283
0.1U
0.1U
1 2
10
10
+1.5V_PCIE_ICH
1 2
+1.5V_RUN
+1.5V_RUN
+1.5V_RUN
C407
C407
0.1U
0.1U
1 2
10
10
T83
T83
PAD
PAD
T81
T81
PAD
PAD
C320
C320
0.1U
0.1U
10
10
C315
C315
2.2U
2.2U
0805
0805
10
10
2
1 2
1 2
1 2
+VCCSATPLL
1 2
C274
C274
1U
1U
0603
0603
10
10
1 2
C278
C278
1U
1U
0603
0603
10
10
C409
C409
0.1U
0.1U
1 2
10
10
TP_VCCSUSLAN1
TP_VCCSUSLAN2
+1.5V_RUN
C404
C404
4.7U
4.7U
6.3
6.3
C255
C255
*0.1U_NC
*0.1U_NC
10
10
C343
C343
0.1U
0.1U
1 2
10
10
+3.3V_RUN
U19F
U19F
AD25
VCCRTC
A16
V5REF[1]
T7
V5REF[2]
G4
V5REF_SUS
AA25
VCC1_5_B[01]
AA26
VCC1_5_B[02]
AA27
VCC1_5_B[03]
AB27
VCC1_5_B[04]
AB28
VCC1_5_B[05]
AB29
VCC1_5_B[06]
D28
VCC1_5_B[07]
D29
VCC1_5_B[08]
E25
VCC1_5_B[09]
E26
VCC1_5_B[10]
E27
VCC1_5_B[11]
F24
VCC1_5_B[12]
F25
VCC1_5_B[13]
G24
VCC1_5_B[14]
H23
VCC1_5_B[15]
H24
VCC1_5_B[16]
J23
VCC1_5_B[17]
J24
VCC1_5_B[18]
K24
VCC1_5_B[19]
K25
VCC1_5_B[20]
L23
VCC1_5_B[21]
L24
VCC1_5_B[22]
L25
VCC1_5_B[23]
M24
VCC1_5_B[24]
M25
VCC1_5_B[25]
N23
VCC1_5_B[26]
N24
VCC1_5_B[27]
N25
VCC1_5_B[28]
P24
VCC1_5_B[29]
P25
VCC1_5_B[30]
R24
VCC1_5_B[31]
R25
VCC1_5_B[32]
R26
VCC1_5_B[33]
R27
VCC1_5_B[34]
T23
VCC1_5_B[35]
T24
VCC1_5_B[36]
T27
VCC1_5_B[37]
T28
VCC1_5_B[38]
T29
VCC1_5_B[39]
U24
VCC1_5_B[40]
U25
VCC1_5_B[41]
V23
VCC1_5_B[42]
V24
VCC1_5_B[43]
V25
VCC1_5_B[44]
W25
VCC1_5_B[45]
Y25
VCC1_5_B[46]
AJ6
VCCSATAPLL
AE7
VCC1_5_A[01]
AF7
VCC1_5_A[02]
AG7
VCC1_5_A[03]
AH7
VCC1_5_A[04]
AJ7
VCC1_5_A[05]
AC1
VCC1_5_A[06]
AC2
VCC1_5_A[07]
AC3
VCC1_5_A[08]
AC4
VCC1_5_A[09]
AC5
VCC1_5_A[10]
AC10
VCC1_5_A[11]
AC9
VCC1_5_A[12]
AA5
VCC1_5_A[13]
AA6
VCC1_5_A[14]
G12
VCC1_5_A[15]
G17
VCC1_5_A[16]
H7
VCC1_5_A[17]
AC7
VCC1_5_A[18]
AD7
VCC1_5_A[19]
D1
VCCUSBPLL
F1
VCC1_5_A[20]
L6
VCC1_5_A[21]
L7
VCC1_5_A[22]
M6
VCC1_5_A[23]
M7
VCC1_5_A[24]
W23
VCC1_5_A[25]
F17
VCCLAN1_05[1]
G18
VCCLAN1_05[2]
F19
VCCLAN3_3[1]
G20
VCCLAN3_3[2]
A24
VCCGLANPLL
A26
VCCGLAN1_5[1]
A27
VCCGLAN1_5[2]
B26
VCCGLAN1_5[3]
B27
VCCGLAN1_5[4]
B28
VCCGLAN1_5[5]
B25
VCCGLAN3_3
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
CORE
CORE
VCCA3GP ATX ARX
VCCA3GP ATX ARX
VCCP_CORE VCCPSUS VCCPUSB
VCCP_CORE VCCPSUS VCCPUSB
IDE
IDE
PCI
PCI
VCCSUSHDA
VCCSUS1_05[1]
VCCSUS1_05[2]
VCCSUS1_5[1]
VCCSUS1_5[2]
VCCSUS3_3[01]
VCCSUS3_3[02]
VCCSUS3_3[03]
VCCSUS3_3[04]
VCCSUS3_3[05]
USB CORE
USB CORE
VCCSUS3_3[06]
VCCSUS3_3[07]
VCCSUS3_3[08]
VCCSUS3_3[09]
VCCSUS3_3[10]
VCCSUS3_3[11]
VCCSUS3_3[12]
VCCSUS3_3[13]
VCCSUS3_3[14]
VCCSUS3_3[15]
VCCSUS3_3[16]
VCCSUS3_3[17]
VCCSUS3_3[18]
VCCSUS3_3[19]
GLAN POWER
GLAN POWER
VCCCL3_3[1]
VCCCL3_3[2]
VCC1_05[01]
VCC1_05[02]
VCC1_05[03]
VCC1_05[04]
VCC1_05[05]
VCC1_05[06]
VCC1_05[07]
VCC1_05[08]
VCC1_05[09]
VCC1_05[10]
VCC1_05[11]
VCC1_05[12]
VCC1_05[13]
VCC1_05[14]
VCC1_05[15]
VCC1_05[16]
VCC1_05[17]
VCC1_05[18]
VCC1_05[19]
VCC1_05[20]
VCC1_05[21]
VCC1_05[22]
VCC1_05[23]
VCC1_05[24]
VCC1_05[25]
VCC1_05[26]
VCC1_05[27]
VCC1_05[28]
VCCDMIPLL
VCC_DMI[1]
VCC_DMI[2]
V_CPU_IO[1]
V_CPU_IO[2]
VCC3_3[01]
VCC3_3[02]
VCC3_3[03]
VCC3_3[04]
VCC3_3[05]
VCC3_3[06]
VCC3_3[07]
VCC3_3[08]
VCC3_3[09]
VCC3_3[10]
VCC3_3[11]
VCC3_3[12]
VCC3_3[13]
VCC3_3[14]
VCC3_3[15]
VCC3_3[16]
VCC3_3[17]
VCC3_3[18]
VCC3_3[19]
VCC3_3[20]
VCC3_3[21]
VCC3_3[22]
VCC3_3[23]
VCC3_3[24]
VCCHDA
VCCCL1_05
VCCCL1_5
C319
C319
0.1U
0.1U
1 2
10
A13
B13
C13
C14
D14
E14
F14
G14
L11
L12
L14
L16
L17
L18
M11
M18
P11
P18
T11
T18
U11
U18
V11
V12
V14
V16
V17
V18
R29
AE28
AE29
AC23
AC24
AF29
AD2
AC8
AD8
AE8
AF8
AA3
U7
V7
W1
W6
W7
Y7
A8
B15
B18
B4
B9
C15
D13
D5
E10
E7
F11
AC12
AD11
J6
AF20
AC16
J7
C3
AC18
AC21
AC22
AG20
AH28
P6
P7
C1
N7
P1
P2
P3
P4
P5
R1
R3
R5
R6
G22
A22
F20
G21
10
+1.5V_DMIPLL
+1.05V_VCCP
C329
C329
0.1U
0.1U
1 2
10
10
Non-iAMT
TP_VCCSUS1.05_1
TP_VCCSUS1.05_2
TP_VCCSUS1.5_1
TP_VCCSUS1.5_2
+VCCSUS3_3[0~6]
WWAN Noise - ICH improvements
+VCCSUS3_3[7~19]
1 2
1 2
C288
C288
*0.1U_NC
*0.1U_NC
10
10
TP_VCCCL1.05
+VCCCL1_5
+3.3V_RUN
Non-iAMT
C286
C286
0.1U
0.1U
1 2
10
10
C267
C267
0.1U
0.1U
1 2
10
10
C268
C268
0.1U
0.1U
1 2
10
10
C322
C322
0.1U
0.1U
1 2
10
10
C336
C336
0.1U
0.1U
1 2
10
10
C310
C310
*0.1U_NC
*0.1U_NC
10
10
+1.05V_VCCP
+1.05V_VCCP +1.5V_RUN
1
2
D17
D17
1uH+-20%_800mA
1 2
C413
C413
0.01U
0.01U
25
25
T75 PAD T75 PAD
T47 PAD T47 PAD
T59 PAD T59 PAD
T79 PAD T79 PAD
1 2
C311
C311
*0.1U_NC
*0.1U_NC
10
10
T80 PAD T80 PAD
1 2
C418
C418
22U
22U
1206
1206
10
10
C273
C273
0.1U
0.1U
1 2
10
10
C287
C287
0.1U
0.1U
1 2
10
10
1 2
L251uH L251uH
1 2
+1.25V_RUN
C275
C275
0.1U
0.1U
10
10
1 2
1 2
C295
C295
10U
10U
0603
0603
6.3
6.3
+3.3V_RUN
+3.3V_RUN +3.3V_SUS
1 2
C314
C314
*0.1U_NC
*0.1U_NC
10
10
C342
C342
*0.1U_NC
*0.1U_NC
10
10
+1.5V_DMIPLL_R
C280
C280
0.1U
0.1U
10
10
Non-iAMT
1 2
R24410
R24410
1 2
3
0805
0805
BAT54C T/R
BAT54C T/R
+1.5V_RUN
R3161 R3161
1 2
Place C364,C373,C367
close to AC23/AC24.
1 2
C284
C284
0.1U
0.1U
10
10
1 2
C277
C277
0.1U
0.1U
10
10
WWAN Noise - ICH improvements
1 2
1 2
C279
C279
0.1U
0.1U
10
10
+3.3V_SUS
1 2
C276
C276
0.1U
0.1U
10
10
6
C337
C337
0.022U
0.022U
0603
0603
16
16
C350
C350
*1U_NC
*1U_NC
0603
0603
10
10
C282
C282
0.1U
0.1U
10
10
1 2
1 2
C248
C248
0.022U
0.022U
0603
0603
16
16
C296
C296
0.1U
0.1U
10
10
+1.05V_VCCP
1 2
0805
0805
+3.3V_RUN
1 2
C281
C281
4.7U
4.7U
10
10
C338
C338
0.1U
0.1U
10
10
7
U19E
U19E
A23
VSS[001]
A5
VSS[002]
AA2
VSS[003]
AA7
VSS[004]
A25
VSS[005]
AB1
VSS[006]
AB24
VSS[007]
AC11
VSS[008]
AC14
VSS[009]
AC25
VSS[010]
AC26
VSS[011]
AC27
VSS[012]
AD17
VSS[013]
AD20
VSS[014]
AD28
VSS[015]
AD29
VSS[016]
AD3
VSS[017]
AD4
VSS[018]
AD6
VSS[019]
AE1
VSS[020]
AE12
VSS[021]
AE2
VSS[022]
AE22
VSS[023]
AD1
VSS[024]
AE25
VSS[025]
AE5
VSS[026]
AE6
VSS[027]
AE9
VSS[028]
AF14
VSS[029]
AF16
VSS[030]
AF18
VSS[031]
AF3
VSS[032]
AF4
VSS[033]
AG5
VSS[034]
AG6
VSS[035]
AH10
VSS[036]
AH13
VSS[037]
AH16
VSS[038]
AH19
VSS[039]
AH2
VSS[040]
AF28
VSS[041]
AH22
VSS[042]
AH24
VSS[043]
AH26
VSS[044]
AH3
VSS[045]
AH4
VSS[046]
AH8
VSS[047]
AJ5
VSS[048]
B11
VSS[049]
B14
VSS[050]
B17
VSS[051]
B2
VSS[052]
B20
VSS[053]
B22
VSS[054]
B8
VSS[055]
C24
VSS[056]
C26
VSS[057]
C27
VSS[058]
C6
VSS[059]
D12
VSS[060]
D15
VSS[061]
D18
VSS[062]
D2
VSS[063]
D4
VSS[064]
E21
VSS[065]
E24
VSS[066]
E4
VSS[067]
E9
VSS[068]
F15
VSS[069]
E23
VSS[070]
F28
VSS[071]
F29
VSS[072]
F7
VSS[073]
G1
VSS[074]
E2
VSS[075]
G10
VSS[076]
G13
VSS[077]
G19
VSS[078]
G23
VSS[079]
G25
VSS[080]
G26
VSS[081]
G27
VSS[082]
H25
VSS[083]
H28
VSS[084]
H29
VSS[085]
H3
VSS[086]
H6
VSS[087]
J1
VSS[088]
J25
VSS[089]
J26
VSS[090]
J27
VSS[091]
J4
VSS[092]
J5
VSS[093]
K23
VSS[094]
K28
VSS[095]
K29
VSS[096]
K3
VSS[097]
K6
VSS[098]
NH82801HBM-SLA5Q-MM#888654
NH82801HBM-SLA5Q-MM#888654
QUANTA
QUANTA
QUANTA
COMPUTER
COMPUTER
Title
Title
Title
SizeDocument NumberRev
SizeDocument NumberRev
SizeDocument NumberRev
Date:Sheet of
Date:Sheet of
Date:Sheet of
COMPUTER
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
ICH8-M (POWER,GND)
VM9/VM81A
VM9/VM81A
VM9/VM81A
7
VSS_NCTF[01]
VSS_NCTF[02]
VSS_NCTF[03]
VSS_NCTF[04]
VSS_NCTF[05]
VSS_NCTF[06]
VSS_NCTF[07]
VSS_NCTF[08]
VSS_NCTF[09]
VSS_NCTF[10]
VSS_NCTF[11]
VSS_NCTF[12]
VSS[099]
VSS[100]
VSS[101]
VSS[102]
VSS[103]
VSS[104]
VSS[105]
VSS[106]
VSS[107]
VSS[108]
VSS[109]
VSS[110]
VSS[111]
VSS[112]
VSS[113]
VSS[114]
VSS[115]
VSS[116]
VSS[117]
VSS[118]
VSS[119]
VSS[120]
VSS[121]
VSS[122]
VSS[123]
VSS[124]
VSS[125]
VSS[126]
VSS[127]
VSS[128]
VSS[129]
VSS[130]
VSS[131]
VSS[132]
VSS[133]
VSS[134]
VSS[135]
VSS[136]
VSS[137]
VSS[138]
VSS[139]
VSS[140]
VSS[141]
VSS[142]
VSS[143]
VSS[144]
VSS[145]
VSS[146]
VSS[147]
VSS[148]
VSS[149]
VSS[150]
VSS[151]
VSS[152]
VSS[153]
VSS[154]
VSS[155]
VSS[156]
VSS[157]
VSS[158]
VSS[159]
VSS[160]
VSS[161]
VSS[162]
VSS[163]
VSS[164]
VSS[165]
VSS[166]
VSS[167]
VSS[168]
VSS[169]
VSS[170]
VSS[171]
VSS[172]
VSS[173]
VSS[174]
VSS[175]
VSS[176]
VSS[177]
VSS[178]
VSS[179]
VSS[180]
VSS[181]
VSS[182]
VSS[183]
VSS[184]
K7
L1
L13
L15
L26
L27
L4
L5
M12
M13
M14
M15
M16
M17
M23
M28
M29
M3
N1
N11
N12
N13
N14
N15
N16
N17
N18
N26
N27
N4
N5
N6
P12
P13
P14
P15
P16
P17
P23
P28
P29
R11
R12
R13
R14
R15
R16
R17
R18
R28
R4
T12
T13
T14
T15
T16
T17
T2
U12
U13
U14
U15
U16
U17
U23
U26
U27
U3
U5
V13
V15
V28
V29
W2
W26
W27
Y28
Y29
Y4
AB4
AB23
AB5
AB6
AD5
U4
W24
A1
A2
A28
A29
AH1
AH29
AJ1
AJ2
AJ28
AJ29
B1
B29
1453 Tuesday, June 17, 2008
1453 Tuesday, June 17, 2008
1453 Tuesday, June 17, 2008
8
8