Page 1
5
D D
4
3
2
1
Starload Schematics
Skylake-U
C C
2016-02-18
REV : A00
B B
DY : None Installed
A A
UMA: UMA only installed
OPS: DISCRTE OPTIMUS installed
5
4
3
2
<Variant Name>
<Variant Name>
<Variant Name>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Date: Sheet of
Date: Sheet of
Date: Sheet of
Cover Page
Cover Page
Cover Page
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
1 106
1 106
1 106
1
A00
A00
A00
Page 2
5
Project code: 4PD07S010001
PCB P/N: 15264
Star lord SKL-U Block Diagram
Revision: A00
D D
GPU
VRAM(GDDR5) *4
2GB/4GB
GDDR5
GPU BOARD
HDMI
70
5
57
55
34
35
7mm HDD
I2C
LPC debug port
MEC1404-NU-GP
Int.
KB
KB transfer board
USB PowerShare
TI
TPS2544RTER
SMSC
HDMI V1.4
13.3"/15.6"/17.3"
(HD/FHD/UHD)
Touch panel
C C
USB3.0 Port2
Power share
USB3.0 Port3
ROR only
INT2
B B
Sensor BD
on Panel side
Thermal
NUVOTON
NCT7718W
Free fall
Gsensor
ST
LNG2DMTR
G + E-compass
ST
LSM303DTR
Gyro
ST
L3GD20TR
SMBUS
26
Fan Control
A A
PWM
FAN
NVDIA
N16S-GTR
25W
HDMI Level Shifter
USB2.0
USB3.0
USB2.0
USB3.0
USB2.0
Sensor Hub
ST
STM32L151CBU6TR
68
69
LPC BUS
KBC
24
PS2
Touch PAD
Image sensor
57
4
PCIE x 4
PCIE Lane1~Lane4
HDMI
eDP
USB2.0 LANE7
USB3.0 LANE1
USB2.0 LANE1
USB3.0 LANE3
USB2.0 LANE2
SATA
USB2.0 LANE9
USB2.0
I2C
SPI
4
Flash ROM
I2C
Intel CPU
Skylake U
28W (UMA only)
SKL PCH-LP
10 USB 2.0/1.1 ports
6 USB 3.0 ports
High Definition Audio
3 SATA ports
6 PCIE ports
LPC I/F
ACPI 5.0
16MB
Quad Read
25 26
Channel A
Channel B
DP
USB3.0
USB3.0 LANE4
USB2.0
USB2.0 LANE4
USB2.0 LANE8
PCIE LANE5
USB2.0 LANE6
USB2.0
USB2.0 x 1
USB2.0 LANE5
HDA
3
MUX and Redriver
SATA
USB2.0 x 1
USB2.0 LANE3
3
PARADE
PS8740B
PCIe
USB2.0
38
CC
38
M.2 SSD
CardReader
SD 3.0
Realtak
RTS5176E
USB2.0 Port4
Camera (HD/IR)
D-MIC
HDA
CODEC
Realtek
ALC3253
DP/USB 3.0
USB2.0
63
NGFF WLAN
55
2CH SPEAKER
(2CH 2W/4ohm)
27
MIC_IN/GND
HP_R/L
2
DDR4
SODIMM A
DDR4
SODIMM B
USB3.0 type c
Port1
BBY only
SD Card Slot
IO Board
2
12
13
38
Universal Jack
1
CHARGER
ISL95521HRZ-T
INPUTS
AD+
BT+
SYSTEM DC/DC
SY8288CRAC-GP
INPUTS
DCBATOUT
CPU Core Power
NCP81208MNTXG-G P
NCP81382MNTXG-1 -GP
NCP81382MNTXG-1 -GP
NCP81253MNTBG-G P
INPUTS
DCBATOUT
DCBATOUT +VCCGT
OUTPUTS
DCBATOUT
OUTPUTS
PWR_5V
5V_S5
5V_AUX_S5
OUTPUTS
VCC_CORE
+VCCSA_VR DCBATOUT
46~50
DDR4
SY8288RAC-GP
APL5338XAI-TRG- GP
INPUTS OUTPUTS
DCBATOUT
CPU DCDC-V1D00A
AOZ1268QI-02-GP
INPUTS OUTPUTS
DCBATOUT
LDO-V1D5V
S-1339D15-M5001 -GP
3D3V_S5
LDO-V1D8V
APL5930KAI-TRG- GP
INPUTS OUTPUTS
3D3V_S5
G5016KD1U
INPUTS
5V_S5
M5938ARD1U-GP-U
INPUTS
1D0V_S5
TPS22965DSGR-GP -U
INPUTS
1D0V_S5
SYSTEM DC/DC
TPS51225RUKR-GP
INPUTS
DCBATOUT
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
C
C
C
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Block Diagram
Block Diagram
Block Diagram
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
1D2V_S3
0D675V_S0
1D0V_S5
OUTPUTS INPUTS
1D5V_S0
1D8V_S5
5V/3V S0
VCCSTG
OUTPUTS
+VCCSTG
VCCST
OUTPUTS
+V1.00U_CPU
OUTPUTS
3D3V_AUX_S5
3D3V_S5
PWR_3D3V
2 106 Thursday, February 18, 2016
2 106 Thursday, February 18, 2016
2 106 Thursday, February 18, 2016
OUTPUTS
5V_S0
3D3V_S0 3D3V_S5
44
45
33
51
52
54
54
40
40
40
45
A00
A00
A00
Page 3
5
4
3
2
1
Main Func = CPU
D D
C C
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
A3
A3
A3
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
3 106 Thursday, February 18, 20 16
3 106 Thursday, February 18, 20 16
3 106 Thursday, February 18, 20 16
1
A00
A00
A00
Page 4
5
Main Func = CPU
+VCCSTG
D D
[PECI] and [PRO CHOT#]
Impedance contr ol: 50 ohm
H_PECI [24]
H_PROCH OT# [2 4,44,46]
TOUCH_P ANEL_INTR# [24 ,55]
3D3V_S5 _PCH
R404
R404
1 2
DY
DY
100KR2J -1-GP
100KR2J -1-GP
3D3V_S0
R405
R405
1 2
DS3
C C
INT_TP# [24,65]
DS3
100KR2J -1-GP
100KR2J -1-GP
R410
R410
1 2
NON DS3
NON DS3
0R2J-2-GP
0R2J-2-GP
D401
D401
DS3
DS3
RB751V-4 0H-GP
RB751V-4 0H-GP
K A
83.R2004.G8F
83.R2004.G8F
Rb
+VCCSTG = 1.0 V +VCCSTG = 1.0 V
1 2
R401
R401
1KR2J-1-G P
1KR2J-1-G P
TPAD14-O P-GP
TPAD14-O P-GP
R403 499R2F-2 -GP R403 499R2F-2 -GP
1 2
Ra
TPAD14-O P-GP
TPAD14-O P-GP
TP405
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TPAD14-O P-GP
TP405
TP406
TP406
TP407
TP407
TP408
TP408
TP403
TP403
TOUCHPA D_INTR#
TP404
TP404
Add resistor by NON DS3 function
TP401
TP401
TP402
TP402
1
1
R412 49D9R2F -GP R412 49D9R2F -GP
R413 49D9R2F -GP R413 49D9R2F -GP
R414 49D9R2F -GP R414 49D9R2F -GP
R415 49D9R2F -GP R415 49D9R2F -GP
4
H_CATER R#
1
H_PROCH OT#_R
PCH_THE RMTRIP#
SKTOCC#
1
XDP_BPM 0
1
XDP_BPM 1
1
XDP_BPM 2
1
XDP_BPM 3
1
GPP_E3/C PU_GP0
GPP_B4/C PU_GP3
CPU_POP IRCOMP
12
PCH_POP IRCOMP
1 2
EDRAM_O PIO_RCOMP
12
EOPIO_RCO MP
1 2
CPU1D
CPU1D
D63
CATERR#
A54
PECI
C65
PROCHOT#
C63
THERMTRIP#
A65
SKTOCC#
C55
BPM#[0]
D55
BPM#[1]
B54
BPM#[2]
C56
BPM#[3]
A6
GPP_E3/CPU_GP0
A7
GPP_E7/CPU_GP1
BA5
GPP_B3/CPU_GP2
AY5
GPP_B4/CPU_GP3
AT16
PROC_POPIRCOMP
AU16
PCH_OPIRCOMP
H66
OPCE_RCOMP
H65
OPC_RCOMP
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
CPU MISC
CPU MISC
3
JTAG
JTAG
PROC_TCK
PROC_TDI
PROC_TDO
PROC_TMS
PROC_TRST#
PCH_JTAG_TCK
PCH_JTAG_TDI
PCH_JTAG_TDO
PCH_JTAG_TMS
PCH_TRST#
PCH_THE RMTRIP#
4 OF 20
4 OF 20
B61
D60
A61
C60
B59
B56
D59
A56
C59
C61
A59
JTAGX
+VCCST_ CPU
1 2
1 2
EC401
EC401
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
XDP_TCL K
XDP_TDI
XDP_TDO _CPU
XDP_TMS
XDP_TRS T#
PCH_JTA G_TCK
PCH_JTA G_TDI
PCH_JTA G_TDO
PCH_JTA G_TMS
XDP_TRS T#
XDP_TCK _JTAGX
#544669 CRB Rev 0.52
R419
R419
1KR2J-1-G P
1KR2J-1-G P
EMI DVT1 0210
2
XDP_TMS
XDP_TDI
XDP_TDO _CPU
PCH_JTA G_TDI
PCH_JTA G_TDO
PCH_JTA G_TMS
XDP_TCK _JTAGX
XDP_TRS T#
XDP_TCL K
PCH_JTA G_TCK
1 2
DY
DY
R421 51R2J-2-G P
DY
DY
DY
DY
DY
DY
DY
DY
DY
DY
R421 51R2J-2-G P
R422 51R2J-2-G P
R422 51R2J-2-G P
R423 51R2J-2-G P
R423 51R2J-2-G P
R408 51R2J-2-G P R 408 5 1R2J-2-GP
R409 51R2J-2-G P R 409 5 1R2J-2-GP
R416 51R2J-2-G P R 416 5 1R2J-2-GP
R417 1KR2J-1-GP
R417 1KR2J-1-GP
1 2
1 2
PH in P.99
1 2
1 2
1 2
1 2
R402 51R2J-2-G P
R402 51R2J-2-G P
1 2
R406 51R2J-2-G P R406 51R2J-2-G P
1 2
R407 51R2J-2-G P
R407 51R2J-2-G P
1 2
1
+VCCSTG
(#543016) PROCHOT# Routing Guidelines
B B
M1,2,3,4,5: <3 inches
M6: 1-11 inches
MCPU: 0.3-1.5 i nches
Mt <0.3 mils
Main route(M1+M 2+M3+M4+M5+M6+ MCPU): 1-12 inc hes
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_(JTAG/CPU SIDE BAND)
CPU_(JTAG/CPU SIDE BAND)
CPU_(JTAG/CPU SIDE BAND)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
4 106 Thursday, February 25, 20 16
4 106 Thursday, February 25, 20 16
4 106 Thursday, February 25, 20 16
A00
A00
A00
Page 5
Main Func = CPU
5
4
3
2
1
DDR4 ball type: Interleaved Type
D D
CPU1B
CPU1B
M_A_DQ0
M_A_DQ0 [12]
M_A_DQ1 [12]
M_A_DQ2 [12]
M_A_DQ[0:7]
M_A_DQ[8:15]
M_B_DQ[0:7]
M_B_DQ[8:15]
C C
M_A_DQ[16:23]
M_A_DQ[24:31]
M_B_DQ[16:23]
M_B_DQ[24:31]
B B
M_A_DQ3 [12]
M_A_DQ4 [12]
M_A_DQ5 [12]
M_A_DQ6 [12]
M_A_DQ7 [12]
M_A_DQ8 [12]
M_A_DQ9 [12]
M_A_DQ10 [12]
M_A_DQ11 [12]
M_A_DQ12 [12]
M_A_DQ13 [12]
M_A_DQ14 [12]
M_A_DQ15 [12]
M_B_DQ0 [13]
M_B_DQ1 [13]
M_B_DQ2 [13]
M_B_DQ3 [13]
M_B_DQ4 [13]
M_B_DQ5 [13]
M_B_DQ6 [13]
M_B_DQ7 [13]
M_B_DQ8 [13]
M_B_DQ9 [13]
M_B_DQ10 [13]
M_B_DQ11 [13]
M_B_DQ12 [13]
M_B_DQ13 [13]
M_B_DQ14 [13]
M_B_DQ15 [13]
M_A_DQ16 [12]
M_A_DQ17 [12]
M_A_DQ18 [12]
M_A_DQ19 [12]
M_A_DQ20 [12]
M_A_DQ21 [12]
M_A_DQ22 [12]
M_A_DQ23 [12]
M_A_DQ24 [12]
M_A_DQ25 [12]
M_A_DQ26 [12]
M_A_DQ27 [12]
M_A_DQ28 [12]
M_A_DQ29 [12]
M_A_DQ30 [12]
M_A_DQ31 [12]
M_B_DQ16 [13]
M_B_DQ17 [13]
M_B_DQ18 [13]
M_B_DQ19 [13]
M_B_DQ20 [13]
M_B_DQ21 [13]
M_B_DQ22 [13]
M_B_DQ23 [13]
M_B_DQ24 [13]
M_B_DQ25 [13]
M_B_DQ26 [13]
M_B_DQ27 [13]
M_B_DQ28 [13]
M_B_DQ29 [13]
M_B_DQ30 [13]
M_B_DQ31 [13]
DQ Bit Swapping is allowed within the same byte, and Byte Swapping is allowed within the same channel.
Clock (CLK and CLK#) and Strobe (DQS and DQS#) differential signal swapping within a pair is not allowed. Also differential
clock pair to clock pair swapping within a channel is not allowed.
M_A_DQ1
M_A_DQ2
M_A_DQ3
M_A_DQ4
M_A_DQ5
M_A_DQ6
M_A_DQ7
M_A_DQ8
M_A_DQ9
M_A_DQ10
M_A_DQ11
M_A_DQ12
M_A_DQ13
M_A_DQ14
M_A_DQ15
M_B_DQ0
M_B_DQ1
M_B_DQ2
M_B_DQ3
M_B_DQ4
M_B_DQ5
M_B_DQ6
M_B_DQ7
M_B_DQ8
M_B_DQ9
M_B_DQ10
M_B_DQ11
M_B_DQ12
M_B_DQ13
M_B_DQ14
M_B_DQ15
M_A_DQ16
M_A_DQ17
M_A_DQ18
M_A_DQ19
M_A_DQ20
M_A_DQ21
M_A_DQ22
M_A_DQ23
M_A_DQ24
M_A_DQ25
M_A_DQ26
M_A_DQ27
M_A_DQ28
M_A_DQ29
M_A_DQ30
M_A_DQ31
M_B_DQ16
M_B_DQ17
M_B_DQ18
M_B_DQ19
M_B_DQ20
M_B_DQ21
M_B_DQ22
M_B_DQ23
M_B_DQ24
M_B_DQ25
M_B_DQ26
M_B_DQ27
M_B_DQ28
M_B_DQ29
M_B_DQ30
M_B_DQ31
AL71
DDR0_DQ[0]
AL68
DDR0_DQ[1]
AN68
DDR0_DQ[2]
AN69
DDR0_DQ[3]
AL70
DDR0_DQ[4]
AL69
DDR0_DQ[5]
AN70
DDR0_DQ[6]
AN71
DDR0_DQ[7]
AR70
DDR0_DQ[8]
AR68
DDR0_DQ[9]
AU71
DDR0_DQ[10]
AU68
DDR0_DQ[11]
AR71
DDR0_DQ[12]
AR69
DDR0_DQ[13]
AU70
DDR0_DQ[14]
AU69
DDR0_DQ[15]
AF65
DDR1_DQ[0]/DDR0_DQ[8]
AF64
DDR1_DQ[1]/DDR0_DQ[9]
AK65
DDR1_DQ[2]/DDR0_DQ[10]
AK64
DDR1_DQ[3]/DDR0_DQ[11]
AF66
DDR1_DQ[4]/DDR0_DQ[12]
AF67
DDR1_DQ[5]/DDR0_DQ[13]
AK67
DDR1_DQ[6]/DDR0_DQ[14]
AK66
DDR1_DQ[7]/DDR0_DQ[15]
AF70
DDR1_DQ[8]/DDR0_DQ[24]
AF68
DDR1_DQ[9]/DDR0_DQ[25]
AH71
DDR1_DQ[10]/DDR0_DQ[26]
AH68
DDR1_DQ[11]/DDR0_DQ[27]
AF71
DDR1_DQ[12]/DDR0_DQ[28]
AF69
DDR1_DQ[13]/DDR0_DQ[29]
AH70
DDR1_DQ[14]/DDR0_DQ[30]
AH69
DDR1_DQ[15]/DDR0_DQ[31]
BB65
DDR0_DQ[16]/DDR0_DQ[32]
AW65
DDR0_DQ[17]/DDR0_DQ[33]
AW63
DDR0_DQ[18]/DDR0_DQ[34]
AY63
DDR0_DQ[19]/DDR0_DQ[35]
BA65
DDR0_DQ[20]/DDR0_DQ[36]
AY65
DDR0_DQ[21]/DDR0_DQ[37]
BA63
DDR0_DQ[22]/DDR0_DQ[38]
BB63
DDR0_DQ[23]/DDR0_DQ[39]
BA61
DDR0_DQ[24]/DDR0_DQ[40]
AW61
DDR0_DQ[25]/DDR0_DQ[41]
BB59
DDR0_DQ[26]/DDR0_DQ[42]
AW59
DDR0_DQ[27]/DDR0_DQ[43]
BB61
DDR0_DQ[28]/DDR0_DQ[44]
AY61
DDR0_DQ[29]/DDR0_DQ[45]
BA59
DDR0_DQ[30]/DDR0_DQ[46]
AY59
DDR0_DQ[31]/DDR0_DQ[47]
AT66
DDR1_DQ[16]/DDR0_DQ[48]
AU66
DDR1_DQ[17]/DDR0_DQ[49]
AP65
DDR1_DQ[18]/DDR0_DQ[50]
AN65
DDR1_DQ[19]/DDR0_DQ[51]
AN66
DDR1_DQ[20]/DDR0_DQ[52]
AP66
DDR1_DQ[21]/DDR0_DQ[53]
AT65
DDR1_DQ[22]/DDR0_DQ[54]
AU65
DDR1_DQ[23]/DDR0_DQ[55]
AT61
DDR1_DQ[24]/DDR0_DQ[56]
AU61
DDR1_DQ[25]/DDR0_DQ[57]
AP60
DDR1_DQ[26]/DDR0_DQ[58]
AN60
DDR1_DQ[27]/DDR0_DQ[59]
AN61
DDR1_DQ[28]/DDR0_DQ[60]
AP61
DDR1_DQ[29]/DDR0_DQ[61]
AT60
DDR1_DQ[30]/DDR0_DQ[62]
AU60
DDR1_DQ[31]/DDR0_DQ[63]
SKYLAKE-U-GP
SKYLAKE-U-GP
SKYLAKE_ULT
SKYLAKE_ULT
DDR0_MA[5]/DDR0_CAA[0]/DDR0_MA[ 5]
DDR0_DQ[16]
DDR0_MA[9]/DDR0_CAA[1]/DDR0_MA[ 9]
DDR0_DQ[17]
DDR0_MA[6]/DDR0_CAA[2]/DDR0_MA[ 6]
DDR0_DQ[18]
DDR0_MA[8]/DDR0_CAA[3]/DDR0_MA[ 8]
DDR0_DQ[19]
DDR0_MA[7]/DDR0_CAA[4]/DDR0_MA[ 7]
DDR0_DQ[20]
DDR0_BA[2]/DDR0_CAA[5]/DDR0_BG[0]
DDR0_DQ[21]
DDR0_MA[12]/DDR0_CAA[6]/DDR0_MA[ 12]
DDR0_DQ[22]
DDR0_MA[11]/DDR0_CAA[7]/DDR0_MA[ 11]
DDR0_DQ[23]
DDR0_MA[15]/DDR0_CAA[8]/DDR0_ACT #
DDR0_MA[14]/DDR0_CAA[9]/DDR0_BG[1]
DDR0_MA[13]/DDR0_CAB[0]/DDR0_MA[ 13]
DDR0_CAS#/DDR0_CAB[1]/DDR0_MA[15]
DDR0_WE#/DDR0_CAB[2]/DDR0_MA[14]
DDR0_RAS#/DDR0_CAB[3]/DDR0_MA[16]
DDR0_BA[0]/DDR0_CAB[4]/DDR0_BA[0]
DDR0_MA[2]/DDR0_CAB[5]/DDR0_MA[ 2]
DDR0_BA[1]/DDR0_CAB[6]/DDR0_BA[1]
DDR0_MA[10]/DDR0_CAB[7]/DDR0_MA[ 10]
DDR0_MA[1]/DDR0_CAB[8]/DDR0_MA[ 1]
DDR0_MA[0]/DDR0_CAB[9]/DDR0_MA[ 0]
DDR0_DQSN[2]/DDR0_DQSN[4]
DDR0_DQSP[2]/DDR0_DQSP[4]
DDR0_DQSN[3]/DDR0_DQSN[5]
DDR0_DQSP[3]/DDR0_DQSP[5]
DDR1_DQSN[2]/DDR0_DQSN[6]
DDR1_DQSP[2]/DDR0_DQSP[6]
DDR1_DQSN[3]/DDR0_DQSN[7]
DDR1_DQSP[3]/DDR0_DQSP[7]
DDR CH - A
DDR CH - A
071.SKYLA.000U
071.SKYLA.000U
DDR1_DQSN[0]/DDR0_DQ[2]
DDR1_DQSP[0]/DDR0_DQ[2]
DDR1_DQSN[1]/DDR0_DQ[3]
DDR1_DQSP[1]/DDR0_DQ[3]
PDG: DDR/ODT
2 OF 20
2 OF 20
DDR0_CKN[0]
DDR0_CKP[0]
DDR0_CKN[1]
DDR0_CKP[1]
DDR0_CKE[0]
DDR0_CKE[1]
DDR0_CKE[2]
DDR0_CKE[3]
DDR0_CS#[0]
DDR0_CS#[1]
DDR0_ODT[0]
DDR0_ODT[1]
DDR0_MA[3]
DDR0_MA[4]
DDR0_DQSN[0]
DDR0_DQSP[0]
DDR0_DQSN[1]
DDR0_DQSP[1]
DDR0_ALERT#
DDR0_PAR
DDR_VREF_CA
DDR0_VREF_DQ
DDR1_VREF_DQ
DDR_VTT_CNTL
AU53
AT53
AU55
AT55
BA56
BB56
AW56
AY56
AU45
AU43
AT45
AT43
BA51
BB54
BA52
AY52
AW52
AY55
AW54
BA54
BA55
AY54
AU46
AU48
AT46
AU50
AU52
AY51
AT48
AT50
BB50
AY50
BA50
BB52
AM70
AM69
AT69
AT70
AH66
AH65
AG69
AG70
BA64
AY64
AY60
BA60
AR66
AR65
AR61
AR60
AW50
AT52
AY67
AY68
BA67
AW67
M_A_A5
M_A_A9
M_A_A6
M_A_A8
M_A_A7
M_A_A12
M_A_A11
M_A_A13
M_A_A15
M_A_A14
M_A_A16
M_A_A2
M_A_A10
M_A_A1
M_A_A0
M_A_A3
M_A_A4
M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_B_DQS_DN0
M_B_DQS_DP0
M_B_DQS_DN1
M_B_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_B_DQS_DN2
M_B_DQS_DP2
M_B_DQS_DN3
M_B_DQS_DP3
SM_PGCNTL
M_A_CLK#0 [12]
M_A_CLK0 [12]
M_A_CLK#1 [12]
M_A_CLK1 [12]
M_A_CKE0 [12]
M_A_CKE1 [12]
M_A_CS#0 [12]
M_A_CS#1 [12]
M_A_DIMA_ODT0 [12]
M_A_DIMA_ODT1 [12]
M_A_A5 [12]
M_A_A9 [12]
M_A_A6 [12]
M_A_A8 [12]
M_A_A7 [12]
M_A_BG0 [12]
M_A_A12 [12]
M_A_A11 [12]
M_A_ACT_N [12]
M_A_BG1 [12]
M_A_A13 [12]
M_A_A15 [12]
M_A_A14 [12]
M_A_A16 [12]
M_A_BA0 [12]
M_A_A2 [12]
M_A_BA1 [12]
M_A_A10 [12]
M_A_A1 [12]
M_A_A0 [12]
M_A_A3 [12]
M_A_A4 [12]
M_A_DQS0
M_A_DQS1
M_B_DQS0
M_B_DQS1
M_A_DQS2
M_A_DQS3
M_B_DQS2
M_B_DQS3
M_A_ALERT_N [12]
M_A_PARITY [12]
V_SM_VREF_CN TA [12]
V_SM_VREF_CN TB [13]
M_A_DQ[32:39]
M_A_DQ[40:47]
M_B_DQ[32:39]
M_B_DQ[40:47]
M_A_DQ[48:55]
M_A_DQ[56:63]
M_B_DQ[48:55]
M_B_DQ[56:63]
SM_PGCNTL
M_A_DQ32 [12]
M_A_DQ33 [12]
M_A_DQ34 [12]
M_A_DQ35 [12]
M_A_DQ36 [12]
M_A_DQ37 [12]
M_A_DQ38 [12]
M_A_DQ39 [12]
M_A_DQ40 [12]
M_A_DQ41 [12]
M_A_DQ42 [12]
M_A_DQ43 [12]
M_A_DQ44 [12]
M_A_DQ45 [12]
M_A_DQ46 [12]
M_A_DQ47 [12]
M_B_DQ32 [13]
M_B_DQ33 [13]
M_B_DQ34 [13]
M_B_DQ35 [13]
M_B_DQ36 [13]
M_B_DQ37 [13]
M_B_DQ38 [13]
M_B_DQ39 [13]
M_B_DQ40 [13]
M_B_DQ41 [13]
M_B_DQ42 [13]
M_B_DQ43 [13]
M_B_DQ44 [13]
M_B_DQ45 [13]
M_B_DQ46 [13]
M_B_DQ47 [13]
M_A_DQ48 [12]
M_A_DQ49 [12]
M_A_DQ50 [12]
M_A_DQ51 [12]
M_A_DQ52 [12]
M_A_DQ53 [12]
M_A_DQ54 [12]
M_A_DQ55 [12]
M_A_DQ56 [12]
M_A_DQ57 [12]
M_A_DQ58 [12]
M_A_DQ59 [12]
M_A_DQ60 [12]
M_A_DQ61 [12]
M_A_DQ62 [12]
M_A_DQ63 [12]
M_B_DQ48 [13]
M_B_DQ49 [13]
M_B_DQ50 [13]
M_B_DQ51 [13]
M_B_DQ52 [13]
M_B_DQ53 [13]
M_B_DQ54 [13]
M_B_DQ55 [13]
M_B_DQ56 [13]
M_B_DQ57 [13]
M_B_DQ58 [13]
M_B_DQ59 [13]
M_B_DQ60 [13]
M_B_DQ61 [13]
M_B_DQ62 [13]
M_B_DQ63 [13]
M_A_DQ32
M_A_DQ33
M_A_DQ34
M_A_DQ35
M_A_DQ36
M_A_DQ37
M_A_DQ38
M_A_DQ39
M_A_DQ40
M_A_DQ41
M_A_DQ42
M_A_DQ43
M_A_DQ44
M_A_DQ45
M_A_DQ46
M_A_DQ47
M_B_DQ32
M_B_DQ33
M_B_DQ34
M_B_DQ35
M_B_DQ36
M_B_DQ37
M_B_DQ38
M_B_DQ39
M_B_DQ40
M_B_DQ41
M_B_DQ42
M_B_DQ43
M_B_DQ44
M_B_DQ45
M_B_DQ46
M_B_DQ47
M_A_DQ48
M_A_DQ49
M_A_DQ50
M_A_DQ51
M_A_DQ52
M_A_DQ53
M_A_DQ54
M_A_DQ55
M_A_DQ56
M_A_DQ57
M_A_DQ58
M_A_DQ59
M_A_DQ60
M_A_DQ61
M_A_DQ62
M_A_DQ63
M_B_DQ48
M_B_DQ49
M_B_DQ50
M_B_DQ51
M_B_DQ52
M_B_DQ53
M_B_DQ54
M_B_DQ55
M_B_DQ56
M_B_DQ57
M_B_DQ58
M_B_DQ59
M_B_DQ60
M_B_DQ61
M_B_DQ62
M_B_DQ63
1D2V_S3 3D3V_S0
G
Q501
Q501
DMN5L06K-7-G P
DMN5L06K-7-G P
D S
CPU1C
CPU1C
AY39
DDR0_DQ[32]/DDR1_DQ[0]
AW39
DDR0_DQ[33]/DDR1_DQ[1]
AY37
DDR0_DQ[34]/DDR1_DQ[2]
AW37
DDR0_DQ[35]/DDR1_DQ[3]
BB39
DDR0_DQ[36]/DDR1_DQ[4]
BA39
DDR0_DQ[37]/DDR1_DQ[5]
BA37
DDR0_DQ[38]/DDR1_DQ[6]
BB37
DDR0_DQ[39]/DDR1_DQ[7]
AY35
DDR0_DQ[40]/DDR1_DQ[8]
AW35
DDR0_DQ[41]/DDR1_DQ[9]
AY33
DDR0_DQ[42]/DDR1_DQ[10]
AW33
DDR0_DQ[43]/DDR1_DQ[11]
BB35
DDR0_DQ[44]/DDR1_DQ[12]
BA35
DDR0_DQ[45]/DDR1_DQ[13]
BA33
DDR0_DQ[46]/DDR1_DQ[14]
BB33
DDR0_DQ[47]/DDR1_DQ[15]
AU40
DDR1_DQ[32]/DDR1_DQ[16]
AT40
DDR1_DQ[33]/DDR1_DQ[17]
AT37
DDR1_DQ[34]/DDR1_DQ[18]
AU37
DDR1_DQ[35]/DDR1_DQ[19]
AR40
DDR1_DQ[36]/DDR1_DQ[20]
AP40
DDR1_DQ[37]/DDR1_DQ[21]
AP37
DDR1_DQ[38]/DDR1_DQ[22]
AR37
DDR1_DQ[39]/DDR1_DQ[23]
AT33
DDR1_DQ[40]/DDR1_DQ[24]
AU33
DDR1_DQ[41]/DDR1_DQ[25]
AU30
DDR1_DQ[42]/DDR1_DQ[26]
AT30
DDR1_DQ[43]/DDR1_DQ[27]
AR33
DDR1_DQ[44]/DDR1_DQ[28]
AP33
DDR1_DQ[45]/DDR1_DQ[29]
AR30
DDR1_DQ[46]/DDR1_DQ[30]
AP30
DDR1_DQ[47]/DDR1_DQ[31]
AY31
DDR0_DQ[48]/DDR1_DQ[32]
AW31
DDR0_DQ[49]/DDR1_DQ[33]
AY29
DDR0_DQ[50]/DDR1_DQ[34]
AW29
DDR0_DQ[51]/DDR1_DQ[35]
BB31
DDR0_DQ[52]/DDR1_DQ[36]
BA31
DDR0_DQ[53]/DDR1_DQ[37]
BA29
DDR0_DQ[54]/DDR1_DQ[38]
BB29
DDR0_DQ[55]/DDR1_DQ[39]
AY27
DDR0_DQ[56]/DDR1_DQ[40]
AW27
DDR0_DQ[57]/DDR1_DQ[41]
AY25
DDR0_DQ[58]/DDR1_DQ[42]
AW25
DDR0_DQ[59]/DDR1_DQ[43]
BB27
DDR0_DQ[60]/DDR1_DQ[44]
BA27
DDR0_DQ[61]/DDR1_DQ[45]
BA25
DDR0_DQ[62]/DDR1_DQ[46]
BB25
DDR0_DQ[63]/DDR1_DQ[47]
AU27
DDR1_DQ[48]
AT27
DDR1_DQ[49]
AT25
DDR1_DQ[50]
AU25
DDR1_DQ[51]
AP27
DDR1_DQ[52]
AN27
DDR1_DQ[53]
AN25
DDR1_DQ[54]
AP25
DDR1_DQ[55]
AT22
DDR1_DQ[56]
AU22
DDR1_DQ[57]
AU21
DDR1_DQ[58]
AT21
DDR1_DQ[59]
AN22
DDR1_DQ[60]
AP22
DDR1_DQ[61]
AP21
DDR1_DQ[62]
AN21
DDR1_DQ[63]
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
1 2
R506
R506
220KR2F-GP
220KR2F-GP
SKYLAKE_ULT
SKYLAKE_ULT
DDR1_MA[12]/DDR1_CAA[6]/DDR1_MA[ 12]
DDR1_MA[11]/DDR1_CAA[7]/DDR1_MA[ 11]
DDR1_MA[15]/DDR1_CAA[8]/DDR1_ACT #
DDR1_MA[14]/DDR1_CAA[9]/DDR1_BG[1]
DDR1_MA[13]/DDR1_CAB[0]/DDR1_MA[ 13]
DDR1_CAS#/DDR1_CAB[1]/DDR1_MA[15]
DDR1_RAS#/DDR1_CAB[3]/DDR1_MA[16]
DDR1_MA[10]/DDR1_CAB[7]/DDR1_MA[ 10]
DDR CH - B
DDR CH - B
SM_PGCNTL_R [51]
3 OF 20
3 OF 20
AN45
DDR1_CKN[0]
AN46
DDR1_CKN[1]
AP45
DDR1_CKP[0]
AP46
DDR1_CKP[1]
AN56
DDR1_CKE[0]
AP55
DDR1_CKE[1]
AN55
DDR1_CKE[2]
AP53
DDR1_CKE[3]
BB42
DDR1_CS#[0]
AY42
DDR1_CS#[1]
BA42
DDR1_ODT[0]
AW42
DDR1_ODT[1]
DDR1_MA[3]
DDR1_MA[4]
DDR1_DQSN[6]
DDR1_DQSP[6]
DDR1_DQSN[7]
DDR1_DQSP[7]
DDR1_ALERT#
DDR1_PAR
DRAM_RESET#
DDR_RCOMP[0]
DDR_RCOMP[1]
DDR_RCOMP[2]
AY48
AP50
BA48
BB48
AP48
AP52
AN50
AN48
AN53
AN52
BA43
AY43
AY44
AW44
BB44
AY47
BA44
AW46
AY46
BA46
BB46
BA47
BA38
AY38
AY34
BA34
AT38
AR38
AT32
AR32
BA30
AY30
AY26
BA26
AR25
AR27
AR22
AR21
AN43
AP43
AT13
AR18
AT18
AU18
DDR1_MA[5]/DDR1_CAA[0]/DDR1_MA[ 5]
DDR1_MA[9]/DDR1_CAA[1]/DDR1_MA[ 9]
DDR1_MA[6]/DDR1_CAA[2]/DDR1_MA[ 6]
DDR1_MA[8]/DDR1_CAA[3]/DDR1_MA[ 8]
DDR1_MA[7]/DDR1_CAA[4]/DDR1_MA[ 7]
DDR1_BA[2]/DDR1_CAA[5]/DDR1_BG[0]
DDR1_WE#/DDR1_CAB[2]/DDR1_MA[14]
DDR1_BA[0]/DDR1_CAB[4]/DDR1_BA[0]
DDR1_MA[2]/DDR1_CAB[5]/DDR1_MA[ 2]
DDR1_BA[1]/DDR1_CAB[6]/DDR1_BA[1]
DDR1_MA[1]/DDR1_CAB[8]/DDR1_MA[ 1]
DDR1_MA[0]/DDR1_CAB[9]/DDR1_MA[ 0]
DDR0_DQSN[4]/DDR1_DQSN[0]
DDR0_DQSP[4]/DDR1_DQSP[0]
DDR0_DQSN[5]/DDR1_DQSN[1]
DDR0_DQSP[5]/DDR1_DQSP[1]
DDR1_DQSN[4]/DDR1_DQSN[2]
DDR1_DQSP[4]/DDR1_DQSP[2]
DDR1_DQSN[5]/DDR1_DQSN[3]
DDR1_DQSP[5]/DDR1_DQSP[3]
DDR0_DQSN[6]/DDR1_DQSN[4]
DDR0_DQSP[6]/DDR1_DQSP[4]
DDR0_DQSN[7]/DDR1_DQSN[5]
DDR0_DQSP[7]/DDR1_DQSP[5]
Design Guideline:
SM_RCOMP keep routing length less than 500 mils.
M_B_A5
M_B_A9
M_B_A6
M_B_A8
M_B_A7
M_B_A12
M_B_A11
M_B_ACT_N
M_B_A13
M_B_A15
M_B_A14
M_B_A16
M_B_A2
M_B_A10
M_B_A1
M_B_A0
M_B_A3
M_B_A4
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_B_DQS_DN4
M_B_DQS_DP4
M_B_DQS_DN5
M_B_DQS_DP5
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
M_B_DQS_DN6
M_B_DQS_DP6
M_B_DQS_DN7
M_B_DQS_DP7
SM_DRAMRST #
SM_RCOMP_0
SM_RCOMP_1
SM_RCOMP_2
#543016
M_B_CLK#0 [13]
M_B_CLK#1 [13]
M_B_CLK0 [13]
M_B_CLK1 [13]
M_B_CKE0 [13]
M_B_CKE1 [13]
M_B_CS#0 [13]
M_B_CS#1 [13]
M_B_DIMB_ODT0 [13]
M_B_DIMB_ODT1 [13]
M_B_A5 [13]
M_B_A9 [13]
M_B_A6 [13]
M_B_A8 [13]
M_B_A7 [13]
M_B_BG0 [13]
M_B_A12 [13]
M_B_A11 [13]
M_B_ACT_N [13]
M_B_BG1 [13]
M_B_A13 [13]
M_B_A15 [13]
M_B_A14 [13]
M_B_A16 [13]
M_B_BA0 [13]
M_B_A2 [13]
M_B_BA1 [13]
M_B_A10 [13]
M_B_A1 [13]
M_B_A0 [13]
M_B_A3 [13]
M_B_A4 [13]
M_A_DQS4
M_A_DQS5
M_B_DQS4
M_B_DQS5
M_A_DQS6
M_A_DQS7
M_B_DQS6
M_B_DQS7
M_B_ALERT_N [13]
M_B_PARITY [13]
R501 121R2F-GP R501 121R2F-GP
1 2
R502 80D6R2F-L-G P R502 80D6R2F-L-G P
1 2
R503 100R2F-L1-GP- U R503 100R2F-L1 -GP-U
1 2
Layout Note:
1D2V_S3
1 2
close to CPU
R505
R505
470R2F-GP
470R2F-GP
1 2
R504
R504
1 2
0R0402-PAD
0R0402-PAD
D502
D502
AZ5725-01FDR 7G-GP
AZ5725-01FDR 7G-GP
83.05725.0A0
83.05725.0A0
DDR4_DR AMRST# [12,13]
2015/11/18 Modify
M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7
M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
A A
5
4
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7
3
M_A_DQS_DN[7: 0] [12]
M_A_DQS_DP[7:0] [12]
M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7
M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7
2
M_B_DQS_DN[7: 0] [13]
M_B_DQS_DP[7:0] [13]
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CPU_(DDR)
CPU_(DDR)
CPU_(DDR)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
5 106 Thursday, Feb ruary 25, 2016
5 106 Thursday, Feb ruary 25, 2016
5 106 Thursday, Feb ruary 25, 2016
X02
X02
X02
Page 6
5
4
3
2
1
Main Func = CPU
CPU1S
CPU1S
RESERVED SIGNALS-1
D D
C C
TP601 TPAD14-OP- GP TP601 TPAD1 4-OP-GP
TP602 TPAD14-OP- GP TP602 TPAD1 4-OP-GP
TP612 TPAD14-O P-GP TP612 TPAD 14-OP-GP
TP613 TPAD14-O P-GP TP613 TPAD 14-OP-GP
PCH strap pin:
CFG3
CFG4
B B
1 2
DY
DY
[BDW Only]PHYSICAL_DEBUG_ENABLED (DFX PRIVACY)
R604
R604
1KR2J-1-GP
1KR2J-1-GP
CFG[3]
(#543016)
1 2
DISPLAY PORT PRESENCE STRAP
R605
R605
1KR2J-1-GP
1KR2J-1-GP
CFG[4]
CFG0
TP618 TPAD14-OP- GP TP618 TPAD1 4-OP-GP
1
CFG1
TP619 TPAD14-OP- GP TP619 TPAD1 4-OP-GP
1
CFG2
TP620 TPAD14-OP- GP TP620 TPAD1 4-OP-GP
1
CFG3
TP621 TPAD14-OP- GP TP621 TPAD1 4-OP-GP
1
CFG4
TP622 TPAD14-OP- GP TP622 TPAD1 4-OP-GP
1
CFG5
TP623 TPAD14-OP- GP TP623 TPAD1 4-OP-GP
1
CFG6
TP624 TPAD14-OP- GP TP624 TPAD1 4-OP-GP
1
CFG7
TP625 TPAD14-OP- GP TP625 TPAD1 4-OP-GP
1
CFG8
TP626 TPAD14-OP- GP TP626 TPAD1 4-OP-GP
1
CFG9
TP627 TPAD14-OP- GP TP627 TPAD1 4-OP-GP
1
CFG10
TP628 TPAD14-OP- GP TP628 TPAD1 4-OP-GP
1
CFG11
TP629 TPAD14-OP- GP TP629 TPAD1 4-OP-GP
1
CFG12
TP630 TPAD14-OP- GP TP630 TPAD1 4-OP-GP
1
CFG13
TP631 TPAD14-OP- GP TP631 TPAD1 4-OP-GP
1
CFG14
TP632 TPAD14-OP- GP TP632 TPAD1 4-OP-GP
1
CFG15
TP633 TPAD14-OP- GP TP633 TPAD1 4-OP-GP
1
CFG16
TP634 TPAD14-OP- GP TP634 TPAD1 4-OP-GP
1
CFG17
TP635 TPAD14-OP- GP TP635 TPAD1 4-OP-GP
1
CFG18
TP636 TPAD14-OP- GP TP636 TPAD1 4-OP-GP
1
CFG19
TP637 TPAD14-OP- GP TP637 TPAD1 4-OP-GP
1
CFG_RCOM P
R601 49D9R2F-GP R601 49D9R2F-GP
1 2
ITP_PMODE
TP638 TPAD14-OP- GP TP638 TPAD1 4-OP-GP
1
RSVD_TP_BA70
1
RSVD_TP_BA68
1
RSVD_F65
1
RSVD_G65
1
0 : ENABLED
SET DFX ENABLED BIT IN DEBUG INTERFACE MSR
1 : DISABLED
0 : ENABLED
An external Display Port device is connected to the Embedded Display Port.
1 : DISABLED (Default)
No Physical Display Port attached to Embedded DisplayPort*. No connect for disable.
E68
B67
D65
D67
E70
C68
D68
C67
F71
G69
F70
G68
H70
G71
H69
G70
E63
F63
E66
F66
E60
E8
AY2
AY1
D1
D3
K46
K45
AL25
AL27
C71
B70
F60
A52
BA70
BA68
J71
J68
F65
G65
F61
E61
RESERVED SIGNALS-1
CFG[0]
CFG[1]
CFG[2]
CFG[3]
CFG[4]
CFG[5]
CFG[6]
CFG[7]
CFG[8]
CFG[9]
CFG[10]
CFG[11]
CFG[12]
CFG[13]
CFG[14]
CFG[15]
CFG[16]
CFG[17]
CFG[18]
CFG[19]
CFG_RCOMP
ITP_PMODE
RSVD_AY2
RSVD_AY1
RSVD_D1
RSVD_D3
RSVD_K46
RSVD_K45
RSVD_AL25
RSVD_AL27
RSVD_C71
RSVD_B70
RSVD_F60
RSVD_A52
RSVD_TP_BA70
RSVD_TP_BA68
RSVD_J71
RSVD_J68
VSS_F65
VSS_G65
RSVD_F61
RSVD_E61
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
RSVD_TP_AW71
RSVD_TP_AW70
19 OF 20
19 OF 20
RSVD_TP_BB68
RSVD_TP_BB69
RSVD_TP_AK13
RSVD_TP_AK12
RSVD_BB2
RSVD_BA3
RSVD_D5
RSVD_D4
RSVD_B2
RSVD_C2
RSVD_B3
RSVD_A3
RSVD_AW1
RSVD_E1
RSVD_E2
RSVD_BA4
RSVD_BB4
RSVD_A4
RSVD_C4
RSVD_A69
RSVD_B69
RSVD_AY3
RSVD_D71
RSVD_C70
RSVD_C54
RSVD_D54
VSS_AY71
ZVM#
RSVD_AW71
RSVD_AW70
MSM#
PROC_SELECT#
RSVD_TP_BB68
BB68
RSVD_TP_BB69
BB69
RSVD_TP_AK13
AK13
RSVD_TP_AK12
AK12
BB2
BA3
TP5_AU5
AU5
TP5
TP6_AT5
AT5
TP6
D5
D4
B2
C2
B3
A3
AW1
E1
E2
BA4
BB4
A4
C4
TP4_BB5
BB5
TP4
A69
B69
AY3
D71
C70
C54
D54
TP1_AY4
AY4
TP1
TP2_BB3
BB3
TP2
VSS_AY71
AY71
ZVM#
AR56
RSVD_TP_AW 71
AW71
RSVD_TP_AW 70
AW70
MSM#
AP56
C64
PROC_SELEC T#
1
1
1
1
1
1
1
1
1
R602 0R0402-PAD R602 0R0402-PAD
1 2
1
1
1
1 2
R603
R603
100KR2J-1-GP
100KR2J-1-GP
TP603 TPAD14-OP-G P TP603 TPAD14- OP-GP
TP604 TPAD14-OP-G P TP604 TPAD14- OP-GP
TP605 TPAD14-OP-G P TP605 TPAD14- OP-GP
TP606 TPAD14-OP-G P TP606 TPAD14- OP-GP
TP607 TPAD14-OP-G P TP607 TPAD14- OP-GP
TP608 TPAD14-OP-G P TP608 TPAD14- OP-GP
TP609 TPAD14-OP-G P TP609 TPAD14- OP-GP
TP610 TPAD14-OP-G P TP610 TPAD14- OP-GP
TP611 TPAD14-OP-G P TP611 TPAD14- OP-GP
TP614 TPAD14-OP-G P TP614 TPAD14- OP-GP
TP615 TPAD14-OP-G P TP615 TPAD14- OP-GP
TP617 TPAD14-OP-G P TP617 TPAD14- OP-GP
DY
DY
ZVM# [40]
#54469 CRB.
+VCCST_CP U
2016/01/11 modify
SKL(#543016):
Processor strap CFG[4] should be pulled low to enable embedded DisplayPort*
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CPU_(RESERVED)
CPU_(RESERVED)
CPU_(RESERVED)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
6 106 Thursday, Feb ruary 25, 2016
6 106 Thursday, Feb ruary 25, 2016
6 106 Thursday, Feb ruary 25, 2016
A00
A00
A00
Page 7
R702
R702
1 2
23e
23e
0R2J-2-GP
0R2J-2-GP
R704
R704
1 2
23e
23e
0R2J-2-GP
0R2J-2-GP
5
CPU1L
CPU1L
VCC_CORE VCC_CORE
+VCCCOREG0
TP701 TPAD14-OP-GP TP701 TPAD14-OP-GP
1
+VCCCOREG1
TP707 TPAD14-OP-GP TP707 TPAD14-OP-GP
1
+V_EDRAM_VR
3A
VCC_EDRAM_FUSEPRG
VCCSENSE_EDRAM_VR
VSSSENSE_EDRAM_VR
+V_EOPIO_VR
3A
VCCSENSE_EOPIO_VR
VSSSENSE_EOPIO_VR
+V_EDRAM_VR
1 2
R724
R724
100R2F-L1-GP-U
100R2F-L1-GP-U
23e
23e
VCCSENSE_EDRAM_VR
VSSSENSE_EDRAM_VR
1 2
R725
R725
100R2F-L1-GP-U
100R2F-L1-GP-U
23e
23e
+V_EOPIO_VR
1 2
R729
R729
100R2F-L1-GP-U
100R2F-L1-GP-U
23e
23e
VCCSENSE_EOPIO_VR
VSSSENSE_EOPIO_VR
1 2
R731
R731
100R2F-L1-GP-U
100R2F-L1-GP-U
23e
23e
A30
VCC_A3 0
A34
VCC_A3 4
A39
VCC_A3 9
A44
VCC_A4 4
AK33
VCC_AK 33
AK35
VCC_AK 35
AK37
VCC_AK 37
AK38
VCC_AK 38
AK40
VCC_AK 40
AL33
VCC_AL 33
AL37
VCC_AL 37
AL40
VCC_AL 40
AM32
VCC_AM3 2
AM33
VCC_AM3 3
AM35
VCC_AM3 5
AM37
VCC_AM3 7
AM38
VCC_AM3 8
G30
VCC_G3 0
K32
VCCG0
AK32
VCCG1
AB62
VCCOPC _AB62
P62
VCCOPC _P62
V62
VCCOPC _V62
H63
VCC_OP C_1P8_ H63
G61
VCC_OP C_1P8_ G61
AC63
VCCOPC _SENSE
AE63
VSSOPC _SENSE
AE62
VCCEOP IO
AG62
VCCEOP IO
AL63
VCCEOP IO_SENS E
AJ62
VSSEOP IO_SENS E
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
RSVD_K32
RSVD_AK32
CPU POWER 1 OF 4
CPU POWER 1 OF 4
SKYLAKE_ULT
SKYLAKE_ULT
12 OF 20
12 OF 20
VCC_G3 2
VCC_G3 3
VCC_G3 5
VCC_G3 7
VCC_G3 8
VCC_G4 0
VCC_G4 2
VCC_J3 0
VCC_J3 3
VCC_J3 7
VCC_J4 0
VCC_K3 3
VCC_K3 5
VCC_K3 7
VCC_K3 8
VCC_K4 0
VCC_K4 2
VCC_K4 3
VCC_SE NSE
VSS_SE NSE
VIDALE RT#
VIDSCK
VIDSOUT
VCCSTG _G20
G32
G33
G35
G37
G38
G40
G42
J30
J33
J37
J40
K33
K35
K37
K38
K40
K42
K43
E32
E33
B63
A63
D64
G20
H_CPU_SVIDALRT#
H_CPU_SVIDCLK
H_CPU_SVIDDAT
+VCCFUSEPRG
VCC_SENSE [46]
VSS_SENSE [46]
Main Func = CPU
D D
140mA
+V1.8S_EDRAM
+V_EDRAM_VR
12
12
C701 SC10U6D3V3MX-GP
C701 SC10U6D3V3MX-GP
C702 SC10U6D3V3MX-GP
C702 SC10U6D3V3MX-GP
23e
23e
23e
23e
+V_EOPIO_VR
12
12
C704 SC10U6D3V3MX-GP
C704 SC10U6D3V3MX-GP
C703 SC10U6D3V3MX-GP
C703 SC10U6D3V3MX-GP
23e
23e
23e
23e
C C
R703
R703
1 2
0R0603-PAD
0R0603-PAD
+VCCSTG
4
CPU1M
CPU1M
+VCCGT
VCCGT_SENSE [46]
VSSGT_SENSE [46]
A48
VCCGT
A53
VCCGT
A58
VCCGT
A62
VCCGT
A66
VCCGT
AA63
VCCGT
AA64
VCCGT
AA66
VCCGT
AA67
VCCGT
AA69
VCCGT
AA70
VCCGT
AA71
VCCGT
AC64
VCCGT
AC65
VCCGT
AC66
VCCGT
AC67
VCCGT
AC68
VCCGT
AC69
VCCGT
AC70
VCCGT
AC71
VCCGT
J43
VCCGT
J45
VCCGT
J46
VCCGT
J48
VCCGT
J50
VCCGT
J52
VCCGT
J53
VCCGT
J55
VCCGT
J56
VCCGT
J58
VCCGT
J60
VCCGT
K48
VCCGT
K50
VCCGT
K52
VCCGT
K53
VCCGT
K55
VCCGT
K56
VCCGT
K58
VCCGT
K60
VCCGT
L62
VCCGT
L63
VCCGT
L64
VCCGT
L65
VCCGT
L66
VCCGT
L67
VCCGT
L68
VCCGT
L69
VCCGT
L70
VCCGT
L71
VCCGT
M62
VCCGT
N63
VCCGT
N64
VCCGT
N66
VCCGT
N67
VCCGT
N69
VCCGT
J70
VCCGT_ SENSE
J69
VSSGT_ SENSE
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
CPU POWER 2 OF 4
CPU POWER 2 OF 4
SKYLAKE_ULT
SKYLAKE_ULT
13 OF 20
13 OF 20
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGT
VCCGTX _AK42
VCCGTX _AK43
VCCGTX _AK45
VCCGTX _AK46
VCCGTX _AK48
VCCGTX _AK50
VCCGTX _AK52
VCCGTX _AK53
VCCGTX _AK55
VCCGTX _AK56
VCCGTX _AK58
VCCGTX _AK60
VCCGTX _AK70
VCCGTX _AL43
VCCGTX _AL46
VCCGTX _AL50
VCCGTX _AL53
VCCGTX _AL56
VCCGTX _AL60
VCCGTX _AM48
VCCGTX _AM50
VCCGTX _AM52
VCCGTX _AM53
VCCGTX _AM56
VCCGTX _AM58
VCCGTX _AU58
VCCGTX _AU63
VCCGTX _BB57
VCCGTX _BB66
VCCGTX _SENSE
VSSGTX _SENSE
N70
N71
R63
R64
R65
R66
R67
R68
R69
R70
R71
T62
U65
U68
U71
W63
W64
W65
W66
W67
W68
W69
W70
W71
Y62
AK42
AK43
AK45
AK46
AK48
AK50
AK52
AK53
AK55
AK56
AK58
AK60
AK70
AL43
AL46
AL50
AL53
AL56
AL60
AM48
AM50
AM52
AM53
AM56
AM58
AU58
AU63
BB57
BB66
AK62
AL61
+VCCGT
+VCCGT
3
2016/02/16 modify
#544669 CRB.
R705
R705
1 2
0R0805-PAD
0R0805-PAD
2
1D2V_S3
12
C719
C719
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+VDDQ_CPU_CLK
C715 SC10U6D3V3MX-GP C715 SC10U6D3V3MX-GP
12
+VCCST_CPU
C716 SC1U10V2KX-1GP C716 SC1U10V2KX-1GP
12
+VCCSTG
C717 SC1U10V2KX-1GPDYC717 SC1U10V2KX-1GP
12
DY
1D2V_S3
C718 SCD1U16V2KX-3GP C718 SCD1U16V2KX-3GP
12
+VCCSFR
VCC_CORE
+VCCGT
1 2
1 2
1 2
1 2
R719
R719
100R2F-L1-GP-U
100R2F-L1-GP-U
R720
R720
100R2F-L1-GP-U
100R2F-L1-GP-U
R721
R721
100R2F-L1-GP-U
100R2F-L1-GP-U
R722
R722
100R2F-L1-GP-U
100R2F-L1-GP-U
12
+VDDQ_CPU_CLK 1D2V_S3
AU23
AU28
AU35
AU42
BB23
BB32
BB41
BB47
BB51
AM40
0.04 A
A18
A22
AL23
K20
K21
0.12 A
12
C721
C721
C720
C720
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VCC_SENSE [46]
VSS_SENSE [46]
Layout Note:
1. Place close to CPU
2. VCC_SENSE/ VSS_SENSE
impedance=50 ohm
3. Length match<25mil
VCCGT_SENSE [46]
VSSGT_SENSE [46]
CPU1N
CPU1N
CPU POWER 3 OF 4
CPU POWER 3 OF 4
VDDQ_A U23
VDDQ_A U28
VDDQ_A U35
VDDQ_A U42
VDDQ_B B23
VDDQ_B B32
VDDQ_B B41
VDDQ_B B47
VDDQ_B B51
VDDQC
VCCST
VCCSTG _A22
VCCPLL _OC
VCCPLL _K20
VCCPLL _K21
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
VCCIO_ SENSE
VSSIO_ SENSE
VSSSA_ SENSE
VCCSA_ SENSE
14 OF 20
14 OF 20
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCIO
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
VCCSA
AK28
AK30
AL30
AL42
AM28
AM30
AM42
AK23
AK25
G23
G25
G27
G28
J22
J23
J27
K23
K25
K27
K28
K30
AM23
AM22
H21
H20
VCCSA_SENSE
VSSSA_SENSE
+VCCIO
+VCCIO(ICCMAX.=2.73A
+VCCSA
+VCCSA
1 2
1 2
R735
R735
100R2F-L1-GP-U
100R2F-L1-GP-U
R734
R734
100R2F-L1-GP-U
100R2F-L1-GP-U
VSSSA_SENSE [46]
VCCSA_SENSE [46]
1
Layout Note:
SVID DATA
+VCCST_CPU
CLOSE TO CPU
B B
1 2
H_CPU_SVIDDAT
SVID CLOCK
H_CPU_SVIDCLK
H_CPU_SVIDALRT#
220R2J-L2-GP
A A
5
220R2J-L2-GP
The total Length of Data and Clock (from CPU to each VR) m ust be equal (±0.1 inch).
Route the Alert signal betwee n the Clock and the Data sign als.
#544669
R726
R726
100R2F-L1-GP-U
100R2F-L1-GP-U
R709
R709
1 2
0R0402-PAD
0R0402-PAD
+VCCST_CPU
1 2
DY
DY
R732
R732
1 2
0R0402-PAD
0R0402-PAD
+VCCST_CPU
#544669
1 2
CLOSE TO CPU
R727
R727
56R2J-4-GP
56R2J-4-GP
R728
R728
1 2
4
R723
R723
54D9R2F-L1-GP
54D9R2F-L1-GP
VR_SVID_ALERT# [46]
#544669
CLOSE TO VR
VR_SVID_DATA [46]
VR_SVID_CLK [46]
SVID_543016:
3
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Thursday, February 25, 2016
Thursday, February 25, 2016
Thursday, February 25, 2016
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU(VCC_CORE)
CPU(VCC_CORE)
CPU(VCC_CORE)
Starload SKL-U
Starload SKL-U
Starload SKL-U
7 106
7 106
7 106
A00
A00
A00
Page 8
5
4
3
2
1
Main Func = CPU
D D
CPU1A
CPU1A
SKYLAKE_ULT
HDMI_DATA 2# [57]
HDMI_DATA 2 [57]
HDMI_DATA 1# [57]
HDMI_DATA 1 [57]
HDMI
Dummy, Vendor suggest
20141117
3D3V_S0
SRN2K2J -1-GP
C C
3D3V_S0
SRN2K2J -1-GP
1
DY
DY
2 3
RN801
RN801
RN803
RN803
2 3
1
SRN2K2J -1-GP
SRN2K2J -1-GP
CPU_DP1 _CTRL_DATA
4
CPU_DP1 _CTRL_CLK
CPU_DP2 _CTRL_DATA
CPU_DP2 _CTRL_CLK
4
DP and DP to VGA
HDMI
+VCCIO
Check
R801
R801
1 2
24D9R2F -L-GP
24D9R2F -L-GP
HDMI_DATA 0# [57]
HDMI_DATA 0 [57]
HDMI_CLK# [57]
HDMI_CLK [57]
PCH_DPC _N0 [38]
PCH_DPC _P0 [38]
PCH_DPC _N1 [38]
PCH_DPC _P1 [38]
PCH_DPC _N2 [38]
PCH_DPC _P2 [38]
PCH_DPC _N3 [38]
PCH_DPC _P3 [38]
CPU_DP1 _CTRL_CLK [57]
CPU_DP1 _CTRL_DATA [57]
CPU_DP2 _CTRL_CLK
CPU_DP2 _CTRL_DATA
EDP_COM P
E55
DDI1_TXN[0]
F55
DDI1_TXP[0]
E58
DDI1_TXN[1]
F58
DDI1_TXP[1]
F53
DDI1_TXN[2]
G53
DDI1_TXP[2]
F56
DDI1_TXN[3]
G56
DDI1_TXP[3]
C50
DDI2_TXN[0]
D50
DDI2_TXP[0]
C52
DDI2_TXN[1]
D52
DDI2_TXP[1]
A50
DDI2_TXN[2]
B50
DDI2_TXP[2]
D51
DDI2_TXN[3]
C51
DDI2_TXP[3]
L13
GPP_E18/DDPB_CTRLCLK
L12
GPP_E19/DDPB_CTRLDATA
N7
GPP_E20/DDPC_CTRLCLK
N8
GPP_E21/DDPC_CTRLDATA
N11
GPP_E22/DDPD_CTRLCLK
N12
GPP_E23/DDPD_CTRLDATA
E52
EDP_RCOMP
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
(#543016) The S kylake U/Y pro cessor supports only two DDI ports - Port 1 and Port 2.
SKYLAKE_ULT
DDI
DDI
DISPLAY SIDEBANDS
DISPLAY SIDEBANDS
EDP
EDP
GPP_E13/DDPB_HPD0
GPP_E14/DDPC_HPD1
GPP_E15/DDPD_HPD2
GPP_E16/DDPE_HPD3
1 OF 20
1 OF 20
EDP_TXN[0]
EDP_TXP[0]
EDP_TXN[1]
EDP_TXP[1]
EDP_TXN[2]
EDP_TXP[2]
EDP_TXN[3]
EDP_TXP[3]
EDP_AUXN
EDP_AUXP
EDP_DISP_UTIL
DDI1_AUXN
DDI1_AUXP
DDI2_AUXN
DDI2_AUXP
DDI3_AUXN
DDI3_AUXP
GPP_E17/EDP_HPD
EDP_BKLTEN
EDP_BKLTCTL
EDP_VDDEN
C47
C46
D46
C45
A45
B45
A47
B47
E45
F45
B52
G50
F50
E48
F48
G46
F46
L9
L7
L6
N9
L10
R12
R11
U13
EDP_DISP_ UTIL
CPU_DP2 _HPD
EDP_TX0 _DN [55]
EDP_TX0 _DP [55]
EDP_TX1 _DN [55]
EDP_TX1 _DP [55]
EDP_TX2 _DN [55]
EDP_TX2 _DP [55]
EDP_TX3 _DN [55]
EDP_TX3 _DP [55]
EDP_AUX _DN [55]
EDP_AUX _DP [55 ]
1
TP801 TP AD14-OP-GP TP801 TP AD14-OP-GP
CPU_DP1 _HPD [57]
SIO_EXT_S MI# [24]
EDP_HPD [55]
DPB_AUX N [38]
DPB_AUX P [38]
L_BKLT_ EN [24]
L_BKLT_ CTRL [55]
EDP_VDD _EN [55 ]
(#543016) eDP_RCOMP Guideline
Signal Tr ace
Width
eDP_RCOMP 20 mils 25 mils 24.9 Ω ±1%
B B
(#543016) DDI Disabling and Termination Guidelines
Port Strap Enable Port D isable Port
Port 1
DDPB_CTRLDATA
Port 2
DDPC_CTRLDATA
A A
Design Guidelin e:
Skylake process or signal eDP_ RCOMP should be connected to the VCCIO rail via a single 24 .9 ±1% Ω resis tor.
5
Isolation
Spacing
PU to 3.3 V wit h 2.2-k
±5% resistor
PU to 3.3 V wit h 2.2-k
±5% resistor
Resistor
Value
Length
Max = 100 mils
NC
NC
4
3D3V_S0
SIO_EXT_S MI#
3
R802 10K R2J-3-GP R802 10KR2 J-3-GP
1 2
2
CPU_DP2 _HPD
R804 0R2 J-2-GP
R804 0R2 J-2-GP
1 2
TypeC
TypeC
R803
R803
100KR2J -1-GP
100KR2J -1-GP
TypeC
TypeC
1 2
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
CPU_(DISPLAY)
CPU_(DISPLAY)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_(DISPLAY)
Starload SKL-U
Starload SKL-U
Starload SKL-U
CPU_DP_ HPD_R [37,38]
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
8 106 Thursday, February 25, 20 16
8 106 Thursday, February 25, 20 16
8 106 Thursday, February 25, 20 16
1
A00
A00
A00
Page 9
5
4
3
2
1
Main Func = CPU
D D
C C
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
A3
A3
A3
(Reserved)
(Reserved)
(Reserved)
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
9 106 Thursday, February 18, 20 16
9 106 Thursday, February 18, 20 16
9 106 Thursday, February 18, 20 16
A00
A00
A00
Page 10
Main Func = CPU
5
4
3
2
1
D D
CORE
U-line 23e 28W
IccMax current-10ms max = 34 A
22U 0603 x 35(5 DY)
VCC_CORE
PC1003
PC1003
PC1005
PC1002
PC1002
12
PC1011
PC1011
12
PC1022
PC1022
C C
12
PC1005
PC1004
PC1004
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1014
PC1014
PC1013
PC1013
PC1012
PC1012
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1023
PC1023
PC1025
PC1025
PC1024
PC1024
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SLICED GT
U-line 23e 28W
IccMax current-10ms max[A] = 67 A
22U 0603 x35 (5 DY)
+VCCGT
PC1038
PC1038
PC1039
PC1039
PC1037
PC1037
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1044
PC1044
PC1046
PC1046
PC1045
PC1045
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
20140814 DAVID
EMI reserve , 20141118
PC1009
PC1009
PC1010
PC1006
PC1006
PC1007
PC1007
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1015
PC1015
PC1016
PC1016
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1026
PC1026
PC1027
PC1027
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1041
PC1041
PC1040
PC1040
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1048
PC1048
PC1047
PC1047
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1010
EC1002
PC1008
PC1008
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1018
PC1018
PC1017
PC1017
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1028
PC1028
PC1029
PC1029
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1043
PC1043
PC1042
PC1042
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1049
PC1049
PC1050
PC1050
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
EC1002
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
DY
PC1020
PC1020
PC1019
PC1019
PC1021
PC1021
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1030
PC1030
PC1031
PC1031
12
12
PC1032
PC1032
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
12
DY
DY
Remove PC1033 and PC1035 (power team request)
EC1005
EC1005
EC1006
EC1006
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DY
DY
PC1053
PC1053
PC1052
PC1052
PC1051
PC1051
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
12
DY
DY
Do Not Stuff
Do Not Stuff
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
Do Not Stuff
Do Not Stuff
PC1054
PC1054
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
(#543016 PDG)
EC1003
EC1003
EC1004
EC1004
12
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PC1034
PC1034
PC1036
PC1036
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
DY
DY
DY
PC1055
PC1055
PC1057
PC1057
PC1056
PC1056
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
B B
PC1060
PC1060
PC1059
PC1059
PC1058
PC1058
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1063
PC1063
PC1062
PC1062
PC1061
PC1061
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1065
PC1065
PC1064
PC1064
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1001
PC1001
PC1068
PC1068
PC1069
PC1066
PC1066
PC1067
PC1067
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
DY
PC1069
PC1070
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
DY
PC1070
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
DY
DY
DY
DY
DY
DY
VCCSA
22U 0603 x13 (5 DY)
+VCCSA
PC1075
PC1075
PC1076
PC1076
PC1078
PC1071
PC1071
PC1072
PC1072
PC1074
PC1074
PC1073
PC1073
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
PC1078
PC1077
PC1077
12
12
12
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
2015/10/16 modify (Power team request)
A A
5
4
EC1001
EC1001
EC1007
EC1007
12
12
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
CPU_(Power CAP1)
CPU_(Power CAP1)
CPU_(Power CAP1)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
10 106 Thursday, February 18, 2016
10 106 Thursday, February 18, 2016
10 106 Thursday, February 18, 2016
A00
A00
A00
Page 11
5
Main Func = CPU
4
3
2
1
PCH DERIVED RAILS
1D0V_S5
D D
+VCCPRIM_ CORE
R1101
R1101
1 2
0R1206-P AD
0R1206-P AD
+V1.00A_ SIP
R1102
R1102
1 2
0R0603-P AD
0R0603-P AD
3D3V_S5 _PCH +V3.3A_S IP
R1103
R1103
C C
1 2
0R0603-P AD
0R0603-P AD
+V1.8A +V1.8A_S IP
R1104
R1104
1 2
0R0603-P AD
0R0603-P AD
+VCCIO
DY
DY
DY
1 2
1 2
1 2
C1112
SC22U6D3V3MX-1-GPDYC1112
SC22U6D3V3MX-1-GP
C1113
SC22U6D3V3MX-1-GPDYC1113
SC22U6D3V3MX-1-GP
C1122
SC22U6D3V3MX-1-GPDYC1122
SC22U6D3V3MX-1-GP
+VCCPRIM_ CORE
C1114
SC1U10V2KX-1GP
C1114
SC1U10V2KX-1GP
1 2
1 2
DY
UNSLICED GT
+VCCGT
1 2
1 2
C1102
C1102
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
Dummy : 20150123 Dummy : 20150123
C1115
SC22U6D3V3MX-1-GPDYC1115
SC22U6D3V3MX-1-GP
C1103
C1103
1 2
C1104
C1104
DY
DY
Do Not Stuff
Do Not Stuff
1 2
C1105
C1105
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Do Not Stuff
Do Not Stuff
DY
DY
1 2
C1106
C1106
Do Not Stuff
Do Not Stuff
1 2
C1107
C1107
1U 0402 x 6
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+VCCMPHYGTAON_1P0(ICCMAX.=2.12A)
+VCCMPH YGTAON_1 P0_LS_SIP +VCCMPH YGTAON_1 P0_LS_SIP +VCCMPH YGTAON_1 P0_LS_SIP +VCCMPH YGTAON_1 P0_LS_SIP
C1117
SC1U10V2KX-1GP
C1117
SC1U10V2KX-1GP
C1116
SC1U10V2KX-1GP
C1116
SC1U10V2KX-1GP
1 2
1 2
VCCIO
+VCCIO
1 2
C1108
C1108
DY
DY
Do Not Stuff
Do Not Stuff
C1118
SC22U6D3V3MX-1-GPDYC1118
SC22U6D3V3MX-1-GP
1 2
DY
+VCCIO(ICCMAX.= 2.73A)
1 2
C1109
C1109
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1119
C1119
1 2
1 2
C1111
C1111
C1110
C1110
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
Layout Note:
1uF:
C1121
SC1U10V2KX-1GP
C1121
C1120
SC10U6D3V3MX-GPDYC1120
SC10U6D3V3MX-GP
1 2
SC1U10V2KX-1GP
1 2
DY
C1174 near N15
C1180 near K15
C1173 near AF20
C1172 near N18
C1175 near AB19
22uF :
C1182 C1184 near N15
10uF:
C1176 near N15
+VCCIO(ICCMAX.= 2.73A)
1 2
PC1102 SC22U6D3V3MX-1-GP PC1102 SC22U6D3V3MX-1-GP
B B
VCC_COR E
1 2
1 2
PC1104 Do Not StuffDYPC1104 Do Not Stuff
PC1103 SC22U6D3V3MX-1-GP PC1103 SC22U6D3V3MX-1-GP
DY
1 2
1 2
PC1106
PC1106
PC1105
PC1105
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
Size:0805 change to 0603
20141117
1U 0402 x 5
+V3.3A_S IP
C1123
SC10U6D3V3MX-GPDYC1123
SC10U6D3V3MX-GP
1 2
1D2V_S3
1 2
PC1107 SC10U6D3V3MX-GP PC1107 SC10U6D3V3MX-GP
1 2
PC1114 Do Not StuffDYPC1114 Do Not Stuff
DY
1 2
1 2
1 2
PC1109 SC10U6D3V3MX-GP PC1109 SC10U6D3V3MX-GP
PC1115
PC1115
1 2
1 2
PC1111
PC1111
PC1110
PC1110
SCD1U25V2KX-GP
SCD1U25V2KX-GP
EC1102
EC1102
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
1 2
PC1108 SC10U6D3V3MX-GP PC1108 SC10U6D3V3MX-GP
1 2
PC1101 Do Not StuffDYPC1101 Do Not Stuff
DY
1 2
PC1112
PC1112
PC1113
PC1113
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
Change to 0.1uF at 20150427 for Power team
EC1103
EC1103
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
1 2
DY
DY
1 2
DY
DY
DY
<Core Design>
<Core Design>
A A
1 2
C1124
C1124
1 2
C1125
C1125
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1126
C1126
1 2
1 2
C1101
C1101
C1127
C1127
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
RF request 2016/01/12 modify
U-line 23e 28W
IccMax current- 10ms max = 34 A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_(Power CAP2)
CPU_(Power CAP2)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
CPU_(Power CAP2)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
11 10 6 Thursday, February 18, 20 16
11 10 6 Thursday, February 18, 20 16
11 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 12
5
M_A_A0 [5]
M_A_A1 [5]
M_A_A2 [5]
M_A_A3 [5]
M_A_A4 [5]
M_A_A5 [5]
M_A_A6 [5]
M_A_A7 [5]
M_A_A8 [5]
M_A_A9 [5]
M_A_A10 [5]
M_A_A11 [5]
M_A_A12 [5]
M_A_A13 [5]
M_A_A14 [5]
M_A_A15 [5]
D D
C C
1D2V_S3
DDR4_DR AMRST#
1 2
ED1217
ED1217
AZ5725-01FDR 7G-GP
AZ5725-01FDR 7G-GP
1 2
R1215 240R 2F-1-GP
R1215 240R 2F-1-GP
M_A_A16 [5]
M_A_BA0 [5]
M_A_BA1 [5]
M_A_BG0 [5]
M_A_BG1 [5]
M_A_CLK0 [5]
M_A_CLK#0 [5]
M_A_CLK1 [5]
M_A_CLK#1 [5]
M_A_CKE0 [5]
M_A_CKE1 [5]
M_A_CS#0 [5]
M_A_CS#1 [5]
M_A_DIMA_ODT0 [5]
M_A_DIMA_ODT1 [5]
DDR4_DR AMRST# [5,13]
M_A_ACT_N [5]
M_A_ALERT_N [5]
DY
DY
M_A_PARITY [5]
1 2
C1229
C1229
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PCH_SMBDAT A [13,18]
PCH_SMBCLK [13,18]
M_VREF_CA_D IMMA
SA0_CHA_DIM0
SA1_CHA_DIM0
SA2_CHA_DIM0
TS#_DIMM0_1
DM1A
DM1A
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
WE#/A14
156
CAS#/A15
152
RAS#/A16
150
BA0
145
BA1
115
BG0
113
BG1
92
CB0/NC
91
CB1/NC
101
CB2/NC
105
CB3/NC
88
CB4/NC
87
CB5/NC
100
CB6/NC
104
CB7/NC
137
CK0_T
139
CK0_C
138
CK1_T/NF
140
CK1_C/NF
109
CKE0
110
CKE1
149
CS0#
157
CS1#
162
C0/CS2#/NC
165
C1/CS3#/NC
155
ODT0
161
ODT1
256
SA0
260
SA1
166
SA2
254
SDA
253
SCL
108
RESET#
114
ACT#
116
ALERT#
134
EVENT#/NF
143
PARITY
164
VREFCA
DDR4-260P-24-GP
DDR4-260P-24-GP
062.10011.00U1
062.10011.00U1
1 OF 4
1 OF 4
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
8
DQ0
7
DQ1
20
DQ2
21
DQ3
4
DQ4
3
DQ5
16
DQ6
17
DQ7
28
DQ8
29
DQ9
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246
Layout note: closed to Dimm
1D2V_S3
RN1201
RN1201
1
4
2 3
SRN1KJ-7-G P
SRN1KJ-7-G P
B B
M_VREF_CA_D IMMA
R1206
R1206
1 2
2R2F-GP
2R2F-GP
1 2
C1222
C1222
SCD022U16V2KX -3GP
SCD022U16V2KX -3GP
+V_VREF_PATH 1
1 2
R1209
R1209
24D9R2F-L-G P
24D9R2F-L-G P
V_SM_VREF_CN TA [5]
4
M_A_DQ0 [5]
M_A_DQ1 [5]
M_A_DQ2 [5]
M_A_DQ3 [5]
M_A_DQ4 [5]
M_A_DQ5 [5]
M_A_DQ6 [5]
M_A_DQ7 [5]
M_A_DQ8 [5]
M_A_DQ9 [5]
M_A_DQ10 [5]
M_A_DQ11 [5]
M_A_DQ12 [5]
M_A_DQ13 [5]
M_A_DQ14 [5]
M_A_DQ15 [5]
M_A_DQ16 [5]
M_A_DQ17 [5]
M_A_DQ18 [5]
M_A_DQ19 [5]
M_A_DQ20 [5]
M_A_DQ21 [5]
M_A_DQ22 [5]
M_A_DQ23 [5]
M_A_DQ24 [5]
M_A_DQ25 [5]
M_A_DQ26 [5]
M_A_DQ27 [5]
M_A_DQ28 [5]
M_A_DQ29 [5]
M_A_DQ30 [5]
M_A_DQ31 [5]
M_A_DQ32 [5]
M_A_DQ33 [5]
M_A_DQ34 [5]
M_A_DQ35 [5]
M_A_DQ36 [5]
M_A_DQ37 [5]
M_A_DQ38 [5]
M_A_DQ39 [5]
M_A_DQ40 [5]
M_A_DQ41 [5]
M_A_DQ42 [5]
M_A_DQ43 [5]
M_A_DQ44 [5]
M_A_DQ45 [5]
M_A_DQ46 [5]
M_A_DQ47 [5]
M_A_DQ48 [5]
M_A_DQ49 [5]
M_A_DQ50 [5]
M_A_DQ51 [5]
M_A_DQ52 [5]
M_A_DQ53 [5]
M_A_DQ54 [5]
M_A_DQ55 [5]
M_A_DQ56 [5]
M_A_DQ57 [5]
M_A_DQ58 [5]
M_A_DQ59 [5]
M_A_DQ60 [5]
M_A_DQ61 [5]
M_A_DQ62 [5]
M_A_DQ63 [5]
DDR4 SWAP 0212
3D3V_S0
R1204 10KR2F-L1 -GP
R1204 10KR2F-L1 -GP
R1205
R1205
0R0402-PAD
0R0402-PAD
3D3V_S0
0R0402-PAD
0R0402-PAD
3D3V_S0
0R0402-PAD
0R0402-PAD
1D2V_S3
跟 跟 跟 跟 sw確 確 確 確 確 確 確 確
1 2
DY
DY
1 2
R1208 10KR2F-L1 -GP
R1208 10KR2F-L1 -GP
1 2
DY
DY
R1210
R1210
1 2
R1211 10KR2F-L1 -GP
R1211 10KR2F-L1 -GP
1 2
DY
DY
R1212
R1212
1 2
DM1B
DM1B
DM8#/DBI#/NC
DDR4-260P-24-GP
DDR4-260P-24-GP
SA0_CHA_DIM0
SA1_CHA_DIM0
SA2_CHA_DIM0
2 OF 4
2 OF 4
DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T
DM0#/DBI0#
DM1#/DBI#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
11
13
32
34
53
55
74
76
177
179
198
200
219
221
240
242
95
97
12
33
54
75
178
199
220
241
96
DM1C
DM1C
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DDR4-260P-24-GP
DDR4-260P-24-GP
1D2V_S3
M_A_DQS_DN0
M_A_DQS_DP0
M_A_DQS_DN1
M_A_DQS_DP1
M_A_DQS_DN2
M_A_DQS_DP2
M_A_DQS_DN3
M_A_DQS_DP3
M_A_DQS_DN4
M_A_DQS_DP4
M_A_DQS_DN5
M_A_DQS_DP5
M_A_DQS_DN6
M_A_DQS_DP6
M_A_DQS_DN7
M_A_DQS_DP7
3 OF 4
3 OF 4
VDDSPD
VPP
VPP
VTT
261
262
NP1
NP2
1 2
C1208
C1208
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
12
C1214
C1214
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C1202
C1202
12
C1215
C1215
3
4 OF 4
DM1D
4 OF 4
DM1D
VSS1VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
1D2V_S3
3D3V_S0
255
257
259
258
261
262
NP1
NP2
0D6V_S0
2D5V_S3
12
1 2
C1228
C1228
R1216
R1216
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC2D2U10V3KX-L-GP
DY
DY
SC2D2U10V3KX-L-GP
DY
DY
39
40
43
44
47
48
51
52
56
57
60
61
64
65
68
69
72
73
77
78
81
82
85
86
89
90
93
94
98
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
DDR4-260P-24-GP
DDR4-260P-24-GP
99
102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
VSS
2
1
UN 0225
0D6V_S0
12
12
C1225
C1225
C1226
C1226
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
C1209
C1209
C1203
C1203
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C1204
C1204
1 2
1 2
1 2
C1206
C1206
C1210
C1210
C1205
C1205
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
1 2
C1223
C1223
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
0D6V_S0 0D6V_S0
1 2
1 2
C1230
C1230
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
DY
DY
1 2
C1224
C1224
C1227
C1227
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
DY
DY
SC4D7U6D3V2MX-1-GP
for placement modifu 2015/10/1 9
2D5V_S3
12
12
12
C1218
C1218
C1216
C1216
C1217
C1217
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
12
C1219
C1219
12
12
C1220
C1220
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C1221
C1221
EC1202
EC1202
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
DY
DY
1 2
1 2
C1211
C1211
DY
DY
1 2
1 2
12
C1231
C1231
C1232
C1232
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
DY
DY
DY
DY
C1212
C1212
1 2
C1207
C1207
C1213
C1213
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
RF request 2016/01/12 modify
M_A_DQS_DN0
M_A_DQS_DN1
M_A_DQS_DN2
M_A_DQS_DN3
M_A_DQS_DN4
M_A_DQS_DN5
M_A_DQS_DN6
M_A_DQS_DN7
M_A_DQS_DP0
M_A_DQS_DP1
M_A_DQS_DP2
M_A_DQS_DP3
M_A_DQS_DP4
M_A_DQS_DP5
M_A_DQS_DP6
M_A_DQS_DP7
M_A_DQS_DN[7: 0] [5]
M_A_DQS_DP[7:0] [5]
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
12 106
12 106
12 106
A00
A00
A00
Page 13
5
DM2A
DM2A
SA0_CHB_DIM0
SA1_CHB_DIM0
SA2_CHB_DIM0
TS#_DIMM1_1
144
A0
133
A1
132
A2
131
A3
128
A4
126
A5
127
A6
122
A7
125
A8
121
A9
146
A10/AP
120
A11
119
A12
158
A13
151
WE#/A14
156
CAS#/A15
152
RAS#/A16
150
BA0
145
BA1
115
BG0
113
BG1
92
CB0/NC
91
CB1/NC
101
CB2/NC
105
CB3/NC
88
CB4/NC
87
CB5/NC
100
CB6/NC
104
CB7/NC
137
CK0_T
139
CK0_C
138
CK1_T/NF
140
CK1_C/NF
109
CKE0
110
CKE1
149
CS0#
157
CS1#
162
C0/CS2#/NC
165
C1/CS3#/NC
155
ODT0
161
ODT1
256
SA0
260
SA1
166
SA2
254
SDA
253
SCL
108
RESET#
114
ACT#
116
ALERT#
134
EVENT#/NF
143
PARITY
164
VREFCA
DDR4-260P-23-GP
DDR4-260P-23-GP
062.10011.00T1
062.10011.00T1
M_B_A0 [5]
M_B_A1 [5]
M_B_A2 [5]
M_B_A3 [5]
M_B_A4 [5]
M_B_A5 [5]
M_B_A6 [5]
M_B_A7 [5]
M_B_A8 [5]
M_B_A9 [5]
M_B_A10 [5]
M_B_A11 [5]
M_B_A12 [5]
M_B_A13 [5]
M_B_A14 [5]
D D
PCH_SMBDAT A [12,18]
1D2V_S3
C C
1 2
DDR4_DR AMRST#
1 2
ED1302
ED1302
AZ5725-01FDR 7G-GP
AZ5725-01FDR 7G-GP
R1312
R1312
M_B_A15 [5]
M_B_A16 [5]
M_B_BA0 [5]
M_B_BA1 [5]
M_B_BG0 [5 ]
M_B_BG1 [5]
M_B_CLK0 [5]
M_B_CLK#0 [5]
M_B_CLK1 [5]
M_B_CLK#1 [5]
M_B_CKE0 [5]
M_B_CKE1 [5]
M_B_CS#0 [5]
M_B_CS#1 [5]
M_B_DIMB_ODT0 [5]
M_B_DIMB_ODT1 [5]
PCH_SMBCLK [12,18]
DDR4_DR AMRST# [5,12]
M_B_ACT_N [5]
M_B_ALERT_N [5]
240R2F-1-GP
240R2F-1-GP
DY
DY
M_B_PARITY [5]
M_VREF_CA_D IMMB
1 2
C1301
C1301
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Layout note: closed to Dimm
1D2V_S3
RN1301
RN1301
1
2 3
SRN1KJ-7-G P
SRN1KJ-7-G P
4
M_VREF_CA_D IMMB
B B
R1305
R1305
1 2
2R2F-GP
2R2F-GP
1 2
C1323
C1323
SCD022U16V2KX -3GP
SCD022U16V2KX -3GP
+V_VREF_PATH 2
1 2
R1309
R1309
24D9R2F-L-G P
24D9R2F-L-G P
1 OF 4
1 OF 4
DQ0
DQ1
DQ2
DQ3
DQ4
DQ5
DQ6
DQ7
DQ8
DQ9
DQ10
DQ11
DQ12
DQ13
DQ14
DQ15
DQ16
DQ17
DQ18
DQ19
DQ20
DQ21
DQ22
DQ23
DQ24
DQ25
DQ26
DQ27
DQ28
DQ29
DQ30
DQ31
DQ32
DQ33
DQ34
DQ35
DQ36
DQ37
DQ38
DQ39
DQ40
DQ41
DQ42
DQ43
DQ44
DQ45
DQ46
DQ47
DQ48
DQ49
DQ50
DQ51
DQ52
DQ53
DQ54
DQ55
DQ56
DQ57
DQ58
DQ59
DQ60
DQ61
DQ62
DQ63
V_SM_VREF_CN TB [5]
8
7
20
21
4
3
16
17
28
29
41
42
24
25
38
37
50
49
62
63
46
45
58
59
70
71
83
84
66
67
79
80
174
173
187
186
170
169
183
182
195
194
207
208
191
190
203
204
216
215
228
229
211
212
224
225
237
236
249
250
232
233
245
246
3D3V_S0
3D3V_S0
3D3V_S0
4
M_B_DQ8 [5]
M_B_DQ9 [5]
M_B_DQ10 [5]
M_B_DQ11 [5]
M_B_DQ12 [5]
M_B_DQ13 [5]
M_B_DQ14 [5]
M_B_DQ15 [5]
M_B_DQ0 [5]
M_B_DQ1 [5]
M_B_DQ2 [5]
M_B_DQ3 [5]
M_B_DQ4 [5]
M_B_DQ5 [5]
M_B_DQ6 [5]
M_B_DQ7 [5]
M_B_DQ16 [5]
M_B_DQ17 [5]
M_B_DQ18 [5]
M_B_DQ19 [5]
M_B_DQ20 [5]
M_B_DQ21 [5]
M_B_DQ22 [5]
M_B_DQ23 [5]
M_B_DQ24 [5]
M_B_DQ25 [5]
M_B_DQ26 [5]
M_B_DQ27 [5]
M_B_DQ28 [5]
M_B_DQ29 [5]
M_B_DQ30 [5]
M_B_DQ31 [5]
M_B_DQ32 [5]
M_B_DQ33 [5]
M_B_DQ34 [5]
M_B_DQ35 [5]
M_B_DQ36 [5]
M_B_DQ37 [5]
M_B_DQ38 [5]
M_B_DQ39 [5]
M_B_DQ40 [5]
M_B_DQ41 [5]
M_B_DQ42 [5]
M_B_DQ43 [5]
M_B_DQ44 [5]
M_B_DQ45 [5]
M_B_DQ46 [5]
M_B_DQ47 [5]
M_B_DQ48 [5]
M_B_DQ49 [5]
M_B_DQ50 [5]
M_B_DQ51 [5]
M_B_DQ52 [5]
M_B_DQ53 [5]
M_B_DQ54 [5]
M_B_DQ55 [5]
M_B_DQ56 [5]
M_B_DQ57 [5]
M_B_DQ58 [5]
M_B_DQ59 [5]
M_B_DQ60 [5]
M_B_DQ61 [5]
M_B_DQ62 [5]
M_B_DQ63 [5]
DDR4 SWAP 0212
跟 跟 跟 跟 sw確 確 確 確 確 確 確 確
DY
DY
R1302 10KR2F-L1-GP
R1302 10KR2F-L1-GP
1 2
R1303
R1303
1 2
0R0402-PAD
0R0402-PAD
R1306 10KR2F-2- GP R1306 10K R2F-2-GP
1 2
R1307 0R2J-L-GP
R1307 0R2J-L-GP
1 2
DY
DY
DY
DY
R1310 10KR2F-L1-GP
R1310 10KR2F-L1-GP
1 2
R1311
R1311
1 2
0R0402-PAD
0R0402-PAD
By layou modify 20150916
1D2V_S3
1D2V_S3
SA0_CHB_DIM0
SA1_CHB_DIM0
SA2_CHB_DIM0
111
112
117
118
123
124
129
130
135
136
141
142
147
148
153
154
159
160
163
DM2B
DM2B
DM8#/DBI#/NC
DDR4-260P-23-GP
DDR4-260P-23-GP
1 2
C1303
C1303
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
12
C1315
C1315
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DM2C
DM2C
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
VDD
DDR4-260P-23-GP
DDR4-260P-23-GP
2 OF 4
2 OF 4
DQS0_C
DQS0_T
DQS1_C
DQS1_T
DQS2_C
DQS2_T
DQS3_C
DQS3_T
DQS4_C
DQS4_T
DQS5_C
DQS5_T
DQS6_C
DQS6_T
DQS7_C
DQS7_T
DQS8_C
DQS8_T
DM0#/DBI0#
DM1#/DBI#
DM2#/DBI2#
DM3#/DBI3#
DM4#/DBI4#
DM5#/DBI5#
DM6#/DBI6#
DM7#/DBI7#
1 2
C1304
C1304
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
12
C1316
C1316
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3 OF 4
3 OF 4
255
VDDSPD
257
VPP
259
VPP
258
VTT
261
261
262
262
NP1
NP1
NP2
NP2
By layou modify 20150916
M_B_DQS_DN1
11
M_B_DQS_DP1
13
M_B_DQS_DN0
32
M_B_DQS_DP0
34
M_B_DQS_DN2
53
M_B_DQS_DP2
55
M_B_DQS_DN3
74
M_B_DQS_DP3
76
M_B_DQS_DN4
177
M_B_DQS_DP4
179
M_B_DQS_DN5
198
M_B_DQS_DP5
200
M_B_DQS_DN6
219
M_B_DQS_DP6
221
M_B_DQS_DN7
240
M_B_DQS_DP7
242
95
97
12
33
54
75
178
199
220
241
96
1 2
1 2
1 2
C1307
C1307
C1305
C1305
C1306
C1306
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
DY
DY
12
12
12
C1318
C1318
C1319
C1319
C1317
C1317
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
3D3V_S5
EC1302
EC1302
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
1 2
DY
DY
3
1 2
C1308
C1308
12
C1320
C1320
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2D5V_S3
0D6V_S0
M_B_DQS_DN1 [5]
M_B_DQS_DP1 [5]
M_B_DQS_DN0 [5]
M_B_DQS_DP0 [5]
M_B_DQS_DN2 [5]
M_B_DQS_DP2 [5]
M_B_DQS_DN3 [5]
M_B_DQS_DP3 [5]
M_B_DQS_DN4 [5]
M_B_DQS_DP4 [5]
M_B_DQS_DN5 [5]
M_B_DQS_DP5 [5]
M_B_DQS_DN6 [5]
M_B_DQS_DP6 [5]
M_B_DQS_DN7 [5]
M_B_DQS_DP7 [5]
1 2
12
C1309
C1309
DY
DY
C1321
C1321
12
C1328
C1328
C1329
C1329
SCD1U16V2KX-L-GP
SCD1U16V2KX-L-GP
SC2D2U10V3KX-L-GP
SC2D2U10V3KX-L-GP
DY
DY
1D2V_S3
1 2
C1324
C1324
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
C1310
C1310
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
EC1303
EC1303
12
C1322
C1322
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
DY
DY
RF request 2016/01/12 modify
3D3V_S0
1 2
DY
DY
UN 0225
1 2
C1325
C1325
2
4 OF 4
DM2D
4 OF 4
DM2D
VSS1VSS
2
VSS
5
VSS
6
VSS
9
VSS
10
VSS
14
VSS
15
VSS
18
VSS
19
VSS
22
VSS
23
VSS
26
VSS
27
VSS
30
VSS
31
VSS
35
VSS
36
VSS
39
VSS
40
VSS
43
VSS
44
VSS
47
VSS
48
VSS
51
VSS
52
VSS
56
VSS
57
VSS
60
VSS
61
VSS
64
VSS
65
VSS
68
VSS
69
VSS
72
VSS
73
VSS
77
VSS
78
VSS
81
VSS
82
VSS
85
VSS
86
VSS
89
VSS
90
VSS
93
VSS
94
VSS
98
VSS
DDR4-260P-23-GP
DDR4-260P-23-GP
12
12
C1326
C1326
C1327
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
C1327
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
M_B_DQS_DN0
M_B_DQS_DN1
M_B_DQS_DN2
M_B_DQS_DN3
M_B_DQS_DN4
M_B_DQS_DN5
M_B_DQS_DN6
M_B_DQS_DN7
M_B_DQS_DP0
M_B_DQS_DP1
M_B_DQS_DP2
M_B_DQS_DP3
M_B_DQS_DP4
M_B_DQS_DP5
M_B_DQS_DP6
M_B_DQS_DP7
99
102
VSS
103
VSS
106
VSS
107
VSS
167
VSS
168
VSS
171
VSS
172
VSS
175
VSS
176
VSS
180
VSS
181
VSS
184
VSS
185
VSS
188
VSS
189
VSS
192
VSS
193
VSS
196
VSS
197
VSS
201
VSS
202
VSS
205
VSS
206
VSS
209
VSS
210
VSS
213
VSS
214
VSS
217
VSS
218
VSS
222
VSS
223
VSS
226
VSS
227
VSS
230
VSS
231
VSS
234
VSS
235
VSS
238
VSS
239
VSS
243
VSS
244
VSS
247
VSS
248
VSS
251
VSS
252
VSS
2D5V_S3 0D6V_S0 0D6V_S 0 0D6V_S0
12
1 2
C1311
C1311
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
DY
DY
C1330
C1330
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
DY
DY
C1331
C1331
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
M_B_DQS_DN[7: 0] [5]
M_B_DQS_DP[7:0] [5]
DY
DY
1 2
1 2
1 2
C1312
C1312
1 2
C1313
C1313
C1314
C1314
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SC1U10V2KX-L1-GP
SC1U10V2KX-L1-GP
DY
DY
SC4D7U6D3V2MX-1-GP
SC4D7U6D3V2MX-1-GP
1
RF request 2016/01/12 modify
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
DDR3-SODIMM1
DDR3-SODIMM1
DDR3-SODIMM1
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
13 106
13 106
13 106
A00
A00
A00
Page 14
5
D D
4
3
2
1
C C
(Blanking)
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
(Reserved)_SODIMM _SODIMM4
(Reserved)_SODIMM _SODIMM4
(Reserved)_SODIMM _SODIMM4
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
14 106 Thursday, February 18, 2016
14 106 Thursday, February 18, 2016
14 106 Thursday, February 18, 2016
1
A00
A00
A00
Page 15
5
4
3
2
1
Main Func = PCH
3D3V_S0
R1503
CPU1I
CPU1I
SKYLAKE_ULT
CSI-2
CSI-2
A36
CSI2_DN0
B36
CSI2_DP0
D D
C C
C38
CSI2_DN1
D38
CSI2_DP1
C36
CSI2_DN2
D36
CSI2_DP2
A38
CSI2_DN3
B38
CSI2_DP3
C31
CSI2_DN4
D31
CSI2_DP4
C33
CSI2_DN5
D33
CSI2_DP5
A31
CSI2_DN6
B31
CSI2_DP6
A33
CSI2_DN7
B33
CSI2_DP7
A29
CSI2_DN8
B29
CSI2_DP8
C28
CSI2_DN9
D28
CSI2_DP9
A27
CSI2_DN10
B27
CSI2_DP10
C27
CSI2_DN11
D27
CSI2_DP11
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
GPP_F13/EMMC_DATA0
GPP_F14/EMMC_DATA1
GPP_F15/EMMC_DATA2
GPP_F16/EMMC_DATA3
GPP_F17/EMMC_DATA4
GPP_F18/EMMC_DATA5
GPP_F19/EMMC_DATA6
GPP_F20/EMMC_DATA7
GPP_F21/EMMC_RCLK
9 OF 20
9 OF 20
CSI2_CLKN0
CSI2_CLKP0
CSI2_CLKN1
CSI2_CLKP1
CSI2_CLKN2
CSI2_CLKP2
CSI2_CLKN3
CSI2_CLKP3
CSI2_COMP
GPP_D4/FLASHTRIG
EMMC
EMMC
GPP_F22/EMMC_CLK
GPP_F12/EMMC_CMD
EMMC_RCOMP
C37
D37
C32
D32
C29
DC resistance < 0.5ohm.
D29
B26
A26
CSI2_COMP
E13
B7
AP2
AP1
AP3
AN3
AN1
AN2
AM4
AM1
AM2
AM3
AP4
AT1
WIFI_RF_ EN [66]
GPP_F: VCCPGPPF = 1.8V Only
EMMC_RC OMP
1 2
R1501 100R2F-L 1-GP-U R1501 100R 2F-L1-GP-U
1 2
R1502
R1502
200R2F-L -GP
200R2F-L -GP
WIFI_RF_ EN
R1503
1 2
DY
DY
10KR2J-3 -GP
10KR2J-3 -GP
Change to Dummy 20150402
[#545659 Rev0.7 ]
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CPU_(CS-2/EMMC)
CPU_(CS-2/EMMC)
CPU_(CS-2/EMMC)
Starload SKL-U
Starload SKL-U
Starload SKL-U
15 10 6 Thursday, February 25, 20 16
15 10 6 Thursday, February 25, 20 16
15 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 16
Main Func = PCH
#543016:
220 nF nominal capacitors are recommended for Gen 3.
100 nF nominal capacitors are recommended for Gen 2.
GPU
D D
WLAN
HDD1
SSD
Layout Note:
3D3V_S0
R1607 10KR2J-3-GP R1607 10KR2J-3-GP
1 2
C C
5
CPU_RXN_C_dGPU_TXN0 [66]
CPU_RXP_C_dGPU_TXP0 [66]
dGPU_RXN_C_CPU_TXN0 [66]
dGPU_RXP_C_CPU_TXP0 [66]
CPU_RXN_C_dGPU_TXN1 [66]
CPU_RXP_C_dGPU_TXP1 [66]
dGPU_RXN_C_CPU_TXN1 [66]
dGPU_RXP_C_CPU_TXP1 [66]
CPU_RXN_C_dGPU_TXN2 [66]
CPU_RXP_C_dGPU_TXP2 [66]
dGPU_RXN_C_CPU_TXN2 [66]
dGPU_RXP_C_CPU_TXP2 [66]
CPU_RXN_C_dGPU_TXN3 [66]
CPU_RXP_C_dGPU_TXP3 [66]
dGPU_RXN_C_CPU_TXN3 [66]
dGPU_RXP_C_CPU_TXP3 [66]
PCIE_RX_CPU_N5 [66]
PCIE_RX_CPU_P5 [66]
PCIE_TX_WLAN_N5 [66]
PCIE_TX_WLAN_P5 [66]
SATA_RX_CPU_N0 [60]
SATA_RX_CPU_P0 [60]
SATA_TX_CPU_N0 [60]
SATA_TX_CPU_P0 [60]
SATA_RX_CPU_N1 [63]
SATA_RX_CPU_P1 [63]
SATA_TX_CPU_N1 [63]
SATA_TX_CPU_P1 [63]
1. Trace Width: 4 mils min (b reakout) 12-15 mils (trace)
Note: Must maintain low DC re sistance routing (<0.1 ohm).
2. Isolation Spacing: At leas t 12 mils to any adjacent
high speed I/O.
R1604
R1604
TP1605 TPAD14-OP-GP TP1605 TPAD14-OP-GP
TP1606 TPAD14-OP-GP TP1606 TPAD14-OP-GP
PIRQA#
1 2
100R2F-L1-GP-U
100R2F-L1-GP-U
1
1
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
1 2
XDP_PRDY#
XDP_PREQ#
OPS
OPS
OPS
OPS
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
OPS
OPS
OPS
OPS
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
OPS
OPS
OPS
OPS
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
OPS
OPS
OPS
OPS
SCD22U10V2KX-1GP
SCD22U10V2KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PEG_TX_CPU_N0
PEG_TX_CPU_P0
PEG_TX_CPU_N1
PEG_TX_CPU_P1
PEG_TX_CPU_N2
PEG_TX_CPU_P2
PEG_TX_CPU_N3
PEG_TX_CPU_P3
PCIE_TX_CPU_N5
PCIE_TX_CPU_P5
PCIE_RCOMPN
PCIE_RCOMPP
PIRQA#
USB 2.0 Table
Pair
Device
0
USB3.0 port1
1
USB3.0 Port2 (Debug Port/IOBD)
USB3.0 Port3 (IOBD)
2
3
Sensor HUB
4
CAMERA
WLAN
5
6
Touch Panel
7
Card Reader
C1606
C1606
C1605
C1605
C1608
C1608
C1607
C1607
C1610
C1610
C1609
C1609
C1612
C1612
C1611
C1611
C1601
C1601
C1602
C1602
CPU1H
CPU1H
PCIE/USB3/SATA
PCIE/USB3/SATA
H13
PCIE1_ RXN/USB3_ 5_RXN
G13
PCIE1_ RXP/USB3 _5_RX P
B17
PCIE1_ TXN/USB3_ 5_TXN
A17
PCIE1_ TXP/USB3 _5_TX P
G11
PCIE2_ RXN/USB3_ 6_RXN
F11
PCIE2_ RXP/USB3 _6_RX P
D16
PCIE2_ TXN/USB3_ 6_TXN
C16
PCIE2_ TXP/USB3 _6_TX P
H16
PCIE3_ RXN
G16
PCIE3_ RXP
D17
PCIE3_ TXN
C17
PCIE3_ TXP
G15
PCIE4_ RXN
F15
PCIE4_ RXP
B19
PCIE4_ TXN
A19
PCIE4_ TXP
F16
PCIE5_ RXN
E16
PCIE5_ RXP
C19
PCIE5_ TXN
D19
PCIE5_ TXP
G18
PCIE6_ RXN
F18
PCIE6_ RXP
D20
PCIE6_ TXN
C20
PCIE6_ TXP
F20
PCIE7_ RXN/SATA 0_RXN
E20
PCIE7_ RXP/SAT A0_RX P
B21
PCIE7_ TXN/SATA 0_TXN
A21
PCIE7_ TXP/SAT A0_TX P
G21
PCIE8_ RXN/SATA 1A_RX N
F21
PCIE8_ RXP/SAT A1A_R XP
D21
PCIE8_ TXN/SATA 1A_TX N
C21
PCIE8_ TXP/SAT A1A_T XP
E22
PCIE9_ RXN
E23
PCIE9_ RXP
B23
PCIE9_ TXN
A23
PCIE9_ TXP
F25
PCIE10 _RXN
E25
PCIE10 _RXP
D23
PCIE10 _TXN
C23
PCIE10 _TXP
F5
PCIE_R COMPN
E5
PCIE_R COMPP
D56
PROC_P RDY#
D61
PROC_P REQ#
BB11
GPP_A7 /PIRQA#
E28
PCIE11 _RXN/SAT A1B_R XN
E27
PCIE11 _RXP/SA TA1B_ RXP
D24
PCIE11 _TXN/SAT A1B_T XN
C24
PCIE11 _TXP/SA TA1B_ TXP
E30
PCIE12 _RXN/SAT A2_RX N
F30
PCIE12 _RXP/SA TA2_R XP
A25
PCIE12 _TXN/SAT A2_TX N
B25
PCIE12 _TXP/SA TA2_T XP
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
4
SSIC / USB3
SSIC / USB3
USB3_2_ RXN/SSIC _1_RX N
USB3_2_ RXP/SSI C_1_R XP
USB3_2_ TXN/SSIC _1_TX N
USB3_2_ TXP/SSI C_1_T XP
USB3_3_ RXN/SSIC _2_RX N
USB3_3_ RXP/SSI C_2_R XP
USB3_3_ TXN/SSIC _2_TX N
USB3_3_ TXP/SSI C_2_T XP
USB2
USB2
USB2_VB USSENSE
GPP_E9 /USB2_OC 0#
GPP_E1 0/USB2_O C1#
GPP_E1 1/USB2_O C2#
GPP_E1 2/USB2_O C3#
GPP_E4 /DEVSLP 0
GPP_E5 /DEVSLP 1
GPP_E6 /DEVSLP 2
GPP_E0 /SATAXP CIE0/S ATAGP0
GPP_E1 /SATAXP CIE1/S ATAGP1
GPP_E2 /SATAXP CIE2/S ATAGP2
GPP_E8 /SATALE D#
8 OF 20
8 OF 20
H8
USB3_1_ RXN
G8
USB3_1_ RXP
C13
USB3_1_ TXN
D13
USB3_1_ TXP
J6
H6
B13
A13
J10
H10
B15
Cutomer remove IO board USB3.0
A15
E10
USB3_4_ RXN
F10
USB3_4_ RXP
C15
USB3_4_ TXN
D15
USB3_4_ TXP
AB9
USB2N_1
AB10
USB2P_1
AD6
USB2N_2
AD7
USB2P_2
AH3
USB2N_3
AJ3
USB2P_3
AD9
USB2N_4
AD10
USB2P_4
AJ1
USB2N_5
AJ2
USB2P_5
AF6
USB2N_6
AF7
USB2P_6
AH1
USB2N_7
AH2
USB2P_7
AF8
USB2N_8
AF9
USB2P_8
AG1
USB2N_9
AG2
USB2P_9
AH7
USB2N_10
DC resistance < 0.5ohm.
AH8
USB2P_1 0
USBCOMP
AB6
USB2_CO MP
USB2_ID
AG3
USB2_ID
USB2_VBUSSENSE
AG4
A9
C9
USB_OC2#
D9
USB_OC3#
B9
J1
SIO_EXT_SCI#
J2
J3
GPP_E0/SATAXPCIE0/SATAGP0
H2
GPP_E1/SATAXPCIE1/SATAGP1
H3
GPP_E2/SATAXPCIE2/SATAGP2
G4
SATA_ACT# USB_OC2#
H1
USB_CPU_PN0 [34]
USB_CPU_PP0 [34]
USB_CPU_PN1 [36]
USB_CPU_PP1 [36]
USB_CPU_PN2 [66]
USB_CPU_PP2 [66]
USB_CPU_PN3 [38]
USB_CPU_PP3 [38]
USB_CPU_PN4 [55]
USB_CPU_PP4 [55]
USB_CPU_PN5 [66]
USB_CPU_PP5 [66]
USB_CPU_PN6 [55]
USB_CPU_PP6 [55]
USB_CPU_PN7 [66]
USB_CPU_PP7 [66]
USB_CPU_PN8 [69]
USB_CPU_PP8 [69]
R1603 113R2F-GP R1603 113R2F-GP
1 2
USB_OC0# [34,35]
USB_OC1# [66]
HDD_DEVSLP [60]
SIO_EXT_SCI# [24]
MSATA_DEVSLP [63]
1
1
1
USB30_RX_CPU_N1 [36]
USB30_RX_CPU_P1 [36]
USB30_TX_CPU_N1 [36]
USB30_TX_CPU_P1 [36]
USB30_RX_CPU_N2 [36]
USB30_RX_CPU_P2 [36]
USB30_TX_CPU_N2 [36]
USB30_TX_CPU_P2 [36]
USB30_RX_CPU_N4 [38]
USB30_RX_CPU_P4 [38]
USB30_TX_CPU_N4 [38]
USB30_TX_CPU_P4 [38]
USB3.0 port1
USB3.0 port2
USB3.0 port3
Type C
CAMERA
WLAN
Touch Panel
Card Reader
Sensor HUB
(#543016) When used as DEVSLP , no external pull-up or pull -down
termination required from SAT A Host DEVSLP.
TP1602 TPAD14-OP-GP TP1602 TPAD14-OP-GP
TP1603 TPAD14-OP-GP TP1603 TPAD14-OP-GP
TP1604 TPAD14-OP-GP TP1604 TPAD14-OP-GP
SATA_ACT# [64]
USB2_ID
USB2_VBUSSENSE
Follow SKL PDG design guide
(#543016) Unused SATAGP[2:0]/ GPP_E[2:0] pins must be termi nated to either 3.3 V rail or GND
using 8.2 KΩ to 10 KΩ on the motherboard.
Do not use both pull-up and p ull-down. Either pull-up or p ull-down is acceptable.
(#545659) The xHCI controller supports USB Debug port on a ll USB3.0 capable ports.
RN1602
RN1602
1
4
2 3
SRN0J-6-G P
SRN0J-6-GP
SIO_EXT_SCI#
USB_OC3#
USB_OC0#
USB_OC1#
3
1 2
R1608 10KR2J-3-GP R1608 10KR2J-3-GP
RN1601
RN1601
8
7
SRN10KJ-6-GP
SRN10KJ-6-GP
3D3V_S0
1
2
34 56
3D3V_S5_PCH
2
TBD
3D3V_S0
R1606
R1606
SATA_ACT#
1 2
10KR2J-3-GP
(#543611)
The SATALED# signal is open-c ollector and requires a weak external pull-up (8.2 kΩ to 10 kΩ ) to Vcc3_3.
10KR2J-3-GP
1
#545659 (SKL_PCH_U_Y_EDS Rev0 .7)
B B
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
CPU_(PCIE/SATA/USB)
CPU_(PCIE/SATA/USB)
CPU_(PCIE/SATA/USB)
Starload SKL-U
Starload SKL-U
Starload SKL-U
16 106 Thursday, February 25, 2016
16 106 Thursday, February 25, 2016
16 106 Thursday, February 25, 2016
A00
A00
A00
Page 17
Main Func = PCH
5
4
3
2
1
Remove Power rail +V3.3A_SIP a nd R1712(DY), 20141118
3D3V_S5
D D
RTC_AUX_S5
C C
B B
A A
R1709,R1723,R1703,R1724 merge to RN1704
RN1704
RN1704
1
2
3
4 5
SRN10KJ-6-G P
SRN10KJ-6-G P
R1730
R1730
330KR2J-L1-GP
330KR2J-L1-GP
1 2
+V3.3A_SIP
R1731
R1731
1 2
20KR2J-L2-GP
20KR2J-L2-GP
RN1703
RN1703
1
2 3
SRN10KJ-5-G P
SRN10KJ-5-G P
R1717 10KR2J-3-GP
R1717 10KR2J-3-GP
DY
DY
AOZ Power switch, P/N: 074.013 34.0093
Low Rds(on)= 5m Ohm
Turn on rise time = 10us
AC_PRESENT
8
PCH_WA KE#
7
PCH_BATLOW #
6
GPD11/LANPHYPC
GPD11 pull high by Intel PDG1.3 request
#544669 (CRB): 330k.
SM_INTRUDER #
[#543016 Rev0.7]
EXT_PWR_GATE#: Due to a bug on A0, a temporary pull-up resistor will be required to overcome the internal 20k
pull-down that is active during the early portion of the power up sequence
EXT_PWR _GATE#
PM_RSMRST#
4
PM_PCH_PW ROK
SYS_PWROK
1 2
RF request 2016/01/12 modify
NON DS3
NON DS3
R1708
ME_SUS_PW R_ACK_R
SUSACK# SUSACK#_R
TP1711 TPAD 14-OP-GP T P1711 TPAD14- OP-GP
1
ME_SUS_PW R_ACK
TP1712 TPAD 14-OP-GP T P1712 TPAD14- OP-GP
1
3D3V_AUX_S5
R1726
R1726
10KR2J-3-GP
10KR2J-3-GP
1 2
1 2
0R2J-2-GP
0R2J-2-GP
2 3
1
R1727
R1727
100KR2J-1- GP
100KR2J-1-GP
1 2
NON DS3
NON DS3
6
84.2N702.A3F
84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
5
R1708
RN1702
RN1702
DS3
DS3
SRN0J-6-GP
SRN0J-6-GP
Q1701
Q1701
23 45
1
2N7002KDW -GP
2N7002KDW -GP
4
#544669 Rev0.52 CRB:
No PL resistor on THERMTRIP#.
H_CPUPW RGD
1 2
DY
DY
R1714
R1714
10KR2J-3-GP
10KR2J-3-GP
+VCCMPHYGTAON_1P0
SKL: 1.0V
+VCCMPHYGTAON_1P0(ICCMAX.=3.5A )
1D0V_S5
EC1710
EC1710
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
1 2
DY
DY
DS3 BOM Option
SUSACK#_R
ME_SUS_PW R_ACK_R
1KR2J-1-GP
1KR2J-1-GP
R1702
R1702
PM_RSMRST#
1 2
R1728
R1728
3V_5V_POK_C 3V_5V_P OK#
1 2
NON DS3
NON DS3
0R2J-2-GP
0R2J-2-GP
DS3
DS3
R1729
R1729
1 2
0R2J-2-GP
0R2J-2-GP
+VCCPDSW _3P3 3D3V_S5
R1711
R1711
1 2
0R0603-PAD
0R0603-PAD
Layout note: 3 PAD SHARING
1
TP1709
TP1709
TPAD14-OP-G P
TPAD14-OP-G P
SYS_PWROK [24]
1 2
EC1701
EC1701
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
EMI DVT1 0210
EC_WAKE# [24]
R1724
R1724
1 2
0R0805-PAD
0R0805-PAD
R1735
R1735
1 2
0R0805-PAD
0R0805-PAD
Follow Iris SKL
2015/11/30 modify
SIO_SLP_SUS#
DY
DY
C1710
C1710
SCD47U10V2KX-GP
SCD47U10V2KX-GP
RESET_OUT # [24,26]
ME_SUS_PW R_ACK_R [20]
+VCCPDSW _3P3
R1732
R1732
1 2
0R0402-PAD
0R0402-PAD
+VCCMPHYGTA ON_1P0_LS_SIP
R1718 0R2J-2-GP
R1718 0R2J-2-GP
1 2
EC1711
EC1711
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
1 2
GPD2/LAN_W AKE#
C1704
C1704
1 2
SC10U6D3V3MX- GP
SC10U6D3V3MX- GP
1 2
DY
DY
Change location to net PCH_DPW ROK
3V_5V_POK [40,45,52,54 ]
Dummy C1710 by it's useless
(PDG#543016)
WAKE#: Ensure that WAKE# signal Trise (Maximum) is <100 ns.
SIO_SLP_S3# [24,27,40,51,54]
Change dummy property from DS3 to DY
EC1711 modify to 100k and 0.01 uF at DVT1 20150203
4
+V3.3A_SIP
1 2
R1701
R1701
10KR2J-3-GP
10KR2J-3-GP
TP1705
TP1705
TPAD14-OP-G P
1 2
1
2
EC1713
EC1713
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
DY
DY
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
U1703
U1703
NC#1
VCC
DY
DY
A
GND3Y
74LVC1G07GW -GP
74LVC1G07GW -GP
ALL_SYS_PWRG D [24 ,40]
1 2
0R2J-2-GP
0R2J-2-GP
3D3V_S5
1 2
TPAD14-OP-G P
C1703
C1703
5
4
R1733
R1733
DY
DY
EMI DVT1 0210
R1706 0R0402-PAD R1706 0R0402-PAD
1 2
R1704 0R2J-2-GP
R1704 0R2J-2-GP
1 2
NON DS3
NON DS3
R1707 10KR2J-3-GP R1707 10KR2J-3-GP
For sequence fine tune 2016/01 /04
RF request 2016/01/12 modify
3V_5V_POK [40,45,52,54] PCH_DPW ROK [24]
PCH_RSMRS T# [24]
EC1712
EC1712
1 2
DY
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
EC1706
EC1706
1 2
DY
DY
PCH_PLTRST #
XDP_DBRESE T#
PM_RSMRST#
H_CPUPW RGD
1
H_VCCST_PW RGD
SYS_PWROK
PM_PCH_PW ROK
PCH_DPW ROK PM_RSMRST#
ME_SUS_PW R_ACK_R
SUSACK#_R
PCH_WA KE#
GPD2/LAN_W AKE#
GPD11/LANPHYPC
3D3V_S5
1 2
DY
DY
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
CPU1K
CPU1K
SYSTEM POWER MANAGEMENT
SYSTEM POWER MANAGEMENT
SKYLAKE_ULT
071.SKYLA.000U
071.SKYLA.000U
3D3V_S5
C1702
C1702
1 2
DY
DY
5
4
1 2
R1719
R1719
47KR2F-GP
47KR2F-GP
XDP_DBRESE T#
SYS_PWROK
PLT_RST#
RESET_OUT #
3V_5V_POK
EMI DVT1 0210
SKYLAKE_ULT
GPP_B11/EXT_PWR_GATE#
+VCCSTG
1 2
R1722
R1722
100KR2J-1-GP
100KR2J-1-GP
DY
DY
Dis-wire with XDP_PM_RSMRST_PW RGD_XDP
H_VCCST_PW RGD
1 2
C1711
C1711
DY
DY
AN10
GPP_B13/PLTRST#
B5
SYS_RESET#
AY17
RSMRST#
A68
PROCPWRGD
B65
VCCST_PWRGD
B6
SYS_PWROK
BA20
PCH_PWROK
BB20
DSW_PWROK
AR13
GPP_A13/SUSWARN#/SUSPWRDNACK
AP11
GPP_A15/SUSACK#
BB15
WAKE#
AM15
GPD2/LAN_WAKE#
AW17
GPD11/LANPHYPC
AT15
GPD7/USB2_WAKEOUT#
SKYLAKE-U-GP
SKYLAKE-U-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
U1701
U1701
1
NC#1
VCC
2
A
DY
DY
GND3Y
74LVC1G07GW -GP
74LVC1G07GW -GP
73.01G07.0HG
73.01G07.0HG
1 2
R1716
R1716
1 2
100KR2F-L1-GP
EC1709
EC1709
EC1702
EC1702
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
100KR2F-L1-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
1 2
1 2
EC1703
EC1703
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
1 2
1 2
EC1705
EC1705
EC1704
EC1704
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
GPD1/ACPRESENT
GPP_B2/VRALERT#
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
EMI DVT1 0210
11 OF 20
11 OF 20
GPD4/SLP_S3#
GPD5/SLP_S4#
SLP_SUS#
SLP_LAN#
GPD6/SLP_A#
GPP_A11/PME#
INTRUDER#
1 2
AT11
AP15
BA16
AY16
AN15
AW15
BB17
AN16
BA15
AY15
AU13
AU11
AP16
AM10
AM11
SIO_SLP_S5#
SLP_LAN#
AUX_EN_W OWL
SIO_SLP_A#
AC_PRESENT
PCH_BATLOW #
PME#
SM_INTRUDER #
EXT_PWR _GATE#
GPP_B2/VRALER T#
1
1
1
1
1
GPP_B12/SLP_S0#
GPD10/SLP_S5#
GPD9/SLP_WLAN#
GPD3/PWRBTN#
GPD0/BATLOW#
EC1708
EC1708
R1722 & EC1708 modify to 100k and 0.01uF at DVT1
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
3D3V_AUX_S5
#543016 Rev0.7
1. VCCST_PWRGD is only 1.0 V tolerant.
2. VCCST_PWRGD must go low during Sx pwr states, regardless of the voltage level of VCCST
R1737
R1737
PM_RSMRST#_M
1 2
NON DS3
NON DS3
100KR2J-1-GP
100KR2J-1-GP
1
SIO_SLP_S0# [24,60]
SIO_SLP_S3# [24,27,40,51,54]
SIO_SLP_S4# [24,40,54]
TP1703 TPAD14- OP-GP TP1703 TPAD14- OP-GP
SIO_SLP_SUS# [52,54]
TP1704 TPAD14-O P-GP TP1704 TPAD14-OP -GP
TP1710 TPAD14- OP-GP TP1710 TPAD14- OP-GP
TP1706 TPAD14- OP-GP TP1706 TPAD14- OP-GP
SIO_PWRBTN # [24]
TP1707 TPAD14-O P-GP TP1707 TPAD14-OP -GP
TP1708 TPAD14-O P-GP TP1708 TPAD14-OP -GP
PLT_RST# [24,66,68]
R1715
R1715
100KR2J-1-GP
100KR2J-1-GP
4th = 84.DMN66.03F
4th = 84.DMN66.03F
3rd = 75.00601.07C
3rd = 75.00601.07C
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
84.2N702.A3F
84.2N702.A3F
Q1702
Q1702
2N7002KDW -GP
2N7002KDW -GP
23 45
NON DS3
NON DS3
1
6
BATLOW#:
Pull-up required even if not implemented.
AC_PRESENT
EC1707
EC1707
1 2
DY
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R1713
R1713
PCH_PLTRST #
1 2
0R0402-PAD
0R0402-PAD
1 2
1 2
C1701
C1701
SC220P50V2KX-3GP
SC220P50V2KX-3GP
DY
DY
DY
DY
D1701
D1701
RB751V-40H-G P
RB751V-40H-G P
K A
ACOK_IN_M [43,44]
83.R2004.G8F
83.R2004.G8F
PM_RSMRST#_R PM_RSMRST#
1 2
NON DS3
NON DS3
R1720
R1720
0R2J-2-GP
0R2J-2-GP
AC_PRESENT
Reserve by NON DS3 function 20 150413
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
CPU_(POWER MANAGEMENT)
CPU_(POWER MANAGEMENT)
CPU_(POWER MANAGEMENT)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
17 106 Thursday, Feb ruary 25, 2016
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17 106 Thursday, Feb ruary 25, 2016
A00
Page 18
RN1802
RN1802
SRN1KJ-7-G P
SRN1KJ-7-G P
4
SIO_RCIN#
SERIRQ
5
SPI_HOLD_ROM
SPI_WP_ROM
PCH strap pin:
Sampled at rising edge of RSMRST#
eSPI or LPC
SML0ALERT# /
GPP_C5
This signal has a weak internal pull-down.
SPI_WP_ROM [25]
SPI_CS_ROM_N0 [24,25]
This signal has a weak internal pull-down.
0 = LPC Is selected for EC.
1 = eSPI Is selected for EC.
SPI_CLK_ROM [24,25]
SPI_SO_ROM [24,25]
SPI_SI_ROM [24,25]
SPI_HOLD_ROM [25 ]
HDD_FALL_INT [70]
HDD_EN_PC H [60]
SIO_RCIN# [24]
SERIRQ [24]
R1806,R1807,R1808,R1809 merge to RN1803
2015/10/06 modify
RN1803
RN1803
1
2
3
4 5
SRN10J-1-G P
SRN10J-1-G P
1 2
1 2
8
7
6
R1811 10R2F-L-GP R1811 10R2F-L-GP
R1812 0R0 402-PAD R1812 0R0 402-PAD
Main Func = PCH
D D
C C
R1835 and R1834 merge to RN1802
2015/10/06 modify
3D3V_S5_PCH
3D3V_S0
R1820
R1820
1 2
10KR2J-3-GP
10KR2J-3-GP
R1821
R1821
1 2
10KR2J-3-GP
10KR2J-3-GP
SERIRQ PH:
PDG: 8.2k
CRB: 10k
RCIN#:
Frequency to Avoid: 33 MHz
1
2 3
GPP_C5/SML0ALER T#
SPI_CLK_CPU
SPI_SO_CPU
SPI_SI_CPU
SPI_WP_CPU
SPI_HOLD_CPU
SPI_CS_CPU_N0
TP1801 TPAD 14-OP-GP T P1801 TPAD14- OP-GP
TP1804 TPAD 14-OP-GP T P1804 TPAD14- OP-GP
TP1805 TPAD 14-OP-GP T P1805 TPAD14- OP-GP
TP1806 TPAD 14-OP-GP T P1806 TPAD14- OP-GP
1
1
1
1
4
CPU_D1_TP
CPU_D4_TP
CPU_D5_TP
CPU_D6_TP
PCH Prim
3D3V_S5_PCH
DY
DY
DY
DY
AV2
AW3
AV3
AW2
AU4
AU3
AU2
AU1
M2
M3
J4
V1
V2
M1
G3
G2
G1
AW13
AY11
1 2
1 2
CPU1E
CPU1E
SPI0_CLK
SPI0_MISO
SPI0_MOSI
SPI0_IO2
SPI0_IO3
SPI0_CS0#
SPI0_CS1#
SPI0_CS2#
GPP_D1/SPI1_CLK
GPP_D2/SPI1_MISO
GPP_D3/SPI1_MOSI
GPP_D21/SPI1_IO2
GPP_D22/SPI1_IO3
GPP_D0/SPI1_CS#
CL_CLK
CL_DATA
CL_RST#
GPP_A0/RCIN#
GPP_A6/SERIRQ
SKYLAKE-U-GP
SKYLAKE-U-GP
R1822
R1822
1KR2J-1-GP
1KR2J-1-GP
R1823
R1823
1KR2J-1-GP
1KR2J-1-GP
SPI - FLASH
SPI - FLASH
Strap
SPI - TOUCH
SPI - TOUCH
C LINK
C LINK
071.SKYLA.000U
071.SKYLA.000U
PCH strap pin:
BOOT HALT
SPI0_MOSI
This signal has a weak internal pull-up.
0 = ENABLED
1 = DISABLED
WEAK INTERNAL PU
SKYLAKE_ULT
SKYLAKE_ULT
LPC
LPC
SMBUS, SMLINK
SMBUS, SMLINK
GPP_A14/SUS_STAT#/ESPI_RESET#
3
5 OF 20
5 OF 20
GPP_C0/SMBCLK
GPP_C1/SMBDATA
GPP_C2/SMBALERT#
GPP_C3/SML0CLK
GPP_C4/SML0DATA
Strap
GPP_C5/SML0ALERT#
GPP_C6/SML1CLK
GPP_C7/SML1DATA
GPP_B23/SML1ALERT#/PCHHOT#
GPP_A1/LAD0/ESPI_IO0
GPP_A2/LAD1/ESPI_IO1
GPP_A3/LAD2/ESPI_IO2
GPP_A4/LAD3/ESPI_IO3
GPP_A5/LFRAME#/ESPI_CS#
GPP_A9/CLKOUT_LPC0/ESPI_CLK
GPP_A10/CLKOUT_LPC1
GPP_A8/CLKRUN#
20140820 DAIVD
SPI_SI_CPU
LPC_LAD[3..0] [24,68]
R7
R8
R10
R9
W2
W1
W3
V3
AM7
AY13
BA13
BB13
AY12
BA12
BA11
AW9
AY9
AW11
PCH Prim
LPC_LAD[3..0]
MEM_SMBCLK
MEM_SMBDATA
GPP_C2/SMBALER T#
SML0_SMBCLK
SML0_SMBDATA
GPP_C5/SML0ALER T#
SML1_SMBCLK
SML1_SMBDATA
GPP_B23/SML1ALERT #
LPC_LAD0_R
LPC_LAD1_R
LPC_LAD2_R
LPC_LAD3_R
LPC_LFRAME#_R
SUS_STAT#/LPC PD#
PCI_CLK_LPC0
PCI_CLK_LPC1
CLKRUN#_R
PCI_CLK_LPC0
PCI_CLK_LPC1
3D3V_S5_PCH
1 2
R1824
R1824
DY
DY
1KR2J-1-GP
1KR2J-1-GP
1 2
R1825
R1825
DY
DY
1KR2J-1-GP
1KR2J-1-GP
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
SML1_SMBCLK [24,2 6,66]
SML1_SMBDATA [24,2 6,66]
R1801
R1801
1 2
0R0402-PAD
0R0402-PAD
R1819
R1819
1 2
0R0402-PAD
0R0402-PAD
R1804 22R2J-2-GP
R1804 22R2J-2-GP
1 2
LPC
LPC
R1805 22R2J-2-GP R1805 22R2J- 2-GP
1 2
8
7
6
1 2
DY
RN1806
RN1806
SRN0J-7-GP -U
SRN0J-7-GP -U
LPC_LFRAME# [24,68]
CLKRUN# [24]
EC1802
EC1801
SC10P50V2JN-4GPDYEC1801
SC10P50V2JN-4GP
1 2
DY
LPC_LAD0_R
1
LPC_LAD1_R
2
LPC_LAD2_R
3
LPC_LAD3_R
4 5
SUS_STAT#/LPC PD#
CLKRUN#_R
SC10P50V2JN-4GPDYEC1802
SC10P50V2JN-4GP
2
3D3V_S5_PCH
R1814
R1814
1 2
DY
DY
10KR2J-3-GP
10KR2J-3-GP
R1818
R1818
8K2R2F-1-G P
8K2R2F-1-GP
1 2
CLK_PCI_LPC [68]
CLK_PCI_LPC_MEC [24]
3D3V_S0
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
MEM_SMBDATA
84.2N702.A3F
84.2N702.A3F
MEM_SMBCLK
SML1_SMBDATA
SML1_SMBCLK
SML0_SMBDATA
SML0_SMBCLK
DVT1 0210, Reserve by Intel MOW
GPP_B23/SML1ALERT #
GPP_C2/SMBALER T#
MEM_SMBCLK
MEM_SMBDATA
3D3V_S0
2N7002KDW -GP
2N7002KDW -GP
1
6
23 45
Q1801
Q1801
RN1807
RN1807
8
7
6
SRN2K2J-4-G P
SRN2K2J-4-G P
R1836
R1836
2K2R2J-2-GP
2K2R2J-2-GP
SRN2K2J-1-G P
SRN2K2J-1-G P
4
RN1811
RN1811
1
1
2
3
4 5
1 2
1 2
2 3
1
RN1810
RN1810
4
SRN10KJ-5-G P
SRN10KJ-5-G P
R1837 150KR 2J-GP R1837 150KR 2J-GP
2 3
1
PCH_SMBDAT A [12,13]
PCH_SMBCLK [12,13]
3D3V_S5_PCH
3D3V_S0
+V1.00A_SIP
1 2
10KR2J-3-GP
10KR2J-3-GP
1 2
EE for DVT1 0212
RTC_X1
RTC_X2
C1803
C1803
SC3P50V2CN- 1-GP
SC3P50V2CN- 1-GP
1 2
TP1802 TPAD14-OP -GP T P1802 TPAD14-OP-G P
1
TP1803 TPAD14-OP -GP T P1803 TPAD14-OP-G P
1
TP1807 TPAD14-OP -GP T P1807 TPAD14-OP-G P
1
+V 1.05S_AXCK_LCPLL
Q1802
Q1802
G
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
D
(#514849)
R1816
R1816
Layout: Place at the open door area.
C1801
XTAL24_IN
1 2
RTC_AUX_S5
1
2 3
RN1801
RN1801
SRN20KJ-1-G P
SRN20KJ-1-G P
4
2 1
1 2
G1801
G1801
1 2
C1805
C1805
GAP-OPEN
GAP-OPEN
C1806
C1806
SC1U10V2KX-1GP
SC1U10V2KX-1GP
2
SC1U10V2KX-1G P
SC1U10V2KX-1G P
2 3
R1802
R1802
1MR2J-1-GP
1MR2J-1-GP
R1810
R1810
XTAL24_OUT_R XTAL24_OUT
1 2
0R0402-PAD
0R0402-PAD
DVT1 0212 for Vendor suggest
SUSCLK_R
SRTC_RST #
RTC_RST#
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
EC1806
EC1806
DY
DY
C1801
1 2
SC15P50V2JN-2- GP
SC15P50V2JN-2- GP
X1801
X1801
XTAL-24MHZ- 81-GP
XTAL-24MHZ- 81-GP
82.30004.841
82.30004.841
4 1
C1802
C1802
1 2
SC15P50V2JN-2- GP
SC15P50V2JN-2- GP
EC1803
EC1803
DY
DY
1 2
SC4D7P50V2BN-GP
SC4D7P50V2BN-GP
<Core Desig n>
<Core Desig n>
<Core Desig n>
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
EC1807
EC1807
DY
DY
Title
Title
Title
CPU_(LPC/SPI/SMBUS/CL/CLK)
CPU_(LPC/SPI/SMBUS/CL/CLK)
CPU_(LPC/SPI/SMBUS/CL/CLK)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
18 106 Thursday, Feb ruary 25, 2016
18 106 Thursday, Feb ruary 25, 2016
18 106 Thursday, Feb ruary 25, 2016
A00
B B
3D3V_S0
RN1812
RN1812
CLKREQ_PCIE#3
1
8
CLKREQ_PEG#0
2
7
CLKREQ_PCIE#4
3
6
4 5
SRN10KJ-6-G P
SRN10KJ-6-G P
CLKREQ_PCIE#5
1
8
CLKREQ_PCIE#1
2
7
CLKREQ_PCIE#2
3
6
4 5
RN1813
RN1813
SRN10KJ-6-G P
SRN10KJ-6-G P
A A
5
WLAN
CLK_PCIE_VGA# [66]
CLK_PCIE_VGA [66]
CLKREQ_PEG#0 [66]
PEG_CLK1_CPU # [66]
PEG_CLK1_CPU [66 ]
CLKREQ_PCIE#1 [66]
CLKREQ_PEG#0
CLKREQ_PCIE#2
CLKREQ_PCIE#3
CLKREQ_PCIE#4
CLKREQ_PCIE#5
4
CPU1J
CPU1J
D42
CLKOUT_PCIE_N0
C42
CLKOUT_PCIE_P0
AR10
GPP_B5/SRCCLKREQ0#
B42
CLKOUT_PCIE_N1
A42
CLKOUT_PCIE_P1
AT7
GPP_B6/SRCCLKREQ1#
D41
CLKOUT_PCIE_N2
C41
CLKOUT_PCIE_P2
AT8
GPP_B7/SRCCLKREQ2#
D40
CLKOUT_PCIE_N3
C40
CLKOUT_PCIE_P3
AT10
GPP_B8/SRCCLKREQ3#
B40
CLKOUT_PCIE_N4
A40
CLKOUT_PCIE_P4
AU8
GPP_B9/SRCCLKREQ4#
E40
CLKOUT_PCIE_N5
E38
CLKOUT_PCIE_P5
AU7
GPP_B10/SRCCLKREQ5#
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
CLOCK SIGNALS
CLOCK SIGNALS
SKYLAKE_ULT
SKYLAKE_ULT
10 OF 20
10 OF 20
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
GPD8/SUSCLK
XTAL24_IN
XTAL24_OUT
XCLK_BIASREF
RTCX1
RTCX2
SRTCRST#
RTCRST#
C1804
C1804
SC3P50V2CN- 1-GP
SC3P50V2CN- 1-GP
F43
E43
SUSCLK_R SUSCLK
BA17
XTAL24_IN
E37
XTAL24_OUT
E35
XCLK_BIASREF
E42
RTC_X1
AM18
RTC_X2
AM20
SRTC_RST #
AN18
RTC_RST#
AM16
3
1 2
R1815 10M R2J-L-GP R 1815 10MR2J- L-GP
X1802
X1802
2 3
1 2
X T AL-32D768KH Z-67-GP
XTAL-32D768KH Z-67-GP
DVT1 0212 for Vendor suggest (change 3p)
PCIE_CLK_XDP_N
PCIE_CLK_XDP_P
R1813
R1813
1 2
0R0402-PAD
0R0402-PAD
R1803
R1803
1 2
2K7R2F-GP
2K7R2F-GP
Intel recommend: 2.71k ohm 1%
RTCRST_O N [24]
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
4 1
EC1808
EC1808
DY
DY
Page 19
5
Main Func = PCH
D D
Strap pin:
Port B /
Port C Detected
DDPB_CTRLDATA
DDPC_CTRLDATA
Sampled at rising edge of PCH_PWROK
*
*
These two signals have weak inte rnal pull-down.
C C
PCH strap pin:
Flash Descriptor Security Overide/
Intel ME Debug Mode
HDA_SDOUT
The internal pull-down is disabled a fter
PLTRST# deasserts
Low = Default
High = Enable
*
PCH strap pin:
NO REBOOT
Low = Enable (Default)
HDA_SPKR
The internal pull-down is disabled a fter
PLTRST# deasserts
*
High = Disable
4
0 = Port B is not detected .
1 = Port B is detected.
0 = Port C is not detected.
1 = Port C is detected.
HDA_SDIN0 [27]
SPKR [27]
HDA_SYNC
HDA_BITCL K
HDA_SDO UT
HDA_RST #
3D3V_S0
BA22
AY22
BB22
BA21
AY21
AW22
J5
AY20
AW20
AK7
AK6
AK9
AK10
H5
D7
D8
C8
AW5
1KR2J-1-G P
1KR2J-1-G P
R2006
R2006
1 2
DY
DY
CPU1G
CPU1G
AUDIO
AUDIO
HDA_SYNC/I2S0_SFRM
HDA_BLK/I2S0_SCLK
HDA_SDO/I2S0_TXD
HDA_SDI0/I2S0_RXD
HDA_SDI1/I2S1_RXD
HDA_RST#/I2S1_SCLK
GPP_D23/I2S_MCLK
I2S1_SFRM
I2S1_TXD
GPP_F1/I2S2_SFRM
GPP_F0/I2S2_SCLK
GPP_F2/I2S2_TXD
GPP_F3/I2S2_RXD
GPP_D19/DMIC_CLK0
GPP_D20/DMIC_DATA0
GPP_D17/DMIC_CLK1
GPP_D18/DMIC_DATA1
GPP_B14/SPKR
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SPKR
3
7 OF 20
7 OF 20
SKYLAKE_ULT
SKYLAKE_ULT
SDIO/SDXC
SDIO/SDXC
GPP_G0/SD_CMD
GPP_G1/SD_DATA0
GPP_G2/SD_DATA1
GPP_G3/SD_DATA2
GPP_G4/SD_DATA3
GPP_G5/SD_CD#
GPP_G6/SD_CLK
GPP_G7/SD_WP
GPP_A17/SD_PWR_EN#/ISH_GP7
GPP_A16/SD_1P8_SEL
SD_RCOMP
GPP_F23
AB11
AB13
AB12
W12
W11
W10
W8
W7
BA9
BB9
AB7
AF13
2
CPU_A16 _TP
SD_RCOM P
KB_LED_ BL_DET_R [65]
1
TP1902
TP1902
R1901
R1901
1 2
200R2F-L -GP
200R2F-L -GP
TPAD14-O P-GP
TPAD14-O P-GP
1
R1908 0R0402-P AD R1908 0R0402-PAD
HDA_COD EC_SYNC [27]
1
TP1903
TPAD14-O P-GP
EC1901
B B
A A
EC1901
SC10P50 V2JN-4GP
SC10P50 V2JN-4GP
1 2
DY
DY
HDA_COD EC_BITCLK
1 2
DY
DY
HDA_RST #
EC1902
EC1902
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
5
TPAD14-O P-GP
TP1903
HDA_COD EC_BITCLK [27]
HDA_COD EC_SDOUT [27]
ME_FW P_EC [2 4]
R1907,R1912 merge to RN1902
2015/10/06 modify
4
1 2
R1911 0R0402-P AD R1911 0R0402-PAD
1 2
SRN33J-5 -GP-U
SRN33J-5 -GP-U
2 3
1
RN1902
RN1902
R1909 1KR2J-1-G P R1 909 1K R2J-1-GP
1 2
HDA_SYNC
HDA_RST # HDA_RST #_R
HDA_BITCL K
HDA_SDO UT
4
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
CPU_(AUDIO/SDIO/SDXC)
CPU_(AUDIO/SDIO/SDXC)
CPU_(AUDIO/SDIO/SDXC)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
19 10 6 Thursday, February 25, 20 16
19 10 6 Thursday, February 25, 20 16
19 10 6 Thursday, February 25, 20 16
A00
Page 20
Main Func = PCH
5
EC2002
EC2002
1 2
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
RN2009
RN2009
1
2 3
OPS
OPS
SRN10KJ-5-G P
SRN10KJ-5-G P
3D3V_S0
D D
R2048 51KR2J-1-GP
R2048 51KR2J-1-GP
1 2
DY
DY
R2049 51KR2J-1-GP
R2049 51KR2J-1-GP
1 2
DY
DY
R2042 10KR2J-3-GP
R2042 10KR2J-3-GP
1 2
DY
DY
R2043 10KR2J-3-GP R2043 10KR2J-3-GP
1 2
R2044 10KR2J-3-GP R2044 10KR2J-3-GP
1 2
R2045 10KR2J-3-GP R2045 10KR2J-3-GP
1 2
R2046 10KR2J-3-GP R2046 10KR2J-3-GP
1 2
R2047 10KR2J-3-GP R2047 10KR2J-3-GP
1 2
PCH strap pin:
No Reboot
GSPI0_MOSI /
GPP_B18
The signal has a weak internal pull-down.
C C
Sampled at rising edge of PCH_PWROK
0 = Disable “No Reboot” mode.
1 = Enable “No Reboot” mode (PCH will disable the TCO
Timer system reboot feature). This function is useful
when running ITP/XDP.
DGPU_HOLD _RST# [66]
DGPU_HOLD _RST#
4
DGPU_PW R_EN
LPSS_UART2_R XD
LPSS_UART2_T XD
BLUETOOTH _EN
DBC_PANEL_E N
FFS_INT2
KB_DET#
IR_CAMERA_DET #
SPK_DET#
GPU_EVENT# [66]
GC6_FB_EN [66]
Change to Dummy 20150402
R2003 0R2J-2-GP
R2003 0R2J-2-GP
R2004 0R2J-2-GP
R2004 0R2J-2-GP
PTP
PCH Prim
3D3V_S5_PCH
1 2
R2007
R2007
DY
DY
1KR2J-1-GP
1KR2J-1-GP
GPP_B18/GSPI0_MOSI
1 2
R2019
R2019
DY
DY
1KR2J-1-GP
1KR2J-1-GP
1 2
GC6_20
GC6_20
1 2
GC6_20
GC6_20
DBC_PANEL_E N [55]
I2C0_SDA_TCH_ PAD [65]
I2C0_SCL_TCH_P AD [65]
BLUETOOTH _EN [66]
IR_CAMERA_DET # [55]
SIO_EXT_WAKE # [24]
TP2018
TP2018
TPAD14-OP-G P
TPAD14-OP-G P
SPK_DET# [29]
KB_DET# [65]
4
GPU_EVENT_M CP#
GC6_FB_EN_MC P
VRAM_ID1
GPP_B18/GSPI0_MOSI
1
LPSS_UART2_R XD
LPSS_UART2_T XD
GPP_B22
BOARD_ID2
CPU1F
CPU1F
AN8
GPP_B15/GSPI0_CS#
AP7
GPP_B16/GSPI0_CLK
AP8
GPP_B17/GSPI0_MISO
AR7
GPP_B18/GSPI0_MOSI
AM5
GPP_B19/GSPI1_CS#
AN7
GPP_B20/GSPI1_CLK
AP5
GPP_B21/GSPI1_MISO
AN5
GPP_B22/GSPI1_MOSI
AB1
GPP_C8/UART0_RXD
AB2
GPP_C9/UART0_TXD
W4
GPP_C10/UART0_RTS#
AB3
GPP_C11/UART0_CTS#
AD1
GPP_C20/UART2_RXD
AD2
GPP_C21/UART2_TXD
AD3
GPP_C22/UART2_RTS#
AD4
GPP_C23/UART2_CTS#
U7
GPP_C16/I2C0_SDA
U6
GPP_C17/I2C0_SCL
U8
GPP_C18/I2C1_SDA
U9
GPP_C19/I2C1_SCL
AH9
GPP_F4/I2C2_SDA
AH10
GPP_F5/I2C2_SCL
AH11
GPP_F6/I2C3_SDA
AH12
GPP_F7/I2C3_SCL
AF11
GPP_F8/I2C4_SDA
AF12
GPP_F9/I2C4_SCL
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
3
LPSS ISH
LPSS ISH
Strap
SKYLAKE_ULT
SKYLAKE_ULT
GPP_D16/ISH_UART0_CTS#/SML0BALERT#
GPP_D11/ISH_SPI_MISO
GPP_D12/ISH_SPI_MOSI
GPP_F10/I2C5_SDA/ISH_I2C2_SDA
GPP_F11/I2C5_SCL/ISH_I2C2_SCL
GPP_D13/ISH_UART0_RXD/SML0BDATA
GPP_D14/ISH_UART0_TXD/SML0BCLK
GPP_D15/ISH_UART0_RTS#
GPP_C12/UART1_RXD/ISH_UART1_RXD
GPP_C13/UART1_TXD/ISH_UART1_TXD
GPP_C14/UART1_RTS#/ISH_UART1_RTS#
GPP_C15/UART1_CTS#/ISH_UART1_CTS#
GPP_A12/BM_BUSY#/ISH_GP6
6 OF 20
6 OF 20
GPP_D9/ISH_SPI_CS#
GPP_D10/ISH_SPI_CLK
GPP_D5/ISH_I2C0_SDA
GPP_D6/ISH_I2C0_SCL
GPP_D7/ISH_I2C1_SDA
GPP_D8/ISH_I2C1_SCL
GPP_A18/ISH_GP0
GPP_A19/ISH_GP1
GPP_A20/ISH_GP2
GPP_A21/ISH_GP3
GPP_A22/ISH_GP4
GPP_A23/ISH_GP5
P2
P3
P4
P1
M4
N3
N1
N2
AD11
AD12
U1
U2
U3
U4
AC1
AC2
AC3
AB4
AY8
BA8
BB7
BA7
AY7
AW7
AP13
USB_UART_S EL_D9
DGPU_HOLD _RST#
RTC_DET#
I2C0_SDA
I2C0_SCL
I2C1_SDA
I2C1_SCL
1.8V Only
UART0_TXD
UART0_RTS #
UART0_CTS #
BOARD_ID1
UART1_RTS #
UART1_CTS #
ISH_KB_DISABLE
GSEN_INT1_ISH
GSEN_INT2_ISH
GSEN2_INT1_ISH
GSEN2_INT2_ISH
GYRO_INT_ISH
GYRO_DRDY_ISH
TP2006 TPAD14-OP -GP T P2006 TPAD14-OP-G P
1
R2021 0R2J-2-GP
R2021 0R2J-2-GP
1 2
ISH
ISH
R2020 0R2J-2-GP
R2020 0R2J-2-GP
1 2
ISH
ISH
DGPU_PW R_EN [66]
1
TP2012 TPAD14-OP- GP T P2012 TPAD14-OP-GP
1
TP2013 TPAD14-OP- GP T P2013 TPAD14-OP-GP
1
TP2014 TPAD14-OP- GP T P2014 TPAD14-OP-GP
FFS_INT2 [70]
1
TP2016 TPAD14-OP -GP T P2016 TPAD14-OP-G P
1
TP2017 TPAD14-OP -GP T P2017 TPAD14-OP-G P
R2022 0R0402-PAD R2022 0R0402-PAD
1 2
R2023 0R0402-PAD R2023 0R0402-PAD
1 2
R2024 0R0402-PAD R2024 0R0402-PAD
1 2
R2025 0R0402-PAD R2025 0R0402-PAD
1 2
R2026 0R0402-PAD R2026 0R0402-PAD
1 2
R2027 0R0402-PAD R2027 0R0402-PAD
1 2
R2028 0R0402-PAD R2028 0R0402-PAD
1 2
2
RTC_DET# [25]
SENSOR_I2C_SD A [55,69,70]
SENSOR_I2C_SC L [55,69,70]
1
3D3V_S0
RN2007
RN2007
SRN1KJ-7-G P
I2C0_SCL
I2C0_SDA
I2C1_SCL
I2C1_SDA
(PDG#543016) Ensure that all I2C interface on-board terminations are pulled up
to the same voltage rail as the device/end point.
KB_DISABLE [24,69]
GSEN_INT1 [55,69]
GSEN_INT2 [55,69]
GSEN2_INT1_C [69,70]
GSEN2_INT2_C [69,70]
GYRO_INT_C [69,70]
GYRO_DRDY [55,69]
(PDG#543016) If the UART/GPIO functionality is also not used,
the signals can be left as no-connect.
SRN1KJ-7-G P
1
2 3
SRN2K2J-1-G P
SRN2K2J-1-G P
2 3
DY
DY
1
RN2008
RN2008
4
4
3D3V_S5_PCH
R2039 10KR2J-3-GP
R2039 10KR2J-3-GP
1 2
DY
DY
R2040 10KR2J-3-GP R204 0 10KR2J-3-GP
1 2
R2041 10KR2J-3-GP R204 1 10KR2J-3-GP
1 2
B B
A A
RTC_DET#
SIO_EXT_WAKE #
5
ME_SUS_PW R_ACK_R [17]
3D3V_S0 3D3V_S0 3D3V_S0
1 2
BIOS strap pin:
R2005
R2005
OPS
OPS
10KR2J-3-GP
10KR2J-3-GP
R2008
R2008
10KR2J-3-GP
10KR2J-3-GP
BIOS UMA/DIS Strap pin
UMA
DIS
BOARD_ID2 VRAM_ID1
4
UMA
UMA
1 2
GPP_C11
BOARD_ID2
0
1
3
1 2
R2029
R2029
DY
DY
10KR2J-3-GP
10KR2J-3-GP
1 2
R2030
R2030
10KR2J-3-GP
10KR2J-3-GP
DY
DY
BOARD_ID1
BBY
BBY
ROR
ROR
1 2
R2010
R2010
10KR2J-3-GP
10KR2J-3-GP
1 2
R2009
R2009
10KR2J-3-GP
10KR2J-3-GP
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CPU_(LPSS/ISH)
CPU_(LPSS/ISH)
CPU_(LPSS/ISH)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
20 106 Thursday, Feb ruary 25, 2016
20 106 Thursday, Feb ruary 25, 2016
20 106 Thursday, Feb ruary 25, 2016
A00
Page 21
Main Func = PCH
5
4
3
2
1
D D
C2120
C2120
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
EC2101
EC2101
DY
DY
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1D5V_S0
+V3.3A_SIP
C C
B B
R2102
R2102
0R2J-2-GP
0R2J-2-GP
R2101
R2101
0R0402-PAD
0R0402-PAD
1 2
1 2
+VCCMPHYGTA ON_1P0_LS_SIP
DY
DY
+VCCMPHYGTA ON_1P0_LS_SIP
+VCCMPHYGTA ON_1P0_LS_SIP
+VCCPRIM_COR E
+VCCDSW _1P0
+V1.00A_SIP
+VCCAMPHYPLL_1P 0
+VCCAPLL_1P0
+V1.00A_SIP
+VCCPDSW _3P3
+VCCPAZIO
+V3.3A_SIP
+V3.3A_SIP
+V1.00A_SIP
+V3.3A_SIP
C2105
C2105
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
+V1.00A_SIP
C2106
C2106
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CPU1O
CPU1O
CPU POWER 4 OF 4
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_1P0
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
VCCPRIM_CORE
DCPDSW_1P0
VCCMPHYAON_1P0
L1
VCCMPHYAON_1P0
VCCMPHYGT_1P0_N15
VCCMPHYGT_1P0_N16
VCCMPHYGT_1P0_N17
VCCMPHYGT_1P0_P15
VCCMPHYGT_1P0_P16
VCCAMPHYPLL_1P0
VCCAMPHYPLL_1P0
VCCAPLL_1P0
VCCPRIM_1P0_AB17
VCCPRIM_1P0_Y18
VCCDSW_3P3_AD17
VCCDSW_3P3_AD18
VCCDSW_3P3_AJ17
VCCHDA
VCCSPI
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCSRAM_1P0
VCCPRIM_3P3_AJ21
VCCPRIM_1P0_AK20
VCCAPLLEBB
SKYLAKE-U-GP
SKYLAKE-U-GP
Layout Note:
1uF:
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C2105 near V19
C2106 near AK17
C2107 near AG15
C2109 near Y16
C2110 near T16
C2111 near AJ19
CPU POWER 4 OF 4
SKYLAKE_ULT
SKYLAKE_ULT
1.8V Only
071.SKYLA.000U
071.SKYLA.000U
AB19
AB20
P18
2.57A
AF18
AF19
V20
V21
AL1
K17
N15
N16
N17
P15
P16
K15
L15
V15
AB17
Y18
AD17
AD18
AJ17
AJ19
AJ16
AF20
AF21
T19
T20
AJ21
AK20
N18
C2111
C2111
C2109
C2109
C2110
C2110
C2107
C2107
SC1U10V2KX-1GP
SC1U10V2KX-1GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
1 2
1 2
15 OF 20
15 OF 20
VCCPGPPA
VCCPGPPB
VCCPGPPC
VCCPGPPD
VCCPGPPE
VCCPGPPF
VCCPGPPG
VCCPRIM_3P3_V19
VCCPRIM_1P0_T1
VCCATS_1P8
VCCRTCPRIM_3P3
VCCRTC_AK19
VCCRTC_BB14
DCPRTC
VCCCLK1
VCCCLK2
VCCCLK3
VCCCLK4
VCCCLK5
VCCCLK6
GPP_B0/CORE_VID0
GPP_B1/CORE_VID1
+V1.8A_SIP
+V3.3A_SIP
AK15
AG15
Y16
Y15
T16
AF16
+V1.8A_SIP
AD15
+V3.3A_SIP
V19
T1
+V1.00A_SIP
AA1
+V1.8A_SIP
AK17
+V3.3A_SIP
AK19
BB14
VCCRTCE XT
BB10
A14
K19
L21
N20
L19
A10
V0.85A_VID0
AN11
V0.85A_VID1
AN13
C2108
C2108
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
1 2
DY
DY
+VCCPRTC _3P3
C2112 SC D1U16V2KX-3GP C2112 SCD 1U16V2KX-3GP
1 2
+V1.00A_SIP
+VCCCLK2
+V1.00A_SIP
+VCCCLK4
+VCCCLK5
+V1.00A_SIP
1
1
+VCCDSW _1P0
C2103
C2102
C2102
C2103
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
TP2101 TPAD14-OP -GP T P2101 TPAD14-OP-G P
TP2102 TPAD14-OP -GP T P2102 TPAD14-OP-G P
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+V1.00A_SIP +VCCPRIM_COR E
C2101
C2101
1 2
+VCCPRTC _3P3
C2118
C2118
1 2
Layout Note:
1uF:
C2104
C2104
C2121
C2121
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
C2101 near AB19
SC1U10V2KX-1GP
SC1U10V2KX-1GP
C2104 near K17
C2116 near A10
C2121 near AL1
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
Layout Note:
C2117
SC1U10V2KX-1GP
C2117
SC1U10V2KX-1GP
0.1uF:
C2118 near AK19
1uF:
C2117 near Ak19
R2106
R2106
1 2
0R0603-PAD
0R0603-PAD
R2107
R2107
1 2
0R0603-PAD
0R0603-PAD
R2108
R2108
1 2
0R0603-PAD
0R0603-PAD
R2109
R2109
1 2
0R0603-PAD
0R0603-PAD
R2110
R2110
1 2
0R0603-PAD
0R0603-PAD
R2111
R2111
1 2
0R0603-PAD
0R0603-PAD
+VCCPRTC _3P3 RTC_AUX_S5
+VCCAMPHYPLL_1P 0 +VCCMPHYGTA ON_1P0_LS_SIP
+VCCAPLL_1P0 +V1.00A_SIP
+VCCCLK2 +V1.00A_SIP
+VCCCLK4 +V1.00A_SIP
+VCCCLK5 +V1.00A_SIP
1 2
C2122
SC22U6D3V3MX-1-GPDYC2122
SC22U6D3V3MX-1-GP
Layout Note:
1uF:
C2116 near A10
22uF:
C2115 near K19
C2119 near N20
C2122 near L19
3
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CPU_(POWER1)
CPU_(POWER1)
CPU_(POWER1)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
21 106 Thursday, Feb ruary 18, 2016
21 106 Thursday, Feb ruary 18, 2016
21 106 Thursday, Feb ruary 18, 2016
A00
A00
A00
+VCCAMPHYPLL_1P 0
1 2
DY
A A
5
C2113
SC22U6D3V3MX-1-GPDYC2113
SC22U6D3V3MX-1-GP
Layout Note:
22uF:
C2113 near K15
+VCCAPLL_1P0 +V1.00A_SIP
1 2
DY
4
C2114
SC22U6D3V3MX-1-GPDYC2114
SC22U6D3V3MX-1-GP
Layout Note:
22uF:
C2113 near K15
1 2
C2116
C2116
+VCCCLK2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
+VCCCLK4
+VCCCLK5
C2119
SC22U6D3V3MX-1-GPDYC2119
SC22U6D3V3MX-1-GP
C2115
SC22U6D3V3MX-1-GPDYC2115
SC22U6D3V3MX-1-GP
1 2
1 2
DY
DY
DY
Page 22
5
4
3
2
1
Main Func = PCH
D D
CPU1T
CPU1T
AW69
RSVD_AW69
AW68
RSVD_AW68
AU56
RSVD_AU56
AW48
RSVD_AW48
C7
RSVD_C7
U12
RSVD_U12
U11
RSVD_U11
H11
RSVD_H11
SKYLAKE-U-GP
SKYLAKE-U-GP
C C
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
SPARE
SPARE
20 OF 20
20 OF 20
RSVD_F6
RSVD_E3
RSVD_C11
RSVD_B11
RSVD_A11
RSVD_D12
RSVD_C12
RSVD_F52
F6
E3
C11
B11
A11
D12
C12
F52
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
CPU_(RSVD)
CPU_(RSVD)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
CPU_(RSVD)
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
22 106 Thursday, February 18, 2016
22 106 Thursday, February 18, 2016
22 106 Thursday, February 18, 2016
1
A00
A00
A00
Page 23
5
4
3
2
1
Main Func = PCH
CPU1Q
CPU1Q
GND 2 OF 3
CPU1P
CPU1P
GND 1 OF 3
D D
TP2309 TPAD14-O P-GP TP2 309 TPAD14-O P-GP
TP2311 TPAD14-O P-GP TP2 311 TPAD14-O P-GP
TP2310 TPAD14-O P-GP TP2 310 TPAD14-O P-GP
C C
B B
1
1
1
A5_TP
A67_TP
A70_TP
A5
VSS
A67
VSS
A70
VSS
AA2
VSS
AA4
VSS
AA65
VSS
AA68
VSS
AB15
VSS
AB16
VSS
AB18
VSS
AB21
VSS
AB8
VSS
AD13
VSS
AD16
VSS
AD19
VSS
AD20
VSS
AD21
VSS
AD62
VSS
AD8
VSS
AE64
VSS
AE65
VSS
AE66
VSS
AE67
VSS
AE68
VSS
AE69
VSS
AF1
VSS
AF10
VSS
AF15
VSS
AF17
VSS
AF2
VSS
AF4
VSS
AF63
VSS
AG16
VSS
AG17
VSS
AG18
VSS
AG19
VSS
AG20
VSS
AG21
VSS
AG71
VSS
AH13
VSS
AH6
VSS
AH63
VSS
AH64
VSS
AH67
VSS
AJ15
VSS
AJ18
VSS
AJ20
VSS
AJ4
VSS
AK11
VSS
AK16
VSS
AK18
VSS
AK21
VSS
AK22
VSS
AK27
VSS
AK63
VSS
AK68
VSS
AK69
VSS
AK8
VSS
AL2
VSS
AL28
VSS
AL32
VSS
AL35
VSS
AL38
VSS
AL4
VSS
AL45
VSS
AL48
VSS
AL52
VSS
AL55
VSS
AL58
VSS
AL64
VSS
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
GND 1 OF 3
SKYLAKE_ULT
SKYLAKE_ULT
16 OF 20
16 OF 20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AL65
AL66
AM13
AM21
AM25
AM27
AM43
AM45
AM46
AM55
AM60
AM61
AM68
AM71
AM8
AN20
AN23
AN28
AN30
AN32
AN33
AN35
AN37
AN38
AN40
AN42
AN58
AN63
AP10
AP18
AP20
AP23
AP28
AP32
AP35
AP38
AP42
AP58
AP63
AP68
AP70
AR11
AR15
AR16
AR20
AR23
AR28
AR35
AR42
AR43
AR45
AR46
AR48
AR5
AR50
AR52
AR53
AR55
AR58
AR63
AR8
AT2
AT20
AT23
AT28
AT35
AT4
AT42
AT56
AT58
AV1_TP
1
TP2307 TPAD14-O P-GP TP2 307 TPAD14-O P-GP
AV71_TP
1
TP2304 TPAD14-O P-GP TP2 304 TPAD14-O P-GP
B71_TP
1
TP2312 TPAD14-O P-GP TP2 312 TPAD14-O P-GP
TP2305 TPAD14-O P-GP TP2 305 TPAD14-O P-GP
TP2306 TPAD14-O P-GP TP2 306 TPAD14-O P-GP
1
1
BA1_TP
BA2_TP
AW10
AW12
AW14
AW16
AW18
AW21
AW23
AW26
AW28
AW30
AW32
AW34
AW36
AW38
AW41
AW43
AW45
AW47
AW49
AW51
AW53
AW55
AW57
AW60
AW62
AW64
AW66
AT63
VSS
AT68
VSS
AT71
VSS
AU10
VSS
AU15
VSS
AU20
VSS
AU32
VSS
AU38
VSS
AV1
VSS
AV68
VSS
AV69
VSS
AV70
VSS
AV71
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
AW6
VSS
VSS
VSS
VSS
VSS
AW8
VSS
AY66
VSS
B10
VSS
B14
VSS
B18
VSS
B22
VSS
B30
VSS
B34
VSS
B39
VSS
B44
VSS
B48
VSS
B53
VSS
B58
VSS
B62
VSS
B66
VSS
B71
VSS
BA1
VSS
BA10
VSS
BA14
VSS
BA18
VSS
BA2
VSS
BA23
VSS
BA28
VSS
BA32
VSS
BA36
VSS
F68
VSS
BA45
VSS
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
GND 2 OF 3
SKYLAKE_ULT
SKYLAKE_ULT
17 OF 20
17 OF 20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
BA49
BA53
BA57
BA6
BA62
BA66
BA71
BB18
BB26
BB30
BB34
BB38
BB43
BB55
BB6
BB60
BB64
BB67
BB70
C1
C25
C5
D10
D11
D14
D18
D22
D25
D26
D30
D34
D39
D44
D45
D47
D48
D53
D58
D6
D62
D66
D69
E11
E15
E18
E21
E46
E50
E53
E56
E6
E65
E71
F1
F13
F2
F22
F23
F27
F28
F32
F33
F35
F37
F38
F4
F40
F42
BA41
BA71_TP
BB67_TP
BB70_TP
C1_TP
E71_TP
1
TP2303 T PAD14-OP-GP TP2 303 TPA D14-OP-GP
1
TP2302 T PAD14-OP-GP TP2 302 TPA D14-OP-GP
1
TP2301 T PAD14-OP-GP TP2 301 TPA D14-OP-GP
1
TP2308 T PAD14-OP-GP TP2 308 TPA D14-OP-GP
1
TP2313 T PAD14-OP-GP TP2 313 TPA D14-OP-GP
CPU1R
CPU1R
GND 3 OF 3
GND 3 OF 3
F8
VSS
G10
VSS
G22
VSS
G43
VSS
G45
VSS
G48
VSS
G5
VSS
G52
VSS
G55
VSS
G58
VSS
G6
VSS
G60
VSS
G63
VSS
G66
VSS
H15
VSS
H18
VSS
H71
VSS
J11
VSS
J13
VSS
J25
VSS
J28
VSS
J32
VSS
J35
VSS
J38
VSS
J42
VSS
J8
VSS
K16
VSS
K18
VSS
K22
VSS
K61
VSS
K63
VSS
K64
VSS
K65
VSS
K66
VSS
K67
VSS
K68
VSS
K70
VSS
K71
VSS
L11
VSS
L16
VSS
L17
VSS
SKYLAKE-U-GP
SKYLAKE-U-GP
071.SKYLA.000U
071.SKYLA.000U
SKYLAKE_ULT
SKYLAKE_ULT
18 OF 20
18 OF 20
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
L18
L2
L20
L4
L8
N10
N13
N19
N21
N6
N65
N68
P17
P19
P20
P21
R13
R6
T15
T17
T18
T2
T21
T4
U10
U63
U64
U66
U67
U69
U70
V16
V17
V18
W13
W6
W9
Y17
Y19
Y20
Y21
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
CPU_(VSS)
CPU_(VSS)
CPU_(VSS)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
23 10 6 Thursday, February 18, 20 16
23 10 6 Thursday, February 18, 20 16
23 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 24
5
Main Func = KBC
1D0V_S5
R2402
R2402
1 2
0R0402-PAD
0R0402-PAD
Just for Starload placement
2015/09/23 modify
D D
3D3V_S5_KBC
C C
SPI_CLK_ROM [18,25]
Layout Note:
Need very close to EC
RN2412
RN2412
KSO0
1
8
KSO1
2
7
KSO2
3
6
KSO3
4 5
SRN100KJ-5-GP
SRN100KJ-5-GP
RN2409
RN2409
KSO4
1
8
KSO5
2
7
KSO6
3
6
KSO7
4 5
SRN100KJ-5-GP
SRN100KJ-5-GP
RN2410
RN2410
KSO8
1
8
KSO10
2
7
KSO11
3
6
KSO12
4 5
SRN100KJ-5-GP
SRN100KJ-5-GP
RN2411
RN2411
KSO13
1
8
KSO14
2
7
KSO15
3
6
KSO16
4 5
SRN100KJ-5-GP
SRN100KJ-5-GP
PLT_RST# [17,66,68]
2015/09/22 modify
SPI_SO_ROM [18,25]
R2404,R2406 merge to RN2406
2015/10/06 modify
ALL_SYS_PWRGD assert,
delay 10ms; PCH_PWROK assert.
RN2406
RN2406
1
2 3
SRN10J-8-GP
SRN10J-8-GP
3D3V_S5_KBC
Layout Note:
Need very close to EC
4
3D3V_S5 3D3V_S5_KBC 3D3V_S5_KBC
R2446
R2446
EC_VTT
12
C2406
C2406
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
RN2403
RN2403
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
RN2404
RN2404
1
2
3
4 5
SRN10KJ-6-GP
SRN10KJ-6-GP
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
EC_SPI_CLK
EC_SPI_MISO
3D3V_S5_KBC
DY
DY
8
7
6
8
7
6
EMI DVT1 0210
C2402
C2402
1 2
1 2
R2450
R2450
100KR2J-1-GP
100KR2J-1-GP
KSO9
R2449
R2449
100KR2J-1-GP
100KR2J-1-GP
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
1 2
12
12
12
C2416
C2416
C2421
C2421
C2420
C2420
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Just for Starload placement
2015/09/23 modify
CLKRUN# [18]
R2510
R2510
1 2
10KR2F-2-GP
10KR2F-2-GP
DY
DY
SPI_SI_ROM [18,25]
INT#_Typec [37]
RTCRST_ON [18]
SPI_CS_ROM_N0 [18,25]
SIO_SLP_S4# [17,40,54]
SATA_LED# [43,64]
PCH_ALW_ON [41]
SIO_SLP_S0# [17,60]
INT_TP# [4,65]
VOL_UP# [66]
ALL_SYS_PWRGD [17,40]
RESET_OUT# [17,26]
1 2
0R0603-PAD
0R0603-PAD
12
12
12
12
C2411
C2411
C2412
C2412
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
KSO[0..16] [65]
KSI[0..7] [65]
CLK_TP_SIO [65]
DAT_TP_SIO [65]
SIO_PWRBTN# [17]
PCH_RSMRST# [17]
LPC_LAD[3..0] [18,68]
LPC_LFRAME# [18,68]
CLK_PCI_LPC_MEC [18]
SERIRQ [18]
SIO_RCIN# [18]
1 2
12
C2414
C2414
C2410
C2410
C2413
C2413
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C2428
C2428
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
KSO0
KSO1
KSO2
KSO3
KSO4
KSO5
KSO6
KSO7
KSO8
KSO9
KSO10
KSO11
KSO12
KSO13
KSO14
KSO15
KSO16
CAP_LED#
KSI0
KSI1
KSI2
KSI3
KSI4
KSI5
KSI6
KSI7
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
SIO_EXT_SMI#
TP_EN#
SIO_EXT_SCI#
EC_SPI_CLK
EC_SPI_MOSI
R2405 10R2F-L-GP R2405 10R2F-L-GP
EC_SPI_MISO
USB_EN#
XTAL2
XTAL1
2015/09/22 modify
X2401
X2401
SC10P50V2JN-4GP
SC10P50V2JN-4GP
1 2
C2425
C2425
XTAL-32D768KHZ-83-GP
XTAL-32D768KHZ-83-GP
082.30003.0131
082.30003.0131
1 2
B B
R2418
R2418
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
Q2408
CMP_VOUT1
R2417
R2417
100KR2J-1-GP
100KR2J-1-GP
A A
Q2408
G
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
4th = 84.2N702.W31
4th = 84.2N702.W31
D
5
1 2
DY
DY
2015/09/22 modify
Microchip: Use CL=9p Xtal, C = 10p
H_PROCHOT# [4,44,46]
1 2
C2403
C2403
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
EMI DVT1 0210
SC10P50V2JN-4GP
SC10P50V2JN-4GP
C2424
C2424
1 2
4
If don't need RTC alarm wake up,
can change to 3D3V_AUX_S5
RTC_AUX_S5
1 2
ECVBAT
12
KBC24
KBC24
2
GPIO02 7/KSO00 /PVT_I O1
14
GPIO01 5/KSO01 /PVT_C S#
15
GPIO01 6/KSO02 /PVT_S CLK
16
GPIO01 7/KSO03 /PVT_I O0
37
GPIO04 5/BCM_INT 1#/KSO 04
38
GPIO04 6/BCM_DA T1/KSO 05
39
GPIO04 7/BCM_CL K1/KSO 06
50
GPIO02 5/KSO07 /PVT_I O2
46
GPIO05 5/PWM2/K SO08/P VT_IO3
68
GPIO10 2/KSO09 /CR_ST RAP
72
GPIO10 6/KSO10
74
GPIO11 0/KSO11
75
GPIO11 1/KSO12
76
GPIO11 2/PS2_C LK1A/K SO13
77
GPIO11 3/PS2_D AT1A/K SO14
86
GPIO12 5/KSO15
92
GPIO13 2/KSO16
93
GPIO14 0/KSO17
98
GPIO14 3/KSI0/D TR#
99
GPIO14 4/KSI1/D CD#
6
GPIO00 5/SMB00_ DATA/S MB00_DA TA18/K SI2
7
GPIO00 6/SMB00_ CLK/SMB0 0_CLK 18/KSI 3
104
GPIO14 7/KSI4/D SR#
105
GPIO15 0/KSI5/R I#
107
GPIO15 1/KSI6/R TS#
108
GPIO15 2/KSI7/C TS#
78
GPIO11 4/PS2_C LK0
79
GPIO11 5/PS2_D AT0
52
GPIO02 6/PS2_C LK1B
88
GPIO12 7/PS2_D AT1B
59
GPIO04 0/LAD0
60
GPIO04 1/LAD1
61
GPIO04 2/LAD2
62
GPIO04 3/LAD3
58
GPIO04 4/LFRAME #
56
GPIO06 4/LRESE T#
57
GPIO03 4/PCI_C LK
63
GPIO06 7/CLKRUN#
55
GPIO06 3/SER_I RQ
10
GPIO01 1/SMI#/EMI _INT#
49
GPIO06 0/KBRST
53
GPIO06 1/LPCPD #
66
GPIO10 0/EC_SC I#
32
GPIO12 6/SHD_SC LK
28
GPIO13 3/SHD_IO 0
29
GPIO13 4/SHD_IO 1
30
GPIO13 5/SHD_IO 2
31
GPIO13 6/SHD_IO 3
27
GPIO12 3/SHD_CS #
67
GPIO10 1/SPI_C LK
69
GPIO10 3/SPI_I O0
71
GPIO10 5/SPI_I O1
42
GPIO05 2/SPI_I O2
33
GPIO06 2/SPI_I O3
3
GPIO00 1/SPI_C S#/32K HZ_OUT
13
RESET_ IN#/GPIO 014
48
GPIO05 7/VCC_P WRGD
73
GPIO10 7/RESET _OUT#
125
XTAL2
123
XTAL1
071.01404.0B0E
071.01404.0B0E
3D3V_S5_KBC
3D3V_S5_KBC
3D3V_S5_KBC
R2480
R2480
100KR2J-1-GP
100KR2J-1-GP
ICSP_CLOCK
DY
DY
R2414
R2414
ICSP_DATA
1 2
1 2
4K7R2J-2-GP
4K7R2J-2-GP
HOST_DEBUG_TX
ICSP_CLR
SMBCLK1
SMBDA1
USBCHARGER_CB0
PCH_ALW_ON
PBAT_PRES#
SIO_EXT_SCI#
SIO_EXT_SMI#
4
R2472
R2472
0R0402-PAD
0R0402-PAD
43
103
122
VTR5VTR19VTR
VTR65VTR82VTR
VBAT
GPIO00 7/SMB01_ DATA/S MB01_DA TA18
GPIO01 0/SMB01_ CLK/SMB0 1_CLK 18
GPIO01 2/SMB02_ DATA/S MB02_DA TA18
GPIO01 3/SMB02_ CLK/SMB0 2_CLK 18
GPIO13 0/SMB03_ DATA/S MB03_DA TA18
GPIO13 1/SMB03_ CLK/SMB0 3_CLK 18
GPIO14 1/SMB04_ DATA/S MB04_DA TA18
GPIO14 2/SMB04_ CLK/SMB0 4_CLK 18
GPIO05 0/TACH0
GPIO05 1/TACH1
GPIO05 3/PWM0
GPIO05 4/PWM1
GPIO05 6/PWM3
GPIO03 0/BCM_INT 0#/PW M4
GPIO03 1/BCM_DA T0/PW M5
GPIO03 2/BCM_CL K0/PW M6
GPIO00 2/PWM7
GPIO15 7/LED0/T ST_CL K_OUT
GPIO11 6/TFDP_ DATA/UA RT_RX
GPIO11 7/TFDP_ CLK/UAR T_TX
GPIO03 5/SB-TSI _CLK
GPIO03 3/PECI_ DAT/SB _TSI_D AT
GPIO14 5/ICSP_ CLOCK
GPIO14 6/ICSP_ DATA
SYSPWR _PRES/G PIO00 3
VCI_OUT /GPIO03 6
VCI_IN1 #/GPIO1 62
VCI_IN0 #/GPIO1 63
VCI_OV RD_IN/GP IO164
GPIO16 0/DAC_0
GPIO16 1/DAC_1
GPIO12 4/CMP_VO UT0
GPIO02 0/CMP_VI N0
GPIO16 5/CMP_VR EF0
GPIO12 0/CMP_VO UT1
GPIO02 1/CMP_VI N1
GPIO16 6/CMP_VR EF1/UAR T_CLK
GPIO02 4/CMP_ST RAP0
GPIO02 3/ADC6/A 20M
VR_CAP18VSS17VSS51AVSS
VSS_VBAT
VSS
VSS64VSS
MEC1404-NU-D0-1-GP-U
MEC1404-NU-D0-1-GP-U
84
112
124
100
EC_AGND
VR_CAP
12
C2418
C2418
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R2445
R2445
1 2
0R0402-PAD
0R0402-PAD
R2473 10KR2J-3-GP R2473 10KR2J-3-GP
R2495 100KR2J-1-GP
R2495 100KR2J-1-GP
R2415 10KR2J-3-GP R2415 10KR2J-3-GP
Just for Starload placement
2015/09/23 modify
Layout Note:
EC_AGND
Connect GND and AGND planes via either
0R resistor or connect directly.
RN2402
RN2402
12 34
SRN4K7J-8-GP
SRN4K7J-8-GP
1 2
1 2
DS3
DS3
1 2
VTR_33 _18
GPIO15 6/LED1
GPIO10 4/LED2
VREF_C PU
ICSP_MC LR
BGPO/GP IO004
DAC_VR EF
GPIO02 2/ADC5
GPIO15 3/ADC4
GPIO15 4/ADC3
GPIO15 5/ADC2
GPIO12 2/ADC1
GPIO12 1/ADC0
ADC_VR EF
3D3V_S5_KBC
3D3V_S5_KBC
3D3V_S5_KBC
12
C2423
C2423
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
54
SMBDA1
8
SMBCLK1
9
SMBDA2
11
SMBCLK2
12
SMBDA3
89
SMBCLK3
91
96
97
FAN1_TACH
40
41
44
45
47
L_BKLT_EN_EC
34
35
36
4
BAT1_LED#
1
BAT2_LED#
106
70
80
HOST_DEBUG_TX
81
90
PECI_EC
94
EC_VTT
95
ICSP_CLOCK
101
ICSP_DATA
102
ICSP_CLR
87
119
+3VLP
120
ALWON
121
KB_CLOSE#_2_R
126
POWER_SW_IN#
127
128
23
DGPU_PWROK_KBC
24
22
CMP_VOUT0
85
CMP_VIN0
20
VCREF0
25
CMP_VOUT1
83
HW_ACAVIN_NB#
21
LCD_TST_EN
26
118
117
116
MODEL_ID
109
I_ADP
110
BOARD_ID
111
I_SYS
113
I_BATT
114
115
3D3V_S5_KBC
EC_AGND
Dummy R2422 & C2427
by EC control PCH_DPWROK
20150416
DB3
DB3
7
1
2
3
LPC
LPC
4
5
6
8
20.K0691.006
20.K0691.006
ACES-CON6-58-GP
ACES-CON6-58-GP
SIO_EXT_SCI# [16]
SIO_EXT_SMI# [8]
R2462
R2462
0R0402-PAD
0R0402-PAD
1 2
3D3V_AUX_KBC_33
C2422
C2422
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
12
1 2
R2443
R2443
33KR2F-GP
33KR2F-GP
DVT2
PCB_REV
PCB_REV
BOARD_ID
1 2
R2444
R2444
C2408
C2408
100KR2F-L1-GP
100KR2F-L1-GP
1 2
EC_AGND
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
For Typec SMBUS
1 2
SC100P50V2JN-3GP
SC100P50V2JN-3GP
R2437
R2437
C2405
C2405
43R2J-GP
43R2J-GP
12
DY
DY
Need very close to EC, PDG: <0.5 inches.
R2471 0R2J-2-GP
R2471 0R2J-2-GP
1 2
OPS
OPS
C2429 SCD1U16V2KX-3GP C2429 SCD1U16V2KX-3GP
R2470 0R0402-PAD R2470 0R0402-PAD
3D3V_S5_KBC
1 2
1 2
R2494 0R2J-2-GP
R2494 0R2J-2-GP
1 2
DY
DY
Reserve resistor, 20141118
I_SYS
EC_AGND
12
C2427
C2427
I_BATT
C2441
C2441
EC_AGND
USBCHARGER_CB0 [34]
3
R2430
R2430
10KR2J-3-GP
10KR2J-3-GP
3D3V_S5_KBC
1 2
1 2
R2448
R2448
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
KB_DISABLE [20,69]
PCH_DPWROK [17]
P_SYS [44,46]
BOOST_MON [44]
1 2
DY
DY
RN2407
RN2407
SRN10KJ-5-GP
SRN10KJ-5-GP
LID_CL_SIO#
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K
100.0K Rese rved 174.0K
3D3V_S0
1 2
Vref = 1.117
temp around 85
10KR2F-2-GP
10KR2F-2-GP
2015/09/15 modify
HDMI_EC_DET# [57]
12 34
D2402
D2402
RB751V-40H-GP
RB751V-40H-GP
K A
83.R2004.G8F
83.R2004.G8F
EVT (SA)
DVT1 (SB)
DVT2 (SC)
DVT3 (SD)
X-build (1)
Reserved
Reserved 1.65V
Reserved 1.358V 100.0K 143.0K
Reserved
SMBDA1 [43,44]
SMBCLK1 [43,44]
SYS_PWROK [17]
PBAT_PRES# [43]
LID_CL_SIO# [70]
BKLGT_PWM [65]
BEEP [27]
FAN1_PWM [26]
EC_WAKE# [17]
PS_ID [43]
VOL_DOWN# [66]
SIO_SLP_S3# [17,27,40,51,54]
ME_FWP_EC [19]
PTP_DIS# [65]
H_PECI [4]
EC_MUTE# [27]
ALWON [40]
ACOK_IN [44]
USB_CHG_EN [34]
CMP_VOUT0 [26]
CMP_VIN0_R [26]
PANEL_BKEN_EC [55]
SIO_EXT_WAKE# [20]
CMP_VIN0_R [26]
DY
DY
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
12
DY
DY
R2424
R2424
DGPU_PWROK [66]
20KR2F-L-GP
20KR2F-L-GP
C2409
C2409
12
R2403 0R0402-PAD R2403 0R0402-PAD
1 2
R2497
R2497
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
R2422
R2422
1 2
DY
DY
330R2J-3-GP
330R2J-3-GP
R2407 0R0402-PAD R2407 0R0402-PAD
1 2
R2423
R2423
1 2
DY
DY
330R2J-3-GP
330R2J-3-GP
Layout Note:
Need very close to EC
Need very close to EC
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
Touch Panel PH internally.
TOUCH_PANEL_INTR#
R2429 10KR2J-3-GP
R2429 10KR2J-3-GP
R2498,R2499 merge to RN2407
2015/10/06 modify
VOL_UP#
VOL_DOWN#
Power Switch Logic(PSL)
KBC_PWRBTN# [66]
1 2
X00_0804
3
VOLTAGE PULL-HIGH RESISTOR PULL-LOW RESISTOR BOARD_ID VERSION A/D
3.0V
10.0K
2.75V
20.0K
2.48V
33.0K
47.0K
2.24V
64.9K
2.0V
76.8
1.87V
100.0K
1.204V
1.048V 215.0K 100.0 K
Change symbol part number, be cause origin symbol is DELL O BS part
D2403
D2403
RB751V-40H-GP
RB751V-40H-GP
K A
FAN_TACH1 [26]
83.R2004.G8F
83.R2004.G8F
eDP backlight Control from PCH
L_BKLT_EN_EC
3D3V_AUX_S5
1 2
R2463
R2463
1KR2J-1-GP
1KR2J-1-GP
1 2
R2454
R2454
100KR2J-1-GP
100KR2J-1-GP
HW_ACAVIN_NB#
For Typec charge detect modfy 2016/01/04
3D3V_S0
3D3V_S5
Just for Starload placement
2015/09/23 modify
LCD_TST_EN
USB_EN#
R2474 0R2J-2-GP
R2474 0R2J-2-GP
1 2
DY
DY
R2475 0R0402-PAD R2475 0R0402-PAD
1 2
I_ADP
12
C2435
C2435
EC_AGND
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
Move schematic, 20141118
OVER_CURRENT_P8# [66]
DC_IN_OK [43]
1 2
R2421
R2421
330R2J-3-GP
330R2J-3-GP
20150116 2040 Change symbol part number, be cause origin symbol is DELL O BS part
TOUCH_PANEL_INTR# [4,55]
ECVBAT
R2451
R2451
100KR2J-1-GP
R2432
R2432
1KR2J-1-GP
1KR2J-1-GP
100KR2J-1-GP
1 2
POWER_SW_IN#
C2426
C2426
12
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
R2436
R2436
100KR2J-1-GP
100KR2J-1-GP
2
R2435
R2435
1 2
0R0402-PAD
0R0402-PAD
R2419
R2419
1 2
0R0402-PAD
0R0402-PAD
3D3V_S5
AD_IA [44]
2
1 2
R2434
R2434
100KR2J-1-GP
100KR2J-1-GP
MODEL_ID
L_BKLT_EN [8]
LCD_TST [55]
LCD_TST_EN [55]
USB_EN# [35,66]
64K9R2F-1-GP
64K9R2F-1-GP
C2407
C2407
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R2442
R2442
MODEL_ID
MODEL_ID
1 2
EC_AGND
KB_CLOSE#_2 [70]
3D3V_S5
CHG_AMBER_LED# [64]
Q2412 and Q2413 merge
SMBDA2
SMBCLK2
MODEL_ID_DET(GPIO07) PULL-HIGH RESISTOR PULL-LOW RESISTOR
Starlord_UMA_ROR
1 2
1 2
R2441
R2441
100KR2F-L1-GP
100KR2F-L1-GP
3D3V_S5_KBC
TBD
Starload_UMA_BBY
TBD
Starload_DIS_BBY
Starload_17"_UMA
TBD
TBD
Q2415
Q2415
S
G
BAT1_LED#
3D3V_S5 3D3V_S5
24014/12/23 mod ify
3D3V_S0
R2489
R2489
100KR2J-1-GP
100KR2J-1-GP
1 2
CAP_LED#
SMBDA2
SMBCLK2
CCG2_I2C_SDA [37]
CCG2_I2C_SCL [37]
S
G
3D3V_S0
RN2603
RN2603
SRN2K2J-1-GP
SRN2K2J-1-GP
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
R2447 0R2J-2-GP
R2447 0R2J-2-GP
R2459 0R2J-2-GP
R2459 0R2J-2-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
Q2414
Q2414
3D3V_S5_KBC
DS3
DS3
84.2N702.A3F
84.2N702.A3F
1 2
NON DS3
NON DS3
1 2
NON DS3
NON DS3
D
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
4th = 84.2N702.W31
4th = 84.2N702.W31
Q2416
Q2416
1
6
2
5
3 4
2N7002KDW-GP
2N7002KDW-GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
D
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
4th = 84.2N702.W31
4th = 84.2N702.W31
1
2 3
4
3 4
2
1
KB_CLOSE#_2_R
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
3D3V_S5_PCH
2N7002KDW-GP
2N7002KDW-GP
6
DS3
DS3
Q2604
Q2604
3D3V_S5_KBC
Q2605
Q2605
TypeC
TypeC
2N7002KDW-GP
2N7002KDW-GP
1
100.0K
100.0K
22.1K(64.22125 .6DL)
32.4K(64.32425 .6DL)
100.0K
49.9K(64.49925 .6DL) 2.201V
100.0K
100.0K
64.9K(64.64925 .6DL)
100.0K
100.0K
120K(64.12035 .6DL)
200K(64.20035 .6DL)
ECVBAT
R2496
R2496
100KR2J-1-GP
100KR2J-1-GP
1 2
LID_CL_SIO#
BATT_WHITE_LED# [64]
BAT2_LED#
1
23 45
SML1_SMBDATA
SML1_SMBCLK
5
6
TP_EN# [65]
CAP_LED#_R [65]
SML1_SMBDATA [18,26,66]
SML1_SMBCLK [18,26,66]
Reserve by NON DS3 function 20150413
3D3V_S5_KBC
RN2604
RN2604
SRN2K2J-1-GP
SRN2K2J-1-GP
SMBDA3
SMBCLK3
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
KBC Nuvoton NPCE285PA0DX
KBC Nuvoton NPCE285PA0DX
KBC Nuvoton NPCE285PA0DX
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 25, 2016
Thursday, February 25, 2016
Thursday, February 25, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
1
VOLTAGE
3.0V 10.0K(64.10025.6D L)
2.702V
2.492V
2.001V
1.709V 9 3.1K(64.93125. 6DL)
1.499V
1.099V 100.0K
3D3V_S5
RN2405
RN2405
1
8
2
7
3
6
4 5
SRN100KJ-5-GP
SRN100KJ-5-GP
1
2 3
4
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
24 106
24 106
24 106
A00
A00
A00
Page 25
5
Main Func = SPI Flash
R2501
R2501
4K7R2J-2 -GP
4K7R2J-2 -GP
SPI_WP _ROM_R
1 2
DY
DY
3D3V_S5 _PCH
1 2
SPI Flash ROM(8M) for PCH
D D
SPI_CS_RO M_N0
SPI_SO_RO M_R
SPI_WP _ROM_R
SPI_CS_RO M_N0 [18,24]
SPI_SO_RO M [1 8,24]
SPI_WP _ROM [18]
C C
SKT251
SKT251
1
8
2
7
3 6
DY
DY
4
5
SKT-G617 9HT0321-001-GP
SKT-G617 9HT0321-001-GP
62.10089.011
62.10089.011
SRN10J-8 -GP
SRN10J-8 -GP
2 3
1
RN2503
RN2503
R2507,R2508 merge to RN2503
2015/10/06 modify
3D3V_SP IVCC1
SPI_HOLD_ ROM_R
SPI_CLK_R OM_R
SPI_SI_ROM_R
EC2502
EC2502
SC4D7P5 0V2BN-GP
SC4D7P5 0V2BN-GP
SPI_SO_RO M_R
SPI_WP _ROM_R
4
4
SPI25
SPI25
1
S#
2
DQ1
W#/DQ2
VSS
HOLD#/DQ3
3
4
N25Q128 A13ESEC0F-GP
N25Q128 A13ESEC0F-GP
72.25128.0B1
72.25128.0B1
VCC
DQ0
C
8
7
6
5
SC10U10 V5KX-2GP
SC10U10 V5KX-2GP
3D3V_SP IVCC1
SPI_HOLD_ ROM_R SPI_SO_RO M_R
SPI_CLK_R OM_R
SPI_SI_ROM_R
1 2
DY
DY
EC2501
EC2501
SC4D7P50V2BN-GP
SC4D7P50V2BN-GP
3D3V_S5 _PCH
3D3V_SP IVCC1
1 2
C2501
C2501
DY
DY
R2503 10R2F-L-G P R2503 10R2F-L-G P
1 2
1 2
EC2503
EC2503
DY
DY
SC10P50 V2JN-4GP
SC10P50 V2JN-4GP
3
1 2
R2515
R2515
0R0402-P AD
0R0402-P AD
1 2
C2502
C2502
DY
DY
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
Change to Dummy 20150402
SPI_HOLD_ ROM [18 ]
SPI_CLK_R OM_R
SPI_SI_ROM_R
RN2502
RN2502
1
4
2 3
SRN10J-8 -GP
SRN10J-8 -GP
R2505,R2506 merge to RN2502
2015/10/06 modify
2
72.25128.0B1
SPI_CLK_R OM [18,24]
SPI_SI_ROM [18,24]
QUAD/DUAL fast read DUAL fast read Source
O
O
O O
1
SFDP
O
O
O
O
O
B B
Main Func = RTC
RTC_AUX _S5 +RTC_VC C 3D3V_AU X_S5
D2501
D2501
1
3
2
BAS40C-2 -GP
BAS40C-2 -GP
75.00040.07D
75.00040.07D
2nd = 75.00040.C7D
2nd = 75.00040.C7D
3rd = 75.00040.A7D
3rd = 75.00040.A7D
Q2505
Q2505
A A
5
1 2
R2504
R2504
10MR2J-L -GP
10MR2J-L -GP
4
G
S
2N7002K -2-GP
2N7002K -2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
D
1 2
C2503
C2503
SCD47U1 0V2KX-GP
SCD47U1 0V2KX-GP
RTC_DET # [20]
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Flash/RTC
Flash/RTC
Flash/RTC
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
25 10 6
25 10 6
25 10 6
1
A00
A00
A00
Page 26
5
4
3
2
1
Main Func = Thermal Sensor
3D3V_S0 3D3V_S0
1
2 3
RN2602
RN2602
SRN2K2J-1-G P
SRN2K2J-1-G P
7718
3D3V_S0
1 2
1 2
C2601
B
DY
DY
12
C2606
C2606
SC470P50V3JN-2 GP
SC470P50V3JN-2 GP
DY
DY
C2601
7718
7718
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
NCT7718_DXP
NCT7718_DXN
C2602
C2602
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
1 2
C2607
C2607
7718
7718
SC2200P50V2KX-2G P
SC2200P50V2KX-2G P
D D
84.03904.P11
84.03904.P11
2nd = 84.03904.T11
2nd = 84.03904.T11
C
Q2603
Q2603
CH3904PT-GP
CH3904PT-GP
7718
7718
E
2.System Sensor, Put on palm rest
Layout Note:
C2607 close THM2601
Layout Note:
Both DXN and DXP routing 10 mil trace width and 10 mil spacing.
3D3V_S0
C C
R2603 7K5R2F-1-GP
R2603 7K5R2F-1-GP
1 2
7718
7718
R2604 7K5R2F-1-GP
R2604 7K5R2F-1-GP
1 2
7718
7718
B B
ALERT#
T_CRIT#
SML1_SMBDATA [18,24,66]
84.2N702.A3F
84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
SML1_SMBCLK [18,24,66]
THM261
THM261
1
VDD
SCL
2
7718
7718
D+
SDA
3
DT_CRIT#4GND
NCT7718W -GP
NCT7718W -GP
74.07718.0B9
74.07718.0B9
RESET_OUT # [17,24]
THERM_SYS_SHD N#
ALERT#
T_CRIT#
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
R2601
R2601
2N7002KDW -GP
2N7002KDW -GP
6
7718
7718
Q2601
Q2601
8
7
ALERT#
6
5
1
23 45
Q2602
Q2602
G
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
4th = 84.2N702.W31
4th = 84.2N702.W31
D
7718
4
1 2
DY
DY
THM_SML1_DAT A
THM_SML1_CLK
THM_SML1_CLK
THM_SML1_DAT A
1 2
DY
DY
C2609
C2609
C2608
C2608
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
DY
DY
C2610
C2610
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
DY
DY
R2615 0R2J- 2-GP
R2615 0R2J- 2-GP
KBC T8
CMP_VOUT0
DY
DY
PURE_HW _SHUTDOW N# [40]
DVT1 0210, for T8 function
3D3V_S5
R2602
R2602
1 2
0R0402-PAD
0R0402-PAD
3D3V_S5_KBC 3D 3V_S0
R2609
R2609
10R2F-L-GP
10R2F-L-GP
R2610
R2610
NTC-100K-8- GP
NTC-100K-8- GP
1 2
1 2
1 2
R2607 10KR2J-3-GP R2607 10K R2J-3-GP
1 2
R2608
R2608
27KR2F-L-GP
27KR2F-L-GP
DVT1 0210, for T8 function
C2612
C2612
1 2
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
Short pad change to 0 ohm , 20141118
Close to KBC
VD_IN1 for system thermal sensor Close to Thermal sensor
VD_IN1_C
1 2
C2613
C2613
SC100P50V2JN-3 GP
SC100P50V2JN-3 GP
5V_S0
FAN_TACH 1 [24]
FAN1_PWM [ 24]
CMP_VOUT0 [24]
CMP_VIN0_R [24]
R2611
R2611
1 2
0R0402-PAD
0R0402-PAD
R2612
R2612
1 2
0R0402-PAD
0R0402-PAD
PWM FAN1
FAN_VCC_1
C2604
SC4D7U6D3V3KX-GP
C2604
SC4D7U6D3V3KX-GP
C2605
SCD1U16V2KX-3GP
C2605
SCD1U16V2KX-3GP
K A
D2601
RB551V30-1-GPDYD2601
RB551V30-1-GP
DY
AFTP2604 AFTP2604
1 2
DY
FAN_VCC_1
FAN_TACH 1_C
FAN_PWM 1_C
FAN_TACH 1_C
FAN_PWM 1_C
FAN_VCC_1
1 2
1 2
R2613 0R0402-PAD R2613 0R0402- PAD
1 2
R2614 0R0402-PAD R2614 0R0402- PAD
1 2
Layout Note:
Signal Routing Guideline:
Trace width = 15mil
C2603
SC2200P50V2KX-2GPDYC2603
SC2200P50V2KX-2GP
FAN1
FAN1
5
1
2
3
4
6
ACES-CON 4-29-GP
ACES-CON 4-29-GP
1
20.F1639.004
20.F1639.004
AF TP2601 AF TP2601
1
AFTP2602 AFTP2602
1
AFTP2603 AFTP2603
1
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
THERMAL NCT7718W/Fan
THERMAL NCT7718W/Fan
THERMAL NCT7718W/Fan
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
1
26 106
26 106
26 106
A00
A00
A00
Page 27
5
4
3
2
1
Main Func = Audio
moat
5V_S0 +5V_A VDD
R2703
3D3V_S0
1 2
0R0805-PAD
D D
C C
3D3V_S0
1D8V_S0
1D8V_S0
1D5V_S0
R2724
R2724
1 2
0R0402-PAD
0R0402-PAD
moat
R2713 0R0402-PAD R2713 0R0402-PAD
1 2
R2705
R2705
1 2
DY
DY
R2710 0R2J-2-GP
R2710 0R2J-2-GP
1 2
DY
DY
0R0805-PAD
1.5A
5V_S0 + 5V_PVDD
R2702
R2702
1 2
0R0805-PAD
0R0805-PAD
R2704
R2704
1 2
0R0805-PAD
0R0805-PAD
0R2J-2-GP
0R2J-2-GP
R2731
R2731
C2701
C2701
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Layout Note:
Close pin41
+3V_1D8V_AVDD
1 2
C2715
C2715
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
AUD_AGND
+3V_AVDD
CPVDD
1 2
C2724
C2724
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
Close pin 21
C2709
C2709
C2707
C2707
C2708
C2708
C2706
C2706
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
Speaker trace width >40mil @ 2W4ohm speaker power
Close pin16
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC10U6D3V3M X-GP
SC10U6D3V3MX-GP
Layout Note:
Close pin46
AUD_SENSE_A
AUD_AGND
AUD_AGND
Layout Note:
R2722
R2722
100KR2J-1-GP
100KR2J-1-GP
AUD_AGND
Azalia I/F EMI
HDA_CODE C_SDOUT
HDA_CODE C_BITCLK
EC2708
EC2708
EC2709
SC33P50V2JN-3GP
SC33P50V2JN-3GP
EMI suggest change to 33p
B B
2015/12/02
EC2709
1 2
1 2
DY
DY
DY
DY
SC33P50V2JN-3G P
SC33P50V2JN-3G P
DMIC_DATA_R
SC33P50V2JN-3GP
SC33P50V2JN-3GP
+3V_AVDD
R2728
R2728
1 2
DY
DY
100KR2J-1-GP
100KR2J-1-GP
EC_MUTE# [24]
EC2701
EC2701
1 2
DY
DY
R2708
R2708
1 2
0R0402-PAD
0R0402-PAD
Width>40mil, to improve Headpohone Crosstalk noise
Change it to sharp will be better.
Add 2 vias (>0.5A) when trace layer change.
Layout Note:
AUD_AGND
1 2
0R0402-PAD
0R0402-PAD
C2705
C2705
1 2
R2725
R2725
Layout Note:
AUD_SENSE [29]
C2716
C2716
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
DMIC_DATA [55]
1 2
AUD_VREF
LDO1_CAP
+5V_AVDD
+5V_PVDD
AUD_SPK_L+
AUD_SPK_L-
AUD_SPK_R-
AUD_SPK_R+
+5V_PVDD
+3V_AVDD
1 2
SC10U6D3V3MX- GP
SC10U6D3V3MX- GP
+3V_AVDD
DMIC_CLK [55]
SC33P50V2JN-3G P
SC33P50V2JN-3G P
SC2D2U10V3KX- 1GP
SC2D2U10V3KX- 1GP
C2702
C2702
1 2
R2711 100KR2J -1-GP R2 711 100KR2J-1-GP
1 2
AUD_SPK_L+ [29]
AUD_SPK_L- [29]
AUD_SPK_R- [29]
AUD_SPK_R+ [29]
5V_S5
1 2
0R0402-PAD
0R0402-PAD
Place close to Pin 1
EAPD#
C2723
C2723
DY
DY
Close pin6
R2723
R2723
1 2
TP2702 TP2702
RING2 [29]
SLEEVE [29]
AUD_PC_BEEP AUD_PC_BEEP_R
LINE1_R [29]
LINE1_L [29]
5V_STB
R2709
R2709
200KR2F-L-GP
200KR2F-L-GP
1
C2717
C2717
1 2
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
HDA27
HDA27
37
38
39
40
41
42
43
44
45
46
47
48
49
ALC3253-CG-G P
ALC3253-CG-G P
1 2
COMBO-GPI
AVSS1
VREF
LDO1-CAP
AVDD1
PVDD1
SPK-OUT-L+
SPK-OUT-L-
SPK-OUT-R-
SPK-OUT-R+
PVDD2
5VSTB/AUXMODE
HP2/LINE2-JD/JD2
GND
AUD_SENSE_A
R2714 0R0402-PAD R2714 0R0402- PAD
1 2
R2716 0R0402-PAD R2716 0R 0402-PAD
1 2
MIC_CAP
C2713 SC10U6D3V3MX-GP C2713 SC10U6D3V3MX-G P
1 2
30
31
32
33
34
35
36
PCBEEP
MIC2-CAP
LINE2-L/PORT-E-L
LINE1-L/PORT-C-L
LINE2-R/PORT-E-R
LINE1-R/PORT-C-R
MIC2-R/PORT-F-R/SLEEVE
HP/LINE1-JD/JD11SPDIF-OUT/GPIO2/DMIC-DATA342PD3DVDD4GPIO0/DMIC-DATA125GPIO1/DMIC-CLK6DC-DET/EAPD7BCLK8SYNC9SDATA-IN10SDATA-OUT11DVDD-IO
EAPD#
DMIC_DATA_R
DMIC_CLK_R
DVSS
1 2
0R2J-2-GP
0R2J-2-GP
DY
DY
R2732
R2732
26
27
28
29
MIC2-VREFO-L
MIC2-VREFO-R
HPOUT-L/PORT-I-L
MIC2-L/PORT-F-L/RING2
HPOUT2-R/PORT-B-R
HPOUT2-L/PORT-B-L
LINE1-VREFO-R-E/MONO
LINE1-VREFO-L-E
CODEC_SD OUT_R
HDA_CODE C_SDIN0
HDA_CODE C_SYNC
CODEC_BITC LK_R
25
CPVEE
HPOUT-R/PORT-I-R
CPVDD
AVSS2
LDO2-CAP
AVDD2
LDO3-CAP
12
C2719 SCD1U16V 2KX-3GP C2719 S CD1U16V2KX-3GP
1 2
CBN
CBP
+3V_AVDD
CPVEE
24
CBN
23
CBP
22
21
20
19
18
LDO2_CAP
17
16
15
14
13
MIC2_VREFO_R [29]
MIC2_VREFO_L [29]
AUD_HP1_JAC K_L [29]
AUD_HP1_JAC K_R [29]
C2703 SC1 U10V3KX-3GP C2703 SC 1U10V3KX-3GP
1 2
CPVDD
C2712 SC10U6D3V3MX- GP C2712 SC10U 6D3V3MX-GP
+3V_1D8V_AVDD
LDO3_CAP
C2718
C2718
1 2
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R2719 0R0402-PA D R2719 0R0 402-PAD
1 2
R2718 0R0402-PA D R2718 0R0 402-PAD
1 2
R2720 0R0402-PA D R2720 0R0 402-PAD
1 2
1 2
LINE1_VREFO_R [29]
LINE1_VREFO_L [29]
moat
HDA_CODE C_SDOUT [19]
HDA_SDIN0 [19]
HDA_CODE C_SYNC [19]
HDA_CODE C_BITCLK [19]
C2710
C2710
1 2
C2711
C2711
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
AUD_AGND
SPKR [19]
BEEP [24]
R2703
1 2
0R0603-PAD
0R0603-PAD
1 2
Layout Note:
Place close to Pin 40
AUD_AGND
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
C2704
C2704
SC1U10V3KX-3G P
SC1U10V3KX-3G P
1 2
AUD_AGND
AUD_AGND
RN2701
RN2701
2 3
1
SRN1KJ-7-G P
SRN1KJ-7-G P
4
moat
EC2707 SC1KP50V2KX-1GP
EC2707 SC1KP50V2KX-1GP
1 2
DY
DY
EC2706 SC1KP50V2KX-1GP
EC2706 SC1KP50V2KX-1GP
1 2
DY
DY
EC2705 SCD1U25V2KX-GP
EC2705 SCD1U25V2KX-GP
1 2
DY
DY
EC2704 SC1KP50V2KX-1GP
EC2704 SC1KP50V2KX-1GP
1 2
DY
DY
EC2703 SCD1U25V2KX-GP
EC2703 SCD1U25V2KX-GP
1 2
DY
DY
AUD_AGND
R2706
R2706
1 2
0R0805-PAD
0R0805-PAD
Layout Note:
AUD_AGND
HDA_SPKR_R
2
KBC_BEEP_R
1
BAT54C-7-F- 3-GP
BAT54C-7-F- 3-GP
75.00054.E7D
75.00054.E7D
2nd = 83.R2003.W81
2nd = 83.R2003.W81
3rd = 75.00054.A7D
3rd = 75.00054.A7D
4th = 83.R2003.V81
4th = 83.R2003.V81
D2701
D2701
AUD_PC_BEEP _C
3
1 2
C2720
C2720
1 2
R2717
R2717
2K2R2J-2-GP
2K2R2J-2-GP
AUD_PC_BEEP _R
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
1D8V_S0 +V1.8A
Q2702
Q2702
DMP2130L-7-GP
S
C2714
C2714
SC1U10V2KX-1G P
SC1U10V2KX-1G P
84.02130.031
84.02130.031
2nd = 84.00102.031
2nd = 84.00102.031
3rd = 84.03413.B31
3rd = 84.03413.B31
DMP2130L-7-GP
D
D
D
G
G
G
1 2
C2721
C2721
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DY
DY
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Audio Codec ALC3246
Audio Codec ALC3246
Audio Codec ALC3246
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
27 106 Thursday, Fe bruary 25, 2016
27 106 Thursday, Fe bruary 25, 2016
27 106 Thursday, Fe bruary 25, 2016
A00
A00
A00
150mA
1 2
1 2
C2722
C2722
R2726
R2726
10KR2J-3-GP
10KR2J-3-GP
Q2701
Q2701
SIO_SLP_S3# [17,24,40,51,54]
A A
G
S
5
2N7002K-2-GP
2N7002K-2-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1D8V_EN#
D
R2727
R2727
1 2
20KR2J-L2-GP
20KR2J-L2-GP
1 2
1D8V_EN_R#
Page 28
5
D D
C C
4
3
2
1
B B
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
A00
A00
A00
28 106 Thursday, February 18, 2016
28 106 Thursday, February 18, 2016
28 106 Thursday, February 18, 2016
Page 29
5
Main Func = Audio
4
3
2
1
Layout Note:
Speaker trace width >40mil @ 2W4ohm speaker power
(
EL2902 BLM15PD 121SN1D-GP
D D
AUD_SPK _L+[ 27]
AUD_SPK _L-[ 27]
AUD_SPK _R-[ 27 ]
AUD_SPK _R+[ 27]
1 2
1 2
1 2
EL2902 BLM15PD 121SN1D-GP
EL2901 BLM15PD 121SN1D-GP
EL2901 BLM15PD 121SN1D-GP
EL2903 BLM15PD 121SN1D-GP
EL2903 BLM15PD 121SN1D-GP
EL2904 BLM15PD 121SN1D-GP
EL2904 BLM15PD 121SN1D-GP
1 2
(
(
(
(
(
(
(
1 2
at high frequencies
at high frequencies
Resistance element becomes dominant
Resistance element becomes dominant
1 2
1 2
at high frequencies
at high frequencies
Resistance element becomes dominant
Resistance element becomes dominant
1 2
at high frequencies
at high frequencies
Resistance element becomes dominant
Resistance element becomes dominant
at high frequencies
at high frequencies
Resistance element becomes dominant
Resistance element becomes dominant
(
(
(
(
(
(
(
(
AUD_SPK _L+_C
AUD_SPK _L-_C
AUD_SPK _R-_C
AUD_SPK _R+_C
1 2
Speaker
1 2
1 2
SPK1
SPK1
7
1
2
3
4
SPK_DET # [20 ]
1 2
5
6
8
HR-CON6-1 -GP-U
HR-CON6-1 -GP-U
20.F1804.006
20.F1804.006
CONN Pin
Pin1
Net name
SPK_L+
Pin2 SPK_L-
Pin3
Pin4
Pin5
SPK_R-
SPK_R+
SPK_DET#
Pin6 GND
EC2909
EC2904
EC2902
EC2902
EC2901
EC2901
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC2904
EC2903
EC2903
AUD_SPK _L-_C
AUD_SPK _L+_C
SC100P50V2JN-3GP
SC100P50V2JN-3GP
AUD_SPK _R-_C
AUD_SPK _R+_C
AFTP290 1 A FTP2901
1
AFTP290 2 A FTP2902
1
AFTP290 3 A FTP2903
1
AFTP290 4 A FTP2904
1
EC2910
EC2910
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC2909
EC2911
EC2912
EC2912
SC100P50V2JN-3GP
SC100P50V2JN-3GP
EC2911
SC100P50V2JN-3GP
SC100P50V2JN-3GP
2015/11/26 modify by EMI suggest
C C
RN2901
RN2901
1
MIC2_VREF O_R [27]
MIC2_VREF O_L [27]
SRN2K2J -1-GP
RING2 [27]
AUD_HP1 _JACK_L [27 ]
LINE1_L [27 ]
LINE1_VRE FO_L [27]
AUD_HP1 _JACK_R [27]
LINE1_R [27]
LINE1_VRE FO_R [27]
SLEEVE [27]
C2907
C2907
C2908
C2908
1 2
SC10U6D 3V3MX-GP
SC10U6D 3V3MX-GP
1 2
SC10U6D 3V3MX-GP
SC10U6D 3V3MX-GP
SRN2K2J -1-GP
LINE1-L_C
LINE1-L_R
4
2 3
R2907 0R0603-P AD R2907 0R0603-P AD
R2922 0R0402-P AD R2922 0R0402-P AD
R2912 2K2R2J-2 -GP
R2912 2K2R2J-2 -GP
R2909 0R0603-P AD R2909 0R0603-P AD
R2921 0R0402-P AD R2921 0R0402-P AD
R2913 2K2R2J-2 -GP
R2913 2K2R2J-2 -GP
1 2
1 2
DY
DY
1 2
1 2
DY
DY
1 2
1 2
AUD_HP1 _JACK_L1
AUD_HP1 _JACK_R1
EC2908
SC100P50V2JN-3GPDYEC2908
SC100P50V2JN-3GP
1 2
R2920
10KR2J-3-GPDYR2920
10KR2J-3-GP
1 2
DY
DY
Universal Jack (Moved to I/O Board)
EC2907
SC100P50V2JN-3GPDYEC2907
SC100P50V2JN-3GP
1 2
DY
DY
DY
1 2
R2919
R2919
SC100P50V2JN-3GPDYEC2906
SC100P50V2JN-3GP
10KR2J-3-GP
10KR2J-3-GP
DY
EC2906
EC2905
SC100P50V2JN-3GPDYEC2905
SC100P50V2JN-3GP
1 2
1 2
DY
R2906 0 R0603-PAD R290 6 0R0603-PAD
R2908 1 0R2F-L-GP R29 08 10R2F-L-GP
1 2
R2910 10R2F-L-GP R 2910 10R2F-L-G P
1 2
R2911 0 R0603-PAD R291 1 0R0603-PAD
HPMIC1
1 2
1 2
RING2_R
AUD_POR TA_L_R_B
AUD_POR TA_R_R_B
SLEEVE_ R
SLEEVE_ R
AUD_POR TA_L_R_B
JACK_PL UG
JACK_PL UG_DET
AUD_POR TA_R_R_B
RING2_R
AUD_AGN D
HPMIC1
3
1
5
6
2
4
MS
Audio(IP/NK comb)
Audio(IP/NK comb)
AUDIO-JK52 2-GP
AUDIO-JK52 2-GP
022.10002.00D1
022.10002.00D1
Delay circuit
B B
(JACK_PLUG_DET: on IO Board)
AUD_AGN D AUD_AG ND
JACK_PL UG_DET
10 mils
A A
1 2
AUD_AGN D
R2905
R2905
0R0402-P AD
0R0402-P AD
5
CLOSS TO HPMIC1
ED2903
AZ5725-01FDR7G-GP
ED2903
AZ5725-01FDR7G-GP
ED2902
AZ5725-01FDR7G-GP
ED2902
AZ5725-01FDR7G-GP
ED2901
AZ2025-01H-R7G-GP
ED2901
AZ2025-01H-R7G-GP
1 2
4
AZ5725-01FDR7G-GP
AZ5725-01FDR7G-GP
1 2
1 2
1 2
RING2_R
AUD_POR TA_L_R_B
JACK_PL UG
JACK_PL UG_DET
AUD_POR TA_R_R_B
SLEEVE_ R
ED2905
AZ5725-01FDR7G-GP
ED2905
AZ5725-01FDR7G-GP
ED2904
ED2904
ED2906
AZ2025-01H-R7G-GP
ED2906
AZ2025-01H-R7G-GP
1 2
1 2
3
JACK_PL UG
R2923 0R0603-P AD R292 3 0R0603 -PAD
1 2
1 2
DY
DY
AUD_AGN D
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Audio IO
Audio IO
Audio IO
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Thursday, February 25, 20 16
10 mils 10 mils
C2902
C2902
SC10U6D 3V3MX-GP
SC10U6D 3V3MX-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
29 10 6
29 10 6
29 10 6
1
AUD_SEN SE [27]
A00
A00
A00
Page 30
5
4
3
2
1
Main Func = Audio
D D
C C
(Blanking)
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
(Reserved)
(Reserved)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 18, 2016
Thursday, February 18, 2016
Thursday, February 18, 2016
2
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A00
A00
30 106
30 106
30 106
1
A00
Page 31
5
4
3
2
1
Main Func = LAN
D D
(Blanking)
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
LAN RTL8106
LAN RTL8106
LAN RTL8106
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
31 106 Thursday, Feb ruary 18, 2016
31 106 Thursday, Feb ruary 18, 2016
31 106 Thursday, Feb ruary 18, 2016
A00
Page 32
5
4
3
2
1
Main Func = LAN
D D
(Blanking)
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
XFOM&RJ45
XFOM&RJ45
XFOM&RJ45
32 10 6 Thursday, February 18, 20 16
32 10 6 Thursday, February 18, 20 16
32 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 33
5
4
3
2
1
Main Func = Card Reader
D D
C C
(Blanking)
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Card Reader-RTS5170
Card Reader-RTS5170
Card Reader-RTS5170
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
33 106 Thursday, Feb ruary 18, 2016
33 106 Thursday, Feb ruary 18, 2016
33 106 Thursday, Feb ruary 18, 2016
A00
A00
A00
Page 34
5
4
3
2
1
Main Func = USB3.0 Port1
D D
USB Charger Port1
5V_S5
1 2
C3402
C3402
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
9
U3401
5
ILIM_SEL
4
ILIM_LO
15
ILIM_HI
16
TPS2544 RTER-GP
TPS2544 RTER-GP
U3401
EN
ILIM_SEL
ILIM_LO
ILIM_HI
CTL1
CTL2
CTL3
C C
USBCHAR GER_CB0 [24]
B B
X02 0414
USB_CHG _EN [24]
R3405 0R0402-P AD R3405 0R0402-PAD
5V_S5
1 2
R3403 20KR2F-L -GP
R3403 20KR2F-L -GP
1 2
R3404 22K1R2F -L-GP R340 4 22K1R2F -L-GP
1 2
5V_S5
DY
DY
X02 0414
R3401 0R0402-P AD R3401 0R0402-PAD
1 2
R3406 0R0402-P AD R3406 0R0402-PAD
1 2
R3402 0R0402-P AD R3402 0R0402-PAD
1 2
74.02544.073
74.02544.073
13
IN
NC#9
FAULT#
CTL16CTL27CTL38GND
14
12
OUT
DP_OUT
DM_OUT
DP_IN
DM_IN
GND
17
USB_OC0 # [16 ,35]
C3403
C3403
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3
2
10
11
1 2
USB30_V CCA
C3401
C3401
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
USB_CPU _PP0 [16]
USB_CPU _PN0 [16]
USB_PP0 _R [3 6]
USB_PN0 _R [36]
1 2
C3404
C3404
C3405
C3405
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
2016/01/11 modify
CDP
DCP Auto
Device Control Pins
CTL1
(EC control)
1 1
0
1
ILIM_SEL
1
X 1
CTL3 CTL2
1
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
34 10 6 Thursday, February 25, 20 16
34 10 6 Thursday, February 25, 20 16
34 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 35
5
4
3
2
1
Main Func = USB3.0 Port1
D D
5V_S5 USB30_VCCB
1 2
1 2
C3503
C3503
C3502
C3502
DY
DY
C C
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
B B
SCD1U16V2KX-3GP
USB30_VCCB
USB3.0 Port2
R3501
R3501
DY
DY
1 2
1 2
100KR2J-1-GP
100KR2J-1-GP
1 2
C3508 SC1U10V2KX-1GP C3508 SC1U10V2KX-1GP
C3507 SCD1U16V2KX-3GP C3507 SCD1U16V2KX-3GP
C3512
C3512
1 2
U3501
U3501
5
IN
4
EN#
Active Low
SY6288DAAC-GP
SY6288DAAC-GP
074.06288.009B
074.06288.009B
U3502
U3502
5
IN
4
EN#
SY6288DAAC-GP
SY6288DAAC-GP
074.06288.009B
074.06288.009B
2A
C3513
C3513
TypeC
TypeC
1 2
GND
GND
C3514
C3514
OUT
OC#
OUT
OC#
1
2
3
USB30_VCCB
1
2
3
USB_OC0# [16,34] USB_EN# [24,66]
USB_OC0# [16,34] USB_EN# [24,66]
Layout Note: Close USB3
1 2
1 2
TC3501
TC3501
SC100U6D3V6MX-GP
SC100U6D3V6MX-GP
DY
DY
78.10710.52L
78.10710.52L
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
SC22U6D3V5MX-2GP
A A
SC22U6D3V5MX-2GP
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
for starlord placement modify
Title
Title
Title
USB switch
USB switch
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
USB switch
Starload SKL-U
Starload SKL-U
Starload SKL-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A00
A00
A00
35 106 Thursday, February 25, 2016
35 106 Thursday, February 25, 2016
35 106 Thursday, February 25, 2016
1
Page 36
5
Main Func = USB3.0 Port1
USB3.0 Port1
R3605
3 4
R3605
1 2
0R0402-P AD
0R0402-P AD
R3606
R3606
1 2
0R0402-P AD
0R0402-P AD
USB20_D P0_C
USB20_D N0_C
USB30_T XDN1_R
USB30_T X_CPU_N1 [16]
D D
USB30_T X_CPU_P1 [1 6]
USB_PP0 _R [34]
C C
USB_PN0 _R [34]
1 2
C3601
C3601
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
USB30_T XDP1_R
1 2
C3602
C3602
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
DLP11SN 900HL2L-GP
DLP11SN 900HL2L-GP
1 2
TR3602
TR3602
USB30_T XDN1_C
USB30_T XDP1_C
4
3
USB2.0 Port2 and USB2.0 Port3 are on IOBD
R3609
R3609
USB30_R X_CPU_N1 [16]
USB30_R X_CPU_P1 [16]
USB30_V CCA
USB30_R XDN1_C
USB30_R XDP1_C
USB30_T XDN1_C
USB30_T XDP1_C
USB2
USB2
1
VBUS
5
STDA_SSRX-
6
STDA_SSRX+
8
STDA_SSTX-
9
STDA_SSTX+
12
CHASSIS#12
13
CHASSIS#13
SKT-USB1 3-221-GP
SKT-USB1 3-221-GP
022.10005.01P1
022.10005.01P1
1 2
0R0402-P AD
0R0402-P AD
R3610
R3610
1 2
0R0402-P AD
0R0402-P AD
GND_DRAIN
GND
GND
GND
2
D-
3
D+
7
10
11
4
USB30_R XDN1_C
USB30_R XDP1_C
USB20_D N0_C
USB20_D P0_C
USB30_R XDN1_C
USB30_R XDP1_C
USB30_T XDP1_C
2
EU3601
EU3601
9 1
8
2
3
7
4
6
5
ESD3V3U 4ULC-GP
ESD3V3U 4ULC-GP
83.3V3U4.0A0
83.3V3U4.0A0
EU3602
EU3602
1
I/O1
2
GND
I/O23I/O3
AZC099-0 4S-1-GP
AZC099-0 4S-1-GP
75.09904.07C
75.09904.07C
2nd = 75.02304.07C
2nd = 75.02304.07C
VDD
I/O4
6
5
4
USB30_R XDN1_C
USB30_R XDP1_C
USB30_T XDN1_C USB30_T XDN1_C
USB30_T XDP1_C
USB20_D P0_C USB20_D N0_C
1
USB30_V CCA
EMI for DVT1 0212
USB 3.0 Connector
Pin definition
1
POWER
2
USB 2.0 D-
USB 2.0 D+
3
GND
4
StdA_SSRX-
5
6
StdA_SSRX+
GND
7
StdA_SSTX-
8
9
StdA_SSTX+
SuperSpeed RX
SuperSpeed TX
USB3.0 Port2
USB30_T X_CPU_N2 [16]
B B
USB30_T X_CPU_P2 [1 6]
USB_CPU _PP1 [16]
A A
USB_CPU _PN1 [16]
5
ROR
ROR
USB30_T XDN2_R US B30_TXDN2_C USB30_R XDN2_C
1 2
C3603
C3603
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
ROR
ROR
1 2
C3604
C3604
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
DLP11SN 900HL2L-GP
DLP11SN 900HL2L-GP
3 4
1 2
TR3603
TR3603
R3611
R3611
1 2
0R0402-P AD
0R0402-P AD
R3614
R3614
1 2
0R0402-P AD
0R0402-P AD
USB20_D P1_C
USB20_D N1_C
USB30_R X_CPU_N2 [16]
USB30_T XDP2_C USB30_T XDP2_R USB30_R XDP2_C
4
USB30_R X_CPU_P2 [16]
USB30_V CCB
USB30_R XDN2_C
USB30_R XDP2_C
USB30_T XDN2_C
USB30_T XDP2_C
USB3
USB3
1
VBUS
5
STDA_SSRX-
6
STDA_SSRX+
8
STDA_SSTX-
9
STDA_SSTX+
12
CHASSIS#12
13
CHASSIS#13
SKT-USB1 3-221-GP
SKT-USB1 3-221-GP
022.10005.01P1
022.10005.01P1
1 2
1 2
ROR
ROR
R3612
R3612
0R0402-P AD
0R0402-P AD
R3613
R3613
0R0402-P AD
0R0402-P AD
GND_DRAIN
GND
GND
GND
3
2
D-
3
D+
7
10
11
4
USB20_D N1_C
USB20_D P1_C
USB30_R XDN2_C
USB30_R XDP2_C
USB30_T XDP2_C
2
EU3603
EU3603
9 1
2
4
5
EU3604
EU3604
1
I/O1
2
GND
I/O23I/O3
AZC099-0 4S-1-GP
AZC099-0 4S-1-GP
75.09904.07C
75.09904.07C
2nd = 75.02304.07C
2nd = 75.02304.07C
8
3
7
6
ESD3V3U 4ULC-GP
ESD3V3U 4ULC-GP
83.3V3U4.0A0
83.3V3U4.0A0
6
I/O4
5
VDD
4
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
USB30_R XDN2_C
USB30_R XDP2_C
USB30_T XDN2_C USB30_T XDN2_C
USB30_T XDP2_C
USB20_D P1_C USB20_D N1_C
USB30
USB30
USB30
Starload SKL-U
Starload SKL-U
Starload SKL-U
USB30_V CCB
EMI for DVT1 0212
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
36 10 6 Thursday, February 25, 20 16
36 10 6 Thursday, February 25, 20 16
36 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 37
5
VCC3PD VDDD VDDIO
R3701 0R0402-P AD R3701 0R0402-PAD
1 2
R3702 0R0402-P AD R3702 0R0402-PAD
1 2
VDDD
D D
TypeC
TypeC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
VDDD
C C
VDDD
1 2
C3701
C3701
TypeC
TypeC
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
RN1814
RN1814
1
2 3
TypeC
TypeC
SRN2K2J -1-GP
SRN2K2J -1-GP
RN1815
RN1815
1
2 3
TypeC
TypeC
SRN2K2J -1-GP
SRN2K2J -1-GP
C3702
C3702
TypeC
TypeC
1 2
C3703
C3703
SC1U10V2KX-1GP
SC1U10V2KX-1GP
CPU_DP_ HPD_R [8,38]
I2C_CLK_P D
4
I2C_DATA_ PD
CCG2_I2C_ SCL
4
CCG2_I2C_ SDA
VDDD
1 2
R3717
R3717
DY
DY
10KR2F-2 -GP
10KR2F-2 -GP
R3706
R3706
1 2
0R0402-P AD
0R0402-P AD
PD_VBUS _C_CTRL1 [43 ]
CCG2_I2C_ SCL [24 ]
CCG2_I2C_ SDA [24]
I2C_CLK_P D [3 8]
VDDD
1 2
R3708
R3708
4K7R2J-2 -GP
4K7R2J-2 -GP
TypeC
TypeC
1 2
C3706
C3706
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
TypeC
TypeC
VDDIO
TypeC
TypeC
CPU_DP_ HPD_MUX
For Debug
TP3701 T PAD14-OP-GP TP3701 TPAD 14-OP-GP
1
TP3702 T PAD14-OP-GP TP3702 TPAD 14-OP-GP
1
TP3703 T PAD14-OP-GP TP3703 TPAD 14-OP-GP
1
B B
PD_SW D_IO
PD_SW D_CLK
PD_XRES
VDDD
PD_VCCD
1 2
C3704
C3704
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PD_SW D_IO
PD_SW D_CLK
PD_XRES
4
6
9
8
7
23
18
20
19
10
11
12
16
U3701
U3701
VDDD
VDDD_2
VDDIO
VCCD
GPIO/VBUS_VMON
GPIO
I2C_SCL
I2C_SDA
GPIO/I2C_INT
SWD_IO_HPD
SWD_CLK_I2C_ADDR_SEL
XRES
CYPD2122-2 4LQXIT-GP
CYPD2122-2 4LQXIT-GP
071.02122.0003
071.02122.0003
CCG2 24-QFN
CCG2 24-QFN
GPIO/VBUS_P_CTRL1
GPIO/VBUS_P_CTRL2
GPIO/VBUS_C_CTRL1
GPIO/VBUS_C_CTRL2
GPIO/VBUS_DISCHARGE
RD1
CC1
CC2
GPIO/CC2_VCONN_CTRL
GPIO/CC1_VCONN_CTRL
TypeC
TypeC
VCONN1
VCONN2
VSS
3
13
INT#_Typec_R
14
PD_VBUS _R
17
PD_CC2_ VCONN_CTRL_R
21
PD_CC1_ VCONN_CTRL_R PD_CC1_V CONN_CTRL
24
PD_RD1
3
PD_CC1
2
PD_CC2
1
22
15
VCONN1
5
VCONN2
4
25
R3705 0R0402-P AD R3705 0R0402-PAD
R3712 200KR2J -L2-GP
R3712 200KR2J -L2-GP
R3719 0R2J-2-GP
R3719 0R2J-2-GP
1 2
R3718 0R0402-P AD R3718 0R0402-PAD
1 2
R3720 0R2J-2-GP
R3720 0R2J-2-GP
1 2
DY
DY
R3721 0R2J-2-GP
R3721 0R2J-2-GP
1 2
DY
DY
TypeC
TypeC
1 2
C3711
C3711
SC390P50V2KX-GP
SC390P50V2KX-GP
SC390P50V2KX-GP
SC390P50V2KX-GP
I2C_DATA_ PD [38]
1 2
R3711
R3711
1 2
TypeC
TypeC
1 2
TypeC
TypeC
DY
DY
PD_VBUS _DISCHG [4 3]
PD_VBUS _P_CTRL1 [43]
USBC1_C C1_CONN
USBC1_C C2_CONN
TypeC
TypeC
1 2
C3712
C3712
PD_CC2_ VCONN_CTRL
200KR2J -L2-GP
200KR2J -L2-GP
R3709 0R0402-P AD R3709 0R0402-PAD
R3710 0R0402-P AD R3710 0R0402-PAD
USBC1_C C1_CONN
2
INT#_Typec [2 4]
TypeC
TypeC
1 2
1 2
VDDIO
TypeC
TypeC
5V_S5
TypeC
TypeC
5V_S5
R3713
R3713
1 2
909KR2F -GP
909KR2F -GP
R3714
R3714
1 2
909KR2F -GP
909KR2F -GP
USBC1_C C1_CONN [38]
USBC1_C C2_CONN [38]
5V_S5
TypeC
TypeC
TypeC
TypeC
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R3722 10KR2F-2 -GP
R3722 10KR2F-2 -GP
R3723 10KR2F-2 -GP
R3723 10KR2F-2 -GP
1 2
C3714
C3714
C3713
C3713
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
PD_CC1_ VCONN_CTRL
DY
DY
1 2
DY
DY
1 2
PD_CC2_ VCON N_CTRL
For Dead Battery modify 2016/01/08
TypeC
TypeC
1 2
1 2
1 2
TypeC
TypeC
OC_1
VCCPD_V BUS
R3703 100KR2J -1-GP
R3703 100KR2J -1-GP
R3704 10KR2F-2 -GP
R3704 10KR2F-2 -GP
C3705 SCD1U16V2 KX-3GP
C3705 SCD1U16V2 KX-3GP
3D3V_S5 _KBC
Typec
Typec
U3703
U3703
2
IN
4
FAULT#
3
EN
074.02141.0073
074.02141.0073
U3704
U3704
2
IN
OC_2
4
FAULT#
3
EN
074.02141.0073
074.02141.0073
1 2
TypeC
TypeC
TypeC
TypeC
R3707
R3707
2K2R2J-2 -GP
2K2R2J-2 -GP
INT#_Typec_R
OUT_0
OUT_1
GND
PAD
OUT_0
OUT_1
GND
PAD
TypeC
TypeC
U3703_OUT U3704_OUT
6
5
1
7
TypeC
TypeC
6
5
1
7
1
D3704
D3704
USBC1_C C1_CONN
K A
RB551V3 0-GP
RB551V3 0-GP
83.R5003.H8H
83.R5003.H8H
D3703
D3703
USBC1_C C2_CONN
K A
RB551V3 0-GP
RB551V3 0-GP
83.R5003.H8H
83.R5003.H8H
From System
K A
6
5
4
7
VCC3PD 3D3V_S5
D3702
D3702
RB521CM -30T2R-GP-U
RB521CM -30T2R-GP-U
K A
VBUS to 3.3V
U3702
U3702
OUT
IN
NC#2
NC#5
GND
EN
TypeC
TypeC
GND
TPS7093 3DRVR-GP-U
TPS7093 3DRVR-GP-U
074.70933.0033
074.70933.0033
TypeC
TypeC
VREG3PD
1
2
3
C3709
C3709
1 2
1 2
C3710
C3710
SC2D2U1 0V3KX-1GP
SC2D2U1 0V3KX-1GP
TypeC
TypeC
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
37 10 6 Thursday, February 25, 20 16
37 10 6 Thursday, February 25, 20 16
37 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
3
RF
TypeC
TypeC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
D3701
D3701
RB521CM -30T2R-GP-U
RB521CM -30T2R-GP-U
TypeC
TypeC
VCCPD_V BUS
R3715
R3715
909KR2F -GP
909KR2F -GP
R3716
R3716
TPS7093 3_EN
TypeC
TypeC
1 2
C3708
C3708
SCD1U25 V2KX-GP
SCD1U25 V2KX-GP
1 2
TypeC
TypeC
C3707
SC1U50V3KX-GP
C3707
SC1U50V3KX-GP
1 2
301KR2F-1-GP
301KR2F-1-GP
A A
5
4
TypeC
TypeC
1 2
TypeC
TypeC
Page 38
5
Main Func = TYPEC MUX
41
U3801
C3818
C3818
1 2
TypeC
TypeC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1 2
C3819
C3819
U3801
9
ML0P
10
ML0N
18
ML3P
19
ML3N
1 PORT USB + 4 LANES DP
5
SSRXP
4
SSRXN
8
SSTXP
7
SSTXN
15
ML2P
16
ML2N
12
ML1P
13
ML1N
24
AUXP
25
AUXN
TypeC
TypeC
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DisplayPort Source
PCH_DPC_P 0 [8]
PCH_DPC_N 0 [8]
D D
C C
B B
A A
PCH_DPC_P 3 [8]
PCH_DPC_N 3 [8]
USB HOST
USB30_RX_CPU _P4 [16]
USB30_RX_CPU _N4 [16]
USB30_TX_CPU _P4 [16]
USB30_TX_CPU _N4 [ 16]
PCH_DPC_P 2 [8]
PCH_DPC_N 2 [8]
PCH_DPC_P 1 [8]
PCH_DPC_N 1 [8]
3D3V_MUX
TypeC
TypeC
R3801 100KR2J-1-GP
R3801 100KR2J-1-GP
1 2
R3802 100KR2J-1-GP
R3802 100KR2J-1-GP
1 2
TypeC
TypeC
3D3V_MUX
R3824 4K7R2J-2-GP
R3824 4K7R2J-2-GP
1 2
DY
DY
R3823 4K7R2J-2-GP
R3823 4K7R2J-2-GP
1 2
DY
DY
3D3V_MUX
R3822 4K7R2J-2-GP
R3822 4K7R2J-2-GP
1 2
DY
DY
R3821 4K7R2J-2-GP
R3821 4K7R2J-2-GP
1 2
TypeC
TypeC
3D3V_MUX
R3820 4K7R2J-2-GP
R3820 4K7R2J-2-GP
1 2
DY
DY
R3819 4K7R2J-2-GP
R3819 4K7R2J-2-GP
1 2
DY
DY
3D3V_MUX
R3818 4K7R2J-2-GP
R3818 4K7R2J-2-GP
1 2
TypeC
TypeC
R3817 4K7R2J-2-GP
R3817 4K7R2J-2-GP
1 2
DY
DY
3D3V_MUX
R3816 4K7R2J-2-GP
R3816 4K7R2J-2-GP
1 2
DY
DY
R3815 4K7R2J-2-GP
R3815 4K7R2J-2-GP
1 2
DY
DY
DPB_AUXP [8]
DPB_AUXN [8]
C3812 SCD1U16V2KX-3 GP
C3812 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3813 SCD1U16V2KX-3 GP
C3813 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3811 SCD1U16V2KX-3 GP
C3811 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3810 SCD1U16V2KX-3 GP
C3810 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
Vendor request Tx to Tx ,Rx to RX
C3805 SCD1U16V2KX-3 GP
C3805 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3806 SCD1U16V2KX-3 GP
C3806 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3803 SCD1U16V2KX-3 GP
C3803 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3804 SCD1U16V2KX-3 GP
C3804 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3809 SCD1U16V2KX-3 GP
C3809 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3808 SCD1U16V2KX-3 GP
C3808 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3814 SCD1U16V2KX-3 GP
C3814 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
C3807 SCD1U16V2KX-3 GP
C3807 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
TypeC
TypeC
C3801 SCD1U16V2KX-3 GP
C3801 SCD1U16V2KX-3 GP
1 2
C3802 SCD1U16V2KX-3 GP
C3802 SCD1U16V2KX-3 GP
1 2
TypeC
TypeC
DPB_AUXN_C
DPB_AUXP_C
MUX_SSDE
MUX_SSEQ
USB Type-C connector facing TX channel De-emphasis setting; Internal tied to VDD33/2, 3.3V I/O.
MUX_CDE
CDE=
L: Programmable DE Level#1
H: Programmable DE Level#2
M: Programmable DE Level#3 (default)
MUX_CEQ
MUX_DPEQ
USB Type-C connector facing RX channel De-emphasis setting; Internal tied to VDD33/2, 3.3V I/O.
CEQ=
L: Programmable EQ Level#1
H: Programmable EQ Level#2
M: Programmable EQ Level#3 (default)
DP Receiver equalization setting; Internal tied to VDD33/2, 3.3V I/O.
DPEQ=
L: Programmable EQ Level#1
H: Programmable EQ Level#2
M: Programmable EQ Level#3 (default)
C3815
C3815
3D3V_MUX
TypeC
TypeC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PCH_DPC_P 0_C
PCH_DPC_N 0_C
PCH_DPC_P 3_C
PCH_DPC_N 3_C
USB30_RX_CPU _P4_C
USB30_RX_CPU _N4_C
USB30_TX_CPU _P4_C
USB30_TX_CPU _N4_C
PCH_DPC_P 2_C
PCH_DPC_N 2_C
PCH_DPC_P 1_C
PCH_DPC_N 1_C
DPB_AUXP_C
DPB_AUXN_C
TypeC
TypeC
C3817
C3817
C3816
C3816
1 2
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
TypeC
TypeC
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
4
3D3V_MUX
6
GND
VDD33
PS8740B
TypeC:071.08740.0B03
TypeC:071.08740.0B03
071.08740.0A03
071.08740.0A03
PS8740BQFN40GT R-A0-GP
PS8740BQFN40GT R-A0-GP
I2C_EN
17
MUX_I2C_EN
CDE
CEQ
DPEQ/ADDR114SSEQ/ADDR0
35
38
11
MUX_DPEQ
MUX_CEQ
MUX_CDE
MUX_SSEQ
3
C3820
C3820
TypeC
TypeC
1 2
SC2D2U10V3KX- 1GP
SC2D2U10V3KX- 1GP
1
20
28
CEXT
VDD33
VDD33
MUX_TYPEC_RXP 1
30
RX1P
MUX_TYPEC_RXN 1
31
RX1N
MUX_TYPEC_RXP 2
40
RX2P
MUX_TYPEC_RXN 2
39
RX2N
MUX_TYPEC_TXP 1
33
TX1P
MUX_TYPEC_TXN 1
34
TX1N
MUX_TYPEC_TXP 2
37
TX2P
MUX_TYPEC_TXN 2
36
TX2N
R3810 4K7R2J-2-GP
R3810 4K7R2J-2-GP
MUX_EN MUX_EN_R
R3842 0R2J-2-GP
29
EN
23
SW2
22
SW1/CSDA
21
SW0/CSCL
27
SBU1
26
SBU2
32
IN_HPD
MUX_SW2_PD
REXT
SSDE
3
MUX_SSDE
TypeC
TypeC
2
MUX_REXT
1 2
TypeC
TypeC
MUX_SW1_PD
MUX_SW0_PD
MUX_I2C_EN
EN N/A
R3803
R3803
4K99R2F-L-GP
4K99R2F-L-GP
2
3
R3842 0R2J-2-GP
MUX_SW2_PD
R3843 0R0402-PAD R3843 0R0402-PAD
MUX_SW1_PD
R3844 0R2J-2-GP
R3844 0R2J-2-GP
MUX_SW0_PD
R3845 0R2J-2-GP
R3845 0R2J-2-GP
USBC_DPAU X1
USBC_DPAU X2
MUX_HPD_PD
R3846 0R0402-PAD R3846 0R0402-PAD
R3812 10KR2J-3-GP
R3812 10KR2J-3-GP
R3813 10KR2J-3-GP
R3813 10KR2J-3-GP
R3814 10KR2J-3-GP
R3814 10KR2J-3-GP
R3811 4K7R2J-2-GP
R3811 4K7R2J-2-GP
Internal PD at ~150Kohm, 5V tolerent
L: Chip Power Down (default)
H: Normal Operation
For Pin Control Mode (I2C_EN=L)
1 PORT USB + 4 LANES DP
PS8740B Flipped Normal
SW2LH H
SW1
SW0
USBC1_CC1_ CONN
USBC1_CC2_ CONN
1
ED3801
ED3801
AZ5315-02F-GP
AZ5315-02F-GP
USBC1_CC1_ CONN [37] USBC1_CC2_ CONN [37]
3D3V_S0 3D3V_MUX
R3847 0R2J-2-GP
R3847 0R2J-2-GP
R3848 0R2J-2-GP
R3848 0R2J-2-GP
Maybe connect to KBC
TypeC
TypeC
1 2
1 2
1 2
1 2
1 2
1 2
1 2
DY
DY
1 2
DY
DY
1 2
DY
DY
1 2
TypeC
TypeC
1 2
TypeC
TypeC
3D3V_MUX
DY
DY
TypeC
TypeC
TypeC
TypeC
L L
R3830
R3830
2MR2F-GP
2MR2F-GP
MUX_SW2_PD _R
I2C_DATA_PD [37]
I2C_CLK_PD [37]
From USB PD Controller
CPU_DP_HP D_R [8,37]
3D3V_MUX
H
VCCPD_VBU S
1 2
C3821
C3821
SCD1U25V2KX-GP
SCD1U25V2KX-GP
TypeC
TypeC
TYPEC_CON_T XP1 TYPEC_CON_T XP2
TYPEC_CON_T XN1
USBC_CON _PP3 USBC_CON _PP3
USBC_CON _PN3 USBC_CON_PN 3
USBC_DPAU X1 USBC_DPAU X2
TYPEC_CON_R XN2
TYPEC_CON_R XP2
DY
DY
1 2
DY
DY
1 2
TP2901
TP2901
TPAD14-OP-G P
TPAD14-OP-G P
1
TP2902
TP2902
TPAD14-OP-G P
TPAD14-OP-G P
1
VCCPD_VBU S VC CPD_VBUS
USB1
USB1
A1
GND
A2
SSTXP1
A3
SSTXN1
A4
VBUS#A4
A5
CC1
A6
DP1
A7
DN1
A8
RFU1
A9
VBUS#A9
A10
SSRXN2
A11
SSRXP2
A12
GND
NP1
NP1
NP2
NP2
16
GROUND
17
GROUND
18
GROUND
19
GROUND
SKT-USB36-9- GP-U
SKT-USB36-9- GP-U
022.10005.02U1
022.10005.02U1
TypeC
TypeC
SSTXP2
SSTXN2
VBUS#B4
VBUS#B9
SSRXN1
SSRXP1
CHASSIS#13
CHASSIS#14
CHASSIS#15
CHASSIS#20
CHASSIS#21
CHASSIS#22
R3849 0R0402-PAD R3849 0R0402-PAD
R3850 0R0402-PAD R3850 0R0402-PAD
B1
GND
B2
B3
B4
B5
CC2
B6
DP2
B7
DN2
B8
RFU2
B9
B10
B11
B12
GND
13
14
15
20
21
22
1 2
1 2
3D3V_S5
TYPEC_CON_T XN2
TYPEC_CON_R XN1
TYPEC_CON_R XP1
MUX_TYPEC_TXP 1
MUX_TYPEC_TXN 1 MUX_CEXT
MUX_TYPEC_TXP 2
MUX_TYPEC_TXN 2
R3831
R3831
2MR2F-GP
2MR2F-GP
TypeC
TypeC
TypeC
TypeC
2
C3864 SCD 1U16V2KX-3GP
C3864 SCD 1U16V2KX-3GP
1 2
TypeC
TypeC
C3863 SCD 1U16V2KX-3GP
C3863 SCD 1U16V2KX-3GP
1 2
TypeC
TypeC
C3861 SCD1U16V2KX-3GP
C3861 SCD1U16V2KX-3GP
1 2
TypeC
TypeC
C3862 SCD1U16V2KX-3GP
C3862 SCD1U16V2KX-3GP
1 2
TypeC
TypeC
USB_CPU_PN 3 [16]
USB_CPU_PP3 [16]
EU3801
EU3801
TypeC
TYPEC_CON_T XP1
TYPEC_CON_T XN1
TYPEC_CON_R XP1
TYPEC_CON_R XN1
TYPEC_CON_R XN2 TYPEC_CON_RXN 2
TYPEC_CON_T XN2 TYPEC_CON _TXN2
USBC_DPAU X1
1 2
EU3804
EU3804
USBC_CON _PP3
2
3
1
AZ5315-02F-GP
AZ5315-02F-GP
83.05315.0A0
83.05315.0A0
USBC_CON _PN3
TypeC
2
4
5
ESD3V3U4ULC -GP
ESD3V3U4ULC -GP
83.3V3U4.0A0
83.3V3U4.0A0
EU3802
EU3802
TypeC
TypeC
2
4
5
ESD3V3U4ULC -GP
ESD3V3U4ULC -GP
83.3V3U4.0A0
83.3V3U4.0A0
EU3803
EU3803
TypeC
TypeC
2
4
5
ESD3V3U4ULC -GP
ESD3V3U4ULC -GP
83.3V3U4.0A0
83.3V3U4.0A0
MUX_TYPEC_TXP 1_C
MUX_TYPEC_TXN 1_C
MUX_TYPEC_RXP 1
MUX_TYPEC_RXN 1
MUX_TYPEC_RXP 2
MUX_TYPEC_RXN 2
MUX_TYPEC_TXP 2_C
MUX_TYPEC_TXN 2_C
TYPEC_CON_T XP1
9 1
TYPEC_CON_T XN1
8
3
TYPEC_CON_R XP1
7
TYPEC_CON_R XN1
6
9 1
TYPEC_CON_R XP2 TYPEC_CON_R XP2
8
3
7
TYPEC_CON_T XP2 TYPEC_C ON_TXP2
6
USBC_DPAU X1
9 1
USBC_DPAU X2 U SBC_DPAUX2
8
3
7
6
R3832
R3832
1 2
0R0402-PAD
0R0402-PAD
R3833
R3833
1 2
0R0402-PAD
0R0402-PAD
R3834
R3834
1 2
0R0402-PAD
0R0402-PAD
R3835
R3835
1 2
0R0402-PAD
0R0402-PAD
R3836
R3836
1 2
0R0402-PAD
0R0402-PAD
R3837
R3837
1 2
0R0402-PAD
0R0402-PAD
R3838
R3838
1 2
0R0402-PAD
0R0402-PAD
R3839
R3839
1 2
0R0402-PAD
0R0402-PAD
TR3805
TR3805
1
TypeC
TypeC
2 3
FILTER-4P-156-G P-U
FILTER-4P-156-G P-U
1
068.24900.2001
068.24900.2001
4
TYPEC_CON_T XP1
TYPEC_CON_T XN1
TYPEC_CON_R XP1
TYPEC_CON_R XN1
TYPEC_CON_R XP2
TYPEC_CON_R XN2
TYPEC_CON_T XP2
TYPEC_CON_T XN2
USBC_CON _PN3
USBC_CON _PP3
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
38 106 Thursday, Feb ruary 25, 2016
38 106 Thursday, Feb ruary 25, 2016
38 106 Thursday, Feb ruary 25, 2016
A00
Page 39
5
4
3
2
1
Main Func = USB3.0 Port1
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
39 106 Thursday, Feb ruary 18, 2016
39 106 Thursday, Feb ruary 18, 2016
39 106 Thursday, Feb ruary 18, 2016
A00
Page 40
Main Func = Power Plane & Sequence
5
ROSA Run Power
3D3V_S5
5V_S5
3V5V_S0_ON
5V_S5
U4001
U4001
4
VBIAS
1
IN1#1
2
IN1#2
3
EN1
6
IN2#6
7
IN2#7
5
EN2
G5016KD1U-GP
G5016KD1U-GP
074.05016.0093
074.05016.0093
OUT1#13
OUT1#14
OUT2#8
OUT2#9
CT1
CT2
GND
GND
Remove Q4001 & R4004 by Hsync
20150417
D D
R4010
R4010
SIO_SLP_S3# [17,24,27,51,54]
1 2
0R0402-PAD
0R0402-PAD
4
5V_S0
13
14
3V5V_CT1
12
8
9
3V5V_CT2
10
1 2
11
15
3D3V_S0
C4001
SC470P50V2KX-3GP
C4001
SC470P50V2KX-3GP
C4002
SC470P50V2KX-3GP
C4002
SC470P50V2KX-3GP
1 2
1 2
C4004
C4004
1 2
C4005
C4005
SC10U10V5KX-2GP
SC10U10V5KX-2GP
5V_S0
SC10U10V5KX-2GP
SC10U10V5KX-2GP
5V_S0 Comsumption
Peak current 5A
3D3V_S0
3D3V_S0 Comsumption
Peak current 2.5A
3
Power Good
1D2V_VTT_PW RGD [51]
RSMRST_PW RGD#
[#543016] Optional, Added for addition system robustness
1D0V_S5_PW RGD [52]
1D8V_S5_PW ROK [54]
3V_5V_POK [17,45,52,54]
NON DS3: PH 3V_5V_POK to 3D3V_AUX_S5 at page17
D4002
D4002
3
BAS16-6-GP
BAS16-6-GP
R4029 0R0402-PAD R4029 0R0402-PAD
R4030 0R0402-PAD R4030 0R0402-PAD
R4033
R4033
R4011
R4011
1 2
0R0402-PAD
0R0402-PAD
1
83.00016.K11
83.00016.K11
DY
DY
2
1 2
1 2
1 2
DY
DY
0R2J-2-GP
0R2J-2-GP
2
R4031
R4031
100KR2J-1-GP
100KR2J-1-GP
3D3V_S0
1 2
R4005
R4005
1KR2J-1-GP
1KR2J-1-GP
R4002 0R0402-PAD R4002 0R0402-PAD
3D3V_S5_KBC 3D3V_S5
1 2
1 2
R4032
R4032
100KR2J-1-GP
100KR2J-1-GP
DY
DY
1 2
RSMRST_PW RGD#
1
ALL_SYS_PWRG D [17,24]
VR_EN [46]
VCCIO and VCCSTG
Modify power switch IC and rel ate schematic
2016/01/07
5V_S5
C4032
SC1U10V2KX-1GP
C4032
SC1U10V2KX-1GP
D4001
D4001
2
1
C C
R4006
R4006
20KR2F-L-GP
20KR2F-L-GP
1 2
R4009 10KR2J-3-GP R 4009 10KR2J-3-GP
1 2
1 2
C4009
C4009
DVT1 0210
modify at DVT1 power sequence 20150203
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
LBAS16LT1G-GP
LBAS16LT1G-GP
83.00016.P11
83.00016.P11
3
PURE_HW _SHUTDOW N# [26] 3V_5V_EN [45]
ALWON [24 ]
R4017
R4017
VCCSTG_EN _R
SIO_SLP_S3# [17,24,27,51,54]
1 2
0R0402-PAD
0R0402-PAD
C4033
C4033
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
U4002
U4002
1
VIN
2
VIN
3
VBIAS
4
EN
1 2
DY
DY
APE8939GN3-GP
APE8939GN3-GP
074.08939.0093
074.08939.0093
VOUT#8
VOUT#7
VOUT#6
8
7
6
5
GND
9
VIN
1D0V_S5
1 2
C4006
C4006
SC10U6D3V3MX- GP
SC10U6D3V3MX- GP
+VCCIO_SIP
1 2
1 2
0R1206-PAD
0R1206-PAD
1 2
0R0402-PAD
0R0402-PAD
C4007
C4007
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R4045
R4045
R4042
R4042
+VCCIO
+VCCSTG
DY
DY
1 2
C4008
C4008
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
20150116 2032
3D3V_S0
EOPIO and EDRAM
[#543977 Rev1.1] PDDG change to ALL_SYS_PWRGD
2016/02/24 modify
1 2
DY
DY
R4044
R4044
1 2
0R0402-PAD
0R0402-PAD
ALL_SYS_PWRG D_R
ZVM# [6]
R4018
B B
SIO_SLP_S3# [17,24,27,51,54]
ALL_SYS_PWRG D [17 ,24]
R4018
0R2J-2-GP
0R2J-2-GP
3D3V_S5
1 2
10KR2J-3-GP
10KR2J-3-GP
R4028
R4028
DY
DY
R4019
R4019
1 2
0R2J-2-GP
0R2J-2-GP
NON MS/23e
NON MS/23e
D4003
D4003
RB521CM-30T2R -GP-U
RB521CM-30T2R -GP-U
K A
MS
MS
10KR2J-3-GP
10KR2J-3-GP
1 2
R4027
R4027
MS
MS
MANAGEMENT RAIL POWER GENERATION
3D3V_S5
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
C4014
C4014
1 2
DY
DY
U4005
U4005
1
5
NC#1
VCC
SIO_SLP_S4# [17,24,54]
A A
5
2
A
DY
DY
GND3Y
74LVC1G07GW -GP
74LVC1G07GW -GP
73.01G07.0HG
73.01G07.0HG
R4023
R4023
1 2
0R0402-PAD
0R0402-PAD
4
EN_EDRAM_VR
1D0V_S5
DY
DY
D4004
D4004
RB521CM-30T2R -GP-U
RB521CM-30T2R -GP-U
K A
3D3V_S5
1 2
R4026
R4026
10KR2J-3-GP
10KR2J-3-GP
DY
DY
1D0V_S5 5V_S5
G
EC4001
EC4001
DY
DY
U4004
U4004
1
VIN#1
2
VIN#2
3
VBIAS
ON4GND
TPS22961DNYT-G P
TPS22961DNYT-G P
074.22961.0093
074.22961.0093
Q4001
Q4001
SSM3K15AMFV-GP- U
SSM3K15AMFV-GP- U
EN_EDRAM_VR
D S
VCCSTU_EN
1 2
DY
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
+V_EDRAM_VR
V_EDRAM_EOPIO_R
8
VOUT#8
7
VOUT#7
6
VOUT#6
5
9
23e
23e
VIN#9
C4015
C4015
1D0V_S5
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1D0V_S5
12
23e
23e
R4021
R4021
1 2
0R1206-PAD
0R1206-PAD
Imax = 6 A
Rds on = 4.65mohm
V_EDRAM_EOPIO_R
1 2
C4011
C4011
23e
23e
VCCST, VCCSTG, and VCCPLL can remain powered during S4 and S5 power states for board VR optimization.
Modify power switch IC and rel ate schematic ,DVT1 20150204
R4024
R4024
1 2
0R0402-PAD
0R0402-PAD
4
VCCSTU_EN _R VC CSTU_EN U4006_CT
5V_S5
1 2
C4034
SC1U10V2KX-1GPDYC4034
SC1U10V2KX-1GP
DY
+V_EDRAM_VR
Voltage = 1.0 V ± 50 mV
Imax = 3.2 A
TRISE = 240 us
1 2
C4010
C4010
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DY
DY
SC10U10V5KX-2GP
SC10U10V5KX-2GP
VCCST
1D0V_S5
C4013
SC10U10V5KX-2GP
C4013
SC10U10V5KX-2GP
12
U4006
U4006
1
VIN#1
2
VIN#2
3
ON
VBIAS4GND
1 2
DY
TPS22965DSGR- GP-U
TPS22965DSGR- GP-U
C4031
SC1U10V2KX-1GPDYC4031
SC1U10V2KX-1GP
+V_EOPIO_VR
Voltage = 1.0 V ± 50 mV
Imax = 2.8 A
TRISE = 240 us
R4022
R4022
1 2
0R1206-PAD
0R1206-PAD
+V1.00U_CPU
VOUT#8
VOUT#7
3
CT
GND
R4036
R4036
1 2
0R0402-PAD
0R0402-PAD
R4038
R4038
1 2
0R0402-PAD
0R0402-PAD
8
7
6
5
9
1 2
C4017
C4017
DY
DY
+V_EOPIO_VR V_EDRAM_EOPIO_R
+V1.00U_CPU
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
+VCCST_CP U
+VCCSFR
0.04 A
1 2
C4012
C4012
SC10U6D3V3MX- GP
SC10U6D3V3MX- GP
V1.8S
+V1.8A
100mA
1 2
1 2
R4046
R4046
C4029
C4029
23e
23e
Q4008
Q4008
SIO_SLP_S3# [17,24,27,51,54]
2
G
S
2N7002K-2-GP
2N7002K-2-GP
23e
23e
10KR2J-3-GP
10KR2J-3-GP
23e
23e
R4043
R4043
1 2
23e
23e
20KR2J-L2-GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
D
20KR2J-L2-GP
1D8S_EN#
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
S
23e
23e
1 2
C4023
C4023
23e
23e
SC1U10V2KX-1G P
SC1U10V2KX-1G P
1D8S_EN_R#
Power Plane Enable
Power Plane Enable
Power Plane Enable
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
+V1.8S_EDRAM
Q4009
Q4009
DMP2130L-7-GP
DMP2130L-7-GP
D
D
D
G
G
G
84.02130.031
84.02130.031
2nd = 84.00102.031
2nd = 84.00102.031
3rd = 84.03413.B31
3rd = 84.03413.B31
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
40 106
40 106
40 106
1 2
C4028
C4028
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
23e
23e
A00
A00
A00
Page 41
5
4
Main Func = Power Plane & Sequence
3
2
1
3D3V_S5 3D3V_S5_PCH
D D
3D3V_S5
Obs reason:
R4101
R4101
1 2
NON DS3
NON DS3
0R5J-5-GP
0R5J-5-GP
Reserve by NON DS3 function 20150413
For new project,
pls help to use cost down version
SY6288C10CAC for instead.
C4102
C4102
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
R4103
U4101
DS3
C C
PCH_ALW_ON [24]
DS3
DS3
DS3
1 2
R4102
R4102
0R2J-2-GP
0R2J-2-GP
DS3_PWRCTL
U4101
1
GND
2
IN#2
3
IN#3
4
EN
SY6288C10CAC-GP
SY6288C10CAC-GP
074.06288.0079
074.06288.0079
DS3
DS3
OUT#8
OUT#7
OUT#6
OC#
8
7
6
5
(OBS)
U4101_OUT
R4103
0R3J-0-U-G P
0R3J-0-U-GP
1 2
DS3
DS3
3D3V_S5_PCH U4101_OUT
Add 0603 0ohm
20141114
C4101
C4101
1 2
SC1U10V2KX-1GP
SC1U10V2KX-1GP
DS3
DS3
RdsON: 100m ohm
DS3
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Connected_Standby(1/2)+DS3
Connected_Standby(1/2)+DS3
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
Connected_Standby(1/2)+DS3
A4
A4
A4
2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
A00
A00
A00
41 106 Thursday, February 25, 2016
41 106 Thursday, February 25, 2016
41 106 Thursday, February 25, 2016
1
Page 42
5
4
3
2
1
Main Func = DIMM1
Main Func = DIMM2
D D
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Connected_Standby(2/2)
Connected_Standby(2/2)
Connected_Standby(2/2)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Taipei Hsien 221, Taiwan, R.O.C.
42 10 6
42 10 6
42 10 6
1
A00
A00
A00
Page 43
Main Func = ADT Input
5
4
5V_S5
3
2
1
84.05067.031
84.05067.031
AD_OFF_L
TypeC
TypeC
PQ4311
PQ4311
6
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
1 2
PR4303
PR4303
10KR2J-3-GP
10KR2J-3-GP
PS_ID_R1
PC4302
PC4302
1 2
SCD1U50V3KX- GP
SCD1U50V3KX- GP
PQ4305
PQ4305
1
DY
DY
LTA024EUB-FS 8-GP
LTA024EUB-FS 8-GP
23 45
1
R2
R2
2
R1
R1
3
VBUS_PRODE CT
PR4305
PR4305
1 2
33R2J-2-GP
33R2J-2-GP
AD_OFF_R
PD_VBUS_C_CTRL1 = 1 (Consumer Path OFF)
PD_VBUS_C_CTRL1 = 0/Z (Consumer Path ON)
100KR2F-L1-GP
100KR2F-L1-GP
PD_VBUS_C_C TRL1_A
PR4302
PR4302
15KR2F-GP
15KR2F-GP
1 2
PQ3802_1
PR4309
PR4309
100KR2J-1-GP
PS_ID_R2
1
PD4303
PD4303
L30ESD24VC3-2- GP
L30ESD24VC3-2- GP
3
1 2
PR4314
PR4314
3K3R6J-GP
3K3R6J-GP
DY
DY
PQ3809_D
84.2N702.A3F
84.2N702.A3F
PD_VBUS_C_C TRL1_A
1 2
DY
DY
1 2
100KR2J-1-GP
1 2
AC_DIS
DY dischange schematic AC_DIS change to SATA LED function 2016/02/03 modify
VCC3PD
TypeC
TypeC
PR4337
PR4337
1 2
240KR2F-L-GP
240KR2F-L-GP
VBUS_PRODE CT#
Layout Note:
D D
Pin Definition: TBD
DCIN1
DCIN1
9
1
2
3
4
5
6
7
8
10
ACES-CON 8-13-GP-U1
ACES-CON 8-13-GP-U1
20.F1295.008
20.F1295.008
C C
AFTP4303 AFTP4303
AFTP4304 AFTP4304
AFTP4305 AFTP4305
B B
1
1
1
20140815 david
EL4304
EL4304
1 2
JGND
0R5J-5-GP
0R5J-5-GP
EL4303
EL4303
1 2
0R5J-5-GP
0R5J-5-GP
AFTP4301 AFTP4301
1
AFTP4302 AFTP4302
1
+DC_IN_C
1 2
JGND JGND
2016/01/07 mofiy
+DC_IN_C
PS_ID_R
+DC_IN_C
AC_IN#_G DC _IN_OK
IC_DELAY
1 2
TypeC
TypeC
PC4307
PC4307
SCD15U10V2KX- GP
SCD15U10V2KX- GP
EC4301
EC4301
SC10U25V3MX-GP
SC10U25V3MX-GP
1 2
0R5J-5-GP
0R5J-5-GP
1 2
EC4302
EC4302
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1 2
0R5J-5-GP
0R5J-5-GP
U4302
U4302
5
SENSE
4
TypeC
TypeC
CD
074.01004.00BF
074.01004.00BF
PSID Layout width > 25mil
60ohm@100MHz
DCR=0.02 ohm
Max current = 6000mA
EL4301
EL4301
TypeC
TypeC
EL4302
EL4302
AC_IN#_G
TypeC
TypeC
SATA_LED# [24,64]
1
OUT
2
VDD
3
VSS
PS_ID_R
3D3V_S5
1 2
PR4312
PR4312
470KR2F-GP
470KR2F-GP
1 2
PR4313
PR4313
71K5R2F-1-GP
71K5R2F-1-GP
1 2
PR4335
PR4335
100KR2J-1-GP
100KR2J-1-GP
TypeC
TypeC
DC_IN_OK
PR4317
PR4317
1 2
0R0603-PAD
0R0603-PAD
2
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
PQ4306
PQ4306
3 4
2
5
1
6
2N7002KDW -GP
2N7002KDW -GP
R4302 0R2J-2-GP
R4302 0R2J-2-GP
R4303 0R2J-2-GP R4303 0R2J-2-GP
DC_IN_OK [24]
PQ4302
PQ4302
B
D S
DMN5L06K-7-G P
DMN5L06K-7-G P
1 2
Do Not Stuff
Do Not Stuff
PQ4304
PQ4304
R1
R1
B
DY
DY
R2
R2
LMUN5212T1G - G P
LMUN5212T1G-G P
84.03904.P11
84.03904.P11
E
C
G
PQ4301
PQ4301
PR4306
PR4306
DY
DY
PD4301
PD4301
SD103AWS- 2-GP
SD103AWS- 2-GP
A K
C
E
CH3904PT-GP
CH3904PT-GP
PSID_DISABLE#_R_C
Placement: Close to Batt Connector
6
7
8
R4301
R4301
1 2
0R0402-PAD
0R0402-PAD
Batt Connecter
BATT1
BATT1
1
2
3
PBAT_SMBCLK1
4
PBAT_SMBDAT1
5
PBAT_PRES1#
6
SYS_PRES1#
7
8
9
10
ETY-CON10 - 2 8 - GP
ETY-CON10-28- GP
20.F2460.010
20.F2460.010
AFTP4306 AFTP4306
1
AFTP4307 AFTP4307
1
AFTP4308 AFTP4308
1
PBAT_PRES#
3
D4304
NP1
NP2
PBAT_PRES1#
1
PBAT_SMBDAT1
1
PBAT_SMBCLK1
1
BT+
1
BT+
1
BT+
1
SYS_PRES1#
1
4
D4304
LBAV99LT1G-1-G P
LBAV99LT1G-1-G P
75.00099.O7D
75.00099.O7D
1
2
2nd = 75.00099.K7D
2nd = 75.00099.K7D
3rd = 75.00099.Q7D
3rd = 75.00099.Q7D
4th = 75.00099.D7D
4th = 75.00099.D7D
AFTP4309 AFTP4309
AFTP4310 AFTP4310
AFTP4311 AFTP4311
AFTP4312 AFTP4312
AFTP4313 AFTP4313
AFTP4314 AFTP4314
AFTP4315 AFTP4315
SMBDA1
3
D4305
D4305
LBAV99LT1G-1-G P
LBAV99LT1G-1-G P
75.00099.O7D
75.00099.O7D
1
2
2nd = 75.00099.K7D
2nd = 75.00099.K7D
3rd = 75.00099.Q7D
3rd = 75.00099.Q7D
4th = 75.00099.D7D
4th = 75.00099.D7D
2nd = 75.00099.K7D
2nd = 75.00099.K7D
3rd = 75.00099.Q7D
3rd = 75.00099.Q7D
4th = 75.00099.D7D
4th = 75.00099.D7D
BT+
1 2
1 2
EC4308
EC4308
A A
EC4307
EC4307
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
Do Not Stuff
Do Not Stuff
SMBCLK1 [24,44]
SMBDA1 [24,44]
PBAT_PRES# [24]
EC4309
EC4309
Do Not Stuff
Do Not Stuff
1 2
DY
DY
5
EC4310
EC4310
PD4304
PD4304
DY
DY
Do Not Stuff
Do Not Stuff
A K
RN4302
RN4302
4 5
3
2
1
SRN100J-4-G P
SRN100J-4-G P
EC4306
EC4306
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
1 2
3D3V_S5
2
3
+DC_IN AD +
1 2
PC4301
SC1U50V3KX-GP
PC4301
SC1U50V3KX-GP
1 2
240KR3-GP
240KR3-GP
PR4307
PR4307
1 2
47KR2F-GP
47KR2F-GP
PR4308
PR4308
20150520_ EC097
VCCPD_VBU S
1 2
PR4319
PR4319
TypeC
TypeC
1 2
PD_VBUS_C_C TRL1 [37]
PC4311
PC4311
TypeC
TypeC
SC100P50V2JN-3GP
SC100P50V2JN-3GP
SMBCLK1
3
D4306
D4306
LBAV99LT1G-1-G P
LBAV99LT1G-1-G P
75.00099.O7D
75.00099.O7D
1
2
3
1
PD4302
PD4302
LBAV99LT1G-1-G P
LBAV99LT1G-1-G P
75.00099.O7D
75.00099.O7D
2nd = 75.00099.K7D
2nd = 75.00099.K7D
3rd = 75.00099.Q7D
3rd = 75.00099.Q7D
4th = 75.00099.D7D
4th = 75.00099.D7D
PU4301
PU4301
S
D
S
D
1
S
D
S
D
2
S
D
S
D
3
G D
G D
4 5
SI7121DN-T1-GE 3-GP
SI7121DN-T1-GE 3-GP
Id=-9.6A
Qg=-25nC
Rdson=18~30mohm
TypeC
TypeC
PQ4307
PQ4307
23 45
1
6
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
100KR2F-L1-GP
100KR2F-L1-GP
3D3V_S5_KBC
TypeC
TypeC
PR4329
PR4329
100KR2F-L1-GP
100KR2F-L1-GP
TypeC
TypeC
3D3V_S5
1 2
PR4304
PR4304
2K2R2J-2-GP
2K2R2J-2-GP
PS_ID [24]
8
7
6
1 2
DY
DY
VCCPD_VBU S
TypeC
TypeC
PR4336
PR4336
680KR2J-GP
680KR2J-GP
1 2
USB_TYPEC_R
1 2
TypeC
TypeC
PR4322
10KR2F-2-GP
PR4322
10KR2F-2-GP
1 2
PR4323
PR4323
TypeC
TypeC
PD_VBUS_P_C TRL1 [37]
PD_VBUS_P_CTRL1 = 1 (Provider Path ON)
PD_VBUS_P_CTRL1 = 0/Z (Provider Path OFF)
VCCPD_VBU S
1 2
PR4331
PR4331
124KR2F-GP
124KR2F-GP
1 2
1 2
1 2
PC4303
PC4303
PC4305
PC4305
DY
DY
Do Not Stuff
Do Not Stuff
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
TypeC
TypeC
PC4310
PC4310
SC100P50V2JN-3GP
SC100P50V2JN-3GP
USB_TYPEC_SW
DC_IN_OK
USB_TYPEC_DIS
TypeC
TypeC
1 2
VCCPD_VBU S
5
SENSE
4
CD
TypeC
TypeC
074.01004.00BF
074.01004.00BF
TypeC Protect circuit
2015/11/26 modify
PC4304
PC4304
U4301
U4301
1 2
Do Not Stuff
Do Not Stuff
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
100R2512J-1-GP
100R2512J-1-GP
PR4338
PR4338
1KR2J-1-GP
1KR2J-1-GP
TypeC
TypeC
1
OUT
2
VDD
3
VSS
TypeC
TypeC
1 2
PC4306
PC4306
SC10U25V3MX-GP
SC10U25V3MX-GP
SI7121DN-T1-GE 3-GP
SI7121DN-T1-GE 3-GP
PQ4310
PQ4310
6
PR4310
PR4310
1 2
TypeC
TypeC
VCC3PD
PR4334
PR4334
1 2
2
1 2
PR4316
PR4316
PR4311
PR4311
100KR2F-L1-GP
100KR2F-L1-GP
20KR2J-L2-GP
20KR2J-L2-GP
NON_TypeC
NON_TypeC
DC_IN_OK
1 2
PR4315
PR4315
TypeC
TypeC
PU4303
PU4303
S
S
1
S
S
2
S
S
3
G D
G D
4 5
84.07121.037
84.07121.037
+SDC_IN_SW _R1
23 45
1
PD_VBUS_P_C TRL1_R
100KR2F-L1-GP
100KR2F-L1-GP
TypeC
TypeC
240KR2F-L-GP
240KR2F-L-GP
VBUS_PRODE CT U4301_IN
VCC3PD
NON_TypeC
NON_TypeC
18K7R2F-GP
18K7R2F-GP
D
D
8
D
D
7
D
D
6
1 2
TypeC
TypeC
PR4332
PR4332
1 00KR2F-L1-GP
100KR2F-L1-GP
SI7625DN - T 1 -GE 3-GP
SI7625DN-T1-GE 3-GP
PR4324
PR4324
8
7
6
NON_TypeC
NON_TypeC
PD4305
PD4305
RB751V-40-2-G P
RB751V-40-2-G P
If=0.3A
USB_ADT
1 2
PU4302
PU4302
S
D
S
D
S
D
S
D
S
D
S
D
G D
G D
SI7121DN-T1-GE 3-GP
SI7121DN-T1-GE 3-GP
84.07121.037
84.07121.037
K A
TypeC
TypeC
PU4304
PU4304
D
D
8
D
D
7
D
D
6
SI7121DN-T1-GE 3-GP
SI7121DN-T1-GE 3-GP
84.07121.037
84.07121.037
PD_VBUS_DISCH G [37]
PU4305
PU4305
D
D
8
D
D
7
D
D
6
D
D
5
G
G
4
TypeC
TypeC
PQ4309
PQ4309
23 45
1
6
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
Id=115mA
TypeC
TypeC
1
2
3
4 5
ACOK_IN_M [17,44]
+SDC_IN_SW _R1
S
S
1
S
S
2
S
S
3
G D
G D
4 5
USB_ADT_SW _R
DC_IN_OK
TYPEC_5V_SW
S
S
1
S
S
2
S
S
3
TypeC
TypeC
TYPEC_5V_SW _R
PR4339
PR4339
64K9R2F-1-GP
64K9R2F-1-GP
TypeC
TypeC
VBUS_PRODE CT
+SDC_IN
1 2
PR4318
PR4318
100KR2J-1-GP
100KR2J-1-GP
1 2
+SDC_IN
TypeC
TypeC
1 2
USB_ADT_SW
1 2
TypeC
TypeC
PR4321
PR4321
1 2
PR4330
240KR2F-L-GP
PR4330
240KR2F-L-GP
1 2
TypeC
TypeC
1 2
TYPEC_5V
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
+SDC_IN_SW
PR4333
PR4333
10KR2F-2-GP
10KR2F-2-GP
+SDC_IN
PR4320
PR4320
240KR2F-L-GP
240KR2F-L-GP
47KR2F-GP
47KR2F-GP
PQ4308
PQ4308
3 4
2
5
1
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
1
2
3
PC4312
PC4312
USB_ADT_R1
6
PD4306
PD4306
TypeC
TypeC
PU4306
PU4306
S
S
S
S
S
S
G
G
SI7625DN- T 1 - GE 3-GP
SI7625DN-T1-GE 3-GP
4
TypeC
TypeC
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PD_VBUS_DISCHG = 1 (VBUS Discharging)
PD_VBUS_DISCHG = 0/Z (VBUS not discharging)
K A
RB751V-40-2-G P
RB751V-40-2-G P
TypeC
TypeC
If=0.3A
USB30_VCCB
D
D
8
D
D
7
D
D
6
D
D
5
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
DCIN
DCIN
DCIN
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
ACOK_IN_M [17,44]
43 106 Thursday, Feb ruary 25, 2016
43 106 Thursday, Feb ruary 25, 2016
43 106 Thursday, Feb ruary 25, 2016
12K4R2F-GP
12K4R2F-GP
TypeC
TypeC
2K2R2J-2-GP
2K2R2J-2-GP
PR4328
PR4328
TypeC
TypeC
PR4327
PR4327
USB_ADT
1 2
1 2
A00
A00
A00
Page 44
Main Func = Charger
5
4
3
2
1
+SDC_IN
D D
USB_ADT
PD4407
PD4407
RB751V M-40TE-17 -GP
RB751V M-40TE-17 -GP
A K
TypeC
TypeC
Vf=0.25V @ 30mA
Vf=0.25V @ 30mA
VDD
C C
SMBCLK1 [24,43 ]
H_PROCHO T# [4,24,46]
B B
3D3V_S 5_KBC
ACOK_I N [24]
ACOK_I N_M [17 ,43]
1 2
1 2
1 2
PR4445
PR4445
PR4439
PR4439
PR4438
PR4438
100KR2F- L2-GP
100KR2F-L2-GP
10KR2F-2 - GP
10KR2F-2-GP
10KR2F-2 - GP
10KR2F-2-GP
DY
DY
DY
DY
DY
DY
SMBDA1 [24,43 ]
ACOK_I N
2nd = 84.DM601.03F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
4th = 84.2N702.F3F
PQ4415
PQ4415
6
2N7002K DW-GP
2N7002K DW-GP
84.2N702.A3F
84.2N702.A3F
1 2
PR4471
PR4471
100KR2F-L2-GP
100KR2F-L2-GP
ACOK#
23 45
1
AD_IA [24]
boost_m on [24]
P_SYS [24,46]
AC_IN:3.35~3.75V
Do Not Stuff
Do Not Stuff
PG4408
PG4408
1 2
PG4409 GAP-CLOSE -PWR-6 -GP PG440 9 GA P-CLOS E-PWR-6 -GP
1 2
PG4410 GAP-CLOSE -PWR-6 -GP PG441 0 GA P-CLOS E-PWR-6 -GP
1 2
PG4419 Do Not Stuf fPG4 419 Do Not Stuff
1 2
12
PC4423
PC4423
SC2K2P50V2JX-GP
SC2K2P50V2JX-GP
PWR_C HG_REGN
1 2
PR4420
PR4420
ACLIM
1 2
PR4423
PR4423
DY
DY
RB751V M-40TE-17 -GP
RB751V M-40TE-17 -GP
AD+
A K
VAC DET
Greater than 2.633 V
Less than 3.5 V
VDD
1 2
1 2
PR4443
PR4443
PR4422
PR4422
300KR2F- L-GP
300KR2F-L-GP
100KR2F- L2-GP
100KR2F-L2-GP
PG4401 Do Not StuffPG440 1 Do Not Stuff
1 2
PG4414 Do Not StuffPG441 4 Do Not Stuff
1 2
12
12
PR4401
PR4401
PC4424
PC4424
PC4430
PC4430
1KR2F-3-GP
1KR2F-3-GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
1 2
PR4421
PR4421
10KR2F-2 - GP
10KR2F-2-GP
10KR2F-2 - GP
10KR2F-2-GP
1 2
PR4424
PR4424
100KR2F- L1-GP
100KR2F-L1-GP
100KR2F- L1-GP
100KR2F-L1-GP
DY
DY
PD4406
PD4406
PC4413
PC4413
12
1 2
DCBATO UT
USB_ADT_D
1 2
PR4408
PR4408
300KR2 F-GP
300KR2 F-GP
PWR_C HG_ACDE T
1 2
PR4409
PR4409
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
37K4R2 F-1-GP
37K4R2 F-1-GP
PWR_C HG_ACOK PWR_C HG_HIDRV
PWR_C HG_SDA
PWR_C HG_SCL
PWR_C HG_PROC HOT#
PWR_C HG_IADP
PWR_C HG_IDCHG
PG4415
PG4415
PWR_C HG_PMON
1 2
Do Not Stuff
Do Not Stuff
PR4410
PR4410
1KR2F-3 -GP
1KR2F-3 -GP
1 2
PWR_CHG_ACN
PWR_CHG_ACP
32
31
PU4401
PU4401
CSIP
CSIN
1
ACIN
2
ACOK
3
SDA
4
SCL
ISL955 21AHRZ-T -GP
ISL955 21AHRZ-T -GP
5
PROCHOT#
6
AMON
074.95521.0A73
074.95521.0A73
7
BMON
8
PSYS
33
GND
PROG9COMP10CCLIM11FSET12BATGONE13CSON
PWR_CHG_PROG
PWR_CHG_COMP
1 2
PR4416
PR4416
1 2
12
DY
DY
PC4427
PC4427
PR4433
PR4433
PR_2
150KR2F-L-GP
150KR2F-L-GP
12
SC560P50V2KX-2GP
SC560P50V2KX-2GP
PC4432
PC4432
1 2
PG_1
1 2
12
PC4403
PC4403
SC22 00P50V2KX-2GP
SC2200P50V2KX-2GP
DY
DY
PWR_V BAT
12
PC4426
PC4426
12
SCD22U25V3KX-GP
SCD22U25V3KX-GP
PC4436
PC4436
12
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
PWR_CMSRC
PWR_OPCN
PWR_OPCP
PWR_CHG_BATDRV
PWR_ASGATE
30
29
28
27
26
25
VBAT
QPCP
QPCN
BGATE
CMSRC
ASGATE
CSOP
ACLIM
14
15
16
PWR_CHG_FSET
PWR_CHG_BATPRES#
PWR_CHG_ILIM
PR4430
PR4430
1 2
0R0402-PAD
0R0402-PAD
100R2F-L1-GP-U
100R2F-L1-GP-U
1 2
PR4449
PR4449
1KR2F-3 -GP
1KR2F-3 -GP
SCD022U25V2KX-GP
SCD022U25V2KX-GP
Switching frequency is 350KHz
A A
PR4402
PR4402
D01R37 21F - GP-U
D01R37 21F-GP-U
1 2
PG4402
PG4402
GAP-CLO SE-PWR -6-GP
GAP-CLO SE-PWR -6-GP
PR4444
PR4444
0R0402 -PAD
0R0402 -PAD
PC4402
PC4402
SCD1U 25 V2KX-GP
SCD1U25 V2KX-GP
1 2
PWR_CHG_ACP
PR4403
PR4403
100R5F -2-G P
100R5F -2-GP
1 2
PC4437
PC4437
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
24
BOOT
23
UGATE
22
PHASE
21
LGATE
20
VDDP
19
VDD
18
DCIN
17
NTC
PWR_C HG_SRP
PWR_C HG_SRN
DCBATO UT
PWR_CHG_ACN
PWR_C HG_BTST
PWR_C HG_PHASE
PWR_C HG_LODR V
PWR_C HG_REGN
VDD
PWR_C HG_VCC
PWR_C HG_NTC
1 2
PG4403
PG4403
GAP-CLO SE-PWR -6-GP
GAP-CLO SE-PWR -6-GP
PG_2
1 2
PR4414
PR4414
2R2F-GP
2R2F-GP
12
PC4404
PC4404
SC22 00P50V2KX-2GP
SC2200P50V2KX-2GP
DY
DY
BT+
PR4447
PR4447
0R0603 -PAD
0R0603 -PAD
1 2
1 2
PR4437
PR4437
49K9R2F- L-GP
49K9R2F-L-GP
12
PWR_C HG_BTST 1
VDD
PR4412
PR4412
4D7R3F -L-G P
4D7R3F -L-GP
1 2
12
PC4428
PC4428
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PC4412
PC4412
SC1U50V 5ZY-1-GP-U
SC1U50V 5ZY-1-GP-U
PR4407
PR4407
1 2
2D2R5J -1-GP
2D2R5J -1-GP
PC4414
PC4414
SCD22 U2 5V3KX-G P
SCD22U2 5V3KX-G P
1 2
12
PC4431
PC4431
SC1U10V2KX-1GP
SC1U10V2KX-1GP
PWR_C HG_1
DY
DY
PWR_C HG_REGN
PD4405
PD4405
RB751V M-40TE-17 -GP
RB751V M-40TE-17 -GP
PD4402
PD4402
RB751V M-40TE-17 -GP
RB751V M-40TE-17 -GP
PD4401
PD4401
RB751V M-40TE-17 -GP
RB751V M-40TE-17 -GP
12
TypeC
TypeC
Do Not Stuff
Do Not Stuff
PC4410
PC4410
AK
If=0.3A
A K
If=0.3A
A K
If=0.3A
CHARGER _SRC DCBATOUT
PG4404
PG4404
Do Not Stuff
Do Not Stuff
1 2
PG4405
PG4405
Do Not Stuff
Do Not Stuff
1 2
PG4406
PG4406
Do Not Stuff
Do Not Stuff
1 2
PG4407
PG4407
Do Not Stuff
Do Not Stuff
1 2
CHARGER _SRC
12
PC4405
PC4405
SC10U 25V5KX-GP
12
PC4411
PC4411
DY
DY
SC10U25V5KX-GP
Do Not Stuff
Do Not Stuff
678
DDD
DDD
PU4404
PU4404
SIS412 DN-T1-GE3 -GP
SIS412 DN-T1-GE3 -GP
84.00412.037
84.00412.037
SSS
G D
SSS
G D
123
4 5
PWR_C HG_PHASE
678
DDD
DDD
PU4405
PU4405
SIS412 DN-T1-GE3 -GP
SIS412 DN-T1-GE3 -GP
84.00412.037
84.00412.037
SSS
G D
SSS
G D
123
4 5
USB_ADT
AD+
BT+
12
PC4406
PC4406
SC10U 25V5KX-GP
SC10U25V5KX-GP
PWR_C HG_PHASE _1
12
12
PC4407
PC4407
SC10U 25V5KX-GP
SC10U25V5KX-GP
PL4401
PL4401
1 2
COIL-4D 7UH-33-GP
COIL-4D 7UH-33-GP
68.4R71A.20H
68.4R71A.20H
SC2200 P50V2K X-2GP
SC2200 P50V2K X-2GP
DCBATO UT
PU4403
PU4403
S
D
S
PC4408
PC4408
PC4421
PC4421
SC10U 25V5KX-GP
SC10U25V5KX-GP
D
8
D
D
7
6
SI7121 DN-T1-GE3 -GP
SI7121 DN-T1-GE3 -GP
12
PC4409
PC4409
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
PC4434
PC4434
1
S
S
SC220 0 P50V2K X-2GP
SC2200 P50V2K X-2GP
2
SG DD
SG DD
3
1 2
DY
DY
4 5
84.07121.037
84.07121.037
PR4415
PR4415
D01R37 21F-GP-U
D01R37 21F-GP-U
1 2
1 2
PG4412
PG4412
GAP-CLOSE-PWR-6-GP
GAP-CLOSE-PWR-6-GP
PWR_CHG_SRP_1
1 2
PR4411
PR4411
2R2F-GP
2R2F-GP
PC4420
PC4420
SCD1U 25 V2KX-GP
SCD1U25 V2KX-GP
1 2
L1SS35 5T1G-GP
L1SS35 5T1G-GP
PR4458
PR4458
0R0402 -PAD
0R0402 -PAD
DCBATO UT
CHECK EE
follow custormer circuits.
If=0.3A
USB_ADT _D1
1 2
PR4442
PR4442
470KR2 J-L1-GP
470KR2 J-L1-GP
PC4433
PC4433
PC4435
PC4435
PC4415
PC4415
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
12
12
12
12
1 2
PC4417
PC4417
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
PG4413
PG4413
GAP-CLOSE-PWR-6-GP
GAP-CLOSE-PWR-6-GP
Change MLCC size to release spacing to EE placement
PWR_CHG_SRN_1
PR4448
PR4448
0R0402 -PAD
0R0402 -PAD
1 2
DY
DY
12
PC4422
PC4422
SC22 00P50V2KX-2GP
SC2200P50V2KX-2GP
AD+
1 2
PR4436
PR4436
Do Not Stuff
Do Not Stuff
DY
DY
PD4404
PD4404
PD4403 _A
B
AK
PQ4408
PQ4408
PD4403 _K
MMBT3906 -4-GP
MMBT3906 -4-GP
84.T3906.A11
84.T3906.A11
2nd = 84.03906.P11
2nd = 84.03906.P11
1 2
PR4451
PR4451
680KR2 F-GP
680KR2 F-GP
USB_ADT
TypeC
TypeC
PD4409
PD4409
K A
RB751V -40-2-GP
RB751V -40-2-GP
If=0.3A
PD4411
PD4411
K A
RB751V -40-2-GP
RB751V -40-2-GP
If=0.3A
AD+
DCBATO UT
DY
DY
12
RF request 2016/01/12 modify
BT+
SC10U25V5KX-GP
SC10U25V5KX-GP
12
PC4416
PC4416
SCD1U50V3KX-GP
SCD1U50V3KX-GP
BT+
12
12
PC4419
PC4419
PC4418
PC4418
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SC10U 25V5KX-GP
SC10U25V5KX-GP
PR4431
100KR2J-1-GP
PR4431
100KR2J-1-GP
1 2
PQ4408_E
E
C
PR4462
PR4462
PQ4408 _C PQ440 5_5
1 2
0R0402 -PAD
0R0402 -PAD
1 2
PR4463
PR4463
Do Not Stuff
Do Not Stuff
H_PROCHO T# [4,24,46]
PR4455
PR4455
84.2N702.A3F
84.2N702.A3F
0R0402 -PAD
0R0402 -PAD
2nd = 84.DM601.03F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
4th = 84.2N702.F3F
1 2
PQ4405
PQ4405
PQ4405 _3
3 4
PQ4405 _2
2
5
1
1 2
DY
DY
6
2N7002K DW-GP
2N7002K DW-GP
PWR_CHG_ACOK
10KR2F -2-GP
10KR2F -2-GP
3D3V_S 5
PR4450
PR4450
EC4425
EC4425
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
PC4438
SC1U10V2KX-1GP
PC4438
SC1U10V2KX-1GP
12
PQ4405_6
1 2
PR4413
PR4413
100KR2 F-L1-GP
100KR2 F-L1-GP
1 2
<Core Des ign>
<Core Des ign>
<Core Des ign>
Title
Title
Title
Size Document Numb er Rev
Size Document Numb er Rev
Size Document Numb er Rev
D
D
D
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
21F, 88, S ec.1, Hsin Tai W u Rd., Hsichih,
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Taipei Hsien 22 1, Taiwan, R.O.C.
Charger
Charger
Charger
Starload SKL-U
Starload SKL-U
Starload SKL-U
A00
A00
A00
44 106 Thursday, February 2 5, 2016
44 106 Thursday, February 2 5, 2016
44 106 Thursday, February 2 5, 2016
Page 45
5
SSID = PWR.Plane.Regulator_5V
DCBATOUT PWR_DCBATOUT_5V
PG4501
PG4501
Do Not Stuff
Do Not Stuff
D D
C C
1 2
PG4502
PG4502
Do Not Stuff
Do Not Stuff
1 2
PG4503
PG4503
Do Not Stuff
Do Not Stuff
1 2
PG4504
PG4504
Do Not Stuff
Do Not Stuff
1 2
PG4505
PG4505
Do Not Stuff
Do Not Stuff
1 2
PG4506
PG4506
Do Not Stuff
Do Not Stuff
1 2
EN rating 25V
EN Rising Threshold : 0.8V
Ilimt : 8A
12
PC4524
PC4524
SC2D2U10V3KX-1GP
SC2D2U10V3KX-1GP
DCBATOUT
3V_5V_EN [40]
PWR_DC BATOUT_5V
1 2
PC4522
PC4522
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PWR_5V_EN 1
PR4511
PR4511
1KR2F-3-GP
1KR2F-3-GP
1 2
1 2
PC4523
PC4523
DY
DY
DY
DY
4
3D3V_AUX_S5
1 2
PR4503
PR4503
Do Not Stuff
Do Not Stuff
DY
DY
PR4504
PR4530
PR4530
DY
DY
Do Not Stuff
Do Not Stuff
1 2
1 2
PC4505
PC4505
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
1 2
12
PC4531
PC4531
Do Not Stuff
Do Not Stuff
PWR_5V_EN
DY
DY
DY
DY
12
1 2
PC4530
PC4530
PR4512
PR4512
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PWR_5V_EN 1_R PWR_5V_EN 1
1 2
PR4515
PR4515
0R0402-PAD
0R0402-PAD
1 2
PC4519
PC4519
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
PWR_5V_PG
PWR_5V_VC C
PR4513
PR4513
1MR2J-1-GP
1MR2J-1-GP
PR4504
1 2
0R0402-PAD
0R0402-PAD
PR4516
PR4516
PWR_3D3V _EN1
1 2
0R0402-PAD
0R0402-PAD
PU4502
PU4502
2
IN#2
3
IN#3
4
IN#4
5
IN#5
10
NC#10
16
NC#16
SY8288CRAC-GP
SY8288CRAC-GP
17
VCC
12
EN1
11
EN2
GND7GND8GND
18
LX#19
LX#20
21
PG
BS
LX#6
OUT
FF
LDO
GND
PWR_5V_PG
9
1
PWR_5V_PH
6
19
20
Trace used 10 mil
PWR_5V_VO UT
14
PWR_5V_F B
13
PWR_5V_LD O
15
SC4D7U25V5KX- GP
SC4D7U25V5KX- GP
PC4520
PC4520
5V_AUX_S5
PR4502
PR4502
1 2
0R0603-PAD
0R0603-PAD
PC4526
PC4526
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
1 2
DY
DY
1 2
PR4510
PR4510
100KR2J-1-GP
100KR2J-1-GP
1 2
3
3V_5V_POK
PG4529
PG4529
1 2
PWR_5V_BO OT_A PWR_5V_BO OT
PWR_5V_F B_A
PG4528
PG4528
Do Not Stuff
Do Not Stuff
1 2
PWR_5V_F B
1 2
PR4551
PR4551
348KR2F-GP
348KR2F-GP
Do Not Stuff
Do Not Stuff
[17,40,52,54]
PC4521
PC4521
SCD1U25V2KX- GP
SCD1U25V2KX- GP
1 2
PR4507
PR4507
1KR2F-3-GP
1KR2F-3-GP
1 2
MagLayer. 6.86 x 6.47 x 3.0mm
DCR: 14~15mOhm
Idc : 9A , Isat : 18A
PL4502
PL4502
1 2
IND-1UH-94- GP-U
IND-1UH-94- GP-U
PG4527
PG4527
Do Not Stuff
Do Not Stuff
1 2
5V_AUX_S5
2
PWR_5V 5V_S5
PG4507
PG4507
Do Not Stuff
Do Not Stuff
1 2
PG4508
PG4508
Do Not Stuff
Do Not Stuff
1 2
PG4509
PG4509
Do Not Stuff
Do Not Stuff
1 2
PG4510
PG4510
Do Not Stuff
Do Not Stuff
1 2
PG4511
Design Current=7A
10.5A<OCP>12.6A
PWR_5V
1 2
1 2
PC4518
PC4518
PC4514
PC4514
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
DY
DY
1 2
1 2
PC4516
PC4516
PC4515
PC4515
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
1 2
1 2
1 2
PC4527
PC4527
PC4517
PC4517
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
1 2
PC4528
PC4528
PC4529
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC4529
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PG4511
Do Not Stuff
Do Not Stuff
1 2
PG4512
PG4512
Do Not Stuff
Do Not Stuff
1 2
PG4513
PG4513
Do Not Stuff
Do Not Stuff
1 2
PG4514
PG4514
Do Not Stuff
Do Not Stuff
1 2
1
SSID = PWR.Plane.Regulator_3D3V
Design Current=5A
7.5A<OCP>9A
PWR_3D3V
12
12
PC4510
PC4510
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC4511
PC4511
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
12
PC4525
PC4525
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DY
DY
12
PC4512
PC4512
Do Not Stuff
Do Not Stuff
B B
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
EN rating 25V
EN Rising Threshold : 0.8V
Ilimt : 8A
DCBATOUT
A A
EC4534
EC4534
1 2
DY
DY
PG4515
PG4515
Do Not Stuff
Do Not Stuff
1 2
PG4516
PG4516
Do Not Stuff
Do Not Stuff
1 2
PG4517
PG4517
Do Not Stuff
Do Not Stuff
1 2
PG4518
PG4518
Do Not Stuff
Do Not Stuff
1 2
PWR_DC BATOUT_3D3V DCBATOUT
PWR_3D3V _EN1
PWR_DC BATOUT_3D3V
12
PC4532
PC4532
Do Not Stuff
Do Not Stuff
DY
DY
3D3V_AUX_S5
3V_5V_POK [17,40,52,54]
1 2
PC4501
PC4501
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DCBATOUT
1 2
PC4502
PC4502
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
PR4505
PR4505
100KR2J-1-GP
100KR2J-1-GP
1 2
PG4531
PG4531
Do Not Stuff
Do Not Stuff
1 2
1 2
PC4503
PC4503
DY
DY
PR4509
PR4509
1KR2F-3-GP
1KR2F-3-GP
1 2
PC4506
PWR_3D3V _PH
PWR_3V_PG
PWR_3D3V _LDO
PWR_3D3V _FB2
PC4506
SCD1U25V2KX- GP
SCD1U25V2KX- GP
1 2
1 2
PC4507
PC4507
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
PR4506
PR4506
1KR2F-3-GP
1KR2F-3-GP
PG4532
PG4532
Do Not Stuff
Do Not Stuff
1 2
1 2
PL4501
PL4501
COIL-1D5UH- 43-GP
COIL-1D5UH- 43-GP
1 2
3D3V_AUX_S5
PG4530
PG4530
Do Not Stuff
Do Not Stuff
1 2
MagLayer. 6.86 x 6.47 x 3.0mm
DCR: 14~15mOhm
Idc : 9A , Isat : 18A
12
1 2
PC4509
PC4509
PC4513
PC4513
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PR4501
PR4501
PWR_3D3V _BOOT_A PWR_3D3V_B OOT
1 2
0R0603-PAD
0R0603-PAD
PU4501
PU4501
2
IN#2
3
IN#3
1 2
PC4504
PC4504
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
SC10U25V3MX-2-GP
PWR_3D3V _EN
PWR_3D3V _BOOT
PWR_3V_PG
PWR_3D3V _FB
1 2
PR4514
PR4514
1MR2J-1-GP
1MR2J-1-GP
4
5
12
11
1
9
13
14
17
SY8286BRAC-GP
SY8286BRAC-GP
PWR_3D3V _LDO
IN#4
IN#5
EN1
EN2
BS
PG
FF
OUT
LDO
LX#19
LX#20
NC#10
NC#15
NC#16
6
LX#6
19
20
10
15
16
7
GND
8
GND
18
GND
21
GND
Trace used 10 mil
DY
DY
DY
DY
12
1 2
PC4508
PC4508
PR4508
PR4508
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PWR_3D3V _VOUT
PC4533
PC4533
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
1 2
RF request 2016/01/12 modify
5
4
3
2
PWR_3D3V 3D3V_S5
PG4519
PG4519
Do Not Stuff
Do Not Stuff
1 2
PG4520
PG4520
Do Not Stuff
Do Not Stuff
1 2
PG4521
PG4521
Do Not Stuff
Do Not Stuff
1 2
PG4522
PG4522
Do Not Stuff
Do Not Stuff
1 2
PG4523
PG4523
Do Not Stuff
Do Not Stuff
1 2
PG4524
PG4524
Do Not Stuff
Do Not Stuff
1 2
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
45 106 Thursday, Feb ruary 25, 2016
45 106 Thursday, Feb ruary 25, 2016
45 106 Thursday, Feb ruary 25, 2016
A00
A00
A00
Page 46
5
4
3
2
1
Main Func = CPU_CORE
PR4611
PR4611
27K4R2F-GP
27K4R2F-GP
1 2
PC4632
PC4632
1 2
SC1KP50V2KX-1G P
PR4602
81208_AGND
P_SYS [2 4,44]
1 2
PR4601
PR4601
1KR2F-3-GP
1KR2F-3-GP
1 2
SCD01U50V2KX- 1GP
SCD01U50V2KX- 1GP
PR4602
PWR_VC CSA_COMP_R
1 2
1K5R2F-2-GP
1K5R2F-2-GP
PR4671 0R0402-PAD PR4671 0R0402-PAD
PR4615 20KR2F-L-GP PR46 15 20KR2F -L-GP
81208_AGND
PG4601
PG4601
Do Not Stuff
Do Not Stuff
PWR_VC CGT_IOUT
PWR_VC CGT_DIFFOUT
PWR_VC CGT_FB
PWR_VC CGT_COMP
PWR_VC CGT_ILIM
PWR_VC CGT_CSCOMP
PWR_VC CGT_CSSUM
PWR_VC CGT_CSREF
PWR_VCORE_VRMP
1 2
PC4629
PC4629
81208_AGND
D D
PC4603
PC4603
SC1KP50V2KX-1G P
1 2
1 2
PC4621
PC4621
SC100P50V2JN-3 GP
SC100P50V2JN-3 GP
1 2
PC4622
PC4622
SCD033U25V2KX -GP
SCD033U25V2KX -GP
1 2
PR4655
PR4655
0R0402-PAD
0R0402-PAD
SC1KP50V2KX-1G P
1 2
PR4605
PR4605
1 2
825R2F-GP
825R2F-GP
PR4608
PR4608
2K61R2F-1-GP
2K61R2F-1-GP
1 2
1 2
PR4616
PR4616
0R0402-PAD
0R0402-PAD
1 2
PC4608
PC4608
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
PC4611
PC4611
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
PR4619
PR4619
1 2
PC4612 SC2200P50V2KX-2GP PC4612 SC2200P50V2KX-2GP
PC4615
PC4615
SC470P50V2KX-3GP
SC470P50V2KX-3GP
81208_AGND
PR4640
PR4640
12K4R2F-GP
12K4R2F-GP
5V_S5
1 2
PR4642
PR4642
1KR2F-3-GP
1KR2F-3-GP
22
22
1 2
PC4630
PC4630
SCD1U25V2KX- GP
SCD1U25V2KX- GP
81208_AGND
4
1KR2F-3-GP
1KR2F-3-GP
1 2
PR4632
PR4632
1 2
26K1R2F-2-GP
26K1R2F-2-GP
1 2
PWR_VC CGT_CSP2
PWR_VC CGT_CSP1
PWR_VC CGT_TSENSE
DCBATOUT
PWR_VC CSA_VSN_R
PR4604 0R0402-PAD PR4604 0R0402-PAD
VSSSA_SENSE [7]
VCCSA_SENS E [7]
VCCGT_SEN SE [7]
C C
PWR_VC CGT_CSPA [48]
PWR_VC CGT_CSPB [48]
B B
PWR_VC CGT_CSNB [48]
PWR_VC CGT_CSNA [48]
PWR_VC CGT_CSPA [48]
PWR_VC CGT_CSPB [48]
U22 15W U23e 15W
PR4662
48K (64.48725.55L)
PR4641
Dummy
PR4640 16.9K (64.16925.6DL) 12.4K (64.12425.6DL)
PR4672
48.7K (064.48725.06DD)
PR4658
90.9K (64.90925.6DL)
PR4635 59K (64.59025.6DL) 59K (64.59025.6DL)
PR4628 110K (64.11035.6DL) 110K (64.11035.6DL)
A A
PR4643 10R (64.10R05.6DL) Dummy
PR4654 6.98K (64.69815.6DL) Dummy
PC4624 D33U (78.33322.2FL) Dummy
PR4642 1K (64.10015.6DL) Dummy
PR4602
PC4602
15n (78.15322.2FL) 15n (78.15322.2FL)
VSSGT_SENSE [7]
PR4637
PR4637
48K7R3F-1-GP
48K7R3F-1-GP
1 2
22/23e
22/23e
PR4641
PR4641
1 2
23e
23e
73K2R3F-1-GP
73K2R3F-1-GP
73.2K (64.73225.55L)
73.2K (64.73225.55L)
100K (64.10035.6DL)
100K (64.10035.6DL)
1.5K (64.15015.6DL) 1.5K (64.15015.6DL)
5
SC470P50V2KX-3GP
SC470P50V2KX-3GP
SC10P50V2JN-4G P
SC10P50V2JN-4G P
PR4634
PR4634
1 2
NTC-220K-5- GP-U
NTC-220K-5- GP-U
PR4638
PR4638
165KR2F-GP
165KR2F-GP
PWR_VCCGT_ILIM_R
1 2
1 2
PR4643 10R2F-L-GP
PR4643 10R2F-L-GP
PR4646 10R2F-L-GP PR4646 10R2F-L- GP
1 2
23e
23e
1 2
PC4626
PC4626
SCD01U50V2KX- 1GP
SCD01U50V2KX- 1GP
PR4651
PR4651
6K98R2F-GP
6K98R2F-GP
23e
23e
PR4654
PR4654
6K98R2F-GP
6K98R2F-GP
NTC-100K-1- GP-U
NTC-100K-1- GP-U
69.60028.011
69.60028.011
37D4R2F-GP
37D4R2F-GP
PR4639
PR4639
75KR2F-GP
75KR2F-GP
81208_AGND
1 2
1 2
PR4656
PR4656
PC4614
PC4614
1 2
1 2
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
PR4607 0R0402-PAD PR4607 0R0402-PAD
1 2
PWR_VC CSA_VSP_R
1 2
1 2
PWR_VC CGT_VSN_R
1 2
PR4625
PR4625
PWR_VC CGT_FB_R
1 2
PC4617
PC4617
1 2
1 2
PC4620
PC4620
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
1 2
PC4624
PC4624
SCD033U25V2KX -GP
SCD033U25V2KX -GP
PWR_VC CGT_NTC
PR4661
PR4661
12K7R2F-GP
12K7R2F-GP
1 2
PC4605
PC4605
PR4617 0R0402-PAD PR4617 0R 0402-PAD
PR4618 0R0402-PAD PR4618 0R 0402-PAD
1 2
PR4626
PR4626
1KR2F-3-GP
1KR2F-3-GP
1 2
PR4631
PR4631
4K75R2F-1-GP
4K75R2F-1-GP
PWR_VC CGT_COMP_R
1 2
PC4618
PC4618
SC2200P50V2KX-2G P
SC2200P50V2KX-2G P
1 2
23e
23e
1 2
PC4604
PC4604
1 2
SC15P50V2JN-2- GP
SC15P50V2JN-2- GP
1 2
1 2
5V_S5
SC1U10V2KX-1G P
SC1U10V2KX-1G P
PC4602
PC4602
SCD015U25V2KX -GP
SCD015U25V2KX -GP
1 2
81208_AGND
81208_AGND
PU4601
PU4601
1
IOUT_2PH
2
DIFFOUT_2PH
3
FB_2PH
4
COMP_2PH
5
ILIM_2PH
6
CSCOMP_2PH
7
CSSUM_2PH
8
CSREF_2PH
9
CSP2_2PH
10
CSP1_2PH
11
TSENSE_2PH
12
VRMP
PR4657
PR4657
2D2R2F-GP
2D2R2F-GP
1 2
PC4631
PC4631
1 2
PSYS PWR_VC CSA_VSP_RC
PWR_VCCGT_VSP
PWR_VCCGT_VSN
48
47
49
GND
VSP_2PH
VSN_2PH
VCC13ROSC_COREGT14ROSC_SAUS15PWM1_2PH16PWM2_2PH17ICCMAX_2PH18ICCMAX_1A19ICCMAX_1B20ADDR_VBOOT21PWM_1A22TSENSE_1PH23VSP_1A
PWR_VCORE_VCC_R
PWR_VCORE_ROSC_COREGT
1 2
SC1KP50V2KX-1G P
PR4613 93K1R2F-L-GP PR4613 93K1R2F-L-GP
PC4609 SC220P50V2KX- 3GP PC4609 SC220P50V2KX-3GP
PWR_VCCSA_VSN
PWR_VCCSA_VSP
PWR_VCCSA_CSP1B
PWR_VCORE_VR_RDY
PWR_VCCSA_COMP
PWR_VCORE_EN
PWR_VCCSA_ILIM
PWR_VCCSA_IOUT
46
45
44
43
42
41
40
39
38EN37
PSYS
VSP_1B
ILIM_1B
VSN_1B
CSP_1B
CSN_1B
VR_RDY
IOUT_1B
COMP_1B
PWM_1B
DRVON
ALERT#
VR_HOT#
IOUT_1A
CSP_1A
CSN_1A
ILIM_1A
COMP_1A
VSN_1A
NCP81208MNTX G-4-GP
NCP81208MNTX G-4-GP
24
PWR_VC ORE_VSP
PWR_VC ORE_TSENSE
PWR_VC ORE_ADDR_BOO T
PWR_VC CSA_ICCMAX
PWR_VC ORE_ICCMAX
1 2
PR4664
PR4664
24KR2F-GP
24KR2F-GP
PWR_VC CGT_ICCMAX
1 2
81208_AGND 81208_AGND 81208_AGND
3
PWR_VCORE_ROSC_SAUS
SCLK
SDIO
PR4659
PR4659
24KR2F-GP
24KR2F-GP
PC4607
PC4607
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
1 2
PWR_VCCSA_PWM
36
35
34
33
32
31
PWR_VC ORE_IOUT
30
PWR_VC ORE_CSP_1A
29
28
PWR_VC ORE_ILIM
27
PWR_VC ORE_COMP
26
PWR_VC ORE_VSN
25
81208_AGND
PC4606
PC4606
SCD01U50V2KX- 1GP
SCD01U50V2KX- 1GP
1 2
1 2
+VCCST_CP U
PR4621
45D3R2F-L-GP
PR4621
45D3R2F-L-GP
1 2
PR4665 49D9R2F-GP PR4665 49D9R2F-GP
1 2
PWR_VCORE_DRVON
PWR_VCORE_SCLK
22/23e
22/23e
Do Not StuffDYPR4622
Do Not Stuff
DY
PWR_VCORE_ALERT#
PR4672
PR4672
48K7R2F-2-GP
48K7R2F-2-GP
1 2
PR4622
1 2
PR4666 0R0402-PAD PR4666 0R0402-PAD
12
PR4609
PR4609
14K3R2F-GP
14K3R2F-GP
1 2
PR4612
PR4612
1 2
8K06R3F-AS-G P
8K06R3F-AS-G P
81208_AGND
100R2F-L1-GP-U
100R2F-L1-GP-U
12
PR4667 10R2F-L-GP PR4667 10R2F-L-GP
1 2
PWR_VCORE_SDIO
PWR_VC CSA_CSN_NTC
PR4623
PR4623
1 2
[50]
[47,48,50]
PC4613 SC470P50V2KX-3G P PC4613 SC470P50V2KX-3GP
PWR_VCORE_VRHOT#
1 2
PR4635
PR4635
59KR2F-GP
59KR2F-GP
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
SC1KP50V2 K X-1G P
SC1KP50V2 K X-1G P
1 2
PR4644
PR4644
422R2F-2-GP
422R2F-2-GP
PWR_VC ORE_VSP_RC
1 2
PR4649
PR4649
2K49R2F-GP
2K49R2F-GP
PR4660
PR4660
PR4658
PR4658
19K1R2F-GP
19K1R2F-GP
90K9R2F-GP
90K9R2F-GP
1 2
1 2
81208_AGND
PWR_VC CGT_PWMB [48]
PWR_VC CGT_PWMA [48]
PR4606
PR4606
NTC-100K-1- GP-U
NTC-100K-1- GP-U
69.60028.011
69.60028.011
1 2
PWR_VC CSA_CSP [50]
PR4670 0R0402-PAD PR4670 0R0402-PAD
1 2
PR4630 0R0402-PAD PR4630 0R0402-PAD
1 2
PC4610
PC4610
SCD1U25V2KX- GP
SCD1U25V2KX- GP
VR_SVID_CLK [7]
VR_SVID_ALERT# [7]
VR_SVID_DATA [7]
PR4668
PR4668
1 2
100R2F-L1-GP- U
100R2F-L1-GP- U
1 2
1 2
PR4628
PR4628
110KR2F-GP
110KR2F-GP
PC4633
PC4633
1 2
PC4623
PC4623
PWR_VC ORE_VSN_R
1 2
PR4647
PR4647
1 2
3K83R2F-GP
3K83R2F-GP
PR4663
PR4663
10KR2F-2-GP
10KR2F-2-GP
1 2
PC4634
PC4634
SCD022U25V2KX -GP
SCD022U25V2KX -GP
1 2
PC4627
PC4627
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
PWR_VC ORE_PWM [47]
81208_AGND
1 2
PWR_VC ORE_VSP_R
PWR_VC CSA_CSN [50]
+VCCST_CP U
[#543016]
1 2
PR4624
PR4624
Do Not Stuff
Do Not Stuff
DY
DY
PR4627
PR4627
1 2
8K06R3F-AS-G P
8K06R3F-AS-G P
PR4629
PR4629
1 2
14KR2F-GP
14KR2F-GP
1 2
1 2
PR4645 0R0402-PAD PR4645 0R0402-PAD
PC4625
PC4625
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
PR4648 0R0402-PAD PR4648 0R0402-PAD
PC4616
PC4616
SCD01U50V2KX- 1GP
SCD01U50V2KX- 1GP
SC1500P50V2KX-2G P
SC1500P50V2KX-2G P
1 2
1 2
1 2
PC4628
PC4628
SCD1U25V2KX- GP
SCD1U25V2KX- GP
81208_AGND
2
PWR_VC ORE_COMP_R
1 2
1 2
PR4650
PR4650
0R0402-PAD
0R0402-PAD
PC4601
PC4601
PC4619 SC15P50V2JN -2-GP P C4619 SC15P50V2JN-2- GP
1 2
3D3V_S0
1 2
DY
DY
VR_RDY
+VCCSTG
1 2
DY
DY
PWR_VC ORE_NTC
1 2
PR4652
PR4652
12K7R2F-GP
12K7R2F-GP
PR4614
PR4614
Do Not Stuff
Do Not Stuff
PR4669
PR4669
Do Not Stuff
Do Not Stuff
PWR_VC ORE_CSNNTC
PR4633
PR4633
NTC-100K-1- GP-U
NTC-100K-1- GP-U
69.60028.011
69.60028.011
1 2
1 2
AFTP4601 AFTP4601
1
VR_EN [40]
Check +VCCST_CPU or +VCCSTG
H_PROCHO T# [4,24,44]
PWR_VC ORE_CSP [47]
PWR_VC ORE_CSN [47]
VSS_SENSE [7]
VCC_SENSE [7]
PR4653
PR4653
NTC-100K-1- GP-U
NTC-100K-1- GP-U
69.60028.011
69.60028.011
1 2
81208_AGND
81208_AGND
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
Date: Sheet of
PR4636
PR4636
2K49R2F-GP
2K49R2F-GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
NCP81208MN_CPU_VCORE(1/3)
NCP81208MN_CPU_VCORE(1/3)
NCP81208MN_CPU_VCORE(1/3)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
46 106 Thursday, Feb ruary 25, 2016
46 106 Thursday, Feb ruary 25, 2016
46 106 Thursday, Feb ruary 25, 2016
A00
A00
A00
Page 47
5
4
3
2
1
Main Func = CPU_CORE
DCBATOU T
PC4710
PC4710
PC4703
PC4703
SC10U25V5KX-GP
SC10U25V5KX-GP
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
PC4701
PC4701
1 2
PC4704
PC4704
SC10U25V5KX-GP
SC10U25V5KX-GP
PR4701
PR4701
1 2
3D9R3-GP
3D9R3-GP
PWR_ VCORE_BOOT_R C
1 2
PC4702
D D
PC4702
1 2
1 2
PC4705
PC4705
SC10U25V5KX-GP
SC10U25V5KX-GP
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
5V_S5
PR4702
PR4702
2D2R2F-G P
2D2R2F-G P
SC1U10V 2KX-1GP
C C
PWR_ VCORE_PW M [46]
PWR_ VCORE_DRVON [4 6,48,50]
B B
SC1U10V 2KX-1GP
1 2
PC4707
PC4707
SC2D2U1 0V2KX-GP
SC2D2U1 0V2KX-GP
1 2
PC4708
PC4708
PR4704
PR4704
1 2
0R0402-P AD
0R0402-P AD
5V_S5
PWR_ VCORE_VCC
12
PWR_ VCORE_DISB#
PWR_ VCORE_GL
1
PU4701
PU4701
VIN25VIN26VIN27VIN28VIN29VIN
THWN
6
VCC
7
VCCD
5
CGND
4
PWM
2
DISB#
36
ZCD_EN
3
SMOD#
GL#88GL#99GL#1010GL#1111PGND19PGND20PGND21PGND22PGND23PGND24PGND
PWR_VCORE_BOOT
30
33
35
GH
BOOT
PHASED
PHASEF
VSW#12
VSW#13
VSW#14
VSW#15
VSW#16
VSW#17
VSW#18
PGND
NCP8138 2MNTXG-3-GP
NCP8138 2MNTXG-3-GP
37
31
PWR_ VCORE_PHASED
34
32
PWR_ VCORE_SW
12
13
14
15
16
17
18
Do Not Stuff
Do Not Stuff
PWR_ VCORE_CSP [46]
PWR_ VCORE_CSN [46]
PR4703
PR4703
1 2
1 2
DY
DY
PWR_ VCORE_SNUB
1 2
PC4709
PC4709
Do Not Stuff
Do Not Stuff
DY
DY
PC4706
PC4706
SCD22U2 5V3KX-GP
SCD22U2 5V3KX-GP
1 2
PG4707
PG4707
Do Not Stuff
Do Not Stuff
PL4701
PL4701
1 2
COIL-D15UH -2-GP
COIL-D15UH -2-GP
68.R1510.20A
68.R1510.20A
VCC_COR E
PT4701
PT4701
SE330U2VDM-L-GP
SE330U2VDM-L-GP
1 2
PG4708
PG4708
Do Not Stuff
Do Not Stuff
1 2
Confirm with EE:
22uF/0603 total 35pcs (DY 5 pcs)
DY
DY
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
NCP81382MN_CPU_VCORE(2/3)
NCP81382MN_CPU_VCORE(2/3)
NCP81382MN_CPU_VCORE(2/3)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
47 10 6 Thursday, February 25, 20 16
47 10 6 Thursday, February 25, 20 16
47 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 48
5
Main Func = CPU_CORE
4
DCBATOUT
3
2
1
PC4811
1 2
1 2
1 2
PC4803
PC4803
PC4804
SC10U25V5KX-GP
SC10U25V5KX-GP
PWR_VCCGT_BOOTA
35
BOOT
34
PHASED
32
PHASEF
12
VSW#12
13
VSW#13
14
VSW#14
15
VSW#15
16
VSW#16
17
VSW#17
18
VSW#18
PGND
NCP81382MNTX G-3-GP
NCP81382MNTX G-3-GP
37
31
1 2
PC4830
PC4830
23e
23e
SC10U25V5KX-GP
SC10U25V5KX-GP
1 2
34
32
12
13
14
15
16
17
18
PGND
NCP81382MNTX G-3-GP
NCP81382MNTX G-3-GP
PC4804
PR4802
PR4802
1 2
3D9R3-GP
3D9R3-GP
PWR_VC CGT_PHASEDA
PWR_VC CGT_SWA
Do Not Stuff
Do Not Stuff
PWR_VC CGT_CSPA [46]
PWR_VC CGT_CSNA [46]
1 2
23e
23e
PR4805
PR4805
23e
23e
3D9R3-GP
3D9R3-GP
PWR_VC CGT_PHASEDB
PWR_VC CGT_SWB
PR4807
PR4807
Do Not Stuff
Do Not Stuff
PWR_VC CGT_CSPB [46]
PWR_VC CGT_CSNB [46]
PC4802
1
PU4801
PU4801
VIN25VIN26VIN27VIN28VIN29VIN
THWN
VCC
VCCD
CGND
PWM
DISB#
ZCD_EN
SMOD#
GL#88GL#99GL#1010GL#1111PGND19PGND20PGND21PGND22PGND23PGND24PGND
DCBATOUT
PC4820
PC4820
1
VIN25VIN26VIN27VIN28VIN29VIN
THWN
23e
23e
GL#88GL#99GL#1010GL#1111PGND19PGND20PGND21PGND22PGND23PGND24PGND
PC4802
23e
23e
SC10U25V5KX-GP
SC10U25V5KX-GP
30
33
GH
1 2
PC4829
PC4829
SC10U25V5KX-GP
SC10U25V5KX-GP
PWR_VCCGT_BOOTB
30
33
35
GH
BOOT
PHASED
PHASEF
VSW#12
VSW#13
VSW#14
VSW#15
VSW#16
VSW#17
VSW#18
37
31
D D
5V_S5
PR4803
PR4803
2D2R2F-GP
2D2R2F-GP
PWR_VC CGT_VCCA
1 2
12
PC4808
PC4808
SC1U10V2KX-1G P
SC1U10V2KX-1G P
12
PC4807
PC4807
SC2D2U10V2KX- GP
SC2D2U10V2KX- GP
PWR_VC CGT_PWMA [46]
PWR_VC ORE_DRVON [46,47,50]
C C
B B
PC4846
PC4846
SC2D2U10V2KX- GP
SC2D2U10V2KX- GP
PWR_VC CGT_PWMB [46]
PWR_VC ORE_DRVON [46,47,50]
A A
5
5V_S5
23e
23e
12
PR4808
PR4808
1 2
0R0402-PAD
0R0402-PAD
PR4806
PR4806
2D2R2F-GP
2D2R2F-GP
23e
23e
PC4847
PC4847
SC1U10V2KX-1G P
SC1U10V2KX-1G P
PR4809
PR4809
1 2
23e
23e
0R2J-2-GP
0R2J-2-GP
5V_S5
PWR_VC CGT_DISB#_A
5V_S5
PWR_VC CGT_VCCB
1 2
12
23e
23e
PWR_VC CGT_DISB#_B
PWR_VC CGT_GL1
6
7
5
4
2
36
3
PWR_VC CGT_GL2
4
6
7
5
4
2
36
3
PU4802
PU4802
VCC
VCCD
CGND
PWM
DISB#
ZCD_EN
SMOD#
PC4805
PC4805
SC10U25V5KX-GP
SC10U25V5KX-GP
1 2
PR4804
PR4804
DY
DY
1 2
DY
DY
PC4828
PC4828
23e
23e
SC10U25V5KX-GP
SC10U25V5KX-GP
1 2
DY
DY
PWR_VC CGT_SNUB_2
1 2
PC4814
PC4814
Do Not Stuff
Do Not Stuff
DY
DY
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
PWR_VC CGT_BOOTA_RC
1 2
PC4809
PC4809
SCD22U25V3KX- GP
SCD22U25V3KX- GP
PWR_VC CGT_SNUB_1
PC4810
PC4810
Do Not Stuff
Do Not Stuff
1 2
PC4827
PC4827
SC10U25V5KX-GP
SC10U25V5KX-GP
PWR_VC CGT_BOOTB_RC
1 2
PC4845
PC4845
SCD22U25V3KX- GP
SCD22U25V3KX- GP
23e
23e
PC4806
PC4806
23e
23e
PC4811
1 2
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PL4801
PL4801
1 2
COIL-D15UH- 2-GP
COIL-D15UH- 2-GP
68.R1510.20A
68.R1510.20A
PG4808
PG4808
Do Not Stuff
Do Not Stuff
1 2
PC4812
PC4812
1 2
1 2
23e
23e
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
PL4802
PL4802
23e
23e
1 2
COIL-D15UH- 2-GP
COIL-D15UH- 2-GP
68.R1510.20A
68.R1510.20A
PG4815
PG4815
Do Not Stuff
Do Not Stuff
1 2
3
DCBATOUT
1 2
PT4805
PT4805
SE33U25VM-11-GP
SE33U25VM-11-GP
1 2
For acoustic noice
+VCCGT
PT4801 SE330U2VDM -L-GP
+VCCGT
PT4802 Do Not StuffDYPT4802 Do Not Stuff
1 2
DY
PT4801 SE330U2VDM -L-GP
PG4809
PG4809
Do Not Stuff
Do Not Stuff
1 2
PG4816
PG4816
Do Not Stuff
Do Not Stuff
1 2
PT4806
PT4806
SE33U25VM-11-GP
SE33U25VM-11-GP
Confirm with EE:
22uF/0603 total 35pcs (DY 5 pc s)
1 2
79.33719.L01
79.33719.L01
PT4803 SE330U2VDM -L-GP
PT4803 SE330U2VDM -L-GP
1 2
23e
23e
2
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
NCP81382MN_CPU_VCCGT(3/3)
NCP81382MN_CPU_VCCGT(3/3)
NCP81382MN_CPU_VCCGT(3/3)
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
1
48 106 Thursday, Feb ruary 25, 2016
48 106 Thursday, Feb ruary 25, 2016
48 106 Thursday, Feb ruary 25, 2016
A00
A00
A00
Page 49
5
D D
C C
4
3
2
1
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
NCP81210MN_CPU_VCCGTUS
NCP81210MN_CPU_VCCGTUS
NCP81210MN_CPU_VCCGTUS
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
1
A00
A00
49 106 Thursday, Feb ruary 18, 2016
49 106 Thursday, Feb ruary 18, 2016
49 106 Thursday, Feb ruary 18, 2016
A00
Page 50
5
4
3
2
1
Main Func = CPU_CORE
DCBATOU T DCBAT OUT_+VCCSA
PG5023
PG5023
D D
C C
PWR_ VCCSA_PW M [46]
PWR_ VCORE_DRVON [4 6,47,48]
B B
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5024
PG5024
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
5V_S5
PC5001
PC5001
SC2D2U1 0V3KX-1GP
SC2D2U1 0V3KX-1GP
DCBATOU T_+VCCSA
PC5002
PC5027
PC5029
PC5029
1 2
PR5013
PR5013
1 2
2D2R3-1-U -GP
2D2R3-1-U -GP
PU5001
PWR_VCCSA_BST
12
PU5001
1
BST
2
PWM
3
EN
VCC4DRVL
NCP8125 3MNTBG-1-GP
NCP8125 3MNTBG-1-GP
074.81253.0AE3
074.81253.0AE3
PWR_ VCCSA_BST_RC
8
DRVH
7
SW
6
GND
5
9
GND
SIS412DN-T 1-GE3-GP
SIS412DN-T 1-GE3-GP
1 2
PC5008
PC5008
SCD22U2 5V3KX-GP
SCD22U2 5V3KX-GP
PWR_ VCCSA_DRVH
PWR_ VCCSA_SW
SIS412DN-T 1-GE3-GP
SIS412DN-T 1-GE3-GP
PWR_ VCCSA_DRVL
PU5002
PU5002
PU5003
PU5003
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
1 2
PR5014
PR5014
2D2R5F-2 -GP
678
DDD
DDD
SSS
G D
SSS
G D
123
4 5
2D2R5F-2 -GP
DY
DY
PWR_VCCSA_SNUB
1 2
PC5031
PC5031
SC2200P 50V2KX-2GP
SC2200P 50V2KX-2GP
DY
DY
PC5027
1 2
SC10U25V5KX-GP
SC10U25V5KX-GP
PC5002
12
SCD1U25V2KX-GP
SC10U25V5KX-GP
SC10U25V5KX-GP
SCD1U25V2KX-GP
#544669 Intel C RB Rev0.53
+VCCSA(ICCMAX.= 6A)
PWR_ +VCCSA +VCCSA
1 2
PG5021
PG5021
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PL5001
PL5001
1 2
COIL-D47UH -6-GP
COIL-D47UH -6-GP
PWR_ +VCCSA
PG5022
PG5022
1 2
GAP-CLOSE-PWR-3-GP
GAP-CLOSE-PWR-3-GP
PG5026
PG5026
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5025
PG5025
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5028
PG5028
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5027
PG5027
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5030
PG5030
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5029
PG5029
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PG5031
PG5031
1 2
GAP-CLOS E-PWR
GAP-CLOS E-PWR
PWR_ VCCSA_CSP [46]
PWR_ VCCSA_CSN [46]
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
Confirm with EE:
22uF/0603 total 13pcs (DY 5 pcs)
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
VCCSA
VCCSA
VCCSA
A3
A3
A3
Starload SKL-U
Starload SKL-U
Starload SKL-U
A00
A00
50 10 6 Thursday, February 25, 20 16
50 10 6 Thursday, February 25, 20 16
50 10 6 Thursday, February 25, 20 16
1
A00
Page 51
5
SSID = PWR.Plane.Regulator_1p2v
4
3
2
1
1D2V_PWR
Do Not Stuff
PC5105
PC5105
1D2V_PWR
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PC5104
PC5104
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
1 2
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
DCBATOUT
Do Not Stuff
D D
1D2V_VTT_PW RGD [40]
C C
PWR_2D5V _PG [54]
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PR5107 0R0402-PAD PR 5107 0R0402-P AD
1 2
1 2
PR5105
PR5105
OCP setting
High
Float
Low
12A
8A
6A
PWR_DC BATOUT_1D2V
PG5110
PG5110
1 2
PG5104
PG5104
1 2
PG5101
PG5101
1 2
PG5107
PG5107
1 2
PG5103
PG5103
1 2
PG5108
PG5108
1 2
PWR_1D2V _EN
0R0402-PAD
0R0402-PAD
PWR_1D2V _PGOOD
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PC5138
PC5138
PWR_DC BATOUT_1D2V
PC5106
PC5106
PC5108
PC5108
1 2
1 2
Do Not Stuff
Do Not Stuff
DY
DY
PR5106
PR5106
1 2
Do Not Stuff
Do Not Stuff
SC10U25V5KX-GP
SC10U25V5KX-GP
DY
DY
PC5107
PC5107
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
PWR_1D2V _IMAX
SY8288RAC for 1D2V
12
PWR_1D2V_LDO_P5
PC5113
PC5113
SC2D2U10V3KX- 1GP
SC2D2U10V3KX- 1GP
PWR_1D2V _BOOT PWR_1D2V _BOOT_R PWR_1D2V_BOOT_R
PWR_1D2V _PHASE
6
LX#6
19
LX#19
20
LX#20
PWR_1D2V _PGOOD
10
NC#10
12
NC#12
PWR_1D2V _LDO_P5
16
NC#16
7
GND
8
GND
18
GND
21
GND
1 2
PR5102
PR5102
0R0402-PAD
0R0402-PAD
3D3V_S0
PWR_1D2V _BOOT
PWR_1D2V_VFB
17
2
3
4
5
1
9
11
13
14
15
PWR_1D2V _BYP
PU5101
PU5101
VCC
IN#2
IN#3
IN#4
IN#5
BS
PG
EN
ILMT
FB
BYP
SY8288RAC-GP
SY8288RAC-GP
1 2
PC5110
PC5110
SC1U10V2KX-1G P
SC1U10V2KX-1G P
0R0603-PAD
0R0603-PAD
PR5101
PR5101
1 2
PC5117
PC5117
SCD1U25V2KX- GP
SCD1U25V2KX- GP
1 2
PL5101
PL5101
1 2
COIL-1UH-73- GP
COIL-1UH-73- GP
PR5103
PR5103
10KR2F-2-GP
10KR2F-2-GP
PR5104
PR5104
10KR2F-2-GP
10KR2F-2-GP
1 2
PWR_1D2V _VFB_R
1 2
1 2
R1
Vo=0.6x(1+R1/R2)
=0.6x(1+100/100)
=1.2V
1 2
R2
Do Not Stuff
Do Not Stuff
PG5113
PG5113
PC5112
PC5112
SC330P50V2KX-3GP
SC330P50V2KX-3GP
Design Current=7A
10.5A<OCP>12.6A
1 2
PC5103
PC5103
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
PG5102
PG5102
1 2
PG5111
PG5111
1 2
Part Reference = P G5106
Part Reference = P G5106
1 2
PG5112
PG5112
1 2
PG5109
PG5109
1 2
PG5114
PG5114
1 2
1 2
PC5101
PC5101
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
1D2V_S3
PC5102
PC5102
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
PWR_0D6V _S3EN
PWR_0D6V _VCNTL
1 2
DDR_VREF _S3
12
PC5111
PC5111
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
PC5116
PC5116
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
1 2
1 2
PC5119
PC5119
PC5120
PC5120
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
DY
DY
DY
DY
2014.03.28 EE modify
SC10U6D3V3MX- GP
SC10U6D3V3MX- GP
PU5102
PU5102
6
VTTREF
7
S3
8
GND
9
S5
10
VCNTL
APL5338XAI-TRG-G P
APL5338XAI-TRG-G P
74.05338.079
74.05338.079
2nd source:
74.02997.B79
11
GND
VTTSEN
PGND
VREF
1D2V_PWR
PC5115
PC5115
5
4
3
VTT
2
VIN
1
3
1 2
1 2
PC5118
PC5118
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
0D6V_PWR
12
PC5114
PC5114
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
Peak Current = 1470mA
0D6V_PWR
Do Not Stuff
Do Not Stuff
Do Not Stuff
Do Not Stuff
PG5121
PG5121
1 2
PG5120
PG5120
1 2
0D6V_S0
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
51 106 Thursday, Feb ruary 25, 2016
51 106 Thursday, Feb ruary 25, 2016
51 106 Thursday, Feb ruary 25, 2016
A00
B B
PR5126 0R2J-2-GP
PR5126 0R2J-2-GP
1 2
DY
PR5125
PR5125
DY
1 2
PR5114
PR5114
0R0402-PAD
0R0402-PAD
1 2
0R0402-PAD
0R0402-PAD
5V_S5
4
PWR_0D6V _S5EN
PR5118
PR5118
0R0402-PAD
0R0402-PAD
SIO_SLP_S3# [17,24,27,40,54]
SM_PGCNTL_R [5]
PWR_2D5V _PG [54]
A A
5
Page 52
5
4
3
2
1
SSID = PWR.Plane.Regulator_1D0V
PG5211
PG5211
Do Not Stuff
Do Not Stuff
PG5204
PG5204
Do Not Stuff
Do Not Stuff
PG5216
PG5216
Do Not Stuff
Do Not Stuff
PG5201
PG5201
Do Not Stuff
Do Not Stuff
PG5208
PG5208
Do Not Stuff
Do Not Stuff
PG5215
PG5215
Do Not Stuff
Do Not Stuff
PG5209
PG5209
Do Not Stuff
Do Not Stuff
PG5213
PG5213
Do Not Stuff
Do Not Stuff
PG5206
PG5206
Do Not Stuff
Do Not Stuff
PG5207
PG5207
Do Not Stuff
Do Not Stuff
1D0V_S5
1D0V_PW R
1 2
PWR_ DCBATOUT_1D0 V
PG5214
PG5214
Do Not Stuff
Do Not Stuff
1 2
PG5210
PG5210
Do Not Stuff
Do Not Stuff
1 2
PG5212
PG5212
Do Not Stuff
Do Not Stuff
1 2
PR5201 88K7R2 F-GP PR5201 88K7R 2F-GP
1 2
PWR_ 1D0V_PG
PWR_ 1D0V_EN
PWR_ 1D0V_PFM
1 2
PR5203
PR5203
100KR2F-L1-GP
100KR2F-L1-GP
PWR_ 1D0V_PG
PWR_ 1D0V_EN
1 2
PWR_ 1D0V_TON
PWR_ 1D0V_SS
PC5213
PC5213
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
PC5215
PC5215
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
3D3V_S5
1 2
DY
DY
PU5201
PU5201
21
VCC
7
IN#7
8
IN#8
9
IN#9
6
TON
1
PGOOD
2
EN
3
PFM#
22
SS
AOZ2262 QI-10-GP-U
AOZ2262 QI-10-GP-U
074.02262.0043
074.02262.0043
PR5208
PR5208
100KR2J -1-GP
100KR2J -1-GP
LX#18
LX#17
LX#16
LX#11
LX#10
BST
AGND
PGND
PGND
PGND
PGND
PGND
FB
18
17
16
11
10
20
5
4
19
14
13
12
15
PWR_ 1D0V_PH
PWR_ 1D0V_BT
PWR_ 1D0V_FB
AOZ2262 for 1D0V
MAG. 7*7*3
DCR: 9m~10mOhm
Idc : 11 A , Isat : 22A
PL5201
PL5201
IND-1UH-94-GP -U
IND-1UH-94-GP -U
1 2
PC5204 SCD1U25V2 KX-GP PC52 04 SCD1U25V2 KX-GP
1 2
GAP-CLOS E-PWR-6-GP
GAP-CLOS E-PWR-6-GP
PG5223
PG5223
PR5202
PR5202
2K55R2F -GP
2K55R2F -GP
PR5204
PR5204
10KR2F-2 -GP
10KR2F-2 -GP
1 2
PWR_ 1D0V_FB_A
1 2
1 2
R1
1 2
R2
PC5212
PC5212
Vo=0.8x(1+R1/R2)
=0.8x(1+2.55/10)
=1.004V
1 2
1 2
1 2
1 2
1 2
1 2
Design Current : 9A
11.25A<OCP>13.5A
1D0V_PW R
PC5205
PC5205
PC5201
PC5203
PC5203
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
SC220P50V2KX-3GP
SC220P50V2KX-3GP
PC5201
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
1 2
PC5206
PC5206
1 2
DY
DY
PC5208
PC5208
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SC22U6D3V3MX-1-GP
SC22U6D3V3MX-1-GP
1 2
DY
DY
1 2
1 2
1 2
5V_S5
1 2
1 2
PR5209
PR5209
0R0402-P AD
0R0402-P AD
PR5207
PR5207
0R2J-2-GP
0R2J-2-GP
PR5210
PR5210
0R2J-2-GP
0R2J-2-GP
DCBATOU T
PC5202
PC5202
SC1U10V 2KX-1GP
SC1U10V 2KX-1GP
PC5211 SC10U25V5KX-GPDYPC5211 SC10U25V5KX-GP
1 2
DY
1 2
1 2
DS3
DS3
1 2
NON DS3
NON DS3
D D
C C
PWR_ DCBATOUT_1D0 V
PC5209 SC10U25V5KX-GP PC5209 SC10U25V5KX-GP
PC5216 SC10U25V5KX-GPDYPC5216 SC10U25V5KX-GP
PC5214 SCD1U50V3KX-GP PC5214 SCD1U50V3KX-GP
1 2
1 2
PC5210 SC10U25V5KX-GP PC5210 SC10U25V5KX-GP
1 2
DY
B B
1D0V_S5 _PWRGD [40 ]
SIO_SLP_S US# [1 7,54]
3V_5V_P OK [17 ,40,45,54]
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
52 10 6 Thursday, February 25, 20 16
52 10 6 Thursday, February 25, 20 16
52 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 53
A
4 4
3 3
B
C
D
E
2 2
<Core Design>
<Core Design>
1 1
A
B
C
D
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
53 10 6 Thursday, February 18, 20 16
53 10 6 Thursday, February 18, 20 16
53 10 6 Thursday, February 18, 20 16
E
A00
A00
A00
Page 54
5
Main Func = 1D5V
4
3
2
1
APL5930 for 2D5V
D D
PWR_ 2D5V_PG [51 ]
SIO_SLP_S 4# [17,24 ,40]
C C
3D3V_S5
1 2
PR5410
PR5410
10KR2F-2 -GP
10KR2F-2 -GP
PR5417 0R0402-P AD PR5417 0R0402-PA D
1 2
PWR_ 2D5V_EN PW R_2D5V_FB
1 2
PR5409
PR5409
5V_S5
PC5410
SC1U10V2KX-1GP
PC5410
SC1U10V2KX-1GP
1 2
PU5403
PU5403
6
VCNTL
7
POK
8
EN
9
SCD1U16V2KX-3GP
47KR2J-2-GP
47KR2J-2-GP
SCD1U16V2KX-3GP
1 2
PC5427
PC5427
VIN#9
APL5930 KAI-TRG-GP
APL5930 KAI-TRG-GP
74.05930.03D
74.05930.03D
2ND = 74.G9731.03D
2ND = 74.G9731.03D
Vout=0.8V*(R1+R2)/R2
VIN#5
VOUT#4
VOUT#3
GND
3D3V_S5
PC5414
PC5414
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
5
4
3
2
FB
1
PR5419
PR5419
R1
R2
PWR_ 2D5V 2D5V_S3
PG5408
PG5408
1 2
Do Not Stuff
Do Not Stuff
PG5409
PG5409
1 2
Do Not Stuff
Do Not Stuff
Design current = 700mA
PWR_ 2D5V
29K4R2F-GP
29K4R2F-GP
1 2
1 2
PC5411
PC5411
SC68P50V2JN-1GP
SC68P50V2JN-1GP
PR5420
PR5420
13K7R2F -GP
13K7R2F -GP
DY
DY
1 2
1 2
PC5413
PC5413
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
DY
DY
1 2
PC5412
PC5412
SC22U6D3V5MX-2GP
SC22U6D3V5MX-2GP
3D3V_S5
PR5405
SIO_SLP_S 3# [17,24,27,40,5 1]
PR5405
0R0402-P AD
0R0402-P AD
1 2
PWR_ 1D5V_EN
S-1339D15-M5001 for 1D5V_S0
PC5408
SC1U10V2KX-1GP
PC5408
SC1U10V2KX-1GP
1 2
Design Current = 16mA
PU5402
PU5402
1
VIN
2
PC5407
PC5407
1 2
DY
DY
Do Not Stuff
Do Not Stuff
VOUT
VSS
ON/OFF3NC#4
S-1339D1 5-M5001-GP
S-1339D1 5-M5001-GP
74.01339.B3F
74.01339.B3F
1D5V_PW R
5
4
1 2
PG5404
PG5404
1 2
Do Not Stuff
Do Not Stuff
PC5409
SC1U10V2KX-1GP
PC5409
SC1U10V2KX-1GP
1D5V_S0
APL5930 for 1D8V_S5
5V_S5 3D3V_S5
SC1U10V2KX-1GP
B B
Do Not Stuff
Do Not Stuff
PH at Page40
PR5408
PR5408
1D8V_S5 _PWROK [40]
3V_5V_P OK [17 ,40,45,52]
SIO_SLP_S US# [1 7,52]
A A
1 2
0R0402-P AD
0R0402-P AD
PR5406
PR5406
1 2
NON DS3
NON DS3
0R2J-2-GP
0R2J-2-GP
[#544669 Rev0.5 3]
PR5407
PR5407
1 2
DS3
DS3
0R2J-2-GP
0R2J-2-GP
PR5402
PR5402
3D3V_S5
1 2
DY
DY
PR5401
PR5401
Do Not Stuff
Do Not Stuff
SC1U10V2KX-1GP
PWR_ 1D8V_POK
PWR_ 1D8V_EN
1 2
DY
DY
PC5406
PC5406
PC5401
PC5401
1 2
1 2
DY
DY
Do Not Stuff
Do Not Stuff
PU5401
PU5401
VCNTL
POK
EN
VIN#9
VIN#5
VOUT#4
VOUT#3
GND
FB
6
7
8
9
APL5930 KAI-TRG-GP
APL5930 KAI-TRG-GP
74.05930.03D
74.05930.03D
2ND = 74.G9731.03D
2ND = 74.G9731.03D
PC5403
PC5403
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
1 2
5
4
3
2
1
Design Current = 770mA
1D8V_PW R
PC5405
PR5403
PR5403
PC5405
1 2
SC68P50V2JN-1GP
16K5R2F-2-GP
16K5R2F-2-GP
SC68P50V2JN-1GP
R1
1.8V_RUN_FB
1 2
PR5404
PR5404
13K3R2F -L1-GP
13K3R2F -L1-GP
R2
DY
DY
1 2
1 2
DY
DY
PC5404
PC5404
Do Not Stuff
Do Not Stuff
1 2
PC5402
PC5402
SC10U6D3V5KX-1GP
SC10U6D3V5KX-1GP
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
1 2
Do Not Stuff
Do Not Stuff
Vout=0.8V*(R1+R2)/R2
5
4
3
2
PG5405
PG5405
PG5406
PG5406
PG5407
PG5407
+V1.8A 1D8V_PW R
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
54 10 6 Thursday, February 25, 20 16
54 10 6 Thursday, February 25, 20 16
54 10 6 Thursday, February 25, 20 16
1
A00
A00
A00
Page 55
Main Func = LCD
5
4
3
2
1
Hi:2.0V
Hi:2.0V
Hi:2.0V Hi:2.0V
Lo:0.8V
Lo:0.8V
Panel Conn.
LCD1
LCD1
43
44
IPEX-CON40-3- GP
IPEX-CON40-3- GP
20.F1407.040
20.F1407.040
41
1
2
3
4
5
6
7
8
9
10
11
EDP_AUX
12
EDP_AUX#
13
14
EDP_TX3#
15
EDP_TX3
16
17
EDP_TX2#
18
EDP_TX2
19
20
EDP_TX1#
21
EDP_TX1
22
23
EDP_TX0#
24
EDP_TX0
25
26
EDP_HPD_C ONN
27
28
LCD_TST_C
29
LCD_BRIGHTN ESS
30
BLON_OUT_C
31
DBC_EN_R
32
33
34
35
36
37
38
39
40
42
D D
C C
DCBATOUT _LCD
C5510 SCD 1U16V2KX-3GP C 5510 SCD1U 16V2KX-3GP
1 2
C5511 SCD 1U16V2KX-3GP C 5511 SCD1U 16V2KX-3GP
1 2
C5532 SCD 1U16V2KX-3GP
C5532 SCD 1U16V2KX-3GP
1 2
C5531 SCD 1U16V2KX-3GP
C5531 SCD 1U16V2KX-3GP
1 2
C5533 SCD 1U16V2KX-3GP
C5533 SCD 1U16V2KX-3GP
1 2
C5519 SCD 1U16V2KX-3GP
C5519 SCD 1U16V2KX-3GP
1 2
C5501 SCD 1U16V2KX-3GP C 5501 SCD1U 16V2KX-3GP
1 2
C5504 SCD 1U16V2KX-3GP C 5504 SCD1U 16V2KX-3GP
1 2
C5506 SCD 1U16V2KX-3GP C 5506 SCD1U 16V2KX-3GP
1 2
C5509 SCD 1U16V2KX-3GP C 5509 SCD1U 16V2KX-3GP
1 2
R5503
R5503
1 2
0R0402-PAD
0R0402-PAD
X02 0414
MIC_GND
LCDVDD
R5501
R5501
1 2
0R0402-PAD
0R0402-PAD
Backup , 20141114
EDP_AUX_DP [8]
EDP_AUX_DN [8]
BBY
BBY
EDP_TX3_DN [8]
BBY
BBY
EDP_TX3_DP [8]
BBY
BBY
EDP_TX2_DN [8]
BBY
BBY
EDP_TX2_DP [8]
EDP_TX1_DN [8]
EDP_TX1_DP [8]
EDP_TX0_DN [8]
EDP_TX0_DP [8]
DBC_PANEL_E N [20]
EDP_VDD_EN [8 ]
LCD_TST_EN [24]
R5504,R5505 merge to RN5503
2015/10/06 modify
Power Pin Count : 7
GND Pin Count : 9
HSYNC
1
2
3
4 5
Remove HSYNC schematic
201511276
B B
USB_CAMERA_ N
TCBD1
TCBD1
33
NP1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
JAE-CON32- 2-GP-U
JAE-CON32- 2-GP-U
20.K0801.032
20.K0801.032
20
21
22
23
24
25
26
27
28
29
30
31
32
NP2
34
IR_CAMERA_DET #_R
A A
DMIC_CLK_C
DMIC_DATA_C
USB_PP6_TPNL
USB_PN6_TPNL
5
DCBATOUT _CAMERA
3D3V_SEN_S0
USB_CAMERA_ P
USB_CAMERA_ N
MIC_GND
1 2
0R0402-PAD
0R0402-PAD
TPAN_VDD
3D3V_CAMERA_ S0
SENSOR_I2C_SD A [20,69,70]
SENSOR_I2C_SC L [20,69,70]
GSEN_INT1 [20,69]
GSEN_INT2 [20,69]
GYRO_INT [70]
GYRO_DRDY [20,69]
R5540
R5540
TOUCH_PAN EL_INTR# [4,24]
DCBATOUT _CAMERA
SCD1U50V3KX- GP
SCD1U50V3KX- GP
IR_CAMERA_DET # [20]
IR CAMERA Power
1 2
C5534
1 2
C5534
SC1KP50V2KX-1G P
SC1KP50V2KX-1G P
C5542
C5542
R5520
R5520
0R3J-0-U-G P
0R3J-0-U-G P
1 2
DCBATOUT
4
USB_CAMERA_ P
USB_PN6_TPNL
USB_PP6_TPNL
D5501
D5501
1
2
BAT54C-7-F- 3-GP
BAT54C-7-F- 3-GP
75.00054.E7D
75.00054.E7D
BKLT_CTRL
DMIC_CLK_C
DMIC_DATA_C
SRN33J-5-G P-U
SRN33J-5-G P-U
LCD_TST_C
BLON_OUT_C
EDP_HPD_C ONN
RN5502
RN5502
LVDS_VDD_EN _R
8
EDP_HPD
7
BLON_OUT_C
6
BKLT_CTRL
SRN100KJ-5-G P
SRN100KJ-5-G P
R5510 0R0603-PAD R5510 0R0603-PAD
1 2
R5511 0R0603-PAD R5511 0R0603-PAD
3
R5502
R5502
0R2J-2-GP
0R2J-2-GP
1 2
DY
DY
D5502
D5502
3
BAT54C-7-F- 3-GP
BAT54C-7-F- 3-GP
75.00054.E7D
75.00054.E7D
RN5503
RN5503
1
2 3
RN5501
RN5501
1
2
3
4 5
SRN100J-4-G P
SRN100J-4-G P
R5506
R5506
1 2
100R2J-2-GP
100R2J-2-GP
DLP11SN900HL2L- GP
DLP11SN900HL2L- GP
3 4
TR5501
TR5501
1 2
1 2
C5507
C5507
LVDS_VDD_EN _R
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
1
2
4
8
7
6
BKLT_CTRL LCD_ BRIGHTNESS
DY
DY
1 2
3
LCDVDD
C5508
C5508
SC1U10V2KX-1GP
SC1U10V2KX-1GP
1 2
LCD_TST
EC5503
EC5503
12
SC22P50V2JN-4GP
SC22P50V2JN-4GP
1 2
EC5501
EC5501
SC6D8P50V2DN -GP
SC6D8P50V2DN -GP
1 2
C5505
C5505
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
Add 0ohm , 20141118
DMIC_CLK [27]
DMIC_DATA [27]
EC5504
EC5504
12
SC22P50V2JN-4GP
SC22P50V2JN-4GP
LCD_TST [24]
PANEL_BKEN_EC [24]
EDP_HPD [8]
LCD_BRIGHTN ESS
USB_CPU_PN 4 [1 6]
USB_CPU_PP4 [16 ]
USB_CPU_PN 6 [1 6]
USB_CPU_PP6 [16 ]
L_BKLT_CTRL [8 ]
EMI DVT1 0210
Lo:0.8V Lo:0.8V
LCDVDD Layout 80 mil
U5501
U5501
1
EN
2
GND
3
VOUT
RT9724GB-GP
RT9724GB-GP
74.09724.09F
74.09724.09F
2ND = 74.03514.07F
2ND = 74.03514.07F
VIN#5
VIN#4
3D3V_S0
5
4
1 2
C5502
C5502
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
2
CAMERA POWER
Add 0603 0ohm , 20141118
R5513 0R3J-0-U-GP
R5513 0R3J-0-U-GP
1 2
DY
DY
F5502
F5502
1 2
POLYSW-D5A 6V-1-GP
POLYSW-D5A 6V-1-GP
69.50007.921
69.50007.921
INVERTER POWER
Add 1206 0ohm , 20141118
R5514
R5514
1 2
DY
DY
0R6J-L-GP
0R6J-L-GP
F5503
F5503
1 2
POLYSW-1D1 A24V-GP-U
POLYSW-1D1 A24V-GP-U
69.50007.A31
69.50007.A31
2nd = 69.50007.D31
2nd = 69.50007.D31
SENSOR POWER
R5516 0R3J-0-U-GP
R5516 0R3J-0-U-GP
1 2
Add 0603 0ohm , 20141118
F5504
F5504
1 2
POLYSW-1D1 A6V-9-GP-U
POLYSW-1D1 A6V-9-GP-U
69.48001.081
69.48001.081
C5512
C5512
Starload height limite change to 0603 package
2015/09/24 modify
DY
DY
SC33P50V2JN-3G P
SC33P50V2JN-3G P
TOUCH PANEL POWER
5V_S0 TPAN_VDD
DVT2 03/24
69.50007.A31
69.50007.A31
2nd = 69.50007.D31
2nd = 69.50007.D31
3rd = 69.50007.A41
3rd = 69.50007.A41
F5501
F5501
POLYSW-1D1 A24V-GP-U
POLYSW-1D1 A24V-GP-U
1 2
R5507
R5507
1 2
0R3J-0-U-G P
0R3J-0-U-G P
DY
DY
Starload height limite change to 0603 package
2015/09/30 modify
<Core Desig n>
<Core Desig n>
<Core Desig n>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
3D3V_CAMERA_ S0 3D3V_S0
EC5502
EC5502
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1 2
1 2
C5503
C5503
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
C5514
C5514
1 2
1 2
C5513
C5513
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
3D3V_SEN_S0 3D3V_S0
1 2
1 2
C5515
C5515
DY
DY
SC4D7U6D3V 3KX-GP
SC4D7U6D3V 3KX-GP
1 2
1 2
C5517
C5517
SCD1U50V3KX-GP
SCD1U50V3KX-GP
SC4D7U6D3V3KX-GP
SC4D7U6D3V3KX-GP
LCD&CAM&DMC&Touch
LCD&CAM&DMC&Touch
LCD&CAM&DMC&Touch
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
EC5505
EC5505
A2
A2
A2
1 2
SCD1U50V3KX-GP
SCD1U50V3KX-GP
C5516
C5516
DCBATOUT _LCD DCBATOUT
C5518
C5518
SC2D2U35V3KX-GP
SC2D2U35V3KX-GP
SC2D2U35V3KX-GP
SC2D2U35V3KX-GP
1 2
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
55 106 Thursday, Feb ruary 25, 2016
55 106 Thursday, Feb ruary 25, 2016
55 106 Thursday, Feb ruary 25, 2016
A00
A00
A00
Page 56
5
D D
C C
4
3
2
1
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
CRT
CRT
CRT
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
56 106 Thursday, Feb ruary 18, 2016
56 106 Thursday, Feb ruary 18, 2016
56 106 Thursday, Feb ruary 18, 2016
A00
Page 57
5
4
3
3D3V_S0
2
1
Main Func = HDMI
C5701
C5701
C5703
C5703
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
HDMI_DATA 2#_R
HDMI_DATA 2_R
HDMI_DATA 1#_R
HDMI_DATA 1_R
HDMI_DATA 0#_R
HDMI_DATA 0_R
HDMI_CLK_ R
HDMI_CLK# _R
HPD_HDM I_CON
1 2
1 2
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
U5701
U5701
11
VDD33
37
VDD33
12
VDDRX
40
VDDRX
20
VDDTX
31
VDDTX
19
VDDTA
6
IN_D0P
7
IN_D0N
4
IN_D1P
5
IN_D1N
1
IN_D2P
2
IN_D2N
9
IN_CKP
10
IN_CKN
38
SCL_SRC
39
SDA_SRC
3
HPD_SRC
28
HPD_SNK
18
REXT
REXT
1 2
PS8407A TQFN40GTR2-A1 -GP
PS8407A TQFN40GTR2-A1 -GP
R5710
R5710
4K3R2J-G P
4K3R2J-G P
3D3V_S0
3D3V_S0
Remove DUMMY-HDMI , 20141118
5V_HDMI_S 5
1 2
C5713
C5713
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
071.08407.0003
071.08407.0003
OUT_D0P
OUT_D0N
OUT_D1P
OUT_D1N
OUT_D2P
OUT_D2N
OUT_CKP
OUT_CKN
I2C_CTL_EN
EQ/I2C_ADDR0
CFG/I2C_ADDR1
DCIN_EN/SCL_CTL
DDCBUF/SDA_CTL
SCL_SNK
SDA_SNK
HDMMI
HDMMI
HDMI_DATA 2_R_C
HDMI_DATA 2#_R_C
HDMI_DATA 1_R_C
HDMI_DATA 1#_R_C
HDMI_DATA 0_R_C
HDMI_DATA 0#_R_C
HDMI_CLK_ R_C
HDMI_CLK# _R_C
DDC_CLK _HDMI
DDC_DAT A_HDMI
HPD_HDM I_CON
PRE
ISET
PD#
GND
GND
GND
HDMI_DATA 2#_R_C
25
HDMI_DATA 2_R_C
24
HDMI_DATA 1#_R_C
27
HDMI_DATA 1_R_C
26
HDMI_DATA 0#_R_C
30
HDMI_DATA 0_R_C
29
HDMI_CLK_ R_C
22
HDMI_CLK# _R_C
21
8
EQ
17
CFG
23
PRE
16
ISET
34
36
DCIN_EN
13
DDCBUF
14
DDC_CLK _HDMI
32
DDC_DAT A_HDMI
33
15
35
41
HDMI1
HDMI1
22
20
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
21
23
SKT-HDMI23 -91-GP-U
SKT-HDMI23 -91-GP-U
22.10296.961
22.10296.961
HDMI CONN
C5714 SCD1U16V2KX-3 GP C5714 SCD1U16V2K X-3GP
HDMI_CLK# [8]
HDMI_CLK [8 ]
D D
HDMI_DATA 2 [8]
HDMI_DATA 2# [8]
HDMI_DATA 1# [8]
HDMI_DATA 1 [8]
HDMI_DATA 0 [8]
HDMI_DATA 0# [8]
HDMI_CLK_ R_C HDMI_DATA 1_R_C
180R2J-1 -GP
180R2J-1 -GP
R5705
R5705
1 2
HDMI_CLK# _R_C
C C
change to 180 for HDMI signal quality 2016/01/05
1 2
C5709 SCD1U16V2KX-3 GP C5709 SCD1U16V2K X-3GP
1 2
C5707 SCD1U16V2KX-3 GP C5707 SCD1U16V2K X-3GP
1 2
C5710 SCD1U16V2KX-3 GP C5710 SCD1U16V2K X-3GP
1 2
C5715 SCD1U16V2KX-3 GP C5715 SCD1U16V2K X-3GP
1 2
C5712 SCD1U16V2KX-3 GP C5712 SCD1U16V2K X-3GP
1 2
C5711 SCD1U16V2KX-3 GP C5711 SCD1U16V2K X-3GP
1 2
C5708 SCD1U16V2KX-3 GP C5708 SCD1U16V2K X-3GP
1 2
HDMI_DATA 2#_R_C
180R2J-1 -GP
180R2J-1 -GP
R5702
R5702
1 2
HDMI_DATA 2_R_C
HDMI_DATA 0#_R_C
180R2J-1 -GP
180R2J-1 -GP
R5703
R5703
1 2
HDMI_DATA 0_R_C
HDMI_CLK# _R
HDMI_CLK_ R
HDMI_DATA 2_R
HDMI_DATA 2#_R
HDMI_DATA 1#_R
HDMI_DATA 1_R
HDMI_DATA 0_R
HDMI_DATA 0#_R
1 2
R5704
R5704
180R2J-1 -GP
180R2J-1 -GP
HDMI_DATA 1#_R_C
Change symbol p art number, be cause origin sy mbol is DELL O BS part
5V_S5
20150116 2037
5V_S0
3
D5701
D5701
BAW5 6-9-GP
BAW5 6-9-GP
75.00056.07D
75.00056.07D
1
2
DDC_DATA_PH2
DDC_CLK_PH1
1 2
1 2
R5706
R5707
B B
R5707
2K2R2J-2 -GP
2K2R2J-2 -GP
R5706
2K2R2J-2 -GP
2K2R2J-2 -GP
DDC_DAT A_HDMI
DDC_CLK _HDMI
5V_S0
R5715 0R 0603-PAD R5715 0R 0603-PAD
1 2
1 2
DY
DY
R5716 0R3 J-0-U-GP
X01 0227
R5716 0R3 J-0-U-GP
For DIODE in ca se of leakage from HDMI1
EQ
ISET
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
R5411
R5411
DY
DY
R5412
R5412
DY
DY
R5413
R5413
DY
DY
R5414
R5414
DY
DY
1 2
1 2
1 2
1 2
5V_HDMI_R _S5 5V_HDMI_S5
3D3V_S0
3D3V_S0
F5701
F5701
POLYSW -1D1A6V-9-GP-U
POLYSW -1D1A6V-9-GP-U
1 2
69.48001.081
69.48001.081
2nd = 69.50011.081
2nd = 69.50011.081
PRE
DDCBUF
1D5V_S0 1D5V_VD D
R5701 0R 0603-PAD R5701 0R 0603-PAD
1 2
Exchange 0603 0ohm , 20141118
1D5V_VD D
1 2
1 2
C5702
C5702
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
3D3V_S0
3D3V_S0
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
R5415
R5415
DY
DY
R5416
R5416
DY
DY
R5417
R5417
R5418
R5418
DY
DY
1 2
C5706
C5706
1 2
1 2
1 2
1 2
1 2
C5704
C5704
1 2
C5705
C5705
C5716
C5716
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
CPU_DP1 _CTRL_CLK [8]
CPU_DP1 _CTRL_DATA [8]
CPU_DP1 _HPD [8]
Change to 4.3k 20150402
Vendor suggest, Dummy for floating
20141117
R5419
DCIN_EN
CFG
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
4K7R2J-2 -GP
R5419
DY
DY
R5420
R5420
260mA
X01 0214
A A
HDMI_EC_D ET# [24]
R5723
R5723
1 2
0R0402-P AD
0R0402-P AD
HDMI_EC_D ET#_C
Remove DUMMY-HDMI , 20141118
5
R5721
R5721
10KR2J-3 -GP
10KR2J-3 -GP
3D3V_S5
1 2
D
4th = 84.2N702.W31
4th = 84.2N702.W31
3rd = 84.07002.I31
3rd = 84.07002.I31
2ND = 84.2N702.031
2ND = 84.2N702.031
84.2N702.J31
84.2N702.J31
2N7002K -2-GP
2N7002K -2-GP
Q5704
Q5704
HPD_HDM I_CON_C HPD_H DMI_CON
G
S
4
R5722
R5722
1 2
0R0402-P AD
0R0402-P AD
Remove DUMMY-HDMI , 20141118
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
HDMI
HDMI
HDMI
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Date: Sheet of
Date: Sheet of
3
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
57 10 6
57 10 6
57 10 6
1
A00
A00
A00
Page 58
5
D D
4
3
2
1
C C
B B
A A
(Blanking)
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
58 10 6 Thursday, February 18, 20 16
58 10 6 Thursday, February 18, 20 16
58 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 59
5
D D
4
3
2
1
C C
B B
A A
(Blanking)
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
(Reserved)
(Reserved)
(Reserved)
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
59 10 6 Thursday, February 18, 20 16
59 10 6 Thursday, February 18, 20 16
59 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 60
5
4
3
2
1
Main Func = HDD
HDD_DEVSL P_R
R6002
R6002
HDD_DEVSL P [16]
SATA HDD Connector
HDD1
HDD1
FFS_INT2_Q_R
R6001
R6007
R6007
0R2J-2-GP
0R2J-2-GP
DY
DY
DY
DY
C6008
C6008
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
R6001
1 2
0R0402-PAD
0R0402-PAD
5V_HDD_SIP
HDD
HDD
1 2
1 2
HDD
HDD
1 2
HDD
HDD
1 2
HDD
HDD
1 2
DY
DY
HDD_DEVSL P_R
SATA_TXP0_R
C6001 SCD01U50V2KX- 1GP
C6001 SCD01U50V2KX- 1GP
SATA_TXN0_R
C6003 SCD01U50V2KX- 1GP
C6003 SCD01U50V2KX- 1GP
SATA_RXN0_R
C6006 SCD01U50V2KX- 1GP
C6006 SCD01U50V2KX- 1GP
SATA_RXP0_R
C6005 SCD01U50V2KX- 1GP
C6005 SCD01U50V2KX- 1GP
5V_S0 5V_HDD 5V_HDD_SIP
1 2
C6009
C6009
DY
DY
1
2
SC1U6D3V2KX-GP
SC1U6D3V2KX-GP
3
E E
SATA_TX_CPU _P0 [16]
SATA_TX_CPU _N0 [16]
SATA_RX_CPU _N0 [16]
SATA_RX_CPU _P0 [16]
D D
HDD_EN_PC H [18]
SIO_SLP_S0# [17,24]
FFS_INT2_Q [70]
1 2
1 2
R6005
R6005
0R2J-2-GP
0R2J-2-GP
21 22
1
NP1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
HDD
HDD
16
17
18
19
20
NP2
23 24
FOX-CON20 -1-GP-U1
FOX-CON20 -1-GP-U1
20.F1546.020
20.F1546.020
R6006 0R 0603-PAD R6006 0R0603-PAD
1 2
U6002
U6002
VIN#1
VOUT#8
VIN#2
VOUT#7
ON
CT
VBIAS4GND
DY
DY
GND
TPS22965DSGR- GP-U
TPS22965DSGR- GP-U
74.22965.093
74.22965.093
Reserved for M15 EE Implementation.
SC2D2U10V2KX- GP
SC2D2U10V2KX- GP
R6003 0R0603-PAD R6003 0R0603-PAD
1 2
8
7
HDD_CT H DD_EN
6
5
9
C6007
SCD1U 16V2KX-3GPDYC6007
SCD1U16V2KX-3GP
1 2
1 2
DY
DY
C6010
SCD1U16V2KX-3GPDYC6010
SCD1U16V2KX-3GP
Add HDD power switch schematic (reserve) by Win10 feature ,DV T1 20150204
1 2
0R0402-PAD
0R0402-PAD
1A
5V_HDD_SIP
1 2
1 2
C6004
C6004
HDD
HDD
C6002
C6002
HDD
HDD
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
Close to HDD1
Modify at 20150922
SATA_TXN0_R
SATA_RXN0_R
SATA_RXP0_R
Layout Note:
Place near HDD1
U6001
U6001
1
2
3
4
5
AZ1045-04F-R7 G-GP
AZ1045-04F-R7 G-GP
75.01045.073
75.01045.073
Swap based on the swap report.
LINE_1
LINE_2
GND
LINE_3
LINE_4
10
NC#10
9
NC#9
8
DY
DY
GND
7
NC#7
6
NC#6
SATA_TXP0_R SATA_TXP0_R
SATA_TXN0_R
SATA_RXN0_R
SATA_RXP0_R
C C
Main Func = ODD
B B
A A
5
4
3
2
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
SATA IF_HDD/ODD
SATA IF_HDD/ODD
SATA IF_HDD/ODD
60 106
60 106
1
60 106
A00
A00
A00
Page 61
5
4
3
2
1
Main Func = WLAN
D D
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
NGFF_WLAN CONN
NGFF_WLAN CONN
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
Date: Sheet of
Date: Sheet of
Date: Sheet of
NGFF_WLAN CONN
A3
A3
A3
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
61 10 6 Thursday, February 18, 20 16
61 10 6 Thursday, February 18, 20 16
61 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 62
A
4 4
B
C
D
E
(Blanking)
3 3
2 2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
1 1
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
A
B
C
Date: Sheet of
D
Starload SKL-U
Starload SKL-U
Starload SKL-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
62 106 Thursday, February 18, 2016
62 106 Thursday, February 18, 2016
62 106 Thursday, February 18, 2016
E
A00
A00
A00
Page 63
5
4
3
2
1
SSD M.2
SSD M.2 CONN
3D3V_SS D
D D
3D3V_S0 3D3V_SSD
R6302 0R0603-P AD R6302 0R0603-P AD
1 2
R6307 0R0603-P AD R6307 0R0603-P AD
1 2
C C
3D3V_SS D
MSATA_D EVSLP_R
SSD_PED ET
SC33P50V2JN-3GP
SC33P50V2JN-3GP
1
1
1
C6305
C6305
1 2
SSD
SSD
AFTP630 4 A FTP6304
AFTP630 1 A FTP6301
AFTP630 3 A FTP6303
C6304
SC33P50V2JN-3GP
C6304
SC33P50V2JN-3GP
C6306
SCD047U25V2KX-GP
C6306
1 2
SSD
SSD
SCD047U25V2KX-GP
12
SSD
SSD
C6308
SCD047U25V2KX-GP
C6308
SCD047U25V2KX-GP
12
SSD
SSD
3D3V_SS D
SSD
SSD
1 2
R6303
R6303
DY
DY
10KR2J-3 -GP
10KR2J-3 -GP
MSATA_D EVSLP
1 2
R6304
R6304
DY
DY
10KR2J-3 -GP
10KR2J-3 -GP
C6307
C6307
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
MSATA_D EVSLP_R
R6301
R6301
MSATA_D EVSLP [16]
1 2
0R0402-P AD
0R0402-P AD
3D3V_SS D
3D3V_SS D
SSD1
SSD1
NP2
NP2
76
76
74
3_3VAUX
72
3_3VAUX
70
3_3VAUX
68
SUSCLK_32KHZ
58
NC#58
56
NC#56
54
PEWAKE#/NC#54
52
CLKREQ#/NC#52
50
PERST#/NC#50
48
NC#48
46
NC#46
44
NC#44
42
NC#42
40
NC#40
38
DEVSLP
36
NC#36
34
NC#34
32
NC#32
30
NC#30
28
NC#28
26
NC#26
24
NC#24
22
NC#22
20
NC#20
18
3_3VAUX
16
3_3VAUX
14
3_3VAUX
12
3_3VAUX
10
DAS/DSS#
8
NC#8
6
NC#6
4
3_3VAUX
2
3_3VAUX
SKT-MINI67P-15 -GP
SKT-MINI67P-15 -GP
062.10003.0481
062.10003.0481
PEDET(OC_PCIE/GND_SATA)
PERP0/SATA_A+
PERN0/SATA_A-
PETP0/SATA_B-
PETN0/SATA_B+
SSD
SSD
NGFF_KEY_M 75P
NGFF_KEY_M 75P
NP1
GND
GND
GND
NC#67
GND
REFCLKP
REFCLKN
GND
GND
GND
PERP1
PERN1
GND
PETP1
PETN1
GND
PERP2
PERN2
GND
PETN2
PETP2
GND
PERP3
PERN3
GND
PETN3
PETP3
GND
GND
NP1
77
77
75
73
71
69
67
57
55
53
51
49
47
45
43
41
39
37
35
33
31
29
27
25
23
21
19
17
15
13
11
9
7
5
3
1
SSD_PED ET
SATA_TX _CPU_P1_C
SATA_TX _CPU_N1_C
SATA_RX _CPU_N1_C
SATA_RX _CPU_P1_C
R6305
R6305
1 2
0R0402-P AD
0R0402-P AD
C6302 SC D22U10V2KX-1G P
C6302 SC D22U10V2KX-1G P
1 2
C6303 SC D22U10V2KX-1G P
C6303 SC D22U10V2KX-1G P
1 2
C6309 SC D22U10V2KX-1G P
C6309 SC D22U10V2KX-1G P
1 2
C6301 SC D22U10V2KX-1G P
C6301 SC D22U10V2KX-1G P
1 2
SSD
SSD
SSD
SSD
SSD
SSD
SSD
SSD
SATA_TX _CPU_P1 [16]
SATA_TX _CPU_N1 [16]
SATA_RX _CPU_N1 [16]
SATA_RX _CPU_P1 [1 6]
ED6301
ED6301
SATA_TX _CPU_P1_C
B B
A A
5
4
SATA_TX _CPU_N1_C
SATA_RX _CPU_N1_C
SATA_RX _CPU_P1_C
3
1
2
3 8
SSD
SSD
4
5 6
L05ESDL 5V0NA-4-GP
L05ESDL 5V0NA-4-GP
075.00550.0071
075.00550.0071
10
9
7
SATA_TX _CPU_P1_C
SATA_TX _CPU_N1_C
SATA_RX _CPU_N1_C
SATA_RX _CPU_P1_C
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
A00
A00
63 10 6 Thursday, February 25, 20 16
63 10 6 Thursday, February 25, 20 16
63 10 6 Thursday, February 25, 20 16
A00
Page 64
5
Main Func = Power BTN
4
3
2
1
D D
(AMBER_LED)Battery LED1
Low actived from KBC GPIO
5V_S5
Q6402
Q6402
R2
R2
R6403
R6403
CHG_AMB ER_LED# [24]
C C
BATT_W HITE_LED# [24]
1 2
0R0402-P AD
0R0402-P AD
R6404
R6404
1 2
0R0402-P AD
0R0402-P AD
CHG_AMB ER_LED_R#
BATT_W HITE_LED_R#
B
B
Battery LED2
E
R1
R1
RN2418-G P
RN2418-G P
084.02418.0011
084.02418.0011
Q6401
Q6401
R2
R2
R1
R1
RN2418-G P
RN2418-G P
084.02418.0011
084.02418.0011
C
E
C
AMBER_L ED_BAT
5V_S5
WHITE_ LED_BAT
(WHITE_LED)
1 2
EC6401
EC6401
DY
DY
SC220P5 0V2KX-3GP
SC220P5 0V2KX-3GP
1 2
EC6402
EC6402
DY
DY
SC220P5 0V2KX-3GP
SC220P5 0V2KX-3GP
R6401
R6401
1 2
499R2F-2 -GP
499R2F-2 -GP
R6402
R6402
330R2J-3 -GP
330R2J-3 -GP
BAT_AMB ER [65]
1 2
ED6401
ED6401
PESD5V0 S1BB-GP-U
PESD5V0 S1BB-GP-U
DY
DY
1 2
1 2
ED6402
ED6402
PESD5V0 S1BB-GP-U
PESD5V0 S1BB-GP-U
DY
DY
BAT_W HITE [65]
AMBER
WHITE
Low actived from KBC GPIO
B B
SATA LED
Q6105
Q6105
SATA_AC T# [16]
SATA_LE D# [24,43 ]
3D3V_S0
A A
5
R6120
R6120
1 2
HWHDLED
HWHDLED
10KR2J-3 -GP
10KR2J-3 -GP
SATA_LE D#
4
S
G
HWHDLED
HWHDLED
2N7002K -2-GP
2N7002K -2-GP
84.2N702.J31
84.2N702.J31
2ND = 084.27002.0A31
2ND = 084.27002.0A31
3rd = 84.07002.I31
3rd = 84.07002.I31
D
BATT_W HITE_LED_R#
Add SATA LED solution by customer request 2016/02/03
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Taipei Hsien 221, Taiwan, R.O.C.
LED Board&Power Button
LED Board&Power Button
LED Board&Power Button
64 10 6
64 10 6
64 10 6
1
A00
A00
A00
Page 65
5
4
3
2
1
Main Func = TPAD Main Func = KB
Keyboard
KBBD1
D D
C C
KSI[0..7] [24]
KSO[0..16] [24]
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
F6501
F6501
1 2
POLYSW-D5A 6V-1-GP
POLYSW-D5A 6V-1-GP
KBBL
KBBL
1 2
DY
DY
R6501 0R3J-0-U-GP
R6501 0R3J-0-U-GP
CAP_LED
TP_VDD
C6503
C6503
1 2
69.50007.921
69.50007.921
AFTP6538 AFTP6538
AFTP6523 AFTP6523
AFTP6522 AFTP6522
AFTP6504 AFTP6504
AFTP6521 AFTP6521
AFTP6520 AFTP6520
AFTP6524 AFTP6524
AFTP6539 AFTP6539
AFTP6519 AFTP6519
AFTP6507 AFTP6507
AFTP6513 AFTP6513
AFTP6511 AFTP6511
AFTP6518 AFTP6518
AFTP6516 AFTP6516
AFTP6517 AFTP6517
AFTP6515 AFTP6515
AFTP6514 AFTP6514
AFTP6510 AFTP6510
AFTP6512 AFTP6512
AFTP6509 AFTP6509
AFTP6501 AFTP6501
AFTP6506 AFTP6506
AFTP6508 AFTP6508
AFTP6505 AFTP6505
AFTP6503 AFTP6503
AFTP6502 AFTP6502
+5V_KB_BL
BAT_AMBER [64]
BAT_WHITE [64]
KB_DET# [20]
INT_TP# [4,24]
PTP_DIS# [24]
1 2
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
C6501
C6501
1
KBBL
KBBL
CAP_LED
KSO10
1
KSO11
1
KSO9
1
KSO14
1
KSO13
1
KSO15
1
KSO16
1
KSO12
1
KSO0
1
KSO2
1
KSO1
1
KSO3
1
KSO8
1
KSO6
1
KSO7
1
KSO4
1
KSO5
1
1
1
1
1
1
1
1
1
+5V_KB_BL 5V_S0
KSI0
KSI3
KSI1
KSI5
KSI2
KSI4
KSI6
KSI7
KB_BL_CTRL#
KB_LED_DET_C
I2C0_SDA_R
I2C0_SCL_R
TPDATA_C
TPCLK_C
KB Backlight Power Consumption: 285mA max.
KB_BL_CTRL#
KBBD1
45
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
46
STAR-CON 44-GP
STAR-CON 44-GP
20.K0809.044
20.K0809.044
PS2
I2C
3D3V_S5
TP_WAKE
TP_WAKE
C6502
C6502
TP_ON#_GATE
TP_VDD
1
2 3
RN6501
RN6501
SRN10KJ-5-G P
SRN10KJ-5-G P
4
1 2
DY
DY
1 2
EC6502
SC33P50V2JN-3GPDYEC6502
SC33P50V2JN-3GP
1 2
DY
DY
SCD1U16V2KX- 3GP
SCD1U16V2KX- 3GP
TP_WAKE
TP_WAKE
1 2
TP_EN# [24]
I2C0_SCL_TCH_P AD [20]
I2C0_SDA_TCH_ PAD [20]
R6504
R6504
20KR2F-L-GP
20KR2F-L-GP
CLK_TP_SIO [24]
DAT_TP_SIO [24]
EC6501
EC6501
SC33P50V2JN-3G P
SC33P50V2JN-3G P
3D3V_S0 TP_VDD
TP_WAKE
TP_WAKE
Q6502
Q6502
DMP2130L-7-GP
DMP2130L-7-GP
D
D
D
G
G
84.02130.031
84.02130.031
G
2ND = 84.03413.A31
2ND = 84.03413.A31
EC6504
SC33P50V2JN-3GPDYEC6504
SC33P50V2JN-3GP
EC6503
SC33P50V2JN-3GPDYEC6503
SC33P50V2JN-3GP
1 2
DY
Q6502_D
RN6502
RN6502
SRN33J-5-G P-U
SRN33J-5-G P-U
2 3
1
1 2
NON TP _WAKE
NON TP _WAKE
1 2
NON TP_WAKE
NON TP_WAKE
S
1 2
NON TP_WAKE
NON TP_WAKE
R6502
R6502
1 2
0R3J-0-U-G P
0R3J-0-U-G P
R6514
R6514
1 2
TP_WAKE
TP_WAKE
0R3J-0-U-G P
0R3J-0-U-G P
Add 0ohm , 20141118
TPCLK_C
TPDATA_C
4
I2C0_SCL_R
R6505 0R2J-2-GP
R6505 0R2J-2-GP
I2C0_SDA_R
R6506 0R2J-2-GP
R6506 0R2J-2-GP
TP_VDD Discharge Circuit
TP_VDD
1 2
R6503
R6503
TP_WAKE
TP_WAKE
100R3J-4-GP
Q6503
TP_ON#_GATE
GPIO_TPAD: TBD
(Touch pad wake# for S3 wake u p @ PCH GPIO??)
Q6503
G
TP_WAKE
TP_WAKE
S
2N7002K-2-GP
2N7002K-2-GP
84.2N702.J31
84.2N702.J31
2ND = 84.2N702.031
2ND = 84.2N702.031
3rd = 84.07002.I31
3rd = 84.07002.I31
4th = 84.2N702.W31
4th = 84.2N702.W31
D
100R3J-4-GP
Q6205_Q
D S
Q6501
Q6501
P8503BMG-GP
P8503BMG-GP
G
84.P8503.031
1
1
84.P8503.031
2nd = 84.03404.C31
2nd = 84.03404.C31
KBBL
KBBL
AFTP6529 AFTP6529
AFTP6530 AFTP6530
BKLGT_PWM [24]
B B
CAP LED Control
LOW actived from KBC GPIO
1 2
R6509
R6509
DY
DY
100KR2J-1-GP
100KR2J-1-GP
+5V_KB_BL
KB_BL_CTRL#
X02 0414
R6512
R6512
CAP_LED#_R [24]
A A
1 2
0R0402-PAD
0R0402-PAD
5
CAP_LED_R#
Q6505
Q6505
R2
R2
B
R1
R1
RN2418-GP
RN2418-GP
084.02418.0011
084.02418.0011
KB_LED_BL_DET _R [19]
5V_S5
E
C
R6513 1KR2J-1-GP R6513 1KR2J-1- GP
KBBL
KBBL
1 2
R6507
R6507
1 2
KBBL
KBBL
1 2
51KR2J-1-GP
51KR2J-1-GP
R6508
R6508
100KR2J-1-GP
100KR2J-1-GP
KB_LED_DET_C
1 2
C6504
C6504
DY
DY
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
I2C0_SCL_TCH_P AD
84.2N702.A3F
84.2N702.A3F
2nd = 84.2N702.E3F
2nd = 84.2N702.E3F
3rd = 75.00601.07C
3rd = 75.00601.07C
4th = 84.DMN66.03F
4th = 84.DMN66.03F
I2C0_SDA_TCH_ PAD
CAP_LED CAP_LED_Q
4
Q6204_G
3
5V_S0
1 2
Q6504
Q6504
2N7002KDW -GP
2N7002KDW -GP
1
2
TP_WAKE
TP_WAKE
3 4
A00 0609
R6510
R6510
0R0402-PAD
0R0402-PAD
6
5
TP_VDD
1
TP_WAKE
TP_WAKE
4
I2C0_SCL_R
I2C0_SDA_R
2 3
RN6503
RN6503
SRN2K2J-1-G P
SRN2K2J-1-G P
Need to check if it is Active High or Active Low
and check if there is PH on TP AD side.
X02 0415
TP_VDD
1 2
R6511
R6511
10KR2J-3-GP
10KR2J-3-GP
INT_TP#
2
Pin number
1
2
3
4
5
6
7
8
TP_VDD
TPCLK_C
TPDATA_C
I2C0_SCL_R
I2C0_SDA_R
INT_TP#
PTP_DIS#
Change pindefine DVT1 0210 1330
Pin name
VDD
DAT(I2C)
CLK(I2C)
GND
ATTN
GPIO
DAT(PS2)
CLK(PS2)
AFTP6531 AFTP6531
1
AFTP6532 AFTP6532
1
AFTP6533 AFTP6533
1
AFTP6534 AFTP6534
1
AFTP6535 AFTP6535
1
AFTP6536 AFTP6536
1
AFTP6537 AFTP6537
1
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Key Board&Touch Pad
Key Board&Touch Pad
Key Board&Touch Pad
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
65 106
65 106
65 106
A00
A00
A00
Page 66
5
4
3
2
1
Main Func = IO Connector
IOBD1
IOBD1
51
53
1
2
3
4
D D
C C
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
54
52
IPEX-CON50 -1-GP
IPEX-CON50 -1-GP
020.F0574.0050
020.F0574.0050
Cutomer remove IO board USB3.0
PCIE_RX_C PU_P5 [16]
PCIE_RX_C PU_N5 [16]
PCIE_TX_W LAN_N5 [16 ]
PCIE_TX_W LAN_P5 [16]
PEG_CLK 1_CPU# [18]
PEG_CLK 1_CPU [1 8]
USB_CPU _PN5_C
USB_CPU _PP5_C
USB_CPU _PN2_C
USB_CPU _PP2_C
USB_CPU _PN7_C
USB_CPU _PP7_C
+RTC_VC C
3D3V_S0
Card Reader
5V_S5
VOL_UP# [2 4]
VOL_DOW N# [24]
PLT_RST # [17,24,68]
CLKREQ_ PCIE#1 [18]
KBC_PW RBTN# [24 ]
WIFI_RF_ EN [15]
BLUETOO TH_EN [20]
USB_OC1 # [16 ]
USB_EN# [24,35]
USB3.0 port3
WLAN
Change choke Height just for Starload
2015/09/23 modify
COIL-90OHM -100MHZ-5-GP
USB_CPU _PP2_C
USB_CPU _PN2_C
USB_CPU _PP7_C
USB_CPU _PN7_C
USB_CPU _PN5_C
USB_CPU _PP5_C
COIL-90OHM -100MHZ-5-GP
4 3
1 2
TR6601
TR6601
COIL-90OHM -100MHZ-5-GP
COIL-90OHM -100MHZ-5-GP
4 3
1 2
TR6602
TR6602
R6605
R6605
1 2
0R0603-P AD
0R0603-P AD
R6606
R6606
1 2
0R0603-P AD
0R0603-P AD
68.00396.001
68.00396.001
2nd: = 68.01012.20B
2nd: = 68.01012.20B
EMI Reserve , 20141118
USB_CPU _PP2 [16]
USB_CPU _PN2 [16]
USB_CPU _PP7 [16]
USB_CPU _PN7 [16]
USB_CPU _PN5 [16]
USB_CPU _PP5 [16]
B B
CLKREQ_ PEG#0 [18]
dGPU_RX P_C_CPU_TXP0 [16 ]
dGPU_RX N_C_CPU_TXN0 [16]
dGPU_RX P_C_CPU_TXP1 [16 ]
dGPU_RX N_C_CPU_TXN1 [16]
GC6_FB_ EN [2 0]
OVER_CU RRENT_P8# [24]
DGPU_PW R_EN [20]
CPU_RXP _C_dGPU_TXP0 [1 6]
CPU_RXN _C_dGPU_TXN0 [16]
CPU_RXP _C_dGPU_TXP1 [1 6]
CPU_RXN _C_dGPU_TXN1 [16]
SML1_SM BCLK [18,24,26]
A A
SML1_SM BDATA [18,24,26]
5
GPU1
GPU1
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
A7
A7
A8
A8
A9
A9
A10
A10
C1
C1
C2
C2
C9
C9
C10
C10
E1
E1
E2
E2
E3
E3
E4
E4
E5
E5
E6
OPS
OPS
E6
E7
E7
E8
E8
E9
E9
E10
E10
NP1
NP1
NP2
NP2
NP3
NP3
UNI-CONN48 -6R-GP-U1
UNI-CONN48 -6R-GP-U1
020.F0581.0048
020.F0581.0048
B10
D10
F10
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
B6
B7
B7
B8
B8
B9
B9
B10
D1
D1
D2
D2
D9
D9
D10
F1
F1
F2
F2
F3
F3
F4
F4
F5
F5
F6
F6
F7
F7
F8
F8
F9
F9
F10
N1
N1
4
dGPU_RX P_C_CPU_TXP2 [1 6]
dGPU_RX N_C_CPU_TXN2 [16]
dGPU_RX P_C_CPU_TXP3 [1 6]
dGPU_RX N_C_CPU_TXN3 [16]
CLK_PCIE_ VGA [18 ]
CLK_PCIE_ VGA# [1 8]
PLT_RST # [17,24,68]
3D3V_AU X_S5
DGPU_PW ROK [24]
DGPU_HO LD_RST# [20]
CPU_RXP _C_dGPU_TXP2 [16]
CPU_RXN _C_dGPU_TXN2 [16]
CPU_RXP _C_dGPU_TXP3 [16]
CPU_RXN _C_dGPU_TXN3 [16]
GPU_EVE NT# [2 0]
3
DCBATOU T
3D3V_S0
5V_S0
GPU2
GPU2
A1
A1
A2
A2
A3
A3
A4
A4
A5
A5
A6
A6
B1
B1
B2
B2
B3
B3
B4
B4
B5
B5
B6
OPS
OPS
B6
P1
P1
P2
P2
P3
P3
P4
P4
UNI-CONN28 -6R-GP-U
UNI-CONN28 -6R-GP-U
020.F0588.0028
020.F0588.0028
NP1
NP2
NP3
C1
C1
C2
C2
C3
C3
C4
C4
C5
C5
C6
C6
D1
D1
D2
D2
D3
D3
D4
D4
D5
D5
D6
D6
N1
N1
NP1
NP2
NP3
2
KBC_PW RBTN# PLT_ RST# W IFI_RF_EN
1 2
DY
DY
EC6601
EC6601
SC33P50V2JN-3GP
SC33P50V2JN-3GP
Wistron Confidential document, Anyone can not
Duplicate, Modify, Forward or any other purpose
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
application without get Wistron permission
IO Board Connector
IO Board Connector
IO Board Connector
Starload SKL-U
Starload SKL-U
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Thursday, February 25, 20 16
Starload SKL-U
1 2
DY
DY
EC6602
EC6602
SC33P50V2JN-3GP
SC33P50V2JN-3GP
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
1
1 2
DY
DY
EC6603
EC6603
SC33P50V2JN-3GP
SC33P50V2JN-3GP
66 10 6
66 10 6
66 10 6
A00
A00
A00
Page 67
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
67 10 6 Thursday, February 18, 20 16
67 10 6 Thursday, February 18, 20 16
67 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 68
5
4
3
2
1
Main Func = Debug
D D
Debug Connector
Layout Note:
Place near trace separated point
LPC_LAD[3..0] [18,24]
LPC_LFRAME# [18,24]
PLT_RST# [17,24,66]
C C
LPC_LAD[3..0]
LPC_LAD0
LPC_LAD1
LPC_LAD2
LPC_LAD3
R6801 0R2J-2-GP
R6801 0R2J-2-GP
R6802 0R2J-2-GP
R6802 0R2J-2-GP
RN6801
RN6801
SRN0J-7-GP-U
SRN0J-7-GP-U
1
2
3
LPC
LPC
4 5
1 2
LPC
LPC
1 2
LPC
LPC
8
7
6
LPC_LAD0_C
LPC_LAD1_C
LPC_LAD2_C
LPC_LAD3_C
LPC_FRAME#_DEBUG
PLT_RST#_DEBUG
CLK_PCI_LPC [18]
20.D0075.110: Dummy Pad with solder mask is ZZ.00PAD.Y41
DB1 Optional: New one smaller LPC connector is 20.F1180.010.
3D3V_S0
DB1
DB1
11
1
2
3
4
5
6
7
8
9
10
12
PAD-10P-177042-GP
PAD-10P-177042-GP
B B
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
A A
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
5
4
3
Date: Sheet of
2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Dubug connector
Dubug connector
Dubug connector
68 106 Thursday, February 25, 2016
68 106 Thursday, February 25, 2016
68 106 Thursday, February 25, 2016
1
A00
A00
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Page 69
5
D D
3D3V_S0 3D3V_MCU
R6901
R6901
1 2
HUB
HUB
0R3J-0-U-G P
0R3J-0-U-G P
150mA
C6904
SCD01U50V2KX-1GP
C6904
C6903
C6903
C6901
SC1U10V2KX-1GP
C6901
SC1U10V2KX-1GP
1 2
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
1 2
change 0603 0ohm , 20141118
HUB
HUB
HUB
HUB
HUB
HUB
C C
R6905 0R2J-2-GP
R6905 0R2J-2-GP
1 2
HUB
USB_CPU _PN8 [16]
USB_CPU _PP8 [16]
HUB
R6906 0R2J-2-GP
R6906 0R2J-2-GP
1 2
HUB
HUB
KB_DISABL E [20,24]
HUB
HUB
R6904
R6904
1K5R2F-2 -GP
1K5R2F-2 -GP
1 2
R6920
R6920
0R2J-2-GP
0R2J-2-GP
C6905
C6905
1 2
HUB
HUB
1 2
SCD01U50V2KX-1GP
SCD01U50V2KX-1GP
HUB
HUB
HUB
HUB
4
1 2
C6906
SCD1U16V2KX-3GP
C6906
SCD1U16V2KX-3GP
C6907
SCD1U16V2KX-3GP
C6907
SCD1U16V2KX-3GP
1 2
HUB
HUB
HUB_PA1
HUB_PA2
HUB_PA3
HUB_PA4
HUB_PA5
HUB_PA6
GSEN2_INT 1_C_HUB
USBDISABL E
USB_8USB_8+
SWDIO
SWCL K
GSEN2_INT 2_C_HUB
KB_DISABL E_HUB
Sensor Hub
U6901
U6901
1
VLCD
9
24
36
48
10
11
12
13
14
15
16
17
29
30
31
32
33
34
37
38
2
3
4
HUB
HUB
VDDA
VDD_1
VDD_2
VDD_3
PA0_WKUP1
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PA8
PA9
PA10
PA11
PA12
PA13
PA14
PA15
PC13_WKUP2
PC14_OSC32_IN
PC15_OSC32_OUT
STM32L1 51CBU6TR-GP
STM32L1 51CBU6TR-GP
071.32151.000U
071.32151.000U
PH0_OSC_IN
PH1_OSC_OUT
PB10
PB11
PB12
PB13
PB14
PB15
RST#
BOOT0
VSSA
VSS_1
VSS_2
VSS_3
GND
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PB8
PB9
3
18
19
20
39
40
41
42
43
45
46
21
22
25
26
27
28
5
6
7
44
8
23
35
47
49
GSEN_INT1 _HUB
GSEN_INT2 _HUB
GYRO_INT_C_H UB
GYRO_DRDY_HU B
SENSOR_ I2C_SCL_HUB
SENSOR_ I2C_SDA_HUB
MCU_OSC I
MCU_OSC O
MCU_RST #
MCU_BOO T0
HUB
HUB
1 2
R6907
R6907
20KR2J-L 2-GP
20KR2J-L 2-GP
2
MCU_RST #
HUB
HUB
SENSOR_ I2C_SCL
SENSOR_ I2C_SDA
MCU_OSC O
C6908
C6908
SC15P50 V2JN-2-GP
SC15P50 V2JN-2-GP
GSEN_INT1 _HUB
GSEN_INT2 _HUB
GYRO_INT_C_H UB
GYRO_DRDY_HU B
GSEN2_INT 1_C_HUB
GSEN2_INT 2_C_HUB
SENSOR_ I2C_SCL_HUB
SENSOR_ I2C_SDA_HUB
1 2
1 2
C6902
C6902
SCD1U16 V2KX-3GP
SCD1U16 V2KX-3GP
X6901
X6901
HUB
HUB
1 2
HUB
HUB
4 1
XTAL-12M HZ-67-GP
XTAL-12M HZ-67-GP
82.30006.641
82.30006.641
R6921 0R2J-2-GP
R6921 0R2J-2-GP
1 2
HUB
HUB
R6922 0R2J-2-GP
R6922 0R2J-2-GP
1 2
HUB
HUB
R6923 0R2J-2-GP
R6923 0R2J-2-GP
1 2
HUB
HUB
R6924 0R2J-2-GP
R6924 0R2J-2-GP
1 2
HUB
HUB
R6925 0R2J-2-GP
R6925 0R2J-2-GP
1 2
HUB
HUB
R6926 0R2J-2-GP
R6926 0R2J-2-GP
1 2
HUB
HUB
R6928 0R2J-2-GP
R6928 0R2J-2-GP
1 2
DY
DY
R6929 0R2J-2-GP
R6929 0R2J-2-GP
1 2
DY
DY
R6902
R6902
100KR2J -1-GP
100KR2J -1-GP
HUB
HUB
RN6901
RN6901
4
DY
DY
SRN2K2J -1-GP
SRN2K2J -1-GP
2 3
1
From APU
3D3V_MC U
3D3V_MC U
1
2 3
MCU_OSC I
1 2
C6909
C6909
HUB
HUB
SC15P50 V2JN-2-GP
SC15P50 V2JN-2-GP
GSEN_INT1 [20,55]
GSEN_INT2 [20,55]
GYRO_INT_C [20,70]
GYRO_DRDY [20,55]
GSEN2_INT 1_C [20 ,70]
GSEN2_INT 2_C [20 ,70]
SENSOR_ I2C_SCL [20,55,7 0]
SENSOR_ I2C_SDA [20,55,7 0]
B B
A A
For Sensor Orientation Setting
R6908 10KR2J-3 -GP
R6908 10KR2J-3 -GP
1 2
DY
DY
R6910 10KR2J-3 -GP
R6910 10KR2J-3 -GP
1 2
DY
DY
R6912 10KR2J-3 -GP
R6912 10KR2J-3 -GP
1 2
DY
DY
R6914 10KR2J-3 -GP
R6914 10KR2J-3 -GP
1 2
HUB
HUB
R6916 10KR2J-3 -GP
R6916 10KR2J-3 -GP
1 2
HUB
HUB
R6918 10KR2J-3 -GP
R6918 10KR2J-3 -GP
1 2
DY
DY
5
R6909 10KR2J-3 -GP
R6909 10KR2J-3 -GP
1 2
HUB
HUB
R6911 10KR2J-3 -GP
R6911 10KR2J-3 -GP
1 2
HUB
HUB
R6913 10KR2J-3 -GP
R6913 10KR2J-3 -GP
1 2
HUB
HUB
R6915 10KR2J-3 -GP
R6915 10KR2J-3 -GP
1 2
DY
DY
R6917 10KR2J-3 -GP
R6917 10KR2J-3 -GP
1 2
DY
DY
R6919 10KR2J-3 -GP
R6919 10KR2J-3 -GP
1 2
HUB
HUB
HUB_PA1
HUB_PA2
HUB_PA3
HUB_PA4
HUB_PA5
HUB_PA6
4
3D3V_MC U
For MCU debug port
3D3V_MC U
SWDIO
1
SWCL K
1
1
1
TP6903 TPA D14-OP-GP TP6903 TPAD 14-OP-GP
TP6904 TPA D14-OP-GP TP6904 TPAD 14-OP-GP
TP6902 TPA D14-OP-GP TP6902 TPAD 14-OP-GP
TP6901 TPA D14-OP-GP TP6901 TPAD 14-OP-GP
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
A00
A00
69 10 6 Thursday, February 25, 20 16
69 10 6 Thursday, February 25, 20 16
69 10 6 Thursday, February 25, 20 16
A00
Page 70
Main Func = Hall Sensor
5
4
3
2
1
DY
DY
1 2
1 2
C7001
C7001
DY
DY
SCD047U16V2KX-1-GP
SCD047U16V2KX-1-GP
LID sensoe
GMR1
GMR1
1
OUT2
GND2VDD
HGDEDM013A- GP
HGDEDM013A- GP
074.00013.00BJ
074.00013.00BJ
100KR2J-1-GP
100KR2J-1-GP
OUT1
4
3
R7011
R7011
3D3V_S5
DY
DY
1 2
LID_CL_SIO# [24]
Free Fall Sensor + G Sensor
U7001
U7001
9
VDD
10
VDD_IO
1
SCL/SPC
4
SDA/SDI/SDO
3
SDO/SA0
LNG2DMTR- GP
LNG2DMTR- GP
074.LNG2D.00BZ
074.LNG2D.00BZ
1 2
1 2
1 2
1 2
GSENSOR_C S
2
CS
5
RES
GSEN2_INT1
12
INT1
GSEN2_INT2
11
INT2
6
GND
7
GND
8
GND
GSEN2_INT1
GSEN2_INT2
3D3V_GSEN2
1 2
R7006 10K R2J-3-GP R7006 10KR2J-3-GP
3D3V_S5
C7002
C7002
1 2
SCD1U16V2KX-3GP
SCD1U16V2KX-3GP
Note:
(1) Keep all signals are the s ame trace width. (included VDD , GND).
(2) No VIA under IC bottom.
GYRO_INT_C [20,69]
GYRO_INT_P11
INT2_SELECT
3D3V_S5
R7001
R7001
100KR2J-1-GP
D D
C C
3D3V_S0 3D3V_GSEN 2
R7004
R7004
1 2
0R0402-PAD
0R0402-PAD
R7005 10KR2J-3-GP
R7005 10KR2J-3-GP
3D3V_GSEN2
B B
1 2
1 2
R7007 0R0402- PAD R7007 0R0402-PAD
GSEN2_INT1_C [20,69]
GSEN2_INT2_C [20,69]
HDD_FALL_INT [18]
KB_CLOSE#_2 [24]
11uA
DY
DY
C7003
SCD1U16V2KX-3GP
C7003
SCD1U16V2KX-3GP
1 2
SENSOR_I2C_SC L_2G
SENSOR_I2C_SD A_2G
GSENSOR_SD O
GSEN2_INT1_C
GSEN2_INT2_C
INT2_SELECT
100KR2J-1-GP
C7004
near pin9
1 2
C7004
C7004
SC10U6D3V3MX-GP
SC10U6D3V3MX-GP
R7009 0R0402-PAD R7009 0R0402-PAD
R7010 0R0402-PAD R7010 0R0402-PAD
R7012 0R0402-PAD R7012 0R0402-PAD
R7013 0R0402-PAD R7013 0R0402-PAD
combine G
GYRO_INT_P11
1 2
DY
R7003
R7003
1 2
0R0402-PAD
0R0402-PAD
D7001
D7001
1
DY
DY
2
BAT54A-7-F-2 -GP
BAT54A-7-F-2 -GP
75.00054.R7D
75.00054.R7D
1 2
R7008 0R0402- PAD R7008 0R0402-PAD
R7002 0R 2J-2-GPDYR7002 0R 2J-2-GP
3
GYRO_INT [55]
FFS_INT2 [20]
Note:
- no via, trace, under the sen sor (keep out area around 2mm)
- stay away from the screw hol e or metal shield soldering jo ints
- design PCB pad based on our sensor LGA pad size (add 0.1mm )
- solder stencil opening to 90 % of the PCB pad size
- mount the sensor near the ce nter of mass of the NB as poss ible as you can
Please help to close with U6602
3D3V_S0
1 2
R7018
R7018
100KR2J-1-GP
100KR2J-1-GP
FALL_INT2
Q7001
Q7001
2N7002KDW -GP
2N7002KDW -GP
84.2N702.A3F
84.2N702.A3F
2nd = 84.DM601.03F
2nd = 84.DM601.03F
3rd = 84.2N702.E3F
3rd = 84.2N702.E3F
4th = 84.2N702.F3F
4th = 84.2N702.F3F
INT2_SELECT
123 4
5
6
FFS_INT2_Q [60]
RN7001
RN7001
SENSOR_I2C_SC L [20,55,69]
SENSOR_I2C_SD A [20,55,69]
A A
2 3
1
SRN0J-6-GP
SRN0J-6-GP
5
4
SENSOR_I2C_SC L_2G
SENSOR_I2C_SD A_2G
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Thursday, Feb ruary 25, 2016
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
70 106
70 106
70 106
A00
A00
A00
Page 71
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
RESERVED
RESERVED
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
RESERVED
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
71 10 6 Thursday, February 18, 20 16
71 10 6 Thursday, February 18, 20 16
71 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 72
5
D D
C C
4
3
2
1
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
USB3.0 PORT
USB3.0 PORT
USB3.0 PORT
72 10 6 Thursday, February 18, 20 16
72 10 6 Thursday, February 18, 20 16
72 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 73
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
73 10 6 Thursday, February 18, 20 16
73 10 6 Thursday, February 18, 20 16
73 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 74
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
74 10 6 Thursday, February 18, 20 16
74 10 6 Thursday, February 18, 20 16
74 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 75
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
75 10 6 Thursday, February 18, 20 16
75 10 6 Thursday, February 18, 20 16
75 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 76
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
GPU(1/5)PEG
GPU(1/5)PEG
GPU(1/5)PEG
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
76 106
76 106
76 106
A00
A00
A00
Page 77
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
GPU(2/5)DIGITALOUT
GPU(2/5)DIGITALOUT
GPU(2/5)DIGITALOUT
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
77 106
77 106
77 106
A00
A00
A00
Page 78
Main Func = dGPU
D D
C C
5
4
3
2
1
B B
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
GPU(3/5)VRAMI/F
GPU(3/5)VRAMI/F
GPU(3/5)VRAMI/F
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A1
A1
A1
Thursday, February 18, 2016
Thursday, February 18, 2016
Thursday, February 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
1
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Starload SKL-U
Starload SKL-U
Starload SKL-U
78 106
78 106
78 106
A00
A00
A00
Page 79
Main Func = dGPU
D D
C C
5
4
3
2
1
B B
A A
<Core Design>
<Core Design>
<Core Design>
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, February 18, 2016
Thursday, February 18, 2016
Thursday, February 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
GPU(4/5)GPIO/STRAP
GPU(4/5)GPIO/STRAP
GPU(4/5)GPIO/STRAP
Starload SKL-U
Starload SKL-U
Starload SKL-U
1
79 106
79 106
79 106
A00
A00
A00
Page 80
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
A A
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
Custom
Custom
Custom
Thursday, February 18, 2016
Thursday, February 18, 2016
Thursday, February 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
GPU(5/5)PWR/GND
GPU(5/5)PWR/GND
GPU(5/5)PWR/GND
Starload SKL-U
Starload SKL-U
Starload SKL-U
80 106
80 106
80 106
1
A00
A00
A00
Page 81
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM1,2 (1/4)
GPU-VRAM1,2 (1/4)
GPU-VRAM1,2 (1/4)
Starload SKL-U
Starload SKL-U
Starload SKL-U
81 10 6
81 10 6
81 10 6
1
A00
A00
A00
Page 82
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM3,4 (2/4)
GPU-VRAM3,4 (2/4)
GPU-VRAM3,4 (2/4)
Starload SKL-U
Starload SKL-U
Starload SKL-U
82 10 6
82 10 6
82 10 6
1
A00
A00
A00
Page 83
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Date: Sheet of
Date: Sheet of
Date: Sheet of
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
GPU-VRAM5,6 (3/4)
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
83 10 6
83 10 6
83 10 6
1
A00
A00
A00
Page 84
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsien 221, Taiwan, R.O.C.
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
GPU-VRAM7,8 (4/4)
Starload SKL-U
Starload SKL-U
Starload SKL-U
84 10 6
84 10 6
84 10 6
1
A00
A00
A00
Page 85
5
4
3
2
1
Main Func = dGFX_CORE
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
GPU CORE
GPU CORE
GPU CORE
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
1
A00
A00
85 106 Thursday, Feb ruary 18, 2016
85 106 Thursday, Feb ruary 18, 2016
85 106 Thursday, Feb ruary 18, 2016
A00
Page 86
5
4
3
2
1
Main Func = dGPU
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
GPU Discrete Power
GPU Discrete Power
GPU Discrete Power
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
1
A00
A00
86 106 Thursday, Feb ruary 18, 2016
86 106 Thursday, Feb ruary 18, 2016
86 106 Thursday, Feb ruary 18, 2016
A00
Page 87
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
87 10 6 Thursday, February 18, 20 16
87 10 6 Thursday, February 18, 20 16
87 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 88
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
88 10 6 Thursday, February 18, 20 16
88 10 6 Thursday, February 18, 20 16
88 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 89
5
Main Func = UnusedParts
4
3
2
1
34.4YW18.001
D D
SPR3
SPR3
SPRING-171 -GP
SPRING-171 -GP
1
1
1
SPR1
SPR1
SPRING-171 -GP
SPRING-171 -GP
SPR4
SPR4
SPRING-15-GP
SPRING-15-GP
SPR2
SPR2
SPRING-171 -GP
SPRING-171 -GP
1
ZZ.00PAD.7F1
H2
H2
HOLE335 R178-GP
HOLE335 R178-GP
1
H7
H7
HOLE335 R178-GP
HOLE335 R178-GP
1
H8
H8
HOLE335 R178-GP
HOLE335 R178-GP
1
H4
H4
HOLE335 R178-GP
HOLE335 R178-GP
1
H9
H9
HOLE335 R178-GP
HOLE335 R178-GP
1
H10
H10
HOLE335 R178-GP
HOLE335 R178-GP
1
SSID = EMI
C C
Mind the voltag e rating of th e caps.
EC8903
EC8903
EC8904
EC8901
EC8901
EC8902
EC8902
1 2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
EC8904
1 2
SCD1U25V2KX-GP
SCD1U25V2KX-GP
3D3V_S5 3D3V_S0 DCBATOU T
1 2
SC1KP50V2KX-1GP
SC1KP50V2KX-1GP
DY
DY
SC1U50V3KX-GPDYEC8905
SC1U50V3KX-GP
EC8905
1 2
DY
EC8906
EC8906
1 2
DY
DY
EC8907
EC8907
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
12
DY
DY
EC8908
EC8908
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
12
EC8909
EC8909
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
12
EC8910
EC8910
SCD1U25V2KX-GP
SCD1U25V2KX-GP
DY
DY
12
EC8911
EC8911
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC8912
EC8912
ZZ.00PAD.7G1
+DC_IN AUD_AGN D 1D2V_S3
EC8913
EC8913
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
H5
H5
HOLE335 R229-GP
HOLE335 R229-GP
34.4Y802.011
34.4Y802.011
HS1
HS1
STF217R 115H101-GP
STF217R 115H101-GP
5V_S5
EC8914
EC8914
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
H3
H3
HOLE335 R229-GP
HOLE335 R229-GP
1
1
EC8915
EC8915
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
1
STFSR15 8R113H62-GP
STFSR15 8R113H62-GP
OPS
OPS
NP1
5V_S0
EC8916
EC8916
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
H6
H6
HOLE335 R229-GP
HOLE335 R229-GP
1
HS2
HS2
434.07R01.0001
434.07R01.0001
1
EC8917
EC8917
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DY
DY
STFSR15 8R113H62-GP
STFSR15 8R113H62-GP
HS3
OPS
OPS
HS3
434.07R01.0001
434.07R01.0001
1
NP1
EC8919
EC8919
EC8918
SC1KP50V2KX-1GP
EC8918
SC1KP50V2KX-1GP
12
1 2
Change to 0.1uF at 20150427 for EMI
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SSID = RF
B B
1D2V_S3
EC8921
EC8921
EC8920
EC8920
SCD1U25V2KX-GP
SCD1U25V2KX-GP
Change to 0.1uF at 20150427 for EMI
EC8922
EC8922
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
12
12
EC8923
EC8923
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC8924
EC8924
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC8925
EC8925
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
DCBATOU T
EC8927
SC1U50V3KX-GP
EC8927
SC1U50V3KX-GP
DCBATOU T
EC8928
SC1U50V3KX-GP
EC8928
SC1U50V3KX-GP
EC8929
SC1U50V3KX-GP
EC8929
SC1U50V3KX-GP
1 2
1 2
1 2
DY
DY
EC8926
EC8926
1 2
SC2D2U10V2KX-GP
SC2D2U10V2KX-GP
Remove EC8931,EC8932,EC8926,EC8930for placement
RF request 2016/01/12 modify
1D2V_S3
1 2
DY
DY
1 2
EC8934
EC8934
EC8935
EC8935
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
DY
DY
DY
DY
5
EC8933
EC8933
SC2200P50V2KX-2GP
SC2200P50V2KX-2GP
A A
12
1 2
EC8936
EC8936
SCD1U25V2KX-GP
SCD1U25V2KX-GP
Change to 0.1uF at 20150427 for EMI
EC8937
EC8937
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
EC8938
EC8938
SCD1U25V2KX-GP
SCD1U25V2KX-GP
12
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
UNUSED PARTS/EMI Capacitors
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
4
3
2
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Taipei Hsien 221, Taiwan, R.O.C.
89 10 6
89 10 6
89 10 6
1
A00
A00
A00
Page 90
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
Reserved
Reserved
Reserved
1
90 10 6 Thursday, February 18, 20 16
90 10 6 Thursday, February 18, 20 16
90 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 91
5
4
3
2
1
SSID = TPM
D D
C C
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
TPM2.0
TPM2.0
TPM2.0
91 10 6 Thursday, February 18, 20 16
91 10 6 Thursday, February 18, 20 16
91 10 6 Thursday, February 18, 20 16
1
A00
A00
A00
Page 92
5
D D
4
3
2
1
C C
B B
A A
5
4
(Blanking)
3
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec.1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A4
A4
A4
Date: Sheet of
Date: Sheet of
Date: Sheet of
2
(Reserved)Finger Print
(Reserved)Finger Print
(Reserved)Finger Print
Starload SKL-U
Starload SKL-U
Starload SKL-U
92 106 Thursday, February 18, 2016
92 106 Thursday, February 18, 2016
92 106 Thursday, February 18, 2016
1
A00
A00
A00
Page 93
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
1
93 10 6 Thursday, February 18, 20 16
93 10 6 Thursday, February 18, 20 16
93 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 94
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
1
94 10 6 Thursday, February 18, 20 16
94 10 6 Thursday, February 18, 20 16
94 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 95
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
1
95 10 6 Thursday, February 18, 20 16
95 10 6 Thursday, February 18, 20 16
95 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 96
5
D D
C C
4
3
2
1
(Blanking)
B B
A A
5
4
3
2
<Core Design>
<Core Design>
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Taipei Hsien 221, Taiwan, R.O.C.
(Reserved)
(Reserved)
(Reserved)
1
96 10 6 Thursday, February 18, 20 16
96 10 6 Thursday, February 18, 20 16
96 10 6 Thursday, February 18, 20 16
A00
A00
A00
Page 97
5
D D
C C
4
3
2
1
(Blanking)
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Taipei Hsien 221, Taiwan, R.O.C.
LVDS_Switch
LVDS_Switch
LVDS_Switch
1
97 10 6
97 10 6
97 10 6
A00
A00
A00
Page 98
5
D D
C C
4
3
2
1
(Blanking)
B B
<Core Design>
<Core Design>
A A
5
4
3
2
<Core Design>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
21F, 88, Sec .1, Hsin Tai Wu Rd., Hsichih,
Taipei Hsien 221, Taiwan, R.O.C.
Taipei Hsien 221, Taiwan, R.O.C.
Title
Title
Title
Size Document N umber Rev
Size Document N umber Rev
Size Document N umber Rev
A3
A3
A3
Date: Sheet of
Date: Sheet of
Date: Sheet of
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Thursday, February 18, 20 16
Taipei Hsien 221, Taiwan, R.O.C.
CRT_Switch
CRT_Switch
CRT_Switch
98 10 6
98 10 6
98 10 6
1
A00
A00
A00
Page 99
5
4
3
2
1
Main Func = Debug
D D
C C
B B
A A
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Thursday, Feb ruary 18, 2016
Date: Sheet of
Date: Sheet of
5
4
3
2
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CPU_XDP;PCH_XDP
CPU_XDP;PCH_XDP
CPU_XDP;PCH_XDP
99 106
99 106
1
99 106
A00
A00
A00
Page 100
5
CLK Block Diagram
4
3
2
1
D D
M_A_DIMA_CLK_DD R0
CK0
M_A_DIMA_CLK_DD R#0
DDR3L DIMM1
C C
VRAM1
VRAM2
VRAM3
VRAM4
B B
CK
CK#
CK
CK#
CK
CK#
CK
CK#
FBA_CLK0P
FBA_CLK0N
FBA_CLK0P
FBA_CLK0N
FBA_CLK1P
FBA_CLK1N
FBA_CLK1P
FBA_CLK1N
‧ ‧ ‧ ‧
‧ ‧ ‧ ‧
‧ ‧ ‧ ‧
‧ ‧ ‧ ‧
VGA
N15 V - G M - S - A 2
GB2 - 6 4 (23x2 3 )
FBA_CLK0
FBA_CLK0 #
FBA_CLK1
FBA_CLK1#
CK0#
M_A_DIMA_CLK_DD R1
CK1
M_A_DIMA_CLK_DD R#1
CK1# CLK_PCIE_WLAN_P 3
PEX_ R E F C L K #
X T A L _ I N
XT A L _ O U T
CL K _ P C I E _VGA#
CL K _ P C I E _VGA
27MHZ_IN
27MHZ_OUT
X1901
32.768KHz
X1801
24MHz
XTAL24_IN
XTAL24_OUT
Haswell/Broadwell ULT
SA_CLK0
SA_CLK#0
SA_CLK1
SA_CLK#1
C L K O U T _PCIE_N4
C L K O U T _PCIE_P4 PEX _ R E F C L K
X7601
27MHz
RTC_X1
RTCX1
RTC_X2
RTCX2
XTAL24_IN
XTAL24_OUT
CLKOUT_PCIE_P2
CLKOUT_PCIE_N2
CLK_PCIE_WLAN_N 3
REFCLKP0
REFCLKN0
WLAN
NGFF
LAN
CLKOUT_PCIE_P3
CLKOUT_PCIE_N3
CLK_PCIE_LAN_P4
CLK_PCIE_LAN_N4
X3001
25MHz
RTL8106E/RTL8111G
REFCLK_P
REFCLK_N
LANXIN
CKXTAL1
L A N XOUT
CKXTAL2
Audio
R N 2 1 0 2
SRN33J-5-GP-U
R1710
SUS_CLK
R1805
0R2J-2-GP
R1804
0R2J-2-GP
H D A_CODEC_BITCL K
R5815
0R2J-2-GP
R2441
‧ ‧ ‧ ‧
0R2J-2-GP
CLK_PCI_KBC
BITCLK HDA_BCLK/I2S 0 _ S C L K
SUSCLK_NGFF
SUS_CLK_KBC
H D A _ B I T C L K
SUS_CLK_PCH
CLKOUT_LPC_1 LCLK/GPIOF5
CLKOUT_LPC_0 CLK_PCI_LPC
CLK_PCI_KBC_R
CLK_PCI_LPC_R
0R2J-2-GP
Realtek
ALC3223
SUS_CLK
GPIO0/EXTCLK/F_ SDIO3 SUSCLK/GPIO62
LPC
NGFF
KBC
NPCE285P
Intel CPU
CLKOUT_ITPXDP#
CLKOUT_ITPXDP_P
A A
5
4
3
Test Point
2
<Core Desig n>
<Core Desig n>
<Core Desig n>
Wistron Corporation
Wistron Corporation
Wistron Corporation
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
21F, 88, Sec.1, Hsin T ai Wu Rd., H sichih,
Taipei Hsie n 221, Taiwan, R.O.C.
Taipei Hsie n 221, Taiwan, R.O.C.
Title
Title
Title
Size Document Number Rev
Size Document Number Rev
Size Document Number Rev
A2
A2
A2
Starload SKL-U
Starload SKL-U
Starload SKL-U
Date: Sheet of
Date: Sheet of
Date: Sheet of
Taipei Hsie n 221, Taiwan, R.O.C.
CLK Block Diagram
CLK Block Diagram
CLK Block Diagram
100 106 Thursda y, February 18, 2016
100 106 Thursda y, February 18, 2016
1
100 106 Thursda y, February 18, 2016
A00
A00
A00