Digital Equipment Corporation
Maynard, Massachusetts
http://www.digital.com/semiconductor
November 1997
While DIGITAL believes the informa ti on included in this publi cation is correct as of the d at e of pu blication, it is
subject to chang e without notice.
Digital Equipment Corpora ti on makes no representations that the use of it s products in the manner describe d in t hi s
publication will not infringe on existing or future patent rights, nor do the descriptions contained in this publication
imply the granting of li ce nses to make, use, or sell equipment or software in accordanc e wi th the description.
AlphaPC, DECchip, DIGITAL, DIGITAL Semiconductor, DIGITAL UNIX, and the DIGITAL logo are trademarks
of Digital Equipment Corporation.
DIGITAL Semiconductor is a Digital Equipment Corporation business.
Altera is a registered trademark of Altera Corporation.
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GRAFOIL is a registered trademark of Union Carbide Corporation.
IEEE is a registered trademark of The Institute of Ele ct ri ca l and Electronics Enginee rs, Inc .
Intel is a registered trademark of Intel Corporation.
Microsoft and Visual C++ are register ed trademarks and Windows NT is a trademark of Mi crosoft Corporation.
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UNIX is a registered trademark in the United States and ot her countries, licensed ex cl usi vely through
X/Open Company Ltd.
All other trademarks an d registered trademarks ar e the property of their respect iv e holders.
This manual describes the DIGITAL AlphaPC 164SX motherboard, a board for
computing systems based on the DIGITAL Semiconductor Alpha 21164PC microprocessor and the DIGITAL Semiconductor 21174 core logic chip.
Audience
This manual is intended for system designers and others who use the AlphaPC
164SX motherboard to design or evaluate computer systems based on the DIGITAL
Semiconductor Alpha 21164PC microprocessor and the DIGITAL Semiconductor
21174 core logic chip.
Scope
This manual describes the features, configuration, functional operation, and interfaces of the AlphaPC 164SX motherboard. This manual does not include specific
bus specifications (for example, PCI or ISA buses). Additional information is available in the AlphaPC 164SX schematics, program source files, and the appropriate
vendor and IEEE specifications. See Appendix B for information on how to order
related documentation and obtain additional technical support.
Preface
Manual Organization
As outlined on the next page, this manual includes the following chapters, appendixes, and an index.
26 November 1997 – Subject to Change
ix
•Chapter 1, Introduction, is an overview of the AlphaPC 164SX motherboard,
including its components, features, and uses.
•Chapter 2, System Configuration and Connectors, describes the user-environ-
ment configuration, boar d connectors an d functions, and s witch functio ns. It also
identifies switch settings and connector locations.
•Chapter 3, Power and Environmental Requirements, describes the AlphaPC
164SX power and environmental requirements and provides board dimensions.
•Chapter 4, Functional Description, provides a functional description of the
AlphaPC 164SX motherboard, including the 21174 core logic chip, L2 backup
cache (Bcache) and memory subsystems, system interrupts, clock and power
subsystems, and peripher al component interconnect (PCI) a nd Industry Sta ndard
Architecture (ISA) devices.
•Chapter 5, Upgrading the AlphaPC 164SX, describes how to upgrade the
AlphaPC 164SX motherboard’s SDRAM memory and microprocessor speed.
•Appendix A, Supporting Products, lists sources for components and accessories
not included with the AlphaPC 164SX motherboard.
•Appendix B, Support, Products, and Documentation, describes how to obtain
DIGITAL Semiconductor information and technical support, and how to order
DIGITAL Semiconductor products an d a ssoc ia ted lite ra ture .
Conventions
This section defines product-specific terminology, abbreviations, and other conventions used throughout this manual.
Abbreviations
Register Access
•
The following list describes the register bit and field abbreviations:
Bit/Field Abbreviation Description
RO (read only)Bits and fields specified as RO can be read but not written.
RW (read/write)Bits and fields specified as RW can be read and written.
WO (write only)Bits and fields specified as WO can be written but not read.
x
26 November 1997 – Subject To Change
•Binary Multip les
The abbreviations K, M, and G (kilo, mega , and giga ) repr esent b inary mul tipl es
and have the following values.
Unless otherwise noted, all addresses and offsets are hexadecimal.
Bit Notation
Multiple-bit fields can include contiguous and noncontiguous bits contained in
brackets ([]). Multiple contiguous bits are indicated by a pair of numbers separated
by a colon (:). For example, [9:7,5,2:0] specifies bits 9,8,7,5,2,1, and 0. Similarly,
single bits are frequently indicated with brackets. For example, [27] specifies bit 27.
Caution
Cautions indicate potential damage to equipment, software, or data.
Data Field Size
The term INTnn, wher e nn is one of 2, 4, 8, 16, 32, or 64, refers to a data field of
nn contiguous NATURALLY ALIGNED bytes. For example, INT4 refers to a
NATURALLY ALIGNED longword.
Data Units
The following data-uni t terminology is used throughout this manual.
Notes emphasize particularly important information.
Numbering
All numbers are decimal or hexadecimal unless otherwise indicated. The prefix 0x
indicates a hexadecimal number. For example, 19 is decimal, but 0x19 and 0x19A
are hexadecimal (also see Addresses). Otherwise, the base is indicated by a subscript; for example, 100
Ranges and Extents
is a binary number.
2
Ranges are specified by a pai r of n umbers se parat ed by t wo perio ds (..) and are in clusive. For example, a range of integers 0..4 includes the integers 0, 1, 2, 3, and 4.
Extents are specified by a pair of numbers in brackets ([]) separated by a colon (:)
and are inclusive. Bit fields are often specified as extents. For example, bits [7:3]
specifies bits 7, 6, 5, 4, and 3.
Register and Memory Figures
xii
Register figures have bit and field position numbering starting at the right (low
order) and increasing to the left (high order).
Memory figures have addresses starting at the top and increasing toward the bottom.
26 November 1997 – Subject To Change
Signal Names
All signal names are printed in boldface type. Signal names that originate in an
industry-standard specification, such as PCI or IDE, are printed in the case as found
in the specification (usually uppercase). Active-high signals are indicated by the _h
suffix. Active-low signals have the _l suffix, a pound sign “#” appended, or a “not”
overscore bar. Signals with no suffix are con si der ed hi gh- asserted signals. For example, signals data_h[127:0] and cia_int are active-high signals. Signals mem_ack_l, FRAME#, and RESET
UNPREDICTABLE and UNDEFINED
are active-low signals.
Throughout this manual the terms UNPREDICTABLE and UNDEFINED are used.
Their meanings are quite different and must be carefully distinguished.
In particular, only pr ivil eg e d sof tw a re (th at is, sof tw are ru nn ing in ke rnel m ode )
can trigger UNDEFINED operations. Unprivileged software cannot trigger
UNDEFINED operations. However, either pri vi le ged or unprivileged software can
trigger UNPREDICTABLE results or occurrences.
UNPREDICTABLE results or occurrences do not disrupt the basic operation of the
processor. The processor continues to execute instructions in its normal manner. In
contrast, UNDEFINED operations can halt the processor or cause it to lose information.
The terms UNPREDICTABLE and UNDEFINED can be further described as follows:
•UNPREDICTABLE
–Results or occurrences specified as UNPREDICTABLE might vary
from moment to moment, implementation to implementation, and
instruction to instruction within implementations. Software can never
depend on results specified as UNPREDICTABLE.
–An UNPREDICT ABLE res ult might acq uire an a rbitr ary va lue t hat i s
subject to a few constraints. Such a result might be an arbitrary function of the input operands or of any state information that is accessible to the process in its current access mode. UNPREDICTABLE
results may be unchanged from their previous values.
Operations that produce UNPREDICTABLE results might also produce exceptions.
26 November 1997 – Subject To Change
xiii
–An occurrence specified as UNPREDICTABLE may or may not hap-
pen based on an arbitrary choice function. The choice function is
subject to the same c ons tr ai nts as are UNPREDICTABLE resu lts and
must not constitute a security hole.
Specifically, UNPREDICT ABLE resul ts must not depe nd upon, or be
a function of, the contents of memory locations or registers that are
inaccessible to the current process in the current access mode.
Also, operations t hat might produc e UNPREDICTABLE results must
not write or modify the contents of memory locations or registers to
which the current process in the current access mode does not have
access. They must also not halt or hang the system or any of its components.
For example, a se curity h ole wou ld exist if some UNPREDICTABLE
result depended on the value of a register in another process, on the
contents of processor temporary registers le ft behind by some previously running process, or on a sequence of actions of different processes.
•UNDEFINED
–Operations specified as UNDEFINED can vary from moment to
moment, implementation to implementation, and instruction to
instruction within implementations. The operation can vary in effect
from nothing, to stopping system operation.
xiv
–UNDEFINED operations can halt the processor or cause it to lose
information. However, UNDEFINED operations must not cause the
processor to hang, that is, reach an unhalted state from which there is
no transition to a normal state in which the machine executes instructions. Only privileged software (that is, software running in kernel
mode) can trigger UNDEFINED operations.
26 November 1997 – Subject To Change
This chapter provides an overview of DIGITAL Semiconductor’s AlphaPC 164SX
motherboard, including its components, features, and uses. The motherboard is a
module for computing systems based on the DIGITAL Semiconductor 21174 core
logic chip.
The AlphaPC 164SX provides a si ngle-board hardware and software development
platform for the design, i ntegration , and analysis of suppo rting l ogic and subsystems .
The board also provides a platform for PCI I/O device hardware and software development.
1.1 System Components and Features
The AlphaPC 164SX is impl emented in i ndust ry-st andard part s an d u ses a DIGITAL
Semiconductor Alpha 21164PC microprocessor running at 400 or 533 MHz.
Figure 1–1 shows the board’s functional components.
The Alpha 21164PC microprocessor is supported by the 21174 core logic chip,
which provides an interface between three units—memory, the PCI bus, and the
21164PC (along with flash ROM). Th is core logic c hip is the interface between the
21164PC microprocessor, main memory (addressing and control), and the PCI bus.
Quick switches provide the memory interface data path isolation.
The 21174 includes the majority of functions necessary to develop a high-perfor-
mance PC or workstation, requiring minimum discrete logic on the module. It provides flexible and ge neric functions to allow its use in a wide range of systems.
1.1.2 Memory Subsystem
The synchronous dynamic random-access memory (SDRAM) is contained in two
banks of dual inline memory modules (DIMMs). Single- or double-sided DIMMs
may be used. Two DIMMs provide 32Mb to 256MB of memory, while four DIMMs
provide up to 512MB. Table 1–1 lists the DIMM sizes tested and the corr esponding
main memory size for 128-bit arr ays.
Note:Each DIMM can be 72 bits or 64 bits wide, with 100 MHz or faster
The AlphaPC 164SX board-level L2 backup cache (Bcache) is a 1MB, directmapped, synchronous, pipelined burst SROM with a 128-bit data path. The board is
capable of handling an L2 cache size of 2MB. See Section 2.3 for more information
about the Bcache.
1.1.4 PCI Interface Overview
The AlphaPC 164SX PCI interface, with a 33-MHz data transfer rate, is the main
I/O bus for the majority of functions (SCSI interface, graphics accelerator, and so
on). PCI-EIDE support is provided by an onboard controller chip (Cypress
CY82C693U-NC), which also provide s a PCI- to- ISA br idg e, a mo use an d keybo ard
controller, and a time-of-year (TOY) clock.
The PCI bus has four dedicated PCI expansion slots (two 64-bit and two 32-bit).
1.1.5 ISA Interface Overview
The ISA bus provides the following system support functions:
•Two expansion slots.
•An SMC FDC37C669 combination controller chip that provides:
–A diskette controller
–Two universal asynchronous receiver-transmitters (UARTs) with full
modem control
–A bidirectio nal parallel port
1.1.6 Miscellaneous Logic
The AlphaPC 164SX contains the following miscellaneous compon ents:
•Operating system support — through a 1MB flash ROM tha t contains su pporting
firmware.
•Synthesizer for clocks:
–A clock synthesizer (MC12439) provides a programmable 400- and
533-MHz clo ck sour ce to the 21164PC microproc ess or. The microp ro ces sor supplies a cl ock to the sy s tem PLL/cloc k b uffer for th e 21174.
–The 21174 core logic chip provides the SDRAM and PCI clocks.
1–4Introduction
26 November 1997 – Subject To Change
–A 14.318-MHz crystal and frequency generator provide a clock source for
the combination controller (FDC37C669) and the PCI-to-ISA bridge
(CY82C693U-NC). The controller’s onchip generator then provides other
clocks as needed.
–A 32-kHz crystal provides the TOY clock source.
•Flash ROM:
–F ail-safe booter
–Boot code
–BIOS: Windows NT or Alpha SRM console
•Altera EPM7064LC44-7 for DMA boundary issue.
1.2 Software Support
The support elements described in this section are either included with the
AlphaPC 164SX or are available separately.
1.2.1 AlphaBIOS Windows NT Firmware
Software Support
The AlphaPC 164SX motherboard ships with AlphaBIOS firmware and online documentation that describes how to configure the firmware for Windows NT . This firmware
initializes the system and enables you to install and boot the Windows NT operating
system. The AlphaBIOS firmware resides in the flash ROM on the 21A05-A0 variation
of the AlphaPC 164SX motherboard. Binary images of the AlphaBIOS firmware are
included in the motherboard Software Developer’s Kit (SDK), along with a license
describing the terms for use and distribution.
1.2.2 Alpha SRM Console Firmware
The Alpha SRM Console firmware is required to install and boot DIGITAL UNIX
on the AlphaPC 164SX. This DIGITAL Semiconductor firmware comes factory
installed in the 21A05-A1 variation of the AlphaPC 164SX. When installed, this
firmware occupies the f lash blocks reser ved for the pri mary firmware. Bi nary images
of the Alpha SRM Console firmware are included in the SDK and Firmware Update
compact disk, along with a license describing the terms for use and distribution.
26 November 1997 – Subject To Change
Introduction1–5
Hardware Design Support
1.2.3 Motherboard Software Developer’s Kit (SDK)
The SDK and Firmware Update is designed to provide an environment for developing software for Alp ha mothe rboard produc ts. It is a lso sp ecial ly sui ted f or lo w-level
software development and hardware debug for other Alpha microprocessor-based
designs.
The following list includes some of the components of the SDK:
•The Alpha Motherboard Debug M onitor firmware with source code.
•Power-up initialization SROM and SROM Mini-Debugger with source code.
•Sample PALcode sources modeled after DIGITAL UNIX with source code.
•Fail-safe booter with source code.
•Various additional tools with source code.
The following development platforms are supported by the SDK:
•DIGITAL UNIX with the C Developer’s Extensions.
•Windows NT (Alpha) with the Microsoft Visual C++ Development System for
DIGITAL Alpha.
•Windows NT (Intel) with the Microsoft Visual C++ Development System and
Tools provide limited support. This environment is currently useful for SROM
and PALcode development only.
1.3 Hardware Design Support
The full design database, including schematics and source files, is supplied. User
documentation is also included. The database allows designers with no previous
Alpha architecture experience to successfully develop a working Alpha system with
minimal assistance.
1–6Introduction
26 November 1997 – Subject To Change
2
System Configuration and Connectors
This chapter describes the AlphaPC 164SX configuration, board connectors and
functions, and switch functions. It also identifies switch and connector locations.
The AlphaPC 164SX uses switches to implement configuration parameters such as
system speed and boot parameters. These switches must b e configured for the user’s
environment. Onboard connectors are provided for the I/O interfaces, DIMMs, and
serial and parallel peripheral ports.
Figure 2–1 shows the board outlines and identifies the location of switches, connectors, and major components. Table 2–1 lists and defines these items.
The AlphaPC 164SX motherboard ha s a switc hpack lo cated a t SW1, as shown pr eviously in Figure 2–1. The switches set the hardware configuration and boot options.
Figure 2–2 shows the switch functions.
Figure 2–2 AlphaPC 164SX Configuration Switches
Note: Switch defaults are in bold.
01
CF0
CF1
CF2
CF3
CF4
CF5
CF6
CF7
CF Bit:.5MB1M B2MBReserved
00 1 01
10 0 11
Password Bypass:0 bypasses password protection
1 requires AlphaBIOS password
Mini-Debugger:0 enables Mini-Debugger
1 disables Mini-Debugger
CF Bit: 400 MHz 533 MHz
41 1
51 0
61 1
Fail-Safe Booter:0: Fail Safe
1: AlphaBIOS or SRM console
Note:
All other combinations
are reserved.
2.2 CPU Speed Selection (CF[6:4])
The clock synthesizer at U45 makes it possible to change the frequency of the
microprocessor’s clock output. The switch configuration is set in SW1, CF[6:4].
These three switches set the speed at power-up as listed in Figure 2–2. The
microprocessor frequency divided by the ratio determines the system clock
frequency.
2–4System Configuration and Connectors
26 November 1997 – Subject To Change
Bcache Size Switches (CF0 and CF1)
2.3 Bcache Size Switches (CF0 and CF1)
The Bcache size switches are located at SW1 (CF0 and CF1), as shown in
Figure 2–2. The AlphaPC 164SX is configured with 1MB of Bcache during
production; the other combinations shown in Figure 2–2 (.5MB and 2MB) are for
other implementations.
Note:The standard motherboard (21A05-A0 for Windows NT and 21A05-A1
for DIGITAL UNIX) is manufactured with 64K × 32 data SSRAMs. An
OEM, however, can create an L2 cache in either a 2MB variation, using
128K × 32 data SSRAMs, or a .5MB variation, using 32K × 32 data
SSRAMs.
2.4 Password Bypass (CF2)
AlphaBIOS provides password protection. However, password bypass is provided
for system setup or startup when the AlphaBIOS password is unavailable.
Password bypass is disabled by default, with switch CF2 of SW1 in the on position
(see Figure 2–2). When th is function i s enabled, i t disable s the AlphaBIOS pa ssword
verification and enables the user to set up or start up their system without the
AlphaBIOS password. Password bypass also clears the password.
To disable this function and require a password, slide CF2 to the on position.
2.5 Fail-Safe Booter (CF7)
The fail-safe booter provides an emergency recovery mechanism when the primary
firmware image cont ai ned i n f la sh me mo ry has been corrupted. When flash memory
has been corrupted, and no image can be loaded safely from the flash, you can run
the fail-safe booter and boot another image from a diskette that is capable of reprogramming the flash.
For more information about the fail-safe booter, refer to the AlphaPC 164SX
Motherboard Windows NT User’s Manual.
26 November 1997 – Subject To Change
System Configuration and Connectors2–5
Mini-Debugger (CF3)
2.6 Mini-Debugger (CF3)
The Alpha SROM Mini-Debugger is stored in the flash ROM and is enabled/
disabled by switch CF3. The default position for this switch is on (see Figure 2–2).
When this switch is off, it causes the SROM initialization to trap to the MiniDebugger after all initialization is comple te, but before starting the execution of the
system flash ROM code.
2.7 AlphaPC 164SX Connector Pinouts
This section lists the pinouts of all AlphaPC 164SX connectors. See Figure 2–1 for
connector locations.
2.7.1 PCI Bus Connector Pinouts
Table 2–2 shows the PCI bus connector pinouts.
Table 2–2 PCI Bus Connector Pinouts
PinSignalPinSignalPinSignalPinSignal
32-Bit and 64-Bit PCI Connectors (J15, J17, J18, J19)
Pins 1 through 84 are on the front side and pins 85 through 168 are on the back side.
2
The AlphaPC 164SX uses BA1 as both BA1 and ADDR12. Therefore, four-bank DIMMs using ADDR[11:0]
are the maximum size. (Two-bank DIMMs can use ADDR[12:0].)
3
Pull-down.
2.7.4 EIDE Drive Bus Connector Pinouts
Table 2–5 shows the EIDE drive bus connector pinouts.
Table 2–5 EIDE Drive Bus Connector Pinouts (J5, J6)
Table 2–10 shows the SROM test data input connector pinouts.
Table 2–10 SROM Test Data Input Connector Pinouts (J21)
PinSignalDescription
1NC—
2SROM_CLK_LClock out
3Gnd —
4NC—
5TEST_SROM_D_L SROM serial data in
6NC—
2.7.10 Input Power Connector Pinouts
Table 2–11 shows the input power connector pinouts.
Table 2–11 Input Power Connector Pinouts (J2)
PinVoltagePinVoltagePinVoltagePinVoltage
1+3.3 V dc2+3.3 V dc3Gnd4+5 V dc
5Gnd6+5 V dc7 Gnd8P_DCOK
95 V SB10+12 V dc11+3.3 V dc12–12 V dc
13Gnd14PS_ON15Gnd16Gnd
17Gnd18–5 V dc19+5 V dc20+5 V dc
1
This pinout is ATX-compliant.
2.7.11 Enclosure Fan Power Connector Pinouts
Table 2–12 shows the enclosure fan power connector pinouts.
Table 2–12 Enclosure Fan (+12 V dc) Power Connector Pinouts (J16)
PinVoltage
1Gnd
2+12 V dc
3Gnd
1
26 November 1997 – Subject To Change
System Configuration and Connectors 2–13
AlphaPC 164SX Connector Pinouts
2.7.12 Microprocessor Fan Power Connector Pinouts
Table 2–13 shows the microprocessor fan power connector pinouts.
Table 2–13 Microprocessor Fan Power Connector Pinouts (J14)
PinSignalDescription
1+12 V dc—
2FAN_CONN_L Fan connected
3Gnd —
2.7.13 Soft Power Connector Pinouts
Table 2–14 shows the soft power connector pinouts.
Table 2–14 Soft Power Connector Pinouts (J1)
PinSignalDescription
1InputSystem power on/off
2Gnd—
2.7.14 Multipurpose Connector Pinouts
J20 is a multipurpose connector that provides pins for the following functions:
•System speaker
•LEDs for power and the EIDE drive
•Buttons for reset and halt
Table 2–15 shows the multipurpose connector pinouts, and Figure 2–3 shows the
connector layout.
Table 2–15 Multipurpose Connector Pinouts (J20)
PinSignalDescription
1Gnd —
2HALT_BUTTON
3Gnd —
4RESET_BUTTONReset system
5HD_PUHard drive power-up
6HD_LEDPull-up to Vdd
2–14 System Configuration and Connectors
1
(Sheet 1 of 2)
Halt system
26 November 1997 – Subject To Change
AlphaPC 164SX Connector Pinouts
Table 2–15 Multipurpose Connector Pinouts (J20)
PinSignalDescription
7—No connection
8POWER_LED_LPull-up to Vdd
10, 12, 14, 16Gnd —
9SPKRSpeaker output
15Vdd—
11, 13—No connection
1
The halt button is not used with the Windows NT operating system.
Figure 2–3 Multipurpose Connector Pinouts
J20
(See note.)
HD_PU
SPKR
12
3
56
78
910
1112
4
HALT_BUTTON
RESET_BUTTON
HD_LED
POWER_LED_L
(Sheet 2 of 2)
1314
Vdd
Note: The halt button is not used with Windows NT.
1516
26 November 1997 – Subject To Change
System Configuration and Connectors 2–15
Power and Environmental Requirements
This chapter describes the AlphaPC 164SX power and environmental requirements,
and physical board parameters.
3.1 Power Requirements
The AlphaPC 164SX derives its main dc power from a user-s uppli ed po wer supply.
The board has a total power diss ipa ti on of 90 W, excluding any p lug- in PCI and I S A
devices. An onboard +5-V to +2.5-V dc- to- dc con vert er is designed to handle 24 A of
current. Table 3–1 lists the power requirement for each dc supply voltage.
The power supply must supply a dcok signal to the system reset logic. Refer to
Section 4.6 for additional information.
Table 3–1 Power Supply DC Current Requirements
Voltage/ToleranceCurrent
+3.3 V dc, ±5%5.0 A
1
3
+5 V dc,
–5 V dc,
+12 V dc,
–12 V dc,
1
Caution:Fan sensor required. The 21164PC microprocessor cooling fan must
26 November 1997 – Subject To Change
±5%12.0 A
±5%0.0 A
±5%1.0 A
±5%100.0 mA
Values indi cated are for an AlphaPC 164SX motherboa rd with an Alpha 21164PC microprocessor operating at 533 MHz, with 128M B SDRAM , excluding adapter cards and disk drives.
drive an RPM indicator signal. If the airflow stops, the sensor on the
motherboard detects that the RPM has stopped, and resets the system.
Power and Environmental Requirements3–1
Environmental Requirements
3.2 Environmental Requirements
The 21164PC microprocessor is cooled by a small fan blowing directly into the
chip’s heat sink. The AlphaPC 164SX motherboard is designed to run effi ciently by
using only this fan. Add it ion al fa ns may be necessary depending upon cabinetry and
the requirements of plug-in cards.
The AlphaPC 164SX motherboard is specified to run within the environment listed
in Table 3–2.
Operating temperature10°C to 40°C (50°F to 104°F)
Storage temperature–55°C to 125°C (–67°F to 257°F)
Relative humidity10% to 90% with maximum wet bulb temperature 28°C
(82°F) and minimum dew point 2°C (36°F)
Rate of (dry bulb) temperature
change
3.3 Board Dimensions
The AlphaPC 164SX is an ATX-size printed-wiring board (PWB) with the following
dimensions:
•Length: 30.48 cm (12.0 in ±0.0005 in)
•Width: 24.38 cm (9.6 in ±0.0005 in)
•Height: 6.86 cm (2.7 in)
The board can be used in certain desktop and deskside systems that have adequate
clearance for the 21164PC heat sink and its cooling fan. All ISA and PCI expansion
slots are usable in standard desktop or deskside enclosures.
11°C/hour
±2°C/hour (20°F/hour ±4°F/hour)
3–2Power and Environmental Requirements
26 November 1997 – Subject To Change
3.3.1 ATX Hole Specification
Figure 3–1 shows the ATX hole specification for the AlphaPC 164SX.
Figure 3–1 ATX Hole Specification
.800
TYP Between
Connectors
.400
.650
.500
1.612
Board Dimensions
4.900
9.600
8.950
ISA Connector
(2 Places)
6.100
.600
.625
11.100
12.000
PCI Connector
(4 Places)
1.300
FM-06122.AI4
26 November 1997 – Subject To Change
Power and Environmental Requirements3–3
Board Dimensions
3.3.2 ATX I/O Shield Requirements
Figure 3–2 shows the ATX I/O shield dimensions for the AlphaPC 164SX.
Figure 3–2 ATX I/O Shield Dimensions
R 1.00
5.00 TYP
21.36
16.05
9.25
3.58
2.45
4.35
11.15
15.47
17.95
22.95
23.96
29.10
33.10
68.4
64.9
64.91
60.26
51.27
42.28
40.48
34.13
24.7
25.14
16.7
16.15
14.35
8.00
0.99
9.98
11.78
18.13
19.93
28.92
35.5
37.91
43.5
44.26
46.06
55.05
64.04
7.19 TYP
74.8
70.39
72.19
78.2
81.18
85.4
87.2
90.17
94.4
98.9
95.40
FM-05986.AI4
14.96
R 1.00
3–4Power and Environmental Requirements
26 November 1997 – Subject To Change
4
Functional Description
This chapter describes the functional operation of the AlphaPC 164SX. The description introduces the DIGI TAL Semiconductor 21174 core logic chip and describes it s
implementation with the 21164PC microprocessor, its supporting memory, and I/O
devices. Figure 1–1 shows the AlphaPC 164SX major functional components.
Bus timing and protocol information found in other data sheets and reference docu-
mentation is not duplicated. See Appendix B for a list of supporting documents and
order numbers.
Note:For detailed descriptions of bus transactions, chip logic, and operation,
refer to the DIGITAL Semiconductor Alpha 21164PC Microprocessor
Hardware Reference Manual and the DIGITAL Semiconductor 21174
Core Logic Chip Technical Reference Manual. For details of th e PCI
interface, refer to the PCI System Design Guide.
26 November 1997 – Subject To Change
Functional Description4–1
AlphaPC 164SX Bcache Interface
4.1 AlphaPC 164SX Bcache Interface
The 21164PC microprocessor controls the board-level L2 backup cache (Bcache)
array (see Figure 4–1). The data bus (data _h[127: 0]) s ignals are shared with the system interface.
The Bcache is a 1MB, direct-m apped, pip elined, s ynchronou s burst SRA M
(SSRAM) with a 128-bit da ta path. It is populated with a q uantity of four
133-MHz, 64K × 32 SS RAMs for data store, and one 13 3-MHz, 32K × 32
SSRAM for tag store.T he Bcache su pports 64-byt e transfers to and from
memory.
4–2Functional Description
26 November 1997 – Subject To Change
DIGITAL Semiconductor 21174 Core Logic Chip
4.2 DIGITAL Semiconductor 21174 Core Logic Chip
The 21174 core logi c ch i p p rovides a cos t- c om p et i t iv e solution fo r de si g n er s us i ng t h e
21164PC microprocessor to develop uniproces sor syst ems. The chip provides a
128-bit memory interface and a PCI I/O interface, and inclu des t he DIGI TAL
Semiconductor 21174-CA chip packaged in a 474- p in plastic ball grid array (PBGA).
Figure 4–2 shows the AlphaPC 164SX implementation of the 21174 core logic chip.
The 21174 ap pli ca ti on- specific integrated circuit (ASIC) accepts addres se s and commands from the 21 164PC microprocess or and drives the main memory array with the
address, control, and clock sig nals. It als o provid es an interf ace to th e 64-bit PCI I/ O
bus.
26 November 1997 – Subject To Change
Functional Description4–3
DIGITAL Semiconductor 21174 Core Logic Chip
The 21174 chip provides the following functions:
•Serves as the interface between the 21164PC microprocessor, main memory
(addressing and control), and the PCI bus. A three-entry CPU instruction queue
is implemented to capture commands should the memory or I/O port be busy.
•Provides control to the Quick Switch chips to isolate the L2 cache from the main
memory bus during private reads and writes.
•Generates the clocks, row, and column addresses for the SDRAM DIMMs, as
well as all of the memory control signals (RAS, CAS, WE). All of the required
SDRAM refresh control is contained in the 21174.
•Provides all the logic to map 21164PC noncacheable addresses to PCI address
space, as well as all the translation logic to map PCI DMA addresses to system
memory.
Two DMA conversion methods are supported:
•Direct mapping, in which a base offset is concatenated with the PCI address.
•Scatter-gather mapping, which maps an 8KB PCI page to any 8KB memory
page. The 21174 contains an eight-entry scatter-gather translation lookaside
buffer (TLB), where each entry holds four consecutive page table entries (PTEs).
4.2.2 Main Memory Interface
Quick S wi tc he s pr ovi de th e i nte rfa ce be twe en the 21 164PC/ L2 ca che ( data_h[127 :0])
and the me mory/21174 (mem_data_h[127:0]). The AlphaPC 164SX supports four
168-pin unbuffered 72- bit or 64-bit SDRAM DIMM modules . Even parity is generat ed
on the PCI bus.
The AlphaPC 164SX supports a maxi mum of 512MB of main memory. The memory
is organized as two ba nks . Table 1–1 lists total memory options along with the corresponding DIMM sizes requ ired. All CPU cach eable memory access es and PCI DMA
accesses are controlled and routed to main memory by the 21174 core logic chip.
The AlphaPC 164SX implements the alternate memory mode for SDRAM RAS
and CAS control signals. Altern ate mem ory m ode is ex plain ed in the DIGITAL Semi co n du c t or 21174 Core Logic Ch ip Technic a l Re fe ren ce M an u al .
4–4Functional Description
26 November 1997 – Subject To Change
4.2.3 PCI Devices
The AlphaPC 164SX uses the PCI bus as the mai n I/O bus for the major ity of periph -
eral functions. As Figure 4–3 shows, the board implements the ISA bus as an expansion bus for system support functions and for relatively slow peripheral devices.
The PCI bus supports multiplexed, burst mode, read and w rite transfers. It supports synchronous operation of 33 MHz. It also supports either a 32-bit or 64-bit
data path with 32-bit device support in the 64-bit configuration. Depending upon
the configuration and operating frequencies, the PCI bus supports up to 264-MB/s
(33 MHz, 64-bit) peak throughput. The PCI provides parity on address and data
cycles. Three physical address spaces are supported:
•32-bit memory space
•32-bit I/O space
•256-byte-per -agent configuration space
26 November 1997 – Subject To Change
Functional Description4–5
ISA Bus Devices
The bridge from the 21164PC system bus to the 64-bit PCI bus is provided by the
21174 chip. It generates the required 32-bit PCI address for 21164PC I/O accesses
directed to the PCI. It also accepts 64-bit double address cycles and 32-bit single address
cycles. However, the 64-bit address support is subject to some constraints.
4.2.4 PCI/ISA Bridge Chip
The CY82C693U-NC chip provides the bridge between the PCI and the ISA bus,
and between the PCI and the EIDE bus. It also incorporates the logic for the following:
•Keyboard/mouse controll er – An 8042-compatible interface is brought out to
separate 6-pin DIN connectors (J4).
•Real-time clock – A DS1287-compatible clock is backed up by a replaceable
battery (XB1).
•A PCI interface (master and slave)
•An ISA interface (master and slave)
•PCI and ISA arbitration
Refer to Cypress document CY82C693U hyperCache/Stand-Alone PCI Peripheral
Controller with USB Data Sheet for additional information.
4.2.5 PCI Expansion Slots
Four dedicated PCI expansion slots are provided on the AlphaPC 164SX. This
allows the system user to add additio nal 32-bit or 64- bit PCI opti ons. While both th e
32-bit and the 64-bit slots use the standard 5-V PCI connector and pinout, +3.3 V is
supplied for those boards that require it. The CY82C693U-NC chip provides the
interface to the ISA expansion I/O bus.
4.3 ISA Bus Devices
Figure 4–4 shows the AlphaPC 164SX ISA bus implementation with peripheral
devices and connectors. Two dedicated ISA expansion slots are provided. System
support features such as serial lines, parallel port, and diskette controller are embedded on the module by means of an FDC37C669 combination controller chip.
4–6Functional Description
26 November 1997 – Subject To Change
4.3.1 Combination Controller Chip
The AlphaPC 164SX uses the Standard Microsystems Corporation FDC37C669
combination controller chip (see Figure 4–4). It is packaged in a 100-pin QFP configuration. The chip provides the following ISA peripheral functions:
•Diskette controller – Software compatible to the Intel N82077 FDC. Inte-
grates the fun ct ion s o f th e for m at ter/ co nt roll er, digita l d ata sep ar at or, write
precompensa ti on , an d data -ra te se lect io n l ogic re qu ir ing no exte rn al fil ter
components. Sup po rts the 2 .88 MB dri ve forma t a nd ot h er sta nda rd di sket te
drives used with 5.25-inch and 3.5-inch media. FDC data and control lines are
brought out to a sta nda rd 34-pin connector (J11). A ribbon cable interf aces the
connector to one or two diskette drives.
•Serial ports – Two UARTs with full modem control, compatible with NS16450
or PC16550 devices, are br ought out to two separate onboard, 9-pin
D-subminiature connectors (J3).
•Parallel port – The bidirectional parallel port is brought out to an onboard
25-pin connector (J13). It can be brought out through a 25-pin female
D-subminiature connector on the bulkhead of a standard PC enclosure.
ISA Bus Devices
An onboard clock generator chip supplies a 14.3-MHz reference clock for the diskette data separator and serial ports.
26 November 1997 – Subject To Change
Functional Description4–7
ISA Bus Devices
Figure 4–4 AlphaPC 164SX ISA Bus Devices
PCI
PCI-to-ISA
Bridge
CY82C693U-NC
sd[7:0]
Combination
Controller
37C669
sa[15:0]
sa[19:0]
4.3.2 ISA Expansion Slots
Two ISA expansion slots are provided for plug-in ISA peripherals (J22 and J23).
la[23:17]
sd[15:0]
Diskette
Parallel
COM1/2
Transceivers
EIDE – Primary
EIDE – Seco ndary
ISA0
ISA1
4.3.3 ISA I/O Address Map
Table 4–1 lists the AlphaPC 164SX ISA I/O space address mapping.
Table 4–1 ISA I/O Address Map
Range (hex)Usage
000-00F8237 DMA #1
020-0218259 PIC #1
040-0438253 timer
060-061Ubus IRQ12 and NMI control
After reset, the flash ROM is set to location 0. The 21174 supports cache fills and
uncacheable reads from the flash ROM (that is, the 21174 does multiple reads to the
flash ROM to assemble full octawords). The 21164PC can start executing directly
from the flash ROM.
Once the boot code that was stored in the flash ROM has been executed, and memory has been initialized, the flash ROM is mapped to locations
87.C000.000–87.FFFF.FFFF.
(Sheet 2 of 2)
4.4 Interrupts
Interrupts and general-purpose inputs are acquired by the 21174 through a freerunning 32-bit external shift register. The int_ sr_loa d_l s ignal is assert ed low to load
the interrupts into the shift register. The int_clk signal clocks the shift register contents into the 21174 through the int_sr_in pin. The shift register operates continuously at a rate of ¼ the chipset clock rate.
The state of each interrupt can be read through the interrupt request register. Note
that the state of the interrupts will persist in the interrupt request register for up to
3 µs after the interrupt has been deasserted at the shift register. If the interrupt bit in
the interrupt request register is not promptly cleared, a second interrupt might be
taken before the shift register scans the deasserted value into the interrupt request
26 November 1997 – Subject To Change
Functional Description4–9
Interrupts
register. Interrupts latched in the interrupt request register can be reset individually
by writing a 1 to the bit to be cleared. This i mmed ia tely clears the bit to avoid taking
a second interrupt. Figure 4–5 shows the interrupt request register.
Figure 4–5 Interrupt Request Register
3124 2320 1916 1512 1108 07 06 0503 02 01 00
06 07050402 030100
63 62
6132
C2 C3C1C0D2 D3D1D0
A2 A3A1A0B2 B3B1B0
Reserved
NMI INT
Halt INT
Reserved
Real-time CLK_INT
ISA_INT
PCI_INT A
PCI_INT B
PCI_INT C
PCI_INT D
CONFIG[7:0]
Reserved
21174 CLK_INT
ERROR INT
n
n
n
n
The interrupt mask register provides individual mask bits for each interrupt.
Table 4–2 lists the AlphaPC 164SX system interrupts, and Table 4–3 lists the ISA
interrupts.
Table 4–2 AlphaPC 164SX System Interrupts
21164PC Interrupt IPL
cpu_irq[0]20Corrected system errorReserved
cpu_irq[1]21—PCI and ISA interrupts
cpu_irq[2]22Interprocessor and
Figure 4–6 shows the AlphaPC 164SX clock generation and distribution scheme.
The AlphaPC 164SX system includes input clocks to the microprocessor as well as
clock distribution for the various system memory and I/O devices. There are other
miscellaneous clocks for ISA bus support. System clocking can be divided into the
following th ree main areas :
•Microprocess or input cl ock — The input clock runs at the operati ng frequency
of the 21 164PC mic roproc essor. The AlphaPC 164SX supports cycle t imes f rom
2.50 ns to 1.88 ns. This implies input clock frequencies from 400 MHz to
533 MHz. The clock is pro vided by using a synt hesizer. The synthesizer’ s output
is used as the input clock for the 21164PC.
•Clock distribution — Clock distri buti on i n clu des t h e di st ribution of system
clocks from the 21164PC microprocessor to the sys tem l ogic . The AlphaPC
164SX clock distribution scheme is flexibl e enough to al low the majo rity of c ycl etime combinations to be support ed. Because the PCI is synchronous to the system
clock generated by the 21 164PC microprocessor, the PCI cycle time is a multiple
of the 21164PC cycle time. This distri b ution scheme supports a PCI operation of
33 MHz.
•Miscellaneous clocks — The miscellaneous clocks include those needed for
ISA and the combina tion contr oller. These clocks are provi ded by a cr ystal and a
frequency generator with fixed scaling.
At system reset, the clock synthe sizer is p rogrammed to pr ovid e a 400 -MHz cloc k to
the 21164PC
. The IRQ pins in the 21164PCare either pulled up or down to set the
internal driver to divide by 6, providing a system clock of 66 MHz (sys_clk_out1).
If an operating frequency other than 400 MHz is selected by the configuration
switches, the boot code changes the synthesizer output; the 21174 drives the correct
divide ratio onto the IRQ lines and resets the CPU. If an invalid speed setting is
selected, the system defaults to the operating speed of 400 MHz.
26 November 1997 – Subject To Change
Functional Description4–13
Reset and Initialization
The 21164 PC microprocesso r produces th e divided clo ck output signal sys_clk_out 1
that drives the CY2308 PLL clock- dr ive r chi p. Thi s cl ock pr ovides the references to
synchronize the 21164PC microprocessor and the 21174 chip. The 21174 provides
the system memory and I/O (PCI) clock references. It also provides system-level
clocking to DIMMs, PCI slots , the PCI-ISA bridge, the PCI ID controller, and the
PCI arbiter.
A 14.3-MHz crystal produces the signal 14mhz_out. This signal is delivered to the
FDC37C669 combination controller for the diskette data separator and other I/O
clocks. The combination controller produces output clock osc, which is then delivered to the two ISA slots and the PCI-to-ISA bridge for synchronization.
4.6 Reset and Initialization
A TL7702B power monitor senses the +3.3-V rail to ensure that it is stable before
+2.5 V is applied to the 21164PC. In normal operation, if the +3.3-V rails fall below
+2.5 V, the power monitor enables shdn_l, which turns off the +2.5-V regulator.
An external reset switch can be connected to J20. The reset function initializes the
21164PC and the system logic. The p_dcok signal provides a full system initialization, equivalent to a power-down and power-up cycle.
In addition, the fan sense signal (fan_ok_l) is logically ORed with the reset switch
output and the p_dcok signal. This signal (monitor_reset_l) is used to reset the
MAX708R +3.3-V monitor. If any of the signals become a ssert ed, or if + 3.3 V drop s
to +2.5 V, then dc_ok_h is deasserted, which causes a system reset.
Figure 4–7 shows the logic controlling system reset and initialization.
Figure 4–7 System Reset and Initialization
J2
+3.3 V
J14
2
Fan
Sensor
J20
4
3
Reset
Switch
J2
8
Power
Supply
4–14 Functional Description
Sense
fan_ok_l
Debounce
p_dcok
shdn_l
To +2.5-V Regulator
3-V
Monitor
26 November 1997 – Subject To Change
dc_ok_h
PCI-ISA
Bridge
21174
cpu_reset
21164PC
4.7 DC Power Distribution
The AlphaPC 164SX derives its system power from a user-supplied PC power supply. The power supply must provide +12 V dc and −12 V dc, −5 V dc, +3 V dc, and
+5 V dc (Vdd). The dc power is supplied through power connector J2 , as shown in
Figure 4–8. Power is dist ributed to the board logic through dedicated power planes
within the six-layer board structure.
Figure 4–8 shows that the +12 V dc, −12 V dc, and −5 V dc are supplied to ISA con-
nectors J22 and J23. The +12 V dc and −12 V dc are supplied to ISA connectors and
PCI32 connectors J15 and J17. T he +12 V dc is als o suppl ied to the CPU fa n connec tor J14, and auxiliary fan conn ector J16. Vdd (+5.0 V) is supplied to IS A connecto rs,
PCI32 connectors, and most of the board’s integrated circuits. Vdd also drives the
+2.5-V regulator, which supplies the 21164PC microprocessor.
Figure 4–8 AlphaPC 164SX Power Distribution
Power Connector J2
10
+12 V
12
−12 V
DC Power Distribution
+5 V (Vdd)
4, 6,
19, 20
PCI64
Conn.
18
3,5,7,13,
15,16,17
1, 2, 11
−5 V
Gnd
+3.3 V
ISA Conn.
+3.3-V Pull-Ups
PCI32
Conn.
26 November 1997 – Subject To Change
Spkr
Conn.
+5-V
Pull-Ups
Pull-Downs
Integrated
Circuits/Clocks
+2.5-V
Regulator
Fan
Functional Description4–15
CPU
Fan
21164PC
Serial ROM and Debug Port Support
4.8 Serial ROM and Debug Port Support
Though it is not needed for normal operation, there is logic support for the use of a
serial ROM and debug port. If an SROM is populated, the 21164PC loads its boot
code from the SROM instead of from flash ROM. This code initializes the system,
then transfers control to either the Mini-Debugger or the selected firmware, depending upon the setting of the configuration jumper.
4–16 Functional Description
26 November 1997 – Subject To Change
Upgrading the AlphaPC 164SX
For higher system speed or greater throughput, SDRAM memory can be upgraded
by replacing DIMMs with those of greater size.
When configuring or upgrading SDRAM, observe the following rules:
•Each DIMM must be a 168-bi t un buffered version and have a frequency of
100 MHz.
•Each bank consists of two DIMMs and must be fully populated.
•Both DIMMs in the same bank must be of equal size.
5.1 Configuring SDRAM Memory
Although not an exhausti ve list, Table 5–1 lists the tested SDRAM memory
configurations avail able. As additional conf igurations become available, they will be
posted in online revisions of this manual on the DIGITAL Semiconductor World
Wide Web Internet site. See Appendix B for the URL.
For a list of vendors who supply components and accessories for the
AlphaPC 164SX, see Appendix A.
5
Refer to Figure 2–1 for DIMM connector locations.
Note: 1Mb × 72 and 1Mb × 64 DIMMs are not supported.
Total MemoryBank 0 (J7 and J8)1Bank 1 (J9 and J10)
32MB2Mb × 72—
64MB2Mb
96MB4Mb
128MB4Mb
160MB8Mb
192MB8Mb
256MB8Mb
512MB16Mb
1
64-bit-wide DIMMs can also be used.
× 72
4Mb
× 72
× 722Mb × 72
× 72
8Mb
× 72
× 722Mb × 72
× 724Mb × 72
× 72
16Mb
× 72
× 7216Mb × 72
5.2 Upgrading SDRAM Memory
2Mb
—
4Mb
—
8Mb
—
1
× 72
× 72
× 72
You can upgrade memory in the AlphaPC 164SX by adding more DIMMs or
replacing the ones you have with a greater size. Refer to Figure 2–1 for DIMM
connector locations.
Use the following general guidelines:
1. Observe antistatic precautions. Handle DIMMs only at the edges to prevent
damage.
2. Remove power from the system.
3. Align the DIMM so that the notch in the DIMM matches the key in the socket.
4. Firmly push the DIMM straight into t he conn ector. Ensure that the DIMM s nap s
into the plastic locking levers on both ends.
5. Restore power to the system.
5–2Upgrading the AlphaPC 164SX
26 November 1997 – Subject To Change
Increasing Microprocessor Speed
5.3 Increasing Microprocessor Speed
This section describes how to complete the following actions to increase
microprocessor speed:
•Replace the DIGITAL Semiconductor 21164PC microprocessor with an Alpha
chip that has a higher speed rating.
•Reconfigure the clock divisor switches.
5.3.1 Preparatory Information
Caution:Static-Sensitive Component – Due to the sensitive nature of electronic
components to static electricity, anyone handling the microprocessor
must wear a properly grounded antistatic wriststrap. Use of antistatic
mats, ESD approved workstations, or exercising other good ESD practices is recommended.
A DIGITAL Semiconductor 21164PC microprocessor with a higher speed rating is
available from your local distributor. See Appendix A for information about
supporting products.
When replacing the microprocessor chip, also replace the thermal conducting
GRAFOIL pad. See Appendix A for information about the parts kit, which includes
the heat sink, GRAFOIL pad, two hex nuts, heat-sink clips, 52-mm fan, and four
screws.
5.3.2 Required Tools
The following tools are required when replacing the microprocessor chip:
A TS30 manual nut/torque driver (or equivalent) with the following attachments is
required to affix the heat sink and fan to the microprocessor’s IPGA package:
•1/4-inch hex bit
•3/8-inch socket with 1/4-inch hex drive
•#2 Phillips-head screwdriver bit
26 November 1997 – Subject To Change
Upgrading the AlphaPC 164SX5–3
Increasing Microprocessor Speed
5.3.3 Removing the 21164PC Microprocessor
Remove the microprocessor currently in place at location U31 by performing the
following st eps:
1. Unplug the fan power/sensor cable from connector J14 (see Figure 2–1).
2. Remove the four 6–32 × 0.625-inch screws that secure the fan to the heat sink.
3. Remove the f an.
4. If the sink/chip/fan clip is used, remove it by unhoo king its end s from around t he
ZIF socket retainers.
5. Using a 3/8-inch socket, remove the two nuts securi ng the hea t sink t o the micro processor studs.
6. Remove the heat sink by gently lifting it off the microprocessor.
7. Remove and discard the GRAFOIL heat conduction pa d.
8. Thoroughly clean the bottom surface of the heat sink before affixing it to the
new microprocessor.
9. Lift the ZIF socket actuator handle to a full 90° angle.
10. Remove the microprocessor chip by lifting it straight out of the socket.
5.3.4 Installing the 21164PC Microprocessor
Install the new microprocessor in location U31 by performing the following steps:
Note:Instal l the hea t sin k only aft er t he micro pro cessor has be en ass emble d to
the ZIF socket.
1. Observe antistatic precautions.
2. Lift the ZIF socket actuator handle to a full 90° angle.
3. Ensure that all the pins on the microprocessor package are straight.
4. The ZIF socket and microprocessor are keyed to allow for proper installation.
Align the microprocess or, with its missing AD01 pin, with the corresponding
plugged AD01 position on the ZIF socket. Gently lower into position.
5. Close the ZIF socket actuator handle to its locked position.
6. Install the heat sink and heat-sink fan as directed in the following steps. A heatsink/fan kit is available from the vendor listed in Appendix A. Refer to
Figure 5–1 for heat-sink and fan assembly details.
5–4Upgrading the AlphaPC 164SX
26 November 1997 – Subject To Change
Figure 5–1 Fan/Heat-Sink Assembly
Increasing Microprocessor Speed
Screw, 6–32 × 0.625 in
Qty 4
Torque to 3
Fan
Clip, Heat-Sink/Chip/Fan
Nut, Hex,
Aluminum
Flats, Qty 2
Torque to15
Heat Sink, with Fan
Mounting Holes
±1 in-lb
±2 in-lb
Airflow
Thermal Pad
Alpha 21164PC
a. Put the GRAFOIL thermal pad in place. The GRAFOIL pad is used to
improve the thermal conductivity between the chip package and the heat
sink by replacing micro air pockets with a less insulative material. Perform
the following steps to position the GRAFOIL pad:
1. Perform a visual inspection of the package slug to ensure that it is free of
contamination.
2. Wearing clean gloves, pick up the GRAFOIL pad. Do not perform this
with bare hands because skin oils can be transferred to the pad.
3. Place the GRAFOIL pad on the gold-plated slug surface and align it with
the threaded studs.
26 November 1997 – Subject To Change
Upgrading the AlphaPC 164SX5–5
Increasing Microprocessor Speed
b. Attach the microprocessor heat sink. The heat-sink material is clear
anodized, hot-water -sealed, 60 61-T6 aluminum. The nut mat erial is 201 1-T3
aluminum (this grade is critical). Perform the following steps to attach the
heat sink:
1. Observe antistatic precautions.
2. Align the heat-sink holes with the threaded studs on the ceramic package.
3. Handle the heat sink by the edges and lower it onto the chip package,
taking care not to damage the stud threads.
4. Set a calibrated torque driver to 1 5 in-lb, ±2 in -lb, (2.3 Nm, ±0.2 Nm).
The torque driver should have a mounted 3/8-inch socket.
5. Insert a nut into the 3/8-inch socket, place on on e of t he studs, and tighten
to the specified torque. Repeat for the second nut.
6. If the sink/chip/fan clip is used, properly install it by positioning it over
the assembly and hooking its ends around the ZIF socket retainers.
c. Attach the heat-sink fan assembly:
1. Place the fan assembly on top of the heat sink, aligning the fan mounting
holes with the corresponding threaded heat-sink holes. Align the fan so
that the fan power/sensor wires exit the fan closest to connector J14 (see
Figure 2–1). Fan airflow must be directed into the heat sink (f an label facing down toward the heat sink).
2. Using a calibrated torque driver set to 3 in-lb, ±1 in-lb, secure the fan to
the heat sink with four 6–32 × 0.625-inch screws.
3. Plug the fan power/se nsor cable into connector J14.
Note:When instal ling the microprocessor, you must change the frequency of
its clock output by setting the system clock divisor switches, as
described in Section 2.2.
5–6Upgrading the AlphaPC 164SX
26 November 1997 – Subject To Change
This appendix lists sources for components and accessories that are not included
with the AlphaPC 164SX. For the latest information, visit the Alpha website at
URL: http://www.alpha.digital.com. Click on MotherboardProducts. The
hardware compatibility list (HCL) is also available at this location.
A.1 Memory
Dual inline memory modules (DIMMs) are available from:
Micron Semiconductor Products, Inc.
8000 South Federal Way
Mail Stop 607
Boise, ID 83706
Phone: 208-368-3900
Fax: 208-368-5018
attn: Carl Johnson, OEM Development Executive
30200 Avenida de la Banderas
Rancho Santa Margarita, CA 92688
Phone: 1-800-338-2361, ext. 316
Fax: 714-643-7250
PN VE2641U4SN3-DC01 (2Mb × 64)
Components included in this heat-sink and fan solution are heat sink, GRAFOIL
pad, two hex nuts, heat-sink clips, 52-mm fan, and four screws. These are available
from:
If you need technical support, a DIGITAL Semiconductor Product Catalog, or help
deciding which documentation best meets your needs, visit the DIGITAL
Semiconductor World Wide Web Internet site:
http://www.digital.com/semiconductor
You can also call the DIGITAL Semiconductor Information Line or the DIGITAL
Semiconductor Customer Technology Center. Please use the following information
lines for support.
For documentation and general information:
DIGITAL Semiconductor Information Line
United States and Canada:1-800-332-2717
Outside North America:1-510-490-4753
Electronic mail address:semiconductor@digital.com
For technical support:
DIGITAL Semiconductor Customer Technology Center
Phone (U.S. and internation a l) : 1-978-568- 747 4
Fax:1-978-568-6698
Electronic mail address:ctc@hlo.mts.dec.com
26 November 1997 – Subject to Change
Support, Products, and DocumentationB–1
DIGITAL Semiconductor Products
To order the AlphaPC 164SX motherboard, contact your local distributor. The following tables list some of the semiconductor products available from DIGITAL
Semiconductor.
Note:The foll owing product s and order numbers might ha ve been revi sed. For
the latest versions, contact your local distributor.
ChipsOrder Number
DIGITAL Semiconductor Alpha 21164PC microp rocessor (400 MHz)211PC-01
DIGITAL Semiconductor Alpha 21164PC microp rocessor (533 MHz)211PC-03
Motherboard kits include the motherboard and motherboard user’s manual.
Motherboard KitsOrder Number
DIGITAL Semiconductor AlphaPC 164SX Motherboard Kit for
Windows NT
DIGITAL Semiconductor AlphaPC 164SX Motherboard Kit for
DIGITAL UNIX
21A05-A0
21A05-A1
Design kits include full documentation and schematics. They do not include related
hardware.
Design KitsOrder Number
AlphaPC 164SX Motherboard Software Developer’s Kit
(SDK) and Firmware Update
QR-21A04-12
(Available Fall,1997)
B–2Support, Products, and Documentation
26 November 1997 – Subject to Change
DIGITAL Semiconductor Documentation
The following t abl e li st s some of the available DIGITAL Semiconductor documenta tion.
TitleOrder Number
Alpha AXP Architecture Reference Manual
Alpha Architecture Handbook
2
1
EY–T132E–DP
EC–QD2KB–TE
DIGITAL Semiconductor Alpha 21164PC Microp rocessor
Hardware Reference Manual
DIGITAL Semiconductor Alpha 21164PC Microp rocessor
Data Sheet
1
To purchase the Alpha AXP Architecture Reference Manual, contact your local distributor or call
Butterworth-Heinemann (Digital Pr ess) at 1-800-366-2665.
2
This handbook provides information subsequent to the Alpha AXP Architecture Refe rence Manual.
Third–Party Documentation
You can order the following third-party documentation directly from the vendor.
TitleVendor
PCI Local Bus Specification, Revision 2.1
PCI Multimedia Design Guide, Revision 1.0
PCI System Design Guide
PCI-to-PCI Bridge Architecture Specification,
Revision 1.0
PCI BIOS Spec ification, Revi sion 2.1
CY82C693U hyperCache/Stand-Alon e PCI
Peripheral Controller with USB Data Sheet
EC–R2W0A–TE
EC–R2W1A–TE
PCI Special Interest Group
U.S.1–800–433–5177
International 1–503–797–4207
Fax1–503–234–6762
Cypress Semiconductor Corporation
3901 North First Street
San Jose, CA 95134
Phone: 1-800-858-1810
Super I/O Floppy Disk Controller with Infrared
Support (FDC37C669) Data Sheet
26 November 1997 – Subject to Change
Standard Micros ystems Corporation
80 Arkay Drive
Hauppauge, NY 11788
Phone: 1-800-443-7364
Fax: 1-516-231-6004
Support, Products, and DocumentationB–3
Index
Numerics
21164 microprocessor. See Microprocessor.
21174 Core logic chip. See Core logic chip.
37C669. See Com bination controller.