DATEL EVB-SHM12 Datasheet

INNOVATION and EX C ELL E N C E

® ®

GROUND

NOT CONNECTED

FEATURES

• Fast acquisition time:

10ns to ±0.1%
15ns to ±0.024%
20ns to ±0.012%

• ±0.006% Nonlinearity

• 65µVrms output noise

• 120MHz small signal bandwidth

• 55MHz full power bandwidth

• –80dB feedthrough

• 1ps Aperture jitter

• 250mW power dissipation

• Low cost

GENERAL DESCRIPTION

The SHM-12 is an extremely high-speed and accurate
monolithic sample-and-hold amplifier designed for fast data
acquisition applications. The SHM-12 is accurate (±1LSB at 12
bits over the full military temperature range) and is very fast
(10ns and 15ns acquisition times to accuracies of 10 and 12­bits, respectively). With this high performance and a full power
bandwidth of 55MHz, the SHM-12 is an ideal device for driving
flash and high-resolution subranging A/D converters.

A careful design optimizes the device for accuracy and speed
over the full military temperature range. The droop rate is a low
±0.5mV/µs. The 30mA output current and guaranteed
specifications for a 100Ω load provide high drive capability.
Operating from ±5V supplies, the SHM-12 consumes only
250mW of power.

SHM-12

Ultra-Fast, 12-Bit Linear

Monolithic Sample-Hold Amplifiers

INPUT/OUTPUT CONNECTIONS

(CLCC and SOIC-20 Packages)

PIN FUNCTION

1 –5V SUPPLY
2 –5V SUPPLY
3 NOT CONNECTED
4 ANALOG INPUT
5 –5V SUPPLY
6 DO NOT CONNECT
7 –5V SUPPLY
8 DO NOT CONNECT
9 –5V SUPPLY

10 –5V SUPPLY

The SHM-12 is built using a fast complementary bipolar
process. The device is available in both military and industrial
temperature ranges. The SHM-12 is packaged in a 20-pin
plastic SOIC or ceramic LCC.

PIN FUNCTION

20 +5V SUPPLY
19 SAMPLE/HOLD
18 SAMPLE/HOLD
17 +5V SUPPLY
16 GROUND
15 EXT. CAPACITOR
14 GROUND
13 +5V SUPPLY
12 +5V SUPPLY
11 ANALOG OUTPUT

EXTERNAL HOLD

CAPACITOR–5V SUPPLY +5V SUPPLY

1, 2, 5, 7, 9, 10

ANALOG INPUT

SAMPLE/HOLD

SAMPLE/HOLD

DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: [phone] Fax: [phone] • For immediate assistance [phone]

4

18

19

+1

15pF

SWITCH

DRIVE

Figure 1. SHM-12 Functional Block Diagram

15 12, 13, 17, 20

C

H

14, 16

11

3

6, 8

ANALOG
OUTPUT

DO NOT
CONNECT

+1

SHM-12

® ®

ABSOLUTE MAXIMUM RATINGS

PARAMETERS LIMITS UNITS

+5V Supply 0 to +6 Volts
–5V Supply 0 to –6 Volts
Analog Input +5V Supply –1 Volts

–5V Supply +1 Volts

Continuous Output Current ±50 mA
Digital Inputs <Supply Voltages Volts
Junction Temperature +175 °C
Lead Temperature (10 seconds) +300 °C

Output shorted to any supply will cause permanent damage.

FUNCTIONAL SPECIFICATIONS

(Apply over the operating temperature range using a 100Ω resistive load, 10pF
capacitive load, ECL digital input levels, a 47pF external hold capacitor, and ±5V
nominal supplies, unless otherwise specified.)

INPUTS MIN. TYP. MAX. UNITS

Input Voltage Range –1.5 — +1.5 Volts
Input Impedance 0.3 1 — MΩ
Digitals Inputs (Balanced ECL)
Logic Levels

Logic 1 –1.5 — +1.8 Volts
Logic 0 –2.5 — +0.8 Volts

Logic Loading

Logic 1 — +10 +50 µA
Logic 0 — –30 –150 µA

OUTPUTS

Output Voltage Range –1.5 — +1.5 Volts
Output Current
Output Impedance (dc) — 0.3 1 Ω
Stable Capacitive Load — — 50 pF

PERFORMANCE

Nonlinearity (±1V)

+25°C — ±0.006 — %
–40 to +85°C — — ±0.024 %
–55 to +125°C — — ±0.024 %

Sample Mode Offset

+25°C — ±12 — mV
–40 to +85°C — — ±20 mV
–55 to +125°C — — ±30 mV

Pedestal

+25°C — ±3 — mV

–40 to +85°C — — ±20 mV

–55 to +125°C — — ±20 mV

Gain, +25°C +0.98 +0.995 — V/V
Gain Drift (±1V)

–40 to +85°C — — ±20 ppm/°C
–55 to +125°C — — ±30 ppm/°C

Aperture Delay

–40 to +85°C — 2 — ns
–55 to +125°C — 2 — ns

Aperture Jitter

–40 to +85°C — 1 — ps rms
–55 to +125°C — 1 — ps rms

Harmonic Distortion (±1V)

dc to 1MHz — –75 — dB
dc to 10MHz

+25°C — –62 — dB
–40 to +85°C — — –56 dB
–55 to +125°C — — –54 dB

Acquisition Time (±0.012%, ±1V)

–40 to +85°C — 20 — ns
–55 to +125°C — 30 — ns

Acquisition Time (±0.024%, ±1V)

–40 to +85°C — 15 30 ns
–55 to +125°C — 25 40 ns

Acquisition Time (±0.05%, ±1V)

–40 to +85°C — 12 25 ns
–55 to +125°C — 15 30 ns

• ± 30 — — mA

PERFORMANCE (Cont.) MIN. TYP. MAX. UNITS

Acquisition Time (±0.1%, ±1V)

–40 to +85°C — 10 20 ns
–55 to +125°C — 10 20 ns

Hold Mode Settling (±0.012%)

–40 to +85°C — 10 — ns
–55 to +125°C — 10 — ns

Hold Mode Settling (±0.024%)

–40 to +85°C — 7 18 ns
–55 to +125°C — 7 18 ns

Hold Mode Settling (±0.05%)

–40 to +85°C — 6 15 ns
–55 to +125°C — 6 15 ns

Hold Mode Settling (±0.1%)

–40 to +85°C — 5 12 ns
–55 to +125°C — 5 12 ns

Slew Rate ±220 ±350 — V/µs
Full Power Bandwidth (±1V) 35 55 — MHz
Small Signal Bandwidth 50 120 — MHz
Output Noise, Hold Mode — 65 — µVrms
Feedthrough (2V Step) — –80 — dB
Droop Rate

+25°C — ±0.5 ±1.5 mV/µs
–40 to +85°C — ±2 ±5 mV/µs
–55 to +125°C — ±2.5 ±10 mV/µs

POWER SUPPLY REQUIREMENTS

Power Supply Range

+5V Supply +4.5 +5 +5.5 Volts
–5V Supply –5.5 –5 –4.5 Volts

Power Supply Current

+5V Supply +17 +25 +30 mA
–5V Supply –17 –25 –30 mA

Power Dissipation 170 250 300 mW
Power Supply Rejection Ratio 40 60 — dB

ENVIRONMENTAL

Operating Temp. Range, Case

SHM-12S, SHM-12L –40 — +85 °C
SHM-12LM –55 — +125 °C

Storage Temperature Range –65 — +150 °C
Package Type

SHM-12S 20-Pin plastic SOIC
SHM-12L, SHM-12LM 20-Pin ceramic LCC

Footnotes:

• Short circuit protection at ±50mA.

TECHNICAL NOTES

The SHM-12 employs an open loop architecture to achieve its
superior high-speed characteristics. The first stage buffer
amplifier incorporates the sample-and-hold switch. This allows
for a fast acquisition time which is not limited by slew current
like the traditional Schottky diode bridge switch. The output
amplifier uses a closed loop voltage feedback design which
provides a low (0.3Ω, typical) output impedance. Gain and
linearity are not affected by heavy loads.

The design has been optimized to achieve the high accuracy
associated with fast transient responses over the military tem­perature range. During the track-to-hold transient, the integral
nonlinearity is not affected and the pedestal remains constant
over the full ±1.5V input range.

An innovative circuit design ensures an extremely low droop rate.
An external hold capacitor can be added to the 15pF internal
hold capacitor to obtain a lower droop rate (the droop rate is pro­portional to the inverse of the total hold capacitor value) without
increasing transient response times by more than a few ns. The
external hold capacitor should not exceed 100pF.

2