DATEL ADS-EVAL3, ADS-930MM, ADS-930MC Datasheet

DATEL, Inc., 11
Boulevard, Mansfield, MA 02048 (U.S.A.) • Tel: (508)339-3000, (800)233-2765 Fax: (508)339-6356 • Email: datellit@mcimail.com
FEATURES
®
®
INNOV A TION and EX CELLENCE
3-STATE
OUTPUT REGISTER
21 BIT 16 (LSB)
CUSTOM GATE ARRAY
3-PASS ANALOG-TO-DIGITAL CONVERTER
16-bit resolution
500kHz sampling rate
Functionally complete
Excellent dynamic performance
83dB SNR, –89dB THD
No missing codes
Small, 40-pin, TDIP package
3.5 Watts power dissipation
On-board FIFO
GENERAL DESCRIPTION
The low-cost ADS-930 is a high-performance, 16-bit, 500kHz sampling A/D converter. This device accurately samples full­scale input signals up to Nyquist frequencies with no missing codes. The dynamic performance of the ADS-930 is optimized to achieve a THD of –89dB and an SNR of 83dB.
Packaged in a small, 40-pin, ceramic TDIP, the functionally complete ADS-930 contains a fast-settling sample-hold amplifier, a subranging (three-pass) A/D converter, an internal reference, an on-board FIFO, timing and control logic, three­state outputs and error-correction circuitry. Digital inputs/ outputs are TTL.
Requiring ±15V and +5V supplies, the ADS-930 typically dissipates 3.5 Watts. The unit is offered with a bipolar input range of ±5V or a unipolar input range of 0 to –10V. Models are available for use in either commercial (0 to +70°C) or military (–55 to +125°C) operating temperature ranges. Typical applications include radar, sonar, medical/graphic imaging, and FFT spectrum analysis.
ADS-930
16-Bit, 500kHz
Sampling A/D Converters
INPUT/OUTPUT CONNECTIONS
PIN FUNCTION PIN FUNCTION
1 +10V REF. OUT 40 BIT 1 (MSB) 2 BIPOLAR 39 BIT 1 (MSB) 3 ANALOG INPUT 38 BIT 2 4 ANALOG GROUND 37 BIT 3 5 OFFSET ADJUST 36 BIT 4 6 GAIN ADJUST 35 BIT 5 7 +15V SUPPLY 34 BIT 6 8 COMP. BITS 33 BIT 7
9 ENABLE 32 BIT 8 10 FIFO READ 31 BIT 9 11 ANALOG GROUND 30 ANALOG GROUND 12 –15V SUPPLY 29 BIT 10 13 ANALOG GROUND 28 BIT 11 14 OVERFLOW 27 BIT 12 15 EOC 26 BIT 13 16 +5V SUPPLY 25 BIT 14 17 START CONVERT 24 DIGITAL GROUND 18 DIGITAL GROUND 23 FIFO/DIR 19 FSTAT1 22 BIT 15 20 FSTAT2 21 BIT 16 (LSB)
POWER AND GROUNDING
+5V SUPPLY +15V SUPPLY –15V SUPPLY ANALOG GROUND DIGITAL GROUND
Cabot
4, 11, 13, 30
18, 24
16
7
12
GAIN
ADJUST
CKT.
+10V REFERENCE
OFFSET ADJUST
CKT.
S/H
CONTROL LOGIC
PRECISION
TIMING AND
GAIN ADJUST 6
+10V REF. OUT 1
OFFSET ADJUST 5
BIPOLAR 2
ANALOG INPUT 3
START CONVERT 17
EOC 15
COMP. BITS 8
Figure 1. ADS-930 Functional Block Diagram
19 FSTAT1 20 FSTAT2 23 FIFO/DIR 10 FIFO READ
40 BIT 1 (MSB) 39 BIT 1 (MSB) 38 BIT 2 37 BIT 3 36 BIT 4 35 BIT 5 34 BIT 6 33 BIT 7 32 BIT 8 31 BIT 9 29 BIT 10 28 BIT 11 27 BIT 12 26 BIT 13 25 BIT 14 22 BIT 15
9 ENABLE
14 OVERFLOW
ADS-930
2
®
®
ABSOLUTE MAXIMUM RATINGS
PARAMETERS LIMITS UNITS
+15V Supply (Pin 7) 0 to +16 Volts –15V Supply (Pin 12) 0 to –16 Volts +5V Supply (Pin 16) 0 to +6 Volts Digital Inputs (Pin 8, 9, 10, 17, 23) –0.3 to +V Analog Input (Pin 3)
Unipolar –12.5 to +12.5 Volts Bipolar –7.5 to +12.5 Volts
Lead Temperature (10 seconds) +300 °C
DD +0.3 Volts
PHYSICAL/ENVIRONMENTAL
PARAMETERS MIN. TYP. MAX. UNITS
Operating Temp. Range, Case
ADS-930MC 0 +70 °C ADS-930MM –55 +125 °C
Thermal Impedance
θjc 4 °C/Watt θca 18 °C/Watt
Storage Temperature Range –65 +150 °C Package Type 40-pin, metal-sealed, ceramic TDIP
Weight 0.56 ounces (16 grams)
FUNCTIONAL SPECIFICATIONS
(TA = +25°C, ±VCC = ±15V, +VDD = +5V, 500kHz sampling rate, and a minimum 5 minute warmup unless otherwise specified.)
+25°C 0 to +70°C –55 to +125°C
ANALOG INPUTS MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Input Voltage Range
Bipolar ±5 ±5 ±5 Volts Unipolar 0 to –10 0 to –10 0 to –10 Volts
Input Resistance 1.4 1.5 1.7 1.4 1.5 1.7 1.4 1.5 1.7 k Input Capacitance 7 15 7 15 7 15 pF
DIGITAL INPUTS
Logic Levels
Logic "1" +2.0 +2.0 +2.0 Volts Logic "0" +0.8 +0.8 +0.8 Volts Logic Loading "1" +20 +20 +20 µA Logic Loading "0" –20 –20 –20 µA
Start Convert Positive Pulse Width 175 200 215 175 200 215 175 200 215 ns
STATIC PERFORMANCE
Resolution 16 16 16 Bits Integral Nonlinearity (f Differential Nonlinearity (f
in = 10kHz) ±1.0 ±1.5 ±2.0 LSB
in = 10kHz) ±0.75 ±1.0 ±1.5 LSB
Full Scale Absolute Accuracy ±0.05 ±0.18 ±0.2 ±0.5 ±0.5 ±0.8 %FSR Unipolar Zero Error (Tech Note 2) ±0.05 ±0.085 ±0.1 ±0.25 ±0.25 ±0.5 %FSR Bipolar Zero Error (Tech Note 2) ±0.05 ±0.085 ±0.15 ±0.25 ±0.25 ±0.5 %FSR Bipolar Offset Error (Tech Note 2) ±0.05 ±0.15 ±0.1 ±0.25 ±0.25 ±0.5 %FSR Gain Error (Tech Note 2) ±0.1 ±0.15 ±0.15 ±0.35 ±0.25 ±0.65 % No Missing Codes (f
in = 10kHz) 16 16 15 Bits
DYNAMIC PERFORMANCE
Peak Harmonics (–0.5dB)
dc to 100kHz –91 –91 –87 dB 100kHz to 250kHz –86 –86 –84 dB
Total Harmonic Distortion (–0.5dB)
dc to 100kHz –89 –81 –89 –81 –85 –76 dB 100kHz to 250kHz –84 –84 –82 dB
Signal–to–Noise Ratio
(w/o distortion, –0.5dB) dc to 100kHz 81 83 81 83 75 80 dB 100kHz to 250kHz 80 80 79 dB
Signal–to–Noise Ratio
(& distortion, –0.5dB) dc to 100kHz 78 81 77 81 72 78 dB 100kHz to 250kHz 78 78 76 dB
Two–Tone Intermodulation
Distortion (f
240kHz, f
in = 100kHz,
s = 500kHz, –0.5dB) –82 –82 –81 dB
Noise 150 150 150 µVrms Input Bandwidth (–3dB)
Small Signal (–20dB input) 2 2 2 MHz Large Signal (–0.5dB input) 1.1 1.1 1.1 MHz
Feedthrough Rejection
in = 250kHz) 92 92 92 dB
(f
Slew Rate ±80 ±80 ±80 V/µs
®
3
®
ADS-930
+25°C 0 to +70°C –55 to +125°C
DYNAMIC PERFORMANCE (Cont.) MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS
Aperture Delay Time ±10 ±10 ±10 ns Aperture Uncertainty 5 5 5 ps rms S/H Acquisition Time
( to ±0.003%FSR, 10V step) 460 545 460 545 460 545 ns
Overvoltage Recovery Time 600 1000 600 1000 600 1000 ns A/D Conversion Rate 500 500 500 kHz
ANALOG OUTPUT
Internal Reference
Voltage +9.95 +10.0 +10.05 +9.95 +10.0 +10.05 +9.95 +10.0 +10.05 Volts Drift ±10 ±10 ±10 ppm/°C
External Current 1 1 1 mA
DIGITAL OUTPUTS
Logic Levels
Logic "1" +2.4 +2.4 +2.4 Volts Logic "0" +0.4 +0.4 +0.4 Volts Logic Loading "1" –4 –4 –4 mA Logic Loading "0" +4 +4 +4 mA
Delay, Falling Edge of ENABLE
to Output Data Valid 10 10 10 ns
Output Coding
POWER REQUIREMENTS
Complementary Offset Binary; Complementary Two's Complement, Offset Binary, Two's Complement
Power Supply Ranges
+15V Supply +14.5 +15.0 +15.5 +14.5 +15.0 +15.5 +14.5 +15.0 +15.5 Volts –15V Supply –14.5 –15.0 –15.5 –14.5 –15.0 –15.5 –14.5 –15.0 –15.5 Volts +5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.75 +5.0 +5.75 Volts
Power Supply Currents
+15V Supply +110 +130 +110 +130 +110 +130 mA –15V Supply –100 –125 –100 –125 –100 –125 mA +5V Supply +80 +90 +80 +90 +80 +90 mA
Power Dissipation 3.5 4.25 3.5 4.25 3.5 4.25 Watts Power Supply Rejection ±0.02 ±0.02 ±0.02 %FSR/%V
Footnotes:
All power supplies must be on before applying a start convert pulse. All
supplies and the clock (START CONVERT) must be present during warmup periods. The device must be continuously converting during this time.
When COMP. BITS (pin 8) is low, logic loading "0" will be –350µA.A 200ns wide start convert pulse is used for all production testing. For
applications requiring less than a 500kHz sampling rate, wider start convert pulses can be used.
Effective bits is equal to:
(SNR + Distortion) – 1.76 + 20 log
Full Scale Amplitude
Actual Input Amplitude
6.02
TECHNICAL NOTES
1. Obtaining fully specified performance from the ADS-930 requires careful attention to pc-card layout and power supply decoupling. The device's analog and digital ground systems are connected to each other internally. For optimal performance, tie all ground pins (4, 11, 13, 18, 24 and 30) directly to a large analog ground plane beneath the package.
Bypass all power supplies and the +10V reference output to ground with 4.7µF tantalum capacitors in parallel with
0.1µF ceramic capacitors. Locate the bypass capacitors as close to the unit as possible.
2. The ADS-930 achieves its specified accuracies without the need for external calibration. If required, the device's small initial offset and gain errors can be reduced to zero using the adjustment circuitry shown in Figure 2. When using this circuitry, or any similar offset and gain calibra­tion hardware, make adjustments following warmup. To avoid interaction, always adjust offset before gain. Tie pins 5 and 6 to ANALOG GROUND (pin 4) if not using offset and gain adjust circuits.
3. Pin 8 (COMP. BITS) is used to select the digital output coding format of the ADS-930. See Tables 3a and 3b. When this pin has a TTL logic "0" applied, it complements all of the ADS-930's digital outputs.
When pin 8 has a logic "1" applied and the ADS-930 is operated within its unipolar (0 to –10V) input range, the output coding is straight binary. Applying a logic "0" to pin 8 under these conditions changes the output coding to complemen­tary binary.
When pin 8 has a logic "1" applied and the ADS-930 is operated within its bipolar (±5V) input range, the output coding is offset binary. Applying a logic "0" to pin 8 under these conditions changes the coding to complementary offset binary. Using the MSB output (pin 40) instead of the MSB output (pin 39) under these conditions changes the respective output codings to two's complement and complementary two's complement.
Pin 8 is TTL-compatible and can be directly driven with digital
logic in applications requiring dynamic control over its function. There is an internal pull-up resistor on pin 8 allowing
Loading...
+ 5 hidden pages