DATEL ADS-118, ADS-118A Service Manual

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INNOV A TION and EX CELLENCE

REGISTER

REGISTER

3-STATE OUTPUT REGISTER

DIGITAL CORRECTION LOGIC

SUPPLY

GROUND

SUPPLY

GROUND

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FEATURES

• 12-bit resolution

• 5MHz minimum sampling rate

• Functionally complete

• Small 24-pin DDIP

• Requires only ±5V supplies

• Low-power, 1.3 Watts

• Outstanding dynamic performance

• No missing codes over full military temperature range

• Edge-triggered, no pipeline delay

• Ideal for both time and frequency-domain applications

GENERAL DESCRIPTION

DATEL's ADS-118 and ADS-118A are 12-bit, 5MHz, sampling
A/D converters packaged in space-saving 24-pin DDIP’s. The
ADS-118 offers an input range of ±1V and has three-state
outputs. The ADS-118A has an input range of ±1.25V and
features direct adjustment of offset error.

These functionally complete low-power devices (1.3 Watts)
contain an internal fast-settling sample/hold amplifier, a 12-bit
subranging A/D converter, a precise voltage reference, timing/
control logic, and error-correction circuitry. All timing and
control logic operates from the rising edge of a single start
convert pulse. Digital input and output levels are TTL. Models
are available for use in either commercial (0 to +70°C) or
military (–55 to +125°C) operating temperature ranges.

Applications include radar, transient signal analysis, process
control, medical/graphic imaging, and FFT spectrum analysis.

ADS-118, ADS-118A

12-Bit, 5MHz, Low-Power

Sampling A/D Converters

INPUT/OUTPUT CONNECTIONS

PIN FUNCTION PIN FUNCTION

1 BIT 12 (LSB) 24 NO CONNECTION
2 BIT 11 23 ANALOG GROUND
3 BIT 10 22 NO CONNECTION
4 BIT 9 21 +5V ANALOG SUPPLY
5 BIT 8 20 –5V SUPPLY
6 BIT 7 19 ANALOG INPUT
7 BIT 6 18 ANALOG GROUND
8 BIT 5 17 ENABLE/OFFSET ADJ.

9 BIT 4 16 START CONVERT
10 BIT 3 15 EOC
11 BIT 2 14 DIGITAL GROUND
12 BIT 1 (MSB) 13 +5V DIGITAL SUPPLY

* ADS-118, Pin 17 is ENABLE

ADS-118A, Pin 17 is OFFSET ADJUST

*

OFFSET ADJUST 17

(ADS-118A only)

ANALOG INPUT 19

START CONVERT 16

EOC 15

21

+5V ANALOG

–

S/H

+

Σ

TIMING AND

CONTROL LOGIC

+5V DIGITAL

13

AMP

BUFFER

REF

FLASH

ADC

1

DAC

FLASH

ADC

2

14

DIGITAL

–5V SUPPLY

20

18, 23

ANALOG

22, 24

NO CONNECT

17 ENABLE

(ADS-118A only)

12 BIT 1 (MSB)
11 BIT 2
10 BIT 3
9 BIT 4
8 BIT 5
7 BIT 6
6 BIT 7
5 BIT 9
4 BIT 9
3 BIT 10
2 BIT 11
1 BIT 12 (LSB)

Figure 1. ADS-118/118A Functional Block Diagram

DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) • Tel: [phone] Fax: [phone] • For immediate assistance: [phone]

ADS-118/118A

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ABSOLUTE MAXIMUM RATINGS

PARAMETERS LIMITS UNITS

+5V Supply (Pins 13, 21) 0 to +6 Volts
–5V Supply (Pin 20) 0 to –6 Volts
Digital Input (Pin 16, 17) –0.3 to +V
Analog Input (Pin 19) ±5 Volts
Lead Temperature (10 seconds) +300 °C

DD +0.3 Volts

PHYSICAL/ENVIRONMENTAL

PARAMETERS MIN. TYP. MAX. UNITS

Operating Temp. Range, Case

ADS-118/118AMC 0 — +70 °C
ADS-118/118AMM, GM, 883 –55 — +125 °C

Thermal Impedance

θjc — 2 — °C/Watt
θca — 23 — °C/Watt

Storage Temperature Range –65 — +150 °C
Package Type 24-pin, metal-sealed, ceramic DDIP or SMT

Weight 0.42 ounces (12 grams)

FUNCTIONAL SPECIFICATIONS

(TA = +25°C, ±VDD = ±5V, 5MHz sampling rate, and a minimum 3 minute warmup ➀ unless otherwise specified.)

+25°C 0 to +70°C –55 to +125°C

ANALOG INPUT MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS

Input Voltage Range, ADS-118 ➁ — ±1 — — ±1 — — ±1 — Volts
Input Resistance 475 500 — 475 500 — 475 500 — Ω
Input Capacitance — 6 15 — 6 15 — 6 15 pF

DIGITAL INPUT

Logic Levels

Logic "1" +2.0 — — +2.0 — — +2.0 — — Volts
Logic "0" — — +0.8 — — +0.8 — — +0.8 Volts
Logic Loading "1" — — +20 — — +20 — — +20 µA
Logic Loading "0" — — –20 — — –20 — — –20 µA

Start Convert Positive Pulse Width ➂ 50 100 — 50 100 — 50 100 — ns

STATIC PERFORMANCE

Resolution — 12 — — 12 — — 12 — Bits
Integral Nonlinearity (f
Differential Nonlinearity (f

in = 10kHz) — ±0.75 — — ±1.0 — — ±1.5 — LSB

in = 10kHz) — ±0.5 +0.75 — ±0.5 ±0.95 — ±0.75 +0.95 LSB

Full Scale Absolute Accuracy — ±0.1 ±0.5 — ±0.5 ±0.75 — ±0.75 ±1.5 %FSR
Bipolar Zero Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±0.85 — ±0.85 ±2.0 %FSR
Bipolar Offset Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.5 — ±1.5 ±2.5 %FSR
Gain Error (Tech Note 2) — ±0.1 ±0.5 — ±0.5 ±1.0 — ±1.0 ±2.5 %
No Missing Codes (f

in = 10kHz) 12 — — 12 — — 12 — — Bits

DYNAMIC PERFORMANCE

Peak Harmonics (–0.5dB)

dc to 500kHz — –76 –71 — –74 –70 — –72 –66 dB
500kHz to 1MHz — –75 –71 — –74 –70 — –70 –65 dB
1MHz to 2.5MHz — –69 –69 — –73 –67 — –66 –60 dB

Total Harmonic Distortion (–0.5dB)

dc to 500kHz — –72 –68 — –71 –67 — –70 –65 dB
500kHz to 1MHz — –71 –67 — –70 –66 — –67 –63 dB
1MHz to 2.5MHz — –70 –66 — –69 –65 — –66 –60 dB

Signal-to-Noise Ratio

(w/o distortion, –0.5dB)
dc to 500kHz 67 69 — 66 69 — 64 67 — dB
500kHz to 1MHz 66 69 — 65 68 — 63 66 — dB
1MHz to 2.5MHz 66 69 — 65 68 — 63 66 — dB

Signal-to-Noise Ratio ➃

(& distortion, –0.5dB)
dc to 500kHz 65 68 — 64 67 — 62 66 — dB
500kHz to 1MHz 65 68 — 64 67 — 61 65 — dB
1MHz to 2.5MHz 64 67 — 63 66 — 60 64 — dB

Noise — 195 — — 195 — — 195 — µVrms
Two-tone Intermodulation

Distortion (f

975kHz, f

in = 1MHz,

s = 5MHz, –0.5dB) — –74 — — –74 — — –74 — dB

Input Bandwidth (–3dB)

Small Signal (–20dB input) — 20 — — 20 — — 20 — MHz
Large Signal (–0.5dB input) — 10 — — 10 — — 10 — MHz

Feedthrough Rejection (f

in = 2.5MHz) — 80 — — 80 — — 80 — dB

Slew Rate — ±400 — — ±400 — — ±400 — V/µs
Aperture Delay Time — +10 — — +10 — — +10 — ns
Aperture Uncertainty — 3 — — 3 — — 3 — ps rms

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ADS-118/118A

+25°C 0 to +70°C –55 to +125°C

DYNAMIC PERFORMANCE (Cont.) MIN. TYP. MAX. MIN. TYP. MAX. MIN. TYP. MAX. UNITS

S/H Acquisition Time

( to ±0.001%FSR, 10V step) — 85 90 — 85 90 — 85 90 ns

Overvoltage Recovery Time ➄ — 200 — — 200 — — 200 — ns
A/D Conversion Rate 5 — — 5 — — 5 — — MHz

DIGITAL OUTPUTS

Logic Levels

Logic "1" +2.4 — — +2.4 — — +2.4 — — Volts
Logic "0" — — +0.4 — — +0.4 — — +0.4 Volts
Logic Loading "1" — — –4 — — –4 — — –4 mA
Logic Loading "0" — — +4 — — +4 — — +4 mA

Delay, Falling Edge of EOC to

Output Data Valid — — 20 — — 20 — — 20 MHz

Delay, Falling Edge of ENABLE to

Output Data Valid — — 10 — — 10 — — 10 MHz

Output Coding

POWER REQUIREMENTS

Power Supply Ranges ➅

+5V Supply +4.75 +5.0 +5.25 +4.75 +5.0 +5.25 +4.9 +5.0 +5.25 Volts
–5V Supply –4.75 –5.0 –5.25 –4.75 –5.0 –5.25 –4.9 –5.0 –5.25 Volts

Power Supply Currents

+5V Supply — +205 +220 — +205 +220 — +205 +220 mA
–5V Supply — –80 –90 — –80 –90 — –80 –90 mA

Power Dissipation — 1.3 1.5 — 1.3 1.5 — 1.3 1.5 Watts
Power Supply Rejection — — ±0.1 — — ±0.1 — — ±0.1 %FSR/%V

Footnotes:

➀ All power supplies should be on before applying a start convert pulse. All

supplies and the clock (start convert pulses) must be present during warmup
periods. The device must be continuously converting during this time.

➁ Input voltage ranges for ADS-118A is ±1.25V
➂ A 100ns wide start convert pulse is used for all production testing. For

applications requiring less than an 5MHz sampling rate, wider start convert
pulses can be used.
NOTE: The device only requires the rising edge of a start convert pulse to
operate.

➃ Effective bits is equal to:

➄ This is the time required before the A/D output data is valid once the analog input

is back within the specified range.

➅ The minimum supply voltages of +4.9V and –4.9V for ±V

–55°C operation only. The minimum limits are +4.75V and –4.75V when
operating at +125°C

Offset Binary

(SNR + Distortion) – 1.76 + 20 log

Full Scale Amplitude

Actual Input Amplitude

6.02

DD are required for

TECHNICAL NOTES

1. Obtaining fully specified performance from the ADS-118
requires careful attention to pc-card layout and power supply
decoupling. The device’s analog and digital ground systems
are connected to each other internally. For optimal perfor­mance, tie all ground pins (14, 18, and 23) directly to a large
analog ground plane beneath the package.

Bypass all power supplies to ground with 4.7µF tantalum
capacitors in parallel with 0.1µF ceramic capacitors. Locate
the bypass capacitors as close to the unit as possible.

2. The ADS-118 achieves its specified accuracies without the
need for external calibration. If required, the device’s small
initial offset and gain errors can be reduced to zero using

the adjustment circuitry shown in Figures 2a and 2b. When
using this circuitry, or any similar offset and gain-calibration
hardware, make adjustments following warmup. To avoid
interaction, always adjust offset before gain.

3. To enable the three-state outputs, connect ENABLE
(pin 17) to a logic "0" (low). To disable, connect pin 17 to
logic "1" (high). The three-state outputs are permanently
enabled in the ADS-118A.

4. Applying a start convert pulse while a conversion is in
progress (EOC = logic "1") will initiate a new and inaccurate
conversion cycle.

3