DATASHEETS tda6103q DATASHEETS (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TDA6103Q

Triple video output amplifier

Preliminary specification
File under Integrated Circuits, IC02

Philips Semiconductors

March 1995

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

FEATURES

• High bandwidth: 7.5 MHz typical; 60 V (peak-to-peak
value)

• High slew rate: 1600 V/µs

• Simple application with a variety of colour decoders

• Only one supply voltage needed

• Internal protection against positive appearing

Cathode-Ray Tube (CRT) flashover discharges

• One non-inverting input with a low minimum input
voltage of 1 V

• Thermal protection

• Controllable switch-off behaviour.

ORDERING INFORMATION

EXTENDED TYPE

NUMBER

PINS PIN POSITION MATERIAL CODE

TDA6103Q 9 DBS9 plastic SOT111BE

BLOCK DIAGRAM

GENERAL DESCRIPTION

The TDA6103Q includes three video output amplifiers in
one single in-line 9-pin medium power (SIL9MP) package
SOT111BE, using high-voltage DMOS technology,
intended to drive the three cathodes of a colour CRT.

PACKAGE

V

oc

(3x)

inverting

input

(3x)

9,8,7

1,2,3

3x

FLASH-

DIODE

V

DD

V

DD

MIRROR 2

V

DD

1x

LEVEL-

SHIFTER 1

V

bias

V

DD

MIRROR 3

DIFFERENTIAL

STAGE

V

DD

LEVEL-

SHIFTER 2

MIRROR 1

V

DD

CURRENT
SOURCES

4

6

TDA6103Q

THERMAL

PROTECTION

GND

MGA968

non-inverting

5

V

ip

input

March 1995 2

Fig.1 Block diagram (one amplifier shown).

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

PINNING

SYMBOL PIN DESCRIPTION

1

V
V
V

GND

V

V

DD

V

oc3

V

oc2

V

oc1

i1

2

i2

3

i3

4

TDA6103Q

5

ip

6
7
8
9

MGA969

V

i1

V

i2

V

i3

1 inverting input 1
2 inverting input 2

3 inverting input 3
GND 4 ground, fin
V

ip

V

DD

V

oc3

V

oc2

V

oc1

5 non-inverting input

6 supply voltage

7 cathode output 3

8 cathode output 2

9 cathode output 1

Fig.2 Pin configuration.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134). Voltages measured with respect to GND (pin 4);
currents as specified in Fig.1; unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

DD

V

i

V

idm

V

oc

I

ocsmL

supply voltage 0 250 V

input voltage 0 12 V

differential mode input voltage −6+6V

cathode output voltage 0 V

LOW non-repetitive peak cathode

flashover discharge = 50 µC05A

DD

V

output current
I

ocsmH

HIGH non-repetitive peak cathode

flashover discharge = 100 nC 0 10 A

output current
T

stg

T

j

V

es

storage temperature −55 +150 °C

junction temperature −20 +150 °C

electrostatic handling

human body model (HBM) − tbf V
machine model (MM) − tbf V

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see

QUALITY SPECIFICATION

Quality specification

“SNW-FQ-611 part E”

number 9398 510 34011).

March 1995 3

is applicable and can be found in the

“Handling MOS Devices”

).

“Quality reference pocketbook”

(ordering

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

THERMAL RESISTANCE

SYMBOL PARAMETER THERMAL RESISTANCE

R

th j-fin

R

th h-a

Note

1. An external heatsink is necessary.

6

5

P

tot

(W)

4

3

from junction to fin; note 1 11 K/W
from heatsink to ambient 18 K/W

Thermal protection

MGA972

The internal thermal protection circuit gives a decrease of
the slew rate at high temperatures: 10% decrease at
130 °C and 30% decrease at 145 °C (typical values on the
spot of the thermal protection circuit).

(1)

2

1

0

(1) Infinite heatsink.
(2) No heatsink.

Fig.3 Power derating curves.

(2)

0 50 100–50

T ( C)

amb

150

o

OUTPUTS

5 K/W

Thermal protection circuit

6 K/W

FIN

MGA970

Fig.4 Equivalent thermal resistance network.

March 1995 4

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

CHARACTERISTICS

Operating range: T
Test conditions (unless otherwise specified): T

= 10 pF (CL consists of parasitic and cathode capacitance); R

C

L

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

DD

I

bias

quiescent supply current 7.0 9.25 11.5 mA
input bias current inverting inputs

(pins 1, 2 and 3)

I

bias

input bias current non-inverting
input (pin 5)

V

i(offset)

input offset voltage
(pins 1, 2 and 3)

∆V

i(offset)

differential input offset voltage
temperature drift between pins 1
and 5; 2 and 5; 3 and 5

C

icm

common-mode input capacitance
(pins 1, 2 and 3)

C

icm

common-mode input capacitance
(pin 5)

C

idm

differential mode input capacitance
between 1 and 5; 2 and 5; 3 and 5

V

oc(min)

minimum output voltage
(pins 7, 8 and 9)

V

oc(max)

maximum output voltage
(pins 7, 8 and 9)

GB gain-bandwidth product of

open-loop gain:
V

B

S

small signal bandwidth
(pins 7, 8 and 9)

B

L

large signal bandwidth
(pins 7, 8 and 9)

t

pd

cathode output propagation delay
time 50% input to 50% output
(pins 7, 8 and 9)

∆t

p

difference in cathode output
propagation time 50% input to
50% output (pins 7 and 8, 7 and 9
and 8 and 9)

t

r

cathode output rise time 10%
output to 90% output
(pins 7, 8 and 9)

t

f

cathode output fall time 90% output
to 10% output (pins 7, 8 and 9)

= −20 to 150 °C; VDD = 180 to 210 V; Vip = 1 to 4 V.

j

= 25 °C; VDD = 200 V; Vip = 1.3 V; V

amb

V

= V

1−5

V

= V

1−5

note 1
f = 500 kHz − 0.75 − GHz

oc1, 2, 3/Vi1-5, 2-5, 3-5

V

= 60 V 6 7.5 − MHz

oc(p-p)

V

= 100 V 5 7 − MHz

oc(p-p)

V

= 100 V square

oc(p-p)

wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8

V

= 100 V square

oc(p-p)

wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3)

Voc = 50 to 150 V square
wave; f < 1 MHz; tf = 40 ns
(pins 1, 2 and 3); see Fig.7

Vo = 150 to 50 V square
wave; f < 1 MHz; tr = 40 ns
(pins 1, 2 and 3); see Fig.8

2−5

2−5

= V

= V

oc1

oc2

= 18 K/W; measured in test circuit Fig.5.

th h-a

=1⁄2VDD;

oc3

−5 −1+1µA

−15 −3+1µA

−50 − +50 mV

− tbf − mV/K

− 5 − pF

− 10 − pF

− 1 − pF

= V

= −1V − 510V

3−5

= V

3−5

= 1 V;

VDD− 10 VDD− 6 − V

− 38 − ns

−10 0 +10 ns

48 60 73 ns

48 60 73 ns

March 1995 5

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

t

s

SR slew rate between

O

v

SVRR supply voltage rejection ratio f < 50 kHz; note 2 − 70 − dB

Notes

1. See also Fig.6 for the typical low-frequency response of Vi to Voc.

2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.

settling time 50% input to
(99% < output < 101%)

50Vto(V

− 50 V); (pins 7, 8 and

DD

9)

cathode output voltage overshoot
(pins 7, 8 and 9)

V

= 100 V square

oc(p-p)

wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8

V

= V

= V

1−5

2−5

3−5

= 2 V
square wave (p-p);
f < 1 MHz; tr =tf =40ns
(pins 1, 2 and 3)

V

= 100 V square

oc(p-p)

wave; f < 1 MHz;
tr=tf= 40 ns (pins 1, 2
and 3); see Figs 7 and 8

−−350 ns

− 1600 − V/µs

− 5 − %

Cathode output

The cathode output is protected against peak currents
(caused by positive voltage peaks during high-resistance
flash) of 5 A maximum with a charge content of 50 µC.

The cathode is also protected against peak currents
(caused by positive voltage peaks during low-resistance
flash) of 10 A maximum with a charge content of 100 nC.

The DC voltage of VDD (pin 6) must be within the operating
range of 180 to 210 V during the peak currents.

Flashover protection

The TDA6103Q incorporates protection diodes against
CRT flashover discharges that clamp the cathode output
voltage up to a maximum of V

DD

+ V

. To limit the diode

diode

current, an external 1.5 kΩ carbon high-voltage resistor in
series with the cathode output and a 2 kV spark gap are

needed (for this resistor-value, the CRT has to be
connected to the main PCB). This addition produces an
increase in the rise- and fall times of approximately 5 ns
and a decrease in the overshoot of approximately 3%.

V

to GND must be decoupled:

DD

1. With a capacitor >20 nF with good HF behaviour (e.g.
foil). This capacitance must be placed as close as
possible to pins 6 and 4, but definitely within 5 mm.

2. With a capacitor >10 µF on the picture tube base print.

Switch-off behaviour

The switch-off behaviour of the TDA6103Q is controllable.
This is due to the fact that the output pins of the
TDA6103Q are still under control of the input pins for
relative low-power supply voltages (approximately 30 V
and higher).

March 1995 6

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

Test circuit

C

par

R4

100 kΩ

C

par

R5

100 kΩ

C1

V

i1

22 µF

C2

22 nF

C3

V

in1

0.987
mA

C7

8.2 pF
R1

667 Ω

C8

6

1

1

TDA6103Q

V

i2

V

i3

22 µF

C4

22 nF

C5

22 µF

C6

22 nF

V

in2

0.987

V

in3

0.987

1.3 V

mA

mA

8.2 pF
R2

667 Ω

C9

8.2 pF
R3

667 Ω

C10
100
nF

2

2

3

3

5

4

C

par

R6

100 kΩ

V

oc1

C12

3.2
pF

9

V

oc2

8

7

C15

3.2
pF

V

oc3

C18

3.2
pF

C11
100 nF

C13

6.8
pF

C14
136

pF

C16

6.8
pF

C17
136

pF

C19

6.8
pF

C20
136

pF

V

DD

R7
2 MΩ

R8
100 kΩ

R9
2 MΩ

R10
100 kΩ

R11
2 MΩ

R12
100 kΩ

probe 1

probe 2

probe 3

MGA976

C

=70fF.

par

March 1995 7

Fig.5 Test circuit with feedback factor1⁄

150

.

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

200
194

188

V

oc

100

5
0

1.2 0.633

0

0.583 1.1 1.2
∆V

i

Fig.6 Typical low-frequency (f < 1 MHz) response of ∆V

x

V

i

MGA973

i1, 2,3

to V

oc1, 2,3

.

0

x

t

s

overshoot (in %)

150
140

V

oc

100

60
50

t

r

t

pd

t

151

149

t

MGA974

Fig.7 Output voltage (pins 7, 8 and 9) rising edge as a function of the AC input signal.

March 1995 8

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

x

V

i

0

x

t

s

150
140

V

oc

100

overshoot (in %)

60
50

t

f

t

pd

t

51

49

t

MGA975

Fig.8 Output voltage (pins 7, 8 and 9) falling edge as a function of the AC input signal.

March 1995 9

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

TEST AND APPLICATION INFORMATION

X1

R24

185 V

123

47 Ω

AQUA

V

R25

C6

ff

ff

V (GND)

4

1.2 Ω

10 µF

(250 V)

EHT

R21

A51EAL . . X02

kR

kG

R22

1.5 kΩ

220kΩR19

MGA977

X4X2

C9

1 nF

1.5 kΩ

(500 V)

optional

(2000 V)

g2 AQUA

V

R26

g1 g2 g3

kB

C7

R23

1.5 kΩ

1.5 kΩ

kΩ

1.5

R20

2.7 nF

(500 V)

C8

2.7 nF

R16

C3

R17

100 kΩ

100 kΩ

TDA6103Q

680 Ω

R10

R13

R9

R5

470 Ω

3.3 kΩ

220 Ω

C5

123456789

C1

R7

R6

3

4

X3

R

100

3.3 kΩ

470 Ω

2

B

G

R12

nF

1

680 Ω

GND

R15

C4

220 nF

470 Ω

R18

100 kΩ

Fig.9 Application diagram.

R11

680 Ω

R14

C2

R8

R4

470 Ω

3.3 kΩ

470 Ω

March 1995 10

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

GND

to
differential

1,2,3

5

(1) All pins have an energy protection for positive or negative overstress situations.

stage

to
differential
stage

to
differential
stage

V

46

TDA6103Q

(1)

Fig.10 Internal pin configuration.

Dissipation

DD

to
differential
stage

from

input

circuit

from

input

circuit

V

7,8,9

bias

MGA971

Regarding dissipation, distinction must first be made between static dissipation (independent of frequency) and dynamic
dissipation (proportional to frequency).

The static dissipation of the TDA6103Q is due to voltage supply currents and load currents in the feedback network and
CRT.

The static dissipation equals:
P

= VDD× IDD− 3 × Voc× (Voc/Rfb− IOC)

stat

Rfb = value of feedback resistor.
IOC = DC-value of cathode current.

The dynamic dissipation equals:

= 3 × VDD× (CL + Cfb + C

P

dyn

) × fi× V

int

o(p-p)

×δ

CL = load capacitance.
Cfb = feedback capacitance.
C

= internal load capacitance (≈4 pF).

int

fi = input frequency.
V

= output voltage (peak-to-peak value).

o(p-p)

δ = non-blanking duty-cycle.

The IC must be mounted on the picture tube base print to minimize the load capacitance (CL).

March 1995 11

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

PACKAGE OUTLINE

22.00

21.35

21.4

20.7

8.7

8.0

5.9

5.7

4.4

4.2

2.75

2.50
(2x)

15.1

14.9

3.4

3.2

fin

1.75

1.55

3.85

3.45

6.48

6.14

Dimensions in mm.

18.5

17.8

5

6789

0.45

0.67

0.50

1.40

1.14

0.25

2.54
(8x)

0.25
(9x)

0.76

M

3.9

3.4

seating plane

1.0

0.3

1.40

1.14

12 3 4

1.0

0.7

Fig.11 Plastic SIL-bent-to-DIL, medium power with fin, 9-pin (SOT111BE).

1.1

0.7

0.47

0.38

2.54

65
55

o
o

MBC376 - 1

March 1995 12

Philips Semiconductors Preliminary specification

Triple video output amplifier TDA6103Q

SOLDERING
Plastic single in-line packages

Y DIP OR WAVE

B
The maximum permissible temperature of the solder is

260 °C; this temperature must not be in contact with the
joint for more than 5 s. The total contact time of successive
solder waves must not exceed 5 s.

The device may be mounted up to the seating plane, but
the temperature of the plastic body must not exceed the
specified storage maximum. If the printed-circuit board has
been pre-heated, forced cooling may be necessary
immediately after soldering to keep the temperature within
the permissible limit.

EPAIRING SOLDERED JOINTS

R
Apply the soldering iron below the seating plane (or not

more than 2 mm above it). If its temperature is below
300 °C, it must not be in contact for more than 10 s; if
between 300 and 400 °C, for not more than 5 s.

DEFINITIONS

Data sheet status

Objective specification This data sheet contains target or goal specifications for product development.
Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.
Product specification This data sheet contains final product specifications.

Limiting values

Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.

Application information

Where application information is given, it is advisory and does not form part of the specification.

LIFE SUPPORT APPLICATIONS

These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.

March 1995 13