Page 1
x
A
A
AOD412
T
T
N-Channel Enhancement Mode Field Effect Transistor
July 2003
General Description
The AOD412 uses advanced trench technology to
provide excellent R
gate resistance. This device is ideally suited for use
as a high side switch in CPU core power conversion.
O-252
D-PAK
G D S
Absolute Maximum Ratings T
Drain-Source Voltage
Gate-Source Voltage
Continuous Drain
Current
B,G
Pulsed Drain Current
Avalanche Current
Repetitive avalanche energy L=0.1mH
Power Dissipation
Power Dissipation
Junction and Storage Temperature Range
, low gate chargeand low
DS(ON)
op View
Drain Connected
to Tab
=25°C unless otherwise noted
A
Symbol
V
DS
V
C
TC=100°C
C
B
C
G
=25°C
T
TC=25°C
B
T
=100°C
C
TA=25°C
A
=70°C 1.6
T
A
GS
I
D
I
DM
I
AR
E
AR
P
D
P
DSM
TJ, T
STG
Features
VDS (V) = 30V
I
D
R
R
G
= 85A
< 7.0mΩ (VGS = 10V)
DS(ON)
< 10.5mΩ (VGS = 4.5V)
DS(ON)
D
S
Maximum UnitsParameter
30
85
65
200
30
120 mJ
100
50
2.5
-55 to 175
V
V±20
A
A
W
W
°C
Thermal Characteristics
Parameter Units
Maximum Junction-to-Ambient
Maximum Junction-to-Ambient
Maximum Junction-to-Lead
C
t ≤ 10s
Steady-State
Steady-State
Symbol Typ Ma
R
θJA
R
θJL
14.2 20
39 50
0.8 1.5
°C/W
°C/W
°C/W
Alpha & Omega Semiconductor, Ltd.
Page 2
AOD412
Ω
Electrical Characteristics (TJ=25°C unless otherwise noted)
Symbol Min Typ Max Units
Parameter Conditions
STATIC PARAMETERS
BV
I
DSS
I
GSS
V
GS(th)
I
D(ON)
R
DS(ON)
g
FS
V
SD
I
S
DSS
Drain-Source Breakdown Voltage
Zero Gate Voltage Drain Current
Gate-Body leakage current
I
=250µA, VGS=0V
D
VDS=24V, VGS=0V
VDS=0V, VGS= ±20V
Gate Threshold Voltage VDS=V
On state drain current
VGS=10V, VDS=5V
VGS=10V, ID=20A
Static Drain-Source On-Resistance
VGS=4.5V, ID=20A
Forward Transconductance
Diode Forward Voltage
VDS=5V, ID=20A
IS=1A,VGS=0V
Maximum Body-Diode Continuous Current
GS ID
=250µA
TJ=55°C
TJ=125°C
30 V
1
5
µA
100 nA
1.5 2.15 2.5 V
85 A
5.5 7
8.8 11
8.25 10.5
mΩ
m
60 S
0.72 1 V
85 A
DYNAMIC PARAMETERS
C
iss
C
oss
C
rss
R
g
Input Capacitance
Output Capacitance
VGS=0V, VDS=15V, f=1MHz
Reverse Transfer Capacitance
Gate resistance VGS=0V, VDS=0V, f=1MHz
1320 pF
533 pF
154 pF
0.95 Ω
SWITCHING PARAMETERS
Qg(10V)
Qg(4.5V)
Q
gs
Q
gd
t
D(on)
t
r
t
D(off)
t
f
t
rr
Q
rr
A: The value of R
Power dissipation P
application depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB or heatsink allows it.
B. The power dissipation PD is based on T
dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package
limit.
C: Repetitive rating, pulse width limited by junction temperature T
D. The R
E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max.
F. These tests are performed with the device mounted on 1 in
curve provides a single pulse rating.
G. The maximum current rating is limited by the package current capability.
Total Gate Charge
Total Gate Charge
VGS=4.5V, VDS=15V, ID=20A
Gate Source Charge
Gate Drain Charge
Turn-On DelayTime
Turn-On Rise Time
Turn-Off DelayTime
VGS=10V, VDS=15V, RL=0.75Ω,
R
Turn-Off Fall Time
Body Diode Reverse Recovery Time
Body Diode Reverse Recovery Charge
is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T
θJA
is based on steady-state R
DSM
J(MAX)
is the sum of the thermal impedence from junction to case R
θJA
and the maximum allowed junction temperature of 150°C. The value in any a given
θJA
=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper
IF=20A, dI/dt=100A/µs
IF=20A, dI/dt=100A/µs
J(MAX)
2
FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA
GEN
=3Ω
=175°C.
and case to ambient.
θJC
26 nC
13.3 nC
3.2 nC
6.6 nC
7.2 ns
12.5 ns
22 ns
6ns
29.7
ns
22.3 nC
=25°C. The
A
Alpha & Omega Semiconductor, Ltd.
Page 3
AOD412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
60
50
10V
4.0V
40
30
(A)
D
I
3.5V
20
10
VGS=3V
0
012345
V
(Volts)
DS
Fig 1: On-Region Characteristics
12
11
)
Ω
(m
DS(ON)
R
10
9
8
7
6
VGS=4.5V
VGS=10V
5
4
0 102030405060
ID (A)
Figure 3: On-Resistance vs. Drain Current and
Gate Voltage
60
50
VDS=5V
40
125°C
30
(A)
D
I
25°C
20
10
0
1.5 2 2.5 3 3.5 4 4.5
V
(Volts)
GS
Figure 2: Transfer Characteristics
1.8
1.6
ID=20A
VGS=10V
1.4
VGS=4.5V
1.2
1
Normalized On-Resistance
0.8
0 25 50 75 100 125 150 175
Temperature (°C)
Figure 4: On-Resistance vs. Junction
Temperature
20
)
Ω
(m
DS(ON)
R
16
12
ID=20A
8
25°C
4
246810
V
(Volts)
GS
Figure 5: On-Resistance vs. Gate-Source Voltage
Alpha & Omega Semiconductor, Ltd.
125°C
1.0E+02
1.0E+01
1.0E+00
1.0E-01
(A)
S
I
1.0E-02
1.0E-03
1.0E-04
1.0E-05
125°C
25°C
0.0 0.2 0.4 0.6 0.8 1.0 1.2
VSD (Volts)
Figure 6: Body-Diode Characteristics
Page 4
AOD412
s
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
10
8
VDS=15V
ID=20A
6
(Volts)
GS
4
V
2
0
0 5 10 15 20 25 30
Qg (nC)
Figure 7: Gate-Charge Characteristics
1000
R
DS(ON)
100
limited
1ms
10ms
10
(Amps)
D
I
T
=150°C
1
J(Max)
TA=25°C
0.1s
1
DC
10µs
100µs
2400
2000
1600
C
iss
1200
C
800
Capacitance (pF)
400
oss
C
rss
0
0 5 10 15 20 25 30
VDS (Volts)
Figure 8: Capacitance Characteristics
100
T
=150°C
J(Max)
80
TA=25°C
60
40
Power (W)
20
0.1
0.1 1 10 100
(Volts)
V
DS
Figure 9: Maximum Forward Biased Safe
Operating Area (Note F)
10
D=Ton/T
T
J,PK=TA+PDM.ZθJA.RθJA
R
θJA
1
=50°C/W
In descending order
D=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse
0
0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 10: Single Pulse Power Rating Junction-to-
Ambient (Note F)
0.1
P
Normalized Transient
0.01
Thermal Resistance
θJA
Z
Single Pulse
D
T
on
T
0.001
0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000
Pulse Width (s)
Figure 11: Normalized Maximum Transient Thermal Impedance (Note F)
Alpha & Omega Semiconductor, Ltd.
Page 5
AOD412
TYPICAL ELECTRICAL AND THERMAL CHARACTERISTICS
120
TA=25°C
100
80
60
t
A
40
20
(A), Peak Avalanche Current
D
I
⋅
IL
=
D
−
VBV
DD
0
0.00001 0.0001 0.001 0.01
Time in avalanche, t
(s)
A
Figure 12: Single Pulse Avalanche capability
100
80
(A)
D
60
40
120
100
80
60
40
Power Dissipation (W)
20
0
0 25 50 75 100 125 150 175
(°C)
T
CASE
Figure 13: Power De-rating (Note B)
Current rating I
20
0
0 25 50 75 100 125 150 175
T
(°C)
CASE
Figure 14: Current De-rating (Note B)
Alpha & Omega Semiconductor, Ltd.
Page 6
ALPHA & OMEGA
DPAK Package Data
SEMICONDUCTOR, INC.
21 3
DETAIL 'D'
(JEDEC TO-252)
DIMENSION IN MILLIMETERS
MIN.
2.235
A
0.000
A1
0.889
A2
0.686
b
0.889
b1
5.207
b2
0.483
c1
5.969
D
4.318
D1
6.477
E
4.318
E1
e
e1
9.779
H
1.270
L
0.635
L1
0.889
L2
NOTE
1. PACKAGE BODY SIZES EXCLUDE MOLD FLASH AND
GATE BURRS
2. DIMENSION L IS MEASURED IN GAGE PLANE
3. TOLERANCE 0.10 mm UNLESS OTHERWISE SPECIFIED
4. CONTROLLING DIMENSION IS MILLIMETER. CONVERTED
INCH DIMENSIONS ARE NOT NECESSARILY EXACT.
5. FOLLOWED FROM JEDEC TO-252 (AA)
NOM.
2.286
----- 0.102
----- 1.143
0.762 0.889
----- 1.143
0.508 0.5590.457c
----- 0.584
6.096 6.223
-----
6.604 6.731
-----
2.286 BSC.
4.572 BSC.
----- 10.414
----- 2.032
----- 1.016
----- 1.270
MAX.
2.388
5.4614.45
5.334
-----
DIMENSIONS IN INCHES
0.088
0.000 -----
0.035 -----
0.027 0.030
0.035 -----
0.018 0.020 0.022
0.019 -----
0.235 0.240
0.170 -----
0.255 0.260
0.170 -----
0.385 -----
0.050 -----
0.025 -----
0.035 -----
NOM.MIN.
0.090
-----0.205
0.090 BSC.
0.180 BSC.
MAX.
0.094
0.004
0.045
0.035
0.045
0.215
0.023
0.245
0.210
0.265
-----
0.410
0.080
0.040
0.050
PACKAGE MARKING DESCRIPTION
NOTE:
D 4 1 2
F A Y W L C
21 3
DPAK PART NO. CODE
PART NO. CODE
- AOS LOGO
D412 - PART NUMBER CODE.
F - FAB LOCATION
A - ASSEMBLY LOCATION
Y - YEAR CODE
W - WEEK CODE.
L C - ASSEMBLY LOT CODE
AOD412
D412
RECOMMENDED LAND PATTERN
UNIT: mm
Rev. A
Page 7
ALPHA & OMEGA
TO-252 (DPAK)
SEMICONDUCTOR, INC.
TO-252 (DPAK) Carrier Tape
TO-252 (DPAK) Reel
Tape and Reel Data
TO-252 (DPAK)
Leader / Trailer
& Orientation
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