Page 1
LTC6090/LTC6090-5
140V CMOS Rail-to-Rail
Output, Picoamp Input
FEATURES DESCRIPTION
Current Op Amp
n
Supply Range: ±4.75V to ±70V (140V)
n
0.1Hz to 10Hz Noise: 3.5μV
n
Input Bias Current: 50pA Maximum
n
Low Offset Voltage: 1.25mV Maximum
n
Low Offset Drift: ±5µV/°C Maximum
n
CMRR: 130dB Minimum
n
Rail-to-Rail Output Stage
n
Output Sink and Source: 50mA
n
12MHz Gain Bandwidth Product
n
21V/µs Slew Rate
n
11nV/√Hz Noise Density
n
Thermal Shutdown
n
Available in Thermally Enhanced SOIC-8E or
P-P
TSSOP-16E Packages
APPLICATIONS
n
ATE
n
Piezo Drivers
n
Photodiode Amplifier
n
High Voltage Regulators
n
Optical Networking
The LTC®6090/LTC6090-5 are high voltage, precision
monolithic operational amplifiers. The LTC6090 is unity
gain stable. The LTC6090-5 is stable in noise gain configurations of 5 or greater. Both amplifiers feature high
open loop gain, low input referred offset voltage and noise,
and pA input bias current and are ideal
for high voltage,
high impedance buffering and/or high gain configurations.
The amplifiers are internally protected against over-
temperature conditions. A thermal warning output, TFLAG,
goes active when the die temperature approaches 150°C.
The output stage may be turned off with the output disable
pin OD. By tying the OD pin to the thermal warning output
(TFLAG), the part will disable the output stage when it is
out of the safe operating area. These pins easily interface
to any logic family.
Both amplifiers may be run from a single 140V or spit
±70V power supplies and are capable of driving up to
200pF of load capacitance. They are available in either an
8-lead SO or 16-lead TSSOP package with exposed pad
for low thermal resistance.
L, LT, LT C, LT M, Linear Technology and the Linear logo are registered trademarks of Linear
Technology Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
High Voltage DAC Buffer Application
3V
16
IN
LTC2641D
V
REF
2.5V
10k
470pF
16.2k
16.9k
70V
+
V
LTC6090
OUT
= ±70V
–
–70V
453k
10pF
For more information www.linear.com/LTC6090
6090 TA01a
80
60
40
20
0
–20
–40
OUTPUT VOLTAGE (V)
–60
–80
140V
Sine Wave Output
P-P
25µs/DIV
6090 TA01b
6090fe
1
Page 2
LTC6090/LTC6090-5
ABSOLUTE MAXIMUM RATINGS
Total Supply Voltage (V+ to V–) ............................... 150V
................................................................... V– to V
COM
Input Voltage
...................................................... V– to V+ + 0.3V
OD
+IN, –IN,
OD to COM
..................................V– – 0.3V to V+ + 0.3V
.................................................. –3V to 7V
Input Current
+IN, –IN
...........................................................±10mA
TFLAG Output
......................................V– – 0.3V to V+ + 0.3V
TFLAG
TFLAG to COM
............................................ –3V to 7V
PIN CONFIGURATION
TOP VIEW
COM
1
–IN
2
+IN
3
–
V
4
S8E PACKAGE
8-LEAD PLASTIC SO
T
= 150°C, θJC = 5°C/W
EXPOSED PAD (PIN 9) IS V
JMAX
9
–
V
–
, MUST BE SOLDERED TO PCB
OD
8
+
V
7
OUT
6
TFLAG
5
(Note 1)
Output Current
+
Continuous (Note 2).................................... 50mA
Operating Junction Temperature Range
(Note 3)
................................................... –40°C to 125°C
Specified Junction Temperature Range (Note 4)
LTC6090C
LTC6090I
LTC6090H
Junction Temperature (Note 5)
Storage Temperature Range
................................................ 0°C to 70°C
............................................. –40°C to 85°C
.......................................... –40°C to 125°C
............................. 150°C
.................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec)
TOP VIEW
1
COM
2
GUARD
3
GUARD
4
–IN
5
+IN
6
GUARD
7
GUARD
–
8
V
FE PACKAGE
16-LEAD PLASTIC TSSOP
= 150°C, θJC = 10°C/W
T
EXPOSED PAD (PIN 17) IS V
JMAX
17
–
V
–
, MUST BE SOLDERED TO PCB
16
15
14
13
12
11
10
9
OD
GUARD
V
GUARD
OUT
GUARD
GUARD
TFLAG
RMS
...................300°C
+
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION JUNCTION TEMPERATURE RANGE
LTC6090CS8E#PBF LTC6090CS8E#TRPBF 6090 8-Lead Plastic SO 0°C to 70°C
LTC6090IS8E#PBF LTC6090IS8E#TRPBF 6090 8-Lead Plastic SO –40°C to 85°C
LTC6090HS8E#PBF LTC6090HS8E#TRPBF 6090 8-Lead Plastic SO –40°C to 125°C
LTC6090CFE#PBF LTC6090CFE#TRPBF 6090FE 16-Lead Plastic TSSOP 0°C to 70°C
LTC6090IFE#PBF LTC6090
LTC6090HFE#PBF LTC6090HFE#TRPBF 6090FE 16-Lead Plastic TSSOP –40°C to 125°C
2
IFE#TRPBF 6090FE 16-Lead Plastic TSSOP –40°C to 85°C
For more information www.linear.com/LTC6090
6090fe
Page 3
LTC6090/LTC6090-5
ORDER INFORMATION
LEAD FREE FINISH TAPE AND REEL PART MARKING* PACKAGE DESCRIPTION JUNCTION TEMPERATURE RANGE
LTC6090CS8E-5#PBF LTC6090CS8E-5#TRPBF 60905 8-Lead Plastic SO 0°C to 70°C
LTC6090IS8E-5#PBF LTC6090IS8E-5#TRPBF 60905 8-Lead Plastic SO –40°C to 85°C
LTC6090HS8E-5#PBF LTC6090HS8E-5#TRPBF 60905 8-Lead Plastic SO –40°C to 125°C
LTC6090CFE-5#PBF LTC6090CFE-5#TRPBF 6090FE-5 16-Lead Plastic TSSOP 0°C to 70°C
LTC6090IFE-5#PBF LTC
LTC6090HFE-5#PBF LTC6090HFE-5#TRPBF 6090FE-5 16-Lead Plastic TSSOP –40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape
designated sales channels with #TRMPBF suffix.
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications and all typical values are at TJ = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM =
V
= 0V, VOD = Open unless otherwise noted.
OUT
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
V
OS
∆V
I
B
I
OS
e
n
i
n
V
CM
C
IN
C
DIFF
CMRR Common Mode Rejection Ratio V
PSRR Power Supply Rejection Ratio V
V
OUT
A
VOL
Input Offset Voltage
/∆T Input Offset Voltage Drift TA = 25°C, ∆TJ = 70°C –5 ±3 5 –5 ±3 5 µV/°C
OS
Input Bias Current (Note 6) Supply Voltage = ±70V
Input Offset Current (Note 6) Supply Voltage = ±15V
Input Noise Voltage Density f = 1kHz
Input Noise Voltage 0.1Hz to 10Hz 3.5 3.5 µV
Input Noise Current Density 1 1 fA/√Hz
Input Common Mode Range Guaranteed by CMRR
Common Mode Input
Capacitance
Differential Input Capacitance 5 5 pF
Output Voltage Swing High (VOH)
(Referred to V
Output Voltage Swing Low (V
(Referred to V
Large-Signal Voltage Gain RL = 10k,
6090IFE-5#TRPBF 6090FE-5 16-Lead Plastic TSSOP –40°C to 85°C
and reel specifications, go to: http://www.linear.com/tapeandreel/. Some packages are available in 500 unit reels through
C-, I-SUFFIXES H-SUFFIX
Supply Voltage = ±15V
Supply Voltage = ±15V
f = 10kHz
l
l
l
–
l
V
+3V
±330
±330
0.3
±1000
±1250
3
±330
±330
3
0.3
±1000
±1250
50
0.5
0.5
30
14
11
±68
V+–3V V–+3V
14
11
±68
V+–3V
9 9 pF
= –67V to 67V
CM
= ±4.75V to ±70V
S
)
OL
No Load
I
SOURCE
I
SOURCE
No Load
I
SINK
I
SINK
V
OUT
= 1mA
= 10mA
= 1mA
= 10mA
from –60V to 60V
+
)
–
)
l
l
l
l
l
l
l
l
l
130
126
112
106
1000
1000
>140 130
126
>120 112
106
10
50
450
10
40
250
25
140
1000
25
80
600
>10000 1000
1000
>140 dB
>120 dB
10
50
450
1000
10
40
250
>10000 V/mV
800
120
25
140
25
80
600
μV
μV
pA
pA
pA
pA
pA
nV/√Hz
nV/√Hz
P-P
dB
dB
mV
mV
mV
mV
mV
mV
V/mV
6090fe
V
V
For more information www.linear.com/LTC6090
3
Page 4
LTC6090/LTC6090-5
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications and all typical values are at TJ = 25°C. Test conditions are V+ = 70V, V– = –70V, VCM =
V
= 0V, VOD = Open unless otherwise noted.
OUT
C-, I-SUFFIXES H-SUFFIX
SYMBOL PARAMETER CONDITIONS MIN TYP MAX MIN TYP MAX UNITS
I
SC
Output Short-Circuit Current
(Source and Sink)
Supply Voltage = ±70V
Supply Voltage = ±15V
SR Slew Rate AV = –4, RL = 10k
LTC6090
LTC6090-5
GBW Gain-Bandwidth Product f
= 20kHz, RL = 10k
TEST
LTC6090
LTC6090-5
Φ
FPBW Full Power Bandwidth V
Phase Margin RL = 10k, CL = 50pF 60 60 Deg
M
= 125V
O
P–P
LTC6090
LTC6090-5
t
S
Settling Time 0.1% ∆V
LTC6090, A
OUT
= 1V
= 1V/V
V
LTC6090-5, AV = 5V/V
I
S
V
OD
OD
S
Supply Current No Load
Supply Voltage Range Guaranteed by the PSRR Test
OD Pin Voltage, Referenced to
H
COM Pin
L
Amplifier DC Output
VIH
V
IL
DC, OD = COM >10 >10 MΩ
Impedance, Disabled
COM
COM
COM
TEMP
COM Pin Voltage Range
CM
COM Pin Open Circuit Voltage
V
COM Pin Resistance
R
Die Temperature Where TFLAG
F
Is Active
TEMP
I
TFLAG
TFLAG Output Hysteresis 5 5 °C
HYS
TFLAG Pull-Down Current TFLAG Output Voltage = 0V
l
50
l
l
l
l
l
l
l
l
l
l
l
l
l
10
18
5.5
11
20
34
9.5 140 9.5 140 V
COM+1.8V
–
V
17 21 25 17 21 25 V
500 665 850 500 665 850 kΩ
90
21
37
12
24
40
68
2
2.5
2.8 3.9
COM+0.65V
4.3
COM+1.8V
V+ – 5 V
50
9
16
5
10
18
32
90 mA
21
37
12
24
40
68
2
2.5
2.8 3.9
COM+0.65V
–
V+ – 5 V
145 145 °C
l
70 200 330 70 200 330 µA
4.3
mA
V/μs
V/μs
MHz
MHz
kHz
kHz
mA
mA
µs
µs
V
V
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability
and lifetime.
Note 2: The LTC6090/LTC6090-5 is capable of producing peak output
currents in excess of 50mA. Current density limitations within the IC require
the continuous RMS current supplied by the output (sourcing or sinking)
over the operating lifetime of the part be limited to under 50mA (Absolute
Maximum). Proper heat sinking may be required to keep the junction
temperature below the absolute maximum rating.
Refer to Figure 7, the
Power Dissipation section, and the Safe Operating Area section of the data
sheet for more information.
Note 3: The LTC6090C/LTC6090I are guaranteed functional over the
operating junction temperature range –40°C to 85°C. The LTC6090H
is guaranteed functional over the operating junction temperature range
–40°C to 125°C. Specifying the junction temperature range as an operating
condition is applicable for devices
with potentially significant quiescent
power dissipation.
4
For more information www.linear.com/LTC6090
Note 4: The LTC6090C is guaranteed to meet specified performance from
0°C to 70°C. The LTC6090C is designed, characterized, and expected
to meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LTC6090I is guaranteed to meet
specified performance from –40°C to 85°C. The LTC6090H is guaranteed
to meet
specified performance from –40°C to 125°C.
Note 5: This device includes over temperature protection that is intended
to protect the device during momentary overload conditions. Operation
above the specified maximum operating junction temperature is not
recommended.
Note 6: Input bias and offset current is production tested with ±15V
supplies. See Typical Performance Characteristics curves of actual typical
performance over full supply range.
6090fe
Page 5
LTC6090/LTC6090-5
TYPICAL PERFORMANCE CHARACTERISTICS
Open Loop Gain and Phase
vs Frequency CMRR vs Frequency PSRR vs Frequency
120
100
80
GAIN
60
40
GAIN (dB)
20
14
0
–20
0.1 10000100101 1000
200
180
160
140
120
100
80
NUMBER OF UNITS
60
40
20
0
–1000 10005000–500
LTC6090
LTC6090-5
FREQUENCY (kHz)
Distribution TCVOS Distribution
V
OS
VS = ±70V
= 25°C
T
A
= 0V
V
CM
VOS (µV)
PHASE
6090 G01
6090 G04
100
80
60
PHASE (DEG)
40
20
0
–20
–40
120
100
80
60
CMRR (dB)
40
20
0
0.1 1000101 100
350
VS = ±70V
= 25°C
T
A
300
∆T
J
V
CM
250
200
150
NUMBER OF UNITS
100
50
0
–6 –4 20–2 64
LTC6090-5
LTC6090
FREQUENCY (kHz)
= 70°C
= 0V
TCVOS (µV/°C)
VS = ±70V
6090 G02
6090 G05
140
120
100
80
60
PSRR (dB)
40
20
0
0.1 1000101 100
Change in Offset Voltage
vs Input Common Mode Voltage
20
10
0
–10
CHANGE IN OFFSET VOLTAGE (µV)
–20
–75 0–25–50 755025
AV = 1V/V
PSRR+
LTC6090-5
LTC6090-5
LTC6090
LTC6090
FREQUENCY (kHz)
SPECIFIED COMMON
MODE RANGE= ±67V
VS = ±70V
INPUT COMMON MODE VOLTAGE (V)
PSRR–
125°C
85°C
25°C
–50°C
6090 G03
6090 G06
Offset Voltage vs Temperature
500
400
300
200
100
0
–100
–200
VOLTAGE OFFSET (µV)
–300
–400
–500
–50
–25
25
0
TEMPERATURE (°C)
50
VS = ±70V
= 0V
V
CM
5 SAMPLES
75 100
6090 G07
125
Offset Voltage
vs Total Supply Voltage Minimum Supply Voltage
500
400
300
200
100
0
–100
–200
OFFSET VOLTAGE (µV)
–300
–400
–500
30
5
TOTAL SUPPLY VOLTAGE (V)
55
80 105
TA = 25°C
5 SAMPLES
V+ = – V
= 0V
V
CM
130
For more information www.linear.com/LTC6090
–
6090 G08
100
75
50
25
0
–25
–50
CHANGE IN OFFSET VOLTAGE (µV)
–75
–100
6 7 9
5
TOTAL SUPPLY VOLTAGE (V)
125°C
85°C
25°C
–50°C
8
10
6090 G09
6090fe
5
Page 6
LTC6090/LTC6090-5
6090 G10
6090 G11
TYPICAL PERFORMANCE CHARACTERISTICS
Supply Current vs Temperature
3.0
2.9
2.8
2.7
2.6
SUPPLY CURRENT (mA)
2.5
2.4
–50
–25 0
VS = ±70V
VS = ±4.75V
25 75
TEMPERATURE (°C)
Voltage Noise Density
vs Frequency
1000
100
50 100 125
Supply Current
vs Total Supply Voltage
3.0
2.5
2.0
1.5
1.0
SUPPLY CURRENT (mA)
0.5
0
0
50 75 100
25
SUPPLY VOLTAGE (V)
Integrated Noise vs Frequency
250
)
200
RMS
150
TA = 25°C
125 150
Output Disable Supply Current
vs Total Supply Voltage
800
700
600
500
400
300
200
OUTPUT DISABLE CURRENT (µA)
100
0
0
50 100
25
TOTAL SUPPLY VOLTAGE (V)
75 125
Small Signal Frequency Response
20
15
10
LTC6090
LTC6090-5
RF = 40.2k
= 10k
R
I
= 2pF
C
F
125°C
85°C
25°C
–50°C
6090 G12
10
VOLTAGE NOISE DENSITY (nV/√Hz)
1
0.010
0.001 0.1 1 10010
FREQUENCY (kHz)
LTC6090-5 Small Signal
Frequency Response
vs Feedback Capacitance
25
20
15
10
5
GAIN (dB)
0
–5
–10
1 10000100010010
RF = 40.2k
= 10k
R
I
CF = 0pF
CF = 1pF
CF = 2pF
FREQUENCY (kHz)
6090 G13
6090 G16
100
INTEGRATED NOISE (µV
50
0
10
100 1000 10000
FREQUENCY (kHz)
LTC6090 Small Signal Frequency
Response vs Closed Loop Gain
50
40
30
20
10
GAIN (dB)
0
–10
–20
AV = 101V/V
AV = 11V/V
AV = 1V/V
1 100 1000 10000
10
FREQUENCY (kHz)
6090 G14
6090 G17
GAIN (dB)
5
0
–5
1 10000100010010
FREQUENCY (kHz)
LTC6090-5 Small Signal
Frequency Response
vs Closed Loop Gain
50
40
30
20
GAIN (dB)
10
101V/V
0
–10
33V/V
11V/V
5V/V
1 10000100010010
FREQUENCY (kHz)
6090 G15
6090 G18
6
6090fe
For more information www.linear.com/LTC6090
Page 7
TYPICAL PERFORMANCE CHARACTERISTICS
6090 G19
6090 G22
LTC6090/LTC6090-5
Output Impedance vs Frequency
1000
100
10
1
OUTPUT IMPEDACNE (Ω)
0.1
0.01
10
1 100 1000 100000
FREQUENCY (kHz)
Input Bias Current vs Common
Mode Voltage and Temperature
1000
100
10
1
INPUT BIAS CURRENT (|pA|)
0.1
DIRECTION OF THE CURRENT
–15 5 15
COMMON MODE VOLTAGE (V)
125°C
100°C
85°C
IS OUT OF THE PIN
50°C
25°C
–5–10 100
AV = 101V/V
AV = 11V/V
AV = 1V/V
10000
VS = ±15V
Output Impedance vs Frequency
with Output Disabled (OD = COM)
1000
100
10
OUTPUT IMPEDANCE (kΩ)
1
1
10 100
FREQUENCY (kHz)
LTC6090 Large Signal Transient
Response
80
60
40
20
0
–20
OUTPUT, INPUT (V)
–40
–60
–80
OUTPUT
INPUT
5µs/DIV
CL = 10pF
6091 G20
AV = –10V/V
= ±70V
V
S
6090 G23
1000
Input Bias Current vs Common
Mode Voltage and Temperature
10000
VS = ±70V
1000
100
DIRECTION OF THE CURRENT
10
INPUT BIAS CURRENT (|pA|)
1
0.1
–80 0 40
COMMON MODE VOLTAGE (V)
125°C
100°C
80°C
IS OUT OF THE PIN
50°C
25°C
5°C
–40–60 20 60–20
LTC6090-5 Large Signal Transient
Response
80
60
40
20
0
–20
OUTPUT, INPUT (V)
–40
–60
–80
OUTPUT
INPUT
5µs/DIV
6090 G21
AV = –10V/V
= ±70V
V
S
= 100kΩ
R
F
= 10kΩ
R
I
= 2pF
C
F
6090 G24
80
INPUT
50mV/DIV
OUTPUT
50mV/DIV
Small Signal Transient Response
AV = 1V/V
1µs/DIV
6090 G16
LTC6090 Falling Edge
Settling Time
AV = 1V/V
OUTPUT
INPUT
INPUT STEP (0.5V/DIV)
500ns/DIV
For more information www.linear.com/LTC6090
6090 G26
LTC6090 Rising Edge
Settling Time
OUTPUT STEP (20mV/DIV)
INPUT STEP (0.5V/DIV)
OUTPUT
500ns/DIV
AV = 1V/V
OUTPUT STEP (20mV/DIV)
INPUT
6090 G27
6090fe
7
Page 8
LTC6090/LTC6090-5
TYPICAL PERFORMANCE CHARACTERISTICS
INPUT
25mV/DIV
OUTPUT
100mV/DIV
LTC6090-5 Small Signal
Transient Response
AV = 5V/V
R
F
= 10kΩ
R
I
= 2pF
C
F
1µs/DIV
Output Disable (OD) Response
Time
OD-COM
OD-COM
= 0V
2V/DIV
V
= 0V
OUT
OUTPUT
ENABLED
V
OUT
20µs/DIV
AV = –10V/V
V
IN
OUTPUT
DISABLED
= 40.2kΩ
6090 G28
= –0.5V
6090 G31
LTC6090-5 Rising Edge
Settling Time
INPUT (100mV/DIV)
Output Voltage Swing
vs Frequency
160
140
120
)
100
P-P
(V
80
OUT
V
60
40
20
0
1 100010010
LTC6090
LTC6090-5
FREQUENCY (kHz)
INPUT
OUTPUT
500ns/DIV
AV = 5V/V
= 40.2kΩ
R
F
= 10kΩ
R
I
= 2pF
C
F
6090 G29
AV = –10V/V
VS = ±70V
RF = 100kΩ
RI = 10kΩ
CF = 2pF
6090 G32
OUTPUT (50mV/DIV)
OUTPUT
NOISE
2µV/DIV
LTC6090-5 Falling Edge
Settling Time
INPUT (100mV/DIV)
500ns/DIV
0.1Hz to 10Hz Voltage Noise
TIME (1s/DIV)
INPUT
OUTPUT
OUTPUT (50mV/DIV)
AV = 5V/V
RF = 40.2kΩ
RI = 10kΩ
CF = 2pF
6090 G30
6090 G33
3.0
2.5
2.0
1.5
1.0
SUPPLY CURRENT (mA)
0.5
0
8
Supply Current vs OD Pin Voltage
VS = ±70V
= 0V
V
COM
125°C
85°C
25°C
–50°C
0.5
1.0 1.3 1.5
0.8
OD-COM (V)
1.8 2.0
OD Pin Input Current
vs OD Pin Voltage
75
VS = ±70V
= 0V
V
COM
50
25
0
OD INPUT CURRENT (µA)
–25
–50
0 1
6090 G34
For more information www.linear.com/LTC6090
2
OD-COM (V)
3 4 5
125°C
85°C
25°C
–50°C
6
6090 G35
Output Voltage Swing High (V
OH
)
vs Load Current and Temperature
800
700
600
500
(mV)
400
OH
V
300
200
100
7
0
125°C
85°C
25°C
–50°C
2 4 8
0
I
SOURCE
(mA)
6
10
6090 G36
6090fe
Page 9
TYPICAL PERFORMANCE CHARACTERISTICS
Output Voltage Swing Low (VOL)
vs Load Current and Temperature
500
450
400
350
300
(mV)
250
OL
V
200
150
100
50
0
125°C
85°C
25°C
–50°C
2 4 8
0
I
SOURCE
6
(mA)
10
6090 G37
LTC6090 Distortion vs Frequency
–20
VS = ±70V
–30
= 10
A
V
= 10V
V
OUT
–40
RL = 10k
–50
–60
–70
–80
DISTORTION (dBc)
–90
–100
–110
–120
10 100
P-P
2ND
3RD
FREQUENCY (kHz)
LTC6090/LTC6090-5
Thermal Shutdown Hysteresis
3.0
2.5
2.0
1.5
1.0
SUPPLY CURRENT (mA)
0.5
0
162 178170166164 168 176174172
6090 G38
JUNCTION TEMPERATURE (°C)
6090 G39
Open Circuit Voltage of COM,
OD, TFLAG
100
80
60
40
PIN VOLTAGE (V)
20
0
OD
COM
TFLAG
V– = 0V
0 140804020 60 120100
TOTAL SUPPLY VOLTAGE (V)
6090 G40
Open Loop Gain
40
30
20
10
0
–10
–20
CHANGE IN VOLTAGE OFFSET (µV)
–30
–40
–70 –50 –25 0 25 50 75
VS = ±70V
= 10k
R
LOAD
= 25°C
T
A
10 SAMPLES
OUTPUT VOLTAGE (V)
6090 G41
Open Loop Gain
vs Load Resistance
40
30
20
10
0
–10
–20
CHANGE IN VOLTAGE OFFSET (µV)
–30
–40
–70 –50 –25 0 25 50 75
OUTPUT VOLTAGE (V)
R
R
R
LOAD
LOAD
LOAD
= 500k
= 10k
= 100k
6090 G42
For more information www.linear.com/LTC6090
6090fe
9
Page 10
LTC6090/LTC6090-5
PIN FUNCTIONS
COM (Pin 1/Pin 1): COM Pin is used to interface OD and
TFLAG pins to voltage control circuits. Tie this pin to the
low voltage ground, or let it float.
–IN (Pin 2/Pin 4): Inverting Input Pin. Input common
mode range is V
maximum voltage range.
+IN (Pin 3/Pin 5): Noninverting Input Pin. Input common
range is V– + 3V to V+ – 3V. Do not exceed absolute
mode
maximum voltage range.
–
(Pin 4, Exposed Pad Pin 9/Pin 8, Exposed Pad
V
Pin 17): Negative Supply Pin. Connect to V
achieve low thermal resistance connect this pin to the
–
power plane. The V– power plane connection removes
V
heat from the device and should be electrically isolated
from all other power planes.
TFLAG (Pins 5, 9/Pins 9, 17): Temperature Flag Pin. The
TFLAG pin is an open drain output that sinks current when
the die temperature exceeds 145°C.
–
+ 3V to V+ – 3V. Do not exceed absolute
(S8E/FE)
–
Only. To
OUT (Pin 6/Pin 12): Output Pin. If this rail-to-rail output
goes below V
bias. If OUT goes above V
will forward bias. Avoid forward biasing the diodes on the
OUT pin.
+
(Pin 7/Pin 14): Positive Supply Pin.
V
OD (Pin 8/Pin 16): Output Disable Pin. Active low input
disables the output stage. If left open, an internal pull-up
resistor enables the amplifier. Input voltage levels are
referred to the COM pin.
GUARD (NA/Pins 2, 3, 6, 7, 10, 11, 13, 15): Guard pins
increase clearance and creepage between other pins.
Pins 3 and 6 can be used to build guard rings
inputs.
–
, the ESD protection diode will forward
Excessive current can cause damage.
+
, then output device diodes
around the
10
6090fe
For more information www.linear.com/LTC6090
Page 11
BLOCK DIAGRAM
6090 BD
LTC6090/LTC6090-5
COM
–IN
+IN
ESD
ESD
V
+
–
V
125Ω
125Ω
2M
2M
10k
+
V
2M
10k
1.2V
–
+
V
+
OUTPUT
ENABLE
DIFFERENTIAL
DRIVE
GENERATOR
TO COM PIN
6k
ESD
V
ESD
V
ESD
V
500Ω
–
–
–
OD
OUT
+
V
–
V
6k
INPUT STAGE
DIE
TEMPERATURE
SENSOR
TJ > 175°C
T
> 145°C
J
–
V
TFLAG
ESD
V
–
6090fe
For more information www.linear.com/LTC6090
11
Page 12
LTC6090/LTC6090-5
APPLICATIONS INFORMATION
General
The LTC6090 high voltage operational amplifier is designed
in a Linear Technology proprietary process enabling a railto-rail output stage with a 140V supply while maintaining
precision, low offset, and low noise.
Power Supply
The LTC6090 works off single or split supplies. Split supplies can be balanced or unbalanced. For example, two
±70V supplies can be used, or a 100V and –40V
supply
can be used. For single supply applications place a high
quality surface mount ceramic 0.1µF bypass capacitor
between the supply pins close to the part. For dual supply
applications use two high quality surface mount ceramic
+
capacitors between V
to ground, and V– to ground located
close to the part. When using split supplies, supply sequencing does not cause problems.
Input Protection
As shown
in the block diagram, the LTC6090 has a comprehensive protection network to prevent damage to the
input devices. The current limiting resistors and back to
back diodes are to keep the inputs from being driven apart.
The voltage-current relationship combines exponential
and resistive until the voltage difference between the pins
reach 12V.
At that point the Zeners turn on. Additional current into
the pins will
In the event of an ESD strike between an input and V
snap back the input differential voltage to 9V.
–
, the
voltage clamps and ESD device fire providing a current
–
path to V
protecting the input devices.
The input pin protection is designed to protect against
momentary ESD events. A repetitive large fast input swing
(>5.5V and <20ns rise time) will cause repeated stress on
the MOSFET input devices. When in such an application,
anti-parallel diodes (1N4148) should be connected between
the inputs to limit the swing.
rise to 50V, causing 10mA to flow through the feedback
resistor. The power dissipated in the output stage will
create thermal feedback to the input stage potentially
causing shifts in offset voltage. A better choice is a 50k
feedback resistor reducing the current in the feedback
resistor to 1mA.
Interfacing to Low Voltage Circuits
The COM pin is provided to set a common signal ground
for communication to a microprocessor or other low volt
age logic circuit. The COM pin should be tied to the low
voltage ground as shown in Figure 1. If left floating, the
internal resistive voltage divider will cause the COM pin
to rise 30% above mid-supply. The COM, OD, and TFLAG
pins are protected from overvoltage by internal Zener
diodes and current limiting resistors. Extra care should
be taken to observe the absolute maximum voltage limits
between
(OD and COM) and between (TFLAG and COM).
Voltage limits between these pins must remain between
–3V and 7V.
TO LOW
VOLTAGE
CONTROL
TIE TO LOW
VOLTAGE GROUND
TO LOW
VOLTAGE
CONTROL
LTC6090
OD
COM
LOW VOLTAGE
SUPPLY
200k
TFLAG
+
V
2M
10k
+
V
2M
10k
2M
–
V
6k
6k 500Ω
-
Feedback Resistor Selection
To get the most accuracy, the feedback resistor should be
chosen carefully. Consider an amplifier with A
= –50 and
V
a 5k feedback resistor. A 1V input will cause the output to
12
For more information www.linear.com/LTC6090
V
Figure 1. Low Voltage Interface
–
6090 F01
6090fe
Page 13
APPLICATIONS INFORMATION
V+
OUT
10V/DIV
LTC6090/LTC6090-5
When coming out of shutdown the LTC6090 bias circuits
and input stage are already powered up leaving only the
output stage to turn on and drive to the
voltage. Figures 2 and 3 show the part starting up and
coming out of shutdown, respectively.
Thermal Shutdown
proper output
1ms/DIV
Figure 2. Starting Up
OD
2V/DIV
OUT
2V/DIV
2.5ms/DIV
Figure 3. LTC6090 Output Disable Function
6090 F02
6090 F03
Output Disable
The OD pin is an active low disable with an internal 2MΩ
resistor that will pull up the OD pin enabling the output
stage if left open. The OD pin voltage is limited by an
internal Zener diode. When the OD pin is brought low to
within 0.65V of the COM pin, the output stage is disabled,
leaving the bias and input circuits enabled. This
results in
580μA (typical) standby current through the device. The
OD pin can be directly connected to the low voltage logic
or an open drain NMOS device as shown in Figure 1.
For simplest shutdown operation, float the COM pin, and
tie the OD pin to the TFLAG pin. This will float the low
voltage control pins, and the overtemperature circuit will
safely shutdown the output stage if
the die temperature
reaches 145°C.
Extra care should be taken to observe the absolute maxi-
mum voltage limits between (OD and COM) and between
(TFLAG and COM). Voltage limits between these pins must
remain between –3V and 7V.
The TFLAG pin is an open drain output pin that sinks 200µA
(typical) when the die temperature exceeds 145°C. The
temperature sensor has 5°C of hysteresis requiring the
part to cool to 140°C before disabling the TFLAG pin. Extra
care should be taken to observe the absolute maximum
voltage
limits between (OD and COM) and between (TFLAG
and COM). Voltage limits between these pins must remain
between –3V and 7V.
Tying the the TFLAG pin to the OD pin will automatically
shut down the output stage as shown in Figure 4. This will
ensure the junction temperature does not exceed 150°C.
For safety, an independent second overtemperature
threshold shuts down the output stage if the internal die
temperature rises to 175°C. There is hysteresis in the
thermal shutdown circuit requiring the die temperature
to cool 7°C. Once the device has cooled sufficiently, the
output stage will enable. Degradation can occur or reli-
ability may be affected when the junction temperature
of the device exceeds 150°C.
LTC6090
OD
TFLAG
OPTIONAL
(CAN BE LEFT
FLOATING)
Figure 4. Automatic Thermal Output
Disable Using the TFLAG Pin
COM
+
V
2M
10k
6k
–
V
6090 F04
For more information www.linear.com/LTC6090
6090fe
13
Page 14
LTC6090/LTC6090-5
APPLICATIONS INFORMATION
Board Layout
The LTC6090 is a precision low offset high gain amplifier that requires good analog PCB layout techniques to
maintain high performance. Start with a ground plane
that is star connected. Pull back the ground plane from
any high voltage vias. Critical signals such as the inputs
should have short and narrow PCB traces to reduce stray
capacitance which also improves stability. Use high quality
surface mount ceramic capacitors to bypass the supply(s).
In addition to the typical layout issues encountered with
a precision operational amplifier, there are the issues of
high voltage and high power. Important consideration for
high voltage traces are spacing, humidity and dust. High
voltage electric fields between adjacent conductors attract
dust. Moisture is absorbed by the dust and can contribute
to board leakage and electrical breakdown.
It is important to clean the PCB after soldering down the
part. Solder flux will accumulate dust and become a leakage hazard. It is recommended to clean the PCB with a
solvent, or simply use soap and water to remove residue.
Baking the PCB will remove left over moisture. Depending
on the application, a special low leakage board material
may be considered.
GUARD RING
C2
R2
R1
Figure 5a. Circuit Diagram Showing Guard Ring
OUT
–
LTC6090
+
6090 F05a
The TSSOP package has guard pins for applications that
require a guard ring. An example schematic diagram and
PCB layout is shown in Figures 5a and 5b, respectively,
of a circuit using a guard ring to protect the –IN pin.
The guard ring completely encloses the high impedance
node –IN. To simplify the PCB layout avoid using vias on
this node. In addition, the solder mask should be pulled
back along the guard ring exposing the metal. To help
the spacing between nodes, one of the extra pins on the
TSSOP package is used to route the guard ring behind
the –IN pin. The PCB should be thoroughly cleaned after
soldering to ensure there is no solder paste between the
exposed pad (Pin 17) and the guard ring.
+IN
R2
–IN
C2
Figure 5b. TSSOP Package PCB Layout with Guard Ring
R1
6090 F05b
6090fe
14
For more information www.linear.com/LTC6090
Page 15
APPLICATIONS INFORMATION
LTC6090/LTC6090-5
Power Dissipation
With a supply voltage of 140V it doesn’t take much current
to consume a lot of power. Consider that 10mA at 140V
consumes 1.4W of power and needs to be dissipated in a
small plastic SO package. To aid in power dissipation both
LTC6090 packages have exposed pads for low thermal
resistance. The amount of metal connected to the exposed
pad will
lower the θJA of a package. An optimal amount
of PCB metal connected to the SO package will lower the
junction to ambient thermal resistance down to 33°C/W.
If minimal metal is used, the θ
could more than double
JA
(see Table 1). If the exposed pad has no metal beneath it,
θ
could be as high 120°C/W.
JA
It’s recommended that the exposed pad
have as much PCB
metal connected to it as reasonably available. The more PCB
Table 1. Thermal Resistance as PCB Area of Exposed Pad Varies
EXAMPLE A EXAMPLE B EXAMPLE C EXAMPLE D
TOP LAYER A TOP LAYER B TOP LAYER C TOP LAYER D
metal connected to the exposed pad, the lower the thermal
resistance. Use multiple vias from the exposed pad to the
–
V
supply plane. The exposed pad is electrically connected
to the V
–
pin. In addition, a heat sink may be necessary
if operating near maximum junction temperature. See
Table 1 for guidance on how thermal resistance changes
as a function of metal area connected to the exposed pad
The LTC6090 is specified to source and sink 10mA at 140V.
If the total supply voltage is dropped across the device,
1.4W of power will need to be dissipated. If the quiescent
power is included (140V • 2.8mA = 0.4W), the total power
dissipated is 1.8W. The internal die temperature will rise
59° using an optimal layout in a SO package. A sub-optimal
layout could more than
double the amount of temperature
increase due to power dissipation.
.
BOTTOM LAYER A
= 43°C/W
θ
JA
θ
= 5°C/W
JC
θ
= 38°C/W
CA
MINIMUM BOTTOM LAYER A MINIMUM BOTTOM LAYER B MINIMUM BOTTOM LAYER C
θJA = 54°C/W
θ
= 5°C/W
JC
θ
= 49°C/W
CA
BOTTOM LAYER B BOTTOM LAYER C
= 50°C/W
θ
JA
θ
= 5°C/W
JC
θ
= 45°C/W
CA
= 57°C/W
θ
JA
θ
= 5°C/W
JC
θ
= 52°C/W
CA
= 57°C/W
θ
JA
θ
= 5°C/W
JC
θ
= 52°C/W
CA
= 58°C/W
θ
JA
θ
= 5°C/W
JC
θ
= 53°C/W
CA
BOTTOM LAYER D
θ
= 72°C/W
JA
θ
= 5°C/W
JC
θ
= 67°C/W
CA
6090fe
For more information www.linear.com/LTC6090
15
Page 16
LTC6090/LTC6090-5
APPLICATIONS INFORMATION
In order to avoid damaging the device, the absolute
maximum junction temperature should not be exceeded
(T
= 150°C). Junction temperature is determined
JMAX
using the expression:
TJ = PD • θJA + TA
where P
is the power dissipated in the package, θJA is the
D
package thermal resistance from ambient to junction and
TA is the ambient temperature. For example, if the part has
a 140V supply voltage with 2.8mA of quiescent current
and the output is 20V above the negative rail sourcing
10mA, the total power dissipated in the device is (120V •
10mA) + (140V • 2.8mA) = 1.6W. Under these conditions
the ambient temperature should not exceed:
= T
T
A
– (PD • θJA) = 150°C – (1.6W • 33°C/W) = 97°C.
JMAX
Safe Operating Area
The safe operating area, or SOA, illustrates the voltage,
current, and temperature conditions where the device can
be reliably operated. Shown below in Figure 6 is the SOA
for the LTC6090. The SOA takes into account ambient
temperature and the
power dissipated by the device. This
includes the product of the load current and difference
between the supply and output voltage, and the quiescent
current and supply voltage.
The LTC6090 is safe when operated within the boundaries
shown in Figure 6. Thermal resistance junction to case,
, is rated at a constant 5°C/W. Thermal resistance
θ
JC
junction to ambient, θ
, is dependent on board layout
JA
and any additional heat sinking. The six SOA curves in
Figure 6 show the direct effect of θ
on SOA.
JA
Stability with Large Resistor Values
A large feedback resistor along with the intrinsic input
capacitance will create an additional pole that affects
stability and causes peaking in the closed loop response.
To mitigate the peaking a small feedback capacitor placed
around the feedback resistor, as shown in Figure 7,
will
reduce the peaking and overshoot. Figure 8 shows the
closed loop response with various feedback capacitors.
Additionally stray capacitance on the input pins should
be kept to a minimum. With pA input current, the PCB
traces should be routed as short and narrow as possible.
C
F
100k
10k
PARASITIC INPUT
CAPACITANCE
Figure 7. LTC6090 with Feedback Capacitance
to Reduce Peaking
25
CF = 0pF
CF = 2pF
CF = 4pF
–
LTC6090
+
6090 F07
16
100
CURRENT DENSITY LIMITED
JUNCTION
TEMPERATURE
10
LIMITED
θJA = 33°C/W
= 60°C/W
θ
LOAD CURRENT (mA)
1
JA
= 100°C/W
θ
JA
= 33°C/W
θ
JA
= 60°C/W
θ
JA
= 100°C/W
θ
JA
101 1000100
SUPPLY VOLTAGE – LOAD VOLTAGE (V)
Figure 6. Safe Operating Area
TA = 25°C
TA = 90°C
6090 F06
For more information www.linear.com/LTC6090
20
GAIN (dB)
15
10
1 100010010
FREQUENCY (kHz)
Figure 8. Closed Loop Response with
Various Feedback Capacitors
6090 F08
6090fe
Page 17
APPLICATIONS INFORMATION
LTC6090/LTC6090-5
Slew Enhancement
The LTC6090 includes a slew enhancement circuit which
boosts the slew rate to 21V/μs making the part capable
of slewing rail-to-rail across the 140V output range in
less than 7μs. To optimize the slew rate and minimize
settling, stray capacitance should be kept to a minimum.
A feedback capacitor reduces overshoot and nonlinearities
associated with the slew enhancement circuit. The
size of
the feedback capacitor should be tailored to the specific
board, supply voltage and load conditions.
Slewing is a nonlinear behavior and will affect distortion.
The relationship between slew rate and full power bandwidth is given in the relationship below.
SR = VO • ω
Where V
is the peak output voltage and ω is frequency in
O
radians. The fidelity of a large sine wave output is limited
by the slew rate. The graph in Figure 9 shows distortion
versus frequency for several output levels.
Multiplexer Application
Several LTC6090s may be arranged to act as a high voltage analog multiplexer as shown in Figure 10. When using
this arrangement, it is
possible for the output to affect the
source on the disabled amplifier’s noninverting input. The
inverting and noninverting inputs are clamped through
resistors and back to back diodes. There is a path for
current to flow from the multiplexer output through the
disabled amplifier’s feedback resistor, and through the
inputs to the noninverting input’s source. For example, if
the enabled amplifier has a –70V
output, and the disabled
amplifier has a 5V input, there is 75V across the two resistors and the input pins. To keep this current below 1mA
the combined resistance of the R
and feedback resistor
IN
needs to be about 75k.
10
VS = ±70V
= 5
A
V
= 10k
R
L
= 30pF
C
F
1
0.1
V
= 100V
0.01
TOTAL HARMONIC DISTORTION + NOISE (%)
0.001
10 100000100 1000 10000
OUT
V
V
FREQUENCY (Hz)
OUT
OUT
= 50V
= 10V
P-P
P-P
P-P
6090 F09
Figure 9. Distortion vs Frequency for Large Output Swings
SELECT
CH1
10k
+
LTC6090
OD
COM
–
10k 100k
10k
CH2
+
LTC6090
OD
COM
MUX
OUT
–
10k 100k
6090 F10
Figure 10. Multiplexer Application
The output impedance of the disabled amplifier is greater
than 10MΩ at DC. The AC output impedance is shown in
the Typical Performance Characteristics section
.
For more information www.linear.com/LTC6090
6090fe
17
Page 18
LTC6090/LTC6090-5
TYPICAL APPLICATIONS
Gain of 20 Amplifier with a 40mA Protected Output Driver
40.2k
70V
47pF
7
–
2
2k
V
IN
3
2k40.2k
–70V
5
8
TF
OD V
LTC6090
+
1
9
4
1k
6
1k
6090 TA02
12V to ±70V Isolated Flyback Converter for Amplifier Supply
V
IN
12V
2.2µF
1M
562k
EN/UVLO
C
V
C
24.9k
V
IN
LT3511
GND BIAS
2.2nF
BAV99
604Ω
BAV99
6090 TA04
R
R
SWT
CZT5551
CZT5401
FB
REF
4.7µF
12.1Ω
100k
10k
OUT
BZX100A
BAV20W
750311692
1:1:5
•
•
•
Gain of 10 with Protected Output Current Doubler
200k
1%
22.1k
1%
200k
CRM1U-06M
70V
–
TF
OD
LTC6090
+
V
IN
–70V
70V
–
TF
OD
LTC6090
+
–70V
V
OUT1
0.47µF
100V
100Ω
1%
100Ω
1%
70V
+
±70V
AT ±20mA
6090 TA03
+
LTC6090
CRM1U-06M
0.47µF
100V
V
OUT2
–
–
–70V
18
9V to ±65V Isolated Flyback Converter for Amplifier Supply
1:1:5
4
3
8
•
CMMR1U-2
6
7
•
CMMR1U-2
•
5
1µF
130V
1µF
100V
CMHZ5266B
V
IN
9V
100k
22k
1
2
3
LT8300
EN/UVLO
GND
R
FB
130k
V
SW
5
IN
4
750311692
4.7µF
For more information www.linear.com/LTC6090
+
LTC6090
–
6090 TA05
65V
–65V
6090fe
Page 19
TYPICAL APPLICATIONS
50V
Audio Power Amplifier
1N4148
1N4148
1nF
40.2Ω
CZT5401
LTC6090/LTC6090-5
100pF
33.2k
100pF
V
TOP
SENSE+
7
5
2
1k
IN
20k
3
1nF
–50V
* USE SEVERAL SERIES RESISTORS TO REDUCE DISTORTION (i.e. 5 × 2kΩ).
–
LTC6090
+
9
4
8
6
1
499Ω
10k*
33.2k
100pF
2.49k
1N41481N4148
1N4148
1N4148
V
IN
1nF
LT1166
V
BOTTOM
I
V
I
SENSE–
CZT5551
39.2Ω
LIM
LIM
+
OUT
–
1k
499Ω
100pF
IXTH50N20
100k
1k
6090 TA06a
0.1Ω
0.1Ω
IXTH24P20
1µH
OUT
22nF
10Ω
1µF
1µF
100k
1k
Total Harmonic Distortion Plus Noise
Analyzer Passband 10Hz to 80kHz
0.100
0.010
4Ω AT 100W
0.001
0
TOTAL HARMONIC DISTORTION PLUS NOISE (%)
10 100 100000100001000
For more information www.linear.com/LTC6090
8Ω AT 50W
FREQUENCY (Hz)
6090 TA06b
6090fe
19
Page 20
LTC6090/LTC6090-5
TYPICAL APPLICATIONS
High Current Pulse Amplifier
75pF
10k
70V
7
5
2
499Ω
IN
10k
3
499Ω
–70V
–
LTC6090
+
9
4
8
1
1k
499Ω
6
100Ω
2SK1057
IHSM-3825
1µH
OUT
2SJ161
6090 TA07
60V Step Response Into 10Ω
40
30
20
10
VOLTS
0
20
–10
–20
5µs/DIV
For more information www.linear.com/LTC6090
6090 TA07b
6090fe
Page 21
TYPICAL APPLICATIONS
LTC6090/LTC6090-5
Simple 100W Audio Amplifier
50pF
2k 2k 2k
50V
6
100Ω
100k
6.8k
10k
BIAS
6.8k
100k
100Ω
100nF
499Ω
IN
10k
499Ω
–50V
SET QUIESCENT SUPPLY CURRENT AT ABOUT 200mA WITH BIAS ADJUSTMENT.
SET QUIESCENT CURRENT TO 100mA IF PARALLEL MOSFETs ARE NOT USED (FOR 8Ω OR HIGHER).
2
3
100nF
7
5
–
LTC6090
+
9
4
8
1
2k 2k
2SK1057
1k
1k
6090 TA08a
2SK1057
IHSM-3825
1µH
OUT
2SJ1612SJ161
Total Harmonic Distortion Plus
Noise vs Frequency
1
0.1
4Ω AT 100W
0.01
0.001
0.0001
TOTAL HARMONIC DISTORTION PLUS NOISE (%)
FREQUENCY (Hz)
8Ω AT 50W
For more information www.linear.com/LTC6090
10k1k100
6090 TA08b
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21
Page 22
LTC6090/LTC6090-5
TYPICAL APPLICATIONS
Wide Common Mode Range 10x Gain Instrumentation Amplifier
70V
7
5
+IN
–IN
3
2
–70V
70V
3
2
–70V
+
LTC6090
–
9
4
7
5
+
LTC6090
–
9
4
8
6
1
8
1
22pF
205k
22pF
6
* THESE RESISTORS CAN BE 0Ω IF INPUT SIGNAL SOURCE IMPEDANCES ARE <20MΩ.
Typically <1mV Input-Referred Error
10k*
100k
24.9k
100k
10k*
22pF
1
2
3
4
LT5400-2
100k
100k
100k
100k
9
70V
–70V
3
2
22pF
7
5
+
LTC6090
–
9
4
8
1
6
LTC6090 TA09
49.9Ω
OUT
–3dB at 45kHz
8
7
6
5
90
80
70
60
CMRR (dB)
50
40
1 10 100
CM FREQUENCY (kHz)
6090 TA09b
22
6090fe
For more information www.linear.com/LTC6090
Page 23
LTC6090/LTC6090-5
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC6090#packaging for the most recent package drawings.
FE Package
16-Lead Plastic TSSOP (4.4mm)
(Reference LTC DWG # 05-08-1663 Rev K)
Exposed Pad Variation BA
4.90 – 5.10*
2.74
(.108)
(.193 – .201)
2.74
(.108)
16 1514 13 12 11
10 9
6.60 ±0.10
4.50 ±0.10
RECOMMENDED SOLDER PAD LAYOUT
0.09 – 0.20
(.0035 – .0079)
NOTE:
1. CONTROLLING DIMENSION: MILLIMETERS
2. DIMENSIONS ARE IN
3. DRAWING NOT TO SCALE
SEE NOTE 4
0.45 ±0.05
0.65 BSC
4.30 – 4.50*
(.169 – .177)
0.50 – 0.75
(.020 – .030)
MILLIMETERS
(INCHES)
2.74
(.108)
1.05 ±0.10
1 3 45678
2
0.25
REF
0° – 8°
0.65
(.0256)
BSC
0.195 – 0.30
(.0077 – .0118)
TYP
4. RECOMMENDED MINIMUM PCB METAL SIZE
FOR EXPOSED PAD ATTACHMENT
*DIMENSIONS DO NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.150mm (.006") PER SIDE
2.74
(.108)
1.10
(.0433)
MAX
0.05 – 0.15
(.002 – .006)
FE16 (BA) TSSOP REV K 0913
6.40
(.252)
BSC
For more information www.linear.com/LTC6090
6090fe
23
Page 24
LTC6090/LTC6090-5
PACKAGE DESCRIPTION
Please refer to http://www.linear.com/product/LTC6090#packaging for the most recent package drawings.
S8E Package
8-Lead Plastic SOIC (Narrow .150 Inch) Exposed Pad
(Reference LTC DWG # 05-08-1857 Rev C)
.189 – .197
.050
(1.27)
BSC
.045 ±.005
(1.143 ±0.127)
(4.801 – 5.004)
8
NOTE 3
.005 (0.13) MAX
7
6
5
.245
(6.22)
MIN
.030 ±.005
(0.76 ±0.127)
TYP
RECOMMENDED SOLDER PAD LAYOUT
.010 – .020
(0.254 – 0.508)
.008 – .010
(0.203 – 0.254)
NOTE:
1. DIMENSIONS IN
2. DRAWING NOT TO SCALE
3. THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTRUSIONS SHALL NOT EXCEED .010" (0.254mm)
4. STANDARD LEAD STANDOFF IS 4mils TO 10mils (DATE CODE BEFORE 542)
5. LOWER LEAD STANDOFF IS 0mils TO 5mils (DATE CODE AFTER 542)
.118
(2.99)
REF
× 45°
.016 – .050
(0.406 – 1.270)
INCHES
(MILLIMETERS)
.089
(2.26)
REF
0°– 8° TYP
.160 ±.005
(4.06 ±0.127)
(5.791 – 6.197)
.228 – .244
.053 – .069
(1.346 – 1.752)
.014 – .019
(0.355 – 0.483)
TYP
1
(2.997 – 3.550)
2
.118 – .139
4
.150 – .157
(3.810 – 3.988)
NOTE 3
5
0.0 – 0.005
(0.0 – 0.130)
.080 – .099
(2.032 – 2.530)
3
4
.004 – .010
(0.101 – 0.254)
.050
(1.270)
BSC
S8E 1015 REV C
24
6090fe
For more information www.linear.com/LTC6090
Page 25
LTC6090/LTC6090-5
REVISION HISTORY
REV DATE DESCRIPTION PAGE NUMBER
A 11/12 Added ESD Statement. 2
B 9/13 Corrected schematics 16, 17, 18
C 6/14 Added LTC6090-5, Improved specs. All
D 5/15 Removed ESD statement to reflect improved ESD performance.
Changed internal TFLAG circuit resistor values.
Updated Thermal Shutdown description.
Corrected application circuit resistor value.
E 11/15 Corrected resistor values 20, 21
2
11, 12
13
19, 20, 21
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
For more information www.linear.com/LTC6090
6090fe
25
Page 26
LTC6090/LTC6090-5
TYPICAL APPLICATION
Extended Dynamic Range 1MΩ Transimpedance Photodiode Amplifier
0.3pF
10M
1%
2
3
125V
–
LTC6090
+
–3V
7
8
1
4
(1kHz – 40kHz)
RMS
200k
1%
100mW
5
6
22.1k
1%
6090 TA10
V
OUT
PHOTODIODE
SFH213
I
PD
–3V
V
= IPD • 1M
OUT
OUTPUT NOISE = 21µV
OUTPUT OFFSET = 150µV MAXIMUM
BANDWIDTH = 40kHz (–3dB)
OUTPUT SWING = 0V TO 12V
RELATED PARTS
PART NUMBER DESCRIPTION COMMENTS
Amplifiers
LT1990 ±250V Input Range G = 1, 10, Micropower,
Difference Amplifier
LT1991 Precision, 100µA Gain Selectable Amplifier Pin Configurable as a Difference Amplifier, Inverting and Noninverting Amplifier
Matched Resistors
LT5400 Quad Matched Resistor Network Excellent Matching Specifications Over the Entire Temperature Range
Digital to Analog Converters
LTC2641/LTC2642 16-Bit V
LTC2756 Serial 18-Bit SoftSpan I
DACs in 3mm × 3mm DFN Guaranteed Monotonic Over Temperature
OUT
DAC 18-Bit Settling Time: 2.1µs
OUT
Flyback Controllers
LT3511 Monolithic High Voltage Isolated Flyback Converter 4.5V to 100V Input Voltage Range, No Opto-Coupler Required
LT8300 100V
Micropower Isolated Flyback Converter
IN
with 150V/260mA Switch
Pin Selectable Gain of 1 or 10
Maximum 18-Bit INL Error: ±1 LSB Over Temperature
6V to 100V Input Voltage Range. V
Set with a Single External Resistor
OUT
26
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
For more information www.linear.com/LTC6090
●
www.linear.com/LTC6090
6090fe
LT 1115 REV E • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 2012
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