Datasheet ZNBG2000, ZNBG2001 Datasheet (Zetex)

FET BIAS CONTROLLER

DEVICE DESCRIPTION

The ZNBG series of devices are designed to meet the
bias requirements of GaAs and HEMT FETs
commonly used in satellite receiver LNBs, PMR,
cellular telephones etc. with a minimum of external
components.

With the addition of two capacitors and a resistor the
devices provide drain voltage and current control for
2 external grounded source FETs, generating the
regulated negative rail required for FET gate biasing
whilst operating from a single supply. This negative
bias, at -3 volts, can also be used to supply other
external circuits.

The ZNBG2000/1 contains two bias stages. A single
resistor allows FET drain current to be set to the
desired level. The series also offers the choice of
drain voltage to be set for the FETs, the ZNBG2000
gives 2.2 volts drain whilst the ZNBG2001 gives 2
volts.

These devices are unconditionally stable over the full
working temperature with the FETs in place, subject
to the inclusion of the recommended gate and drain
capacitors. These ensure RF stability and minimal
injected noise.

ZNBG2000
ZNBG2001

It is possible to use less than the devices full
complement of FET bias controls, unused drain and
gate connections can be left open circuit without
affecting operation of the remaining bias circuits.

In order to protect the external FETs the circuits have
been designed to ensure that, under any conditions
including power up/down transients, the gate drive
from the bias circuits cannot exceed the range -3.5V
to 0.7V. Furthermore if the negative rail experiences a
fault condition, such as overload or short circuit, the
drain supply to the FETs will shut down avoiding
excessive current flow.

The ZNBG2000/1 are available in MSOP10 packages
for the minimum in devices size. Device operating
temperature is -40 to 80°C to suit a wide range of
environmental conditions.

FEATURES

•

Provides bias for GaAs and HEMT FETs

•

Drives up to two FETs

•

Dynamic FET protection

•

Drain current set by external resistor

•

Regulated negative rail generator requires only 2

external capacitors

•

Choice in drain voltage

•

Wide supply voltage range

•

MSOP surface mount package

ISSUE 1 - AUGUST 2001

APPLICATIONS

•

Satellite receiver LNBs

•

Private mobile radio (PMR)

•

Single in single out C Band LNB

•

Cellular telephones

1

ZNBG2000
ZNBG2001

ABSOLUTE MAXIMUM RATINGS

Supply Voltage -0.6V to 15V

Supply Current 100mA

Drain Current (per FET) 0 to 15mA
(set by R

CAL1

and R

CAL2

)

ELECTRICAL CHARACTERISTICS TEST CONDITIONS (Unless otherwise

SYMBOL PARAMETER CONDITIONS

V

CC

I

CC

V

SUB

E

ND

E

NG

f

O

Supply Voltage 5 12 V
Supply Current ID1and I

Substrate Voltage
(Internally generated)

Output Noise

Drain Voltage
Gate Voltage

ID1and ID2=10mA

I
I

C
C

D2=0

=0

SUB

= -200µA

SUB

=4.7nF, CD=10nF

G

=4.7nF, CD=10nF

G

Oscillator Freq. 150 330 800 kHz

DRAIN CHARACTERISTICS

I

DO

I

D

⌬I

⌬I

V

⌬V
⌬V

DT

D

Output Current Range Set by R

CAL1

Current 8 10 12 mA
Current Change

DV

with V
with T

Voltage ZNBG2000

CC

j

VCC=5 to 12V 0.5 %/V
Tj=-40 to +80°C 0.05 %/°C
ID1and ID2=10mA 2

ZNBG2001

Voltage Change

with V

with T

CC

j

DV

DT

VCC= 5 to 12V 0.5 %/V

Tj= -40 to +80°C 50 ppm

GATE CHARACTERISTICS

I

GO

V

OL

V

OH

Notes:

1. The negativebias voltages specified are generatedon-chip using an internaloscillator. Two externalcapacitors, C
purpose.

2. The characteristics are measured using an external reference resistors R

3. Noise voltage is not measured in production.

4. Noise voltage measurement ismade with FETs and gateand drain capacitors in placeon all outputs. C

Output Current Range -40 2000
Output Voltage

Output Low ID1and ID2=12mA

Output High ID1and ID2= 8mA

and IG2=0 -3.5 -2 V

IG1

and ID2=12mA

I

D1

and IG2= -10µA

I

G1

and IG2= 0 0.4 1 V

I

G1

Output Current 100mA

Operating Temperature -40 to 80°C

Storage Temperature -40 to 85°C

Power Dissipation (T

amb 25 C)

MSOP10 500mW

LIMITS

UNITS

Min Typ Max

5
24

-3.5 -2.8 -2

10
30

-2

0.02

0.005

mA
mA

V
V

Vpkpk
Vpkpk

015mA

1.8

2.2
2

2.4

2.2

V
V

µA

-3.5 -2 V

and C

, of 47nFare required for this

SUB

to ground.

of value 16kΩ wired from pin R

CAL1

NB

CAL1

, 4.7nF, are connected betweengate outputs and

G

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2

TYPICAL CHARACTERISTICS

ZNBG2000
ZNBG2001

16

14

12

10

8

6

4

Drain Current (mA)

2

0

0102030 50

Rcal (k)

JFET Drain Current v Rcal

2.4

2.3

2.2

2.1

Drain Voltage (V)

2.0
2468 16

Vcc = 5V

6V
8V
10V

10

12 14

Drain Current (mA)

JFET Drain Voltage v Drain Current

Vcc = 5V

40

ZNBG2000

Note:- Operation with loads > 200µA

0.0

-0.5

-1.0

-1.5

Vsub (V)

-2.0

-2.5

-3.0

0 0.2 0.4 0.6 1.0

is not guaranteed.

Vcc = 5V

6V
8V

10V

External Vsub Load (mA)

Vsub v External Load

2.2

2.1

Drain Voltage (V)

2.0

1.9

1.8
2

4

Vcc = 5V

6V
8V
10V

68

10 12 14 16

Drain Current (mA)

JFET Drain Voltage v Drain Current

0.8

ZNBG2001

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3

ZNBG2000
ZNBG2001

FUNCTIONAL DIAGRAM

FUNCTIONAL

DESCRIPTION

The ZNBG devices provide all the bias requirements
for external FETs, including the generation of the
negative supply required for gate biasing, from the
single supply voltage.

The diagram above shows a single stage from the
ZNBG series. The ZNBG2000/1 contains 2 such
stages.

The drain voltage of the external FET Q
ZNBG device to its normal operating voltage. This is
determined by the on board V
ZNBG2000 this is nominally 2.2 volts whilst the
ZNBG2001 provides nominally 2 volts.

Set reference, for the

D

is set by the

N

7

The drain current taken by the FET is monitored by
the low value resistor I
the gate of the FET adjusts the gate voltage of Q
that the drain current taken matches the current
called for by an external resistor R
devices have the facility to program different drain
currents into selected FETs.

Since the FET is a depletion mode transistor, it is
usually necessary to drive its gate negative with
respect to ground to obtain the required drain
current. To provide this capability powered from a
single positive supply, the device includes a low
current negative supply generator. This generator
uses an internal oscillator and two external
capacitors, C

4

NB

and C

Sense. The amplifier driving

D

. Both ZNBG

CAL

.

SUB

ISSUE 1 - AUGUST 2001

so

N

ZNBG2000
ZNBG2001

TYPICAL APPLICATION CIRCUIT

INFORMATION

The above is a partial application circuit for the ZNBG
series showing all external components required for
appropriate biasing. The bias circuits are
unconditionally stable over the full temperature
range with the associated FETs and gate and drain
capacitors in circuit.

Capacitors C
supply and substrate generator noise is not allowed
to affect other external circuits which may be
sensitive to RF interference. They also serve to
suppress any potential RF feedthrough between
stages via the ZNBG device. These capacitors are
required for all stages used. Values of 10nF and 4.7nF
respectively are recommended however this is
design dependent and any value between 1nF and
100nF could be used.

The capacitors C
the ZNBGs negative supply generator. The negative
bias voltage is generated on-chip using an internal
oscillator. The required value of capacitors C
C

is 47nF. This generator produces a low current

SUB

supply of approximately -3 volts. Although this
generator is intended purely to bias the external
FETs, it can be used to power other external circuits
via the C

and CGensure that residual power

D

SUB

pin.

NB

and C

are an integral part of

SUB

NB

and

APPLICATIONS

16k

Resistor R
external FETs are operated. If any bias control circuit
is not required, its related drain and gate connections
may be left open circuit without affecting the
operation of the remaining bias circuits. If all FETs
associated with a current setting resistor are omitted,
the particular R
supply current can be reduced, if required, by using a
high value R

The ZNBG devices have been designed to protect the
external FETs from adverse operating conditions.
With a JFET connected to any bias circuit, the gate
output voltage of the bias circuit can not exceed the
range -3.5V to 0.7V, under any conditions including
powerup and powerdown transients. Should the
negative bias generator be shorted or overloaded so
that the drain current of the external FETs can no
longer be controlled, the drain supply to FETs is shut
down to avoid damage to the FETs by excessive
drain current.

The following diagram show the ZNBG2000/1 in
typical LNB applications.

sets the drain current at which all

CAL1

should still be included. The

CAL

resistor (e.g. 470k).

CAL

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5

ZNBG2000
ZNBG2001

INFORMATION CONT. APPLICATIONS

ZNBG2000/1

ZNBG2000/01 Pinout For MSOP10

Package Designator - X

1

D1

G1

GND

CNB1

CNB2 CSUB

VCC

D2

G2

RCAL

ORDERING INFORMATION

Part Number Package Part Mark QTY Reel

ZNBG2000X10 MSOP10 ZNBG2000 4000

ZNBG2001X10 MSOP10 ZNBG2001 4000

9

6

ISSUE 1 - AUGUST 2001

PACKAGE DIMENSIONS

E

F

H

G

A

C

ZNBG2000
ZNBG2001

a

D

K

B

DIM Millimetres tol. DIM Millimetres tol.

A 1.10 MAX. F 4.9 ⫾0.15

B 0.23 +0.07

-0.08

G 0.55 ⫾0.15

C 0.18 60.05 H 3.00 ⫾0.1

D 0.50 BSC K 0.10 ⫾0.05

E 3.00 60.1 a 3.0 ⫾3.0⬚

© Zetex plc 2001

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