Page 1
GENERAL DESCRIPTION
CPS DC-9027-00
Z86247
PRELIMINARY
CUSTOMER PROCUREMENT SPECIFICATION
Z86247
40-PIN LOW-COST DIGIT AL
TELEVISION CONTROLLER (4LDTC)
The Z86247 40-pin Low-Cost Digital Television Controller
(4LDTC) introduces a new level of sophistication to singlechip architecture. The Z86247 is a member of the Z8
single-chip microcontroller family with 8 Kbytes of ROM
and 236 bytes of RAM. The device is offered in a 40-pin
package and is CMOS compatible. The 4LDTC offers
mask programmed ROM which enables the Z8
microcontroller to be used in a high volume production
application device embedded with a custom program
(customer supplied program) and combines together with
the Z86C27 (DTC) and Z86127 (LDTC) to provide support
for high end, mid range and low end TV applications.
Zilog’s 4LDTC offers fast execution, efficient use of memory,
sophisticated interrupts, input/output bit manipulation
capabilities, and easy hardware/software system expansion
along with low cost and low power consumption. The
device provides an ideal performance and reliability solution
for consumer and industrial television applications.
The Z86247 architecture is characterized by utilizing Zilog’s
advanced Superintegration™ design methodology. The
device has an 8-bit internal data path controlled by a Z8
microcontroller and On Screen Display (OSD) logic circuits
and Pulse Width Modulators (PWM). On-chip peripherals
include two register mapped I/O ports (Ports 2 and Port 3),
interrupt control logic (one software, two external and three
internal interrupts) and a standby mode recovery input
port (Port 3, pin P30).
A 14-bit PWM port provides enough voltage resolution for
a voltage synthesizer tuning system. Three 6-bit PWM
®
ports are used for controlling audio signal levels. Three
8-bit PWM ports used to vary picture levels.
The 4LDTC applications demand powerful I/O capabilities.
The Z86247 fulfills this with 24 pins dedicated to input or
output. These lines are grouped into three ports, and are
configurable under software control to provide timing,
status signals, parallel I/O and an address/data bus for
interfacing to external memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Video
RAM, and Register File. The Register File is composed of
236 bytes of general purpose registers, two I/O Port
registers, 15 control and status registers and three reserved
registers.
To unburden the program from coping with the real-time
problems such as counting/timing and data communication,
the 4LDTC offers two on-chip counter/timers with a large
number of user selectable modes (Figure 1).
Notes:
All Signals with a preceding front slash, "/", are active Low, e.g.:
B//W (WORD is active Low); /B/W (BYTE is active Low, only).
Power connections follow conventional descriptions below:
The OSD control circuits support 8 rows by 20 columns of
characters. The character color is specified by row. One of
the eight rows is assigned to show two kinds of colors for
bar type displays such as volume control. The OSD is
capable of displaying high resolution (11x15 dot pattern)
characters.
DC 9027-00 (7-27-94)
Connection Circuit Device
Power V
Ground GND V
CC
V
DD
SS
1
Page 2
GENERAL DESCRIPTION (Continued)
T
CPS DC-9027-00
Z86247
XTAL1
XTAL2
/RESET
P30
P31
P34
P35
P36
P60
P61
P62
P63
P64
P65
AFCIN
RESET
Oscillator
WDT
Counter
Timer
Counter
Timer
Port 3/
Interrupt
Port 6
(Control)
8 KByte
Program ROM
Z8 CPU
Core
256 Byte
Register File
Port 0
Port 1
A8-15 AD0-7
Port 2
PWM 1
14 -bit
PWM 6
to
PWM 8
6-bit
PWM 9
to
PWM11
P27
P26
P25
P24
P23
P22
P21
P20
PWM 1
PWM 6
PWM 7
PWM 8
PWM 9
PWM 10
PWM 11
128 Byte
Character RAM
4 KByte
Character ROM
Functional Block Diagram
On Screen
Display
OSCIN
OSCOU
HSYNC
VSYNC
VRED
VGREEN
VBLUE
VBLANK
2
Page 3
PIN CONFIGURATION
CPS DC-9027-00
Z86247
PWM1
P35
P36
P34
P31
P30
XTAL1
XTAL2
/RESET
P60
GND
P61
P62
VCC
P63
P64
P65
AFCIN
OSCIN
OSCOUT
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
Z86247
(LDTC)
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
PWM6
PWM7
PWM8
PWM9
PWM10
PWM11
P27
P26
P25
P24
P23
P22
P21
P20
VBLANK
VBLUE
VGREEN
VRED
VSYNC
HSYNC
40-Pin Mask-ROM Plastic DIP
3
Page 4
ABSOLUTE MAXIMUM RATINGS
CPS DC-9027-00
Z86247
Stresses greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; operation of the device at any
sections of this specification is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
condition above those indicated in the operational
Symbol Parameters Min Max Units Notes
V
CC
V
I
V
I
V
O
I
OH
I
OH
I
OL
I
OL
T
A
T
STG
Notes:
[1] Port 2 open-drain
[2] PWM open-drain outputs
[3] PWM breakdown is 13.2V (normal operation). Will withstand
16V max. (non-momentary operating).
* Voltage on all pins with respect to GND.
† See Ordering Information
Power Supply Voltage* –0.3 +7 V
Input Voltage –0.3 VCC+0.3 V
Input Voltage –0.3 VCC+0.3 V [1]
Output Voltage –0.3 VCC+8.0 V [2,3]
Output Current High –10 mA 1 pin
Output Current High –100 mA All total
Output Current Low 20 mA 1 pin
Output Current Low 200 mA All total
Operating Temperature †
Storage Temperature –65 +150 C
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (Test Load
Diagram).
From Output
Under Test
150 pF
Test Load Diagram
VDD
RLL
RLH
4
Page 5
CAPACITANCE
TA=25°C; VCC=GND=0V; Freq=1.0 MHz; unmeasured pins to GND.
Parameter Max Units
Input capacitance 10 pF
Output capacitance 20 pF
I/O capacitance 25 pF
AFCIN input capacitance 10 pF
DC CHARACTERISTICS
TA=0°C to +70°C; VCC=+4.5V to +5.5V; F
TA=0°C to +70°C Typical
Sym Parameter Min Max @ 25°C Units Conditions
=4 MHz
OSC
CPS DC-9027-00
Z86247
V
IL
V
ILC
V
IH
V
IHC
V
HY
V
PU
V
OL
V
00-01
V
01-11
V
OH
I
IR
I
IL
I
OL
I
CC
I
CC1
I
CC2
Note:
[1] PWM open-drain
Input Voltage Low 0 0.2 V
Input XTAL/Osc In Low 0.07 V
Input Voltage XTAL/Osc In High 0.7 V
Input XTAL/Osc In High 0.8 V
Schmitt Hysteresis 0.1 V
Maximum Pull-Up Voltage 12 V [1]
Output Voltage Low 0.4 0.16 V IOL=1.00 mA
AFC Level 01 In 0.45 V
AFC Level 11 In 0.5 V
Output Voltage High VCC–0.4 4.75 V IOH=–0.75 mA
Reset Input Current –80 –46 µAVRL=0V
Input Leakage –3.0 3.0 0.01 µA 0V,V
Tri-State Leakage –3.0 3.0 0.02 µA 0V,V
Supply Current 20 13.2 mA All inputs at rail
1.48 V
CC
0.98 V External Clock Generator Driven
CC
CC
CC
CC
V
CC
V
CC
3.2 V External Clock Generator Driven
3.0 V External Clock Generator Driven
0.8 V
0.4 0.19 V IOL=0.75 mA [1]
1.9 V
CC
0.75 V
CC
CC
3.12 V
CC
CC
6 3. 2 mA All inputs at rail
10 2.0 µA All inputs at rail
5
Page 6
AC CHARACTERISTICS
Timing Diagrams
CPS DC-9027-00
Z86247
XTAL1
Tin
1
3
External Clock
7 5
4
6
3
2
2
IRQn
Counter Timer
8 9
Interrupt Request
6
Page 7
AC CHARACTERISTICS
0
2
413
Timing Diagrams (Continued)
Vcc
CPS DC-9027-00
Z86247
Internal /RESET
External /RESET
HSYNC
1
Power-On Reset
11
1
1
OSC2
On-Screen Display
7
Page 8
CPS DC-9027-00
AC CHARACTERISTICS
TA=0° C to +70° C; VCC=+4.5V to +5.5V; F
No Symbol Parameter Min Max Unit
1 TpC Input Clock Period 250 1000 ns
2 TrC,TfC Clock Input Rise and Fall 15 n s
3 TwC Input Clock Width 70 n s
4 TwTinL Timer Input Low Width 7 0 n s
5 TwTinH Timer Input High Width 3TpC
6 TpTin Timer Input Period 8TpC
7 TrTin,TfTin Timer Input Rise and Fall 100 n s
8 a TwIL Int Req Input Low 7 0 n s
8 b TwIL 3TpC
9 TwIH Int Request Input High 3TpC
10 TdPOR Power On Reset Delay 25 100 ms
11 TdLVIRES Low Voltage Detect to 200 ns
Internal RESET Condition
12 TwRES Reset Minimum Width 5TpC
13 TdHsOI H
14 TdHsOh H
1 5 TdWDT WDT Refresh Time 1 2 m s
Note:
Refer to DC Characteristics for details on switching levels.
Start to V
sync
End to V
sync
osc
=4 MHz
OSC
Stop 2TpV 3TpV
osc
Start 1TpV
Z86247
Pre-Characterization Product:
The product represented by this CPS is newly introduced
and Zilog has not completed the full characterization of the
product. The CPS states what Zilog knows about this
product at this time, but additional features or non-con-
Low Margin:
Customer is advised that this product does not meet
Zilog’s internal guardbanded test policies for the specification requested and is supplied on an exception basis.
© 1994 by Zilog, Inc. All rights reserved. No part of this document
may be copied or reproduced in any form or by any means
without the prior written consent of Zilog, Inc. The information in
this document is subject to change without notice. Devices sold
by Zilog, Inc. are covered by warranty and patent indemnification
provisions appearing in Zilog, Inc. Terms and Conditions of Sale
only. Zilog, Inc. makes no warranty, express, statutory, implied or
by description, regarding the information set forth herein or
regarding the freedom of the described devices from intellectual
property infringement. Zilog, Inc. makes no warranty of merchantability or fitness for any purpose. Zilog, Inc. shall not be
responsible for any errors that may appear in this document.
Zilog, Inc. makes no commitment to update or keep current the
information contained in this document.
formance with some aspects of the CPS may be found,
either by Zilog or its customers in the course of further
application and characterization work. In addition, Zilog
cautions that delivery may be uncertain at times, due to
start-up yield issues.
Customer is cautioned that delivery may be uncertain and
that, in addition to all other limitations on Zilog liability
stated on the front and back of the acknowledgement,
Zilog makes no claim as to quality and reliability under the
Zilog’s products are not authorized for use as critical components in life support devices or systems unless a specific written
agreement pertaining to such intended use is executed between
the customer and Zilog prior to use. Life support devices or
systems are those which are intended for surgical implantation
into the body, or which sustains life whose failure to perform,
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to result in
significant injury to the user.
Zilog, Inc. 210 East Hacienda Ave.
Campbell, CA 95008-6600
Telephone (408) 370-8000
Telex 910-338-7621
FAX 408 370-8056
8
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