Pin Descriptions continued
CFG/SDO 10 Input/Output Configuration setup. See Modes of Operation. When reprogramming
the In-System Programmable (ISP) CPLD, this pin is used for the
cascade connections and should not be pulled low or high.
TD 11 Input RS-232C, Transmitted Data
RD 12 Output RS-232C, Received Data
RTS 13 Input RS-232C, Request to Send
CTS 14 Output RS-232C, Clear to Send
DSR 15 Output RS-232C, Data Communications Equipment (DCE) Ready
CD 16 Output RS-232C, Received Line Signal Detect
TCLK 17 Output RS-232C, Transmit Clock
RCLK 18 Output RS-232C, Receive Clock
DTR 19 Input RS-232C, Data Terminal Ready
RI 20 Output RS-232C, Ring Indicator
MCLK 21 Input RS-232C, Master Clock, Transmitter Signal Timing (DTE Source)
RST_BT 22 Input Optional on-board processor Reset button
-12V 23 Power -12 Volt power supply
GND 24 Ground Power & signal ground
+12V 25 Power +12 Volt power supply
D7 26 Input Data bus line 7 for CODEC Data
D6 27 Input Data bus line 6 for CODEC Data
D5 28 Input Data bus line 5 for CODEC Data
D4 29 Input Data bus line 4 for CODEC Data
PDI 30 Output CODEC Power Down Control
RT_CTRL 31 Output CODEC Voice Signal Route Control
PWR_CTRL 32 Output POTS Phone Set Power Control
DC_EN 33 Output Enable DC Source for RING generation
RING_EN 34 Output RING Signal Enable for POTS module
DTMF_RDY/SDI 35 Input DTMF Signal Ready from POTS module. When used with the In
System Programmable CPLD, It becomes the SDI
OH/MODE 36 Input Off Hook Signal from POTS module. When used with In System
Programmable CPLD it becomes the Mode Control
SCLK 37 Input SCLK for In System Programmable CPLD
ISP_EN 38 Input In System Programmable CPLD Enable Signal
FSR 39 Output CODEC Frame Sync. Receive
Reserved 40 N/A No user connection allowed
Reserved 41 N/A No user connection allowed
Reserved 42 N/A No user connection allowed
Reserved 43 N/A No user connection allowed
FSX 44 Frame Synchronization
DIN 45 Input Data In
DOUT 46 Output Data Out
DCL 47 Data Clock
+5V 48 Power +5 Volt power supply