The XC9223/XC9224 series are synchronous step-down DC/DC converters with a 0.21Ω (TYP.) P-channel driver transistor and a
synchronous 0.23Ω (TYP.) N-channel switching transistor built-in. A highly efficient and stable current can be supplied up to 1.0A by
reducing ON resistance of the built-in transistor. With a high switching frequency of 1.0MHz or 2.0MHz, a small inductor is selectable;
therefore, the XC9223/XC9224 series are ideally suited to applications with height limitation such as HDD or space-saving
applications. Current limit value can be chosen either 1.2A (MIN.) when the LIM pin is high level, or 0.6A (MIN.) when the LIM pin is
low level for using the power supply which current limit value differs such as USB or AC adapter. With the MODE/SYNC pin, the
XC9223/XC9224 series provide mode selection of the fixed PWM control or automatically switching current limit PFM/PWM control.
As for preventing unwanted switching noise, the XC9223/XC9224 series can be synchronized with an external clock signal within the
range of ± 25% toward an internal clock signal via the MODE/SYNC pin. For protection against heat damage of the ICs, the
XC9223/XC9224 series build in three protection functions: integral latch protection, thermal shutdown, and short-circuit protection.
With the built-in UVLO (Under Voltage Lock Out) function, the internal P-channel driver transistor is forced OFF when input voltage
becomes 1.8V or lower. The XC9223B/XC92 24B series’ detector function monitors the discretional voltage by external resistors.
■APPLICATIONS
●HDD
●Notebook computers
●CD-R / RW, DVD
●PDAs, Portable communication modems
●Digital cameras, Video recorders
●Various general-purpose power supplies
■TYPICAL APPLICATION CIRCUIT
(*1) A capacitor of 2200pF~0.1μF is recommended to place at the CDD between the AGND
pin and the V
Please refer to the page showing INSTRUCTION ON PATTERN LAYOUT for more detail.
IN
pin.
■FEATURES
Input Voltage Range : 2.5V ~ 6.0V
Output Voltage Range : 0.9V ~ VIN (set by FB pin)
Oscillation Frequency : 1MHz, 2MHz (+
Output Current : 1.0A
Maximum Current
Limit
Controls : PWM/PFM or PWM by MODE pin
Protection Circuits : Thermal shutdown
Integral latch method
Short-circuit protection
Soft-Start Time : 1ms (TYP.) internally set
Voltage Detector : 0.712V Detection,
Built-in P-channel
MOSFET
Built-in Synchronous
N-channel MOSFET
High Efficiency : 95% (VIN=5.0V, V
Synchronized with an External Clock Signal
Ceramic Capacitor Compatible
Packages : MSOP-10, USP-10B
* SOP-8 package is available for the XC9223D type only.
Environmentally Friendly : EU RoHS Compliant, Pb Free
Test Condition: Unless otherwise stated, VIN=3.6V, CE=VIN, MODE/SYNC=VIN
NOTE:
*1: When the difference between the input and the output is small, some cycles may be skipped completely before current maximizes.
If current is further pulled from this state, output voltage will decrease because of P-ch driver ON resistance.
*2: Refer to the chart below.
*3: EFFI = { ( output voltage x output current ) / ( input voltage x input current) } x 100
*4: On resistance (Ω)= (V
*5: Time until it short-circuits Lx with GND through 1Ω of resistance from a state of operation and is set to Lx=Low from current limit pulse
generating.
*6: When temperature is high, a current of approximately 100μA may leak.
*7: Designed value.
*8: Whether the Lx pin is high level or low level is judged at the condition of “H”>V
D1-5 Integral Latch Time TLAT - 6.0 15.0 - 3.0 15.0
No. PARAMETER SYMBOL
XC9223 SERIES XC9224 SERIES
MIN. TYP. MAX. MIN. TYP. MAX.
D1-6 Stand-by Current ISTB - 0.1 2.0 - 7.0 15.0
6/24
Topr=25℃
CIRCUIT
Page 7
XC9223/XC9224
■TYPICAL APPLICATION CIRCUIT
<Output Voltage Setting>
Output voltage can be set by adding external split resistors. Output voltage is determined by the following equation,
based on the values of R
VOUT = 0.8 x (RFB1 + RFB2) / RFB2
The value of CFB, speed-up capacitor for phase compensation, should be fzfb = 1 / (2 x
20kHz. Adjustments are required from 1kHz to 50kHz depending on the application, value of inductance (L), and value of
load capacity (CL).
[Example of calculation]
When R
VOUT1 = 0.8 x (470k + 150k) / 150k =3.3V
[Typical example]
VOUT (V)
[External components]
1MHz:
L: 4.7μH (CDRH4D28C, SUMIDA)
C
L: 10μF (ceramic)
C
IN: 10μF (ceramic)
2MHz:
L: 2.2μH (CDRH4D28, SUMIDA)
2.2μH (VLCF4020T-2R2N1R7, TDK)
C
L: 10μF (ceramic)
C
IN: 10μF (ceramic)
* As for CIN and CL, use output capacitors of 10μF or more. (Ceramic capacitor compatible)
* High ESR (Equivalent Series Resistance) that comes by using a tantalum or an electrolytic capacitor causes high ripple voltage.
Furthermore, it can cause an unstable operation. Use the IC after you fully confirm with an actual device.
(*1) A capacitor of 2200pF~0.1μF is recommended to place at the CDD between the AGND pin and the VIN pin.
Please refer to the page showing INSTRUCTION ON PATTERN LAYOUT for more detail.
FB1 and RFB2. The sum of RFB1 and RFB2 should normally be 1MΩ or less.
π x
CFB1 x RFB1) which is equal to
FB1=470kΩ, RFB2=150kΩ,
RFB1 (kΩ) RFB2 (kΩ)
CFB (pF) VOUT (V)
RFB1 (kΩ) RFB2 (kΩ)
CFB (pF)
1.0 75 300 110 2.5 510 240 15
1.2 150 300 51 3.0 330 120 24
1.5 130 150 62 3.3 470 150 18
1.8 300 240 27 5.0 430 82 18
* When fzfb = 20kHz
Series
7/24
Page 8
XC9223/XC9224Series
■OPERATIONAL EXPLANATION
Each unit of the XC9223/XC9224 series consists of a reference voltage source, a ramp wave circuit, error amplifier, PWM
comparator, phase compensation circuit, output voltage adjustment resistors, P-channel MOS driver transistor, N-channel
MOS synchronous rectification switching transistor, current limiter circuit, U.V.L.O. circuit and others. The series
compares, using the error amplifier, the internal reference voltage to the V
FB1 and RFB2. Phase compensation is performed o n the resulting error amplifier output, to input a signal to the PWM
R
comparator to determine the turn-on time during PWM operation. The PWM comparator compares, in terms of voltage
level, the signal from the error amplifier with the ramp wave from the ramp wave circuit, and deliv ers the resulting output to
the buffer driver circuit to cause the Lx pin to output a switching duty cycle. This process is co ntinuously performed to
ensure stable output voltage. The current feedback circuit monitors the P-channel MOS driver tra nsistor current for each
switching operation, and modulates the error amplifier output signal to provide multiple fe edback signals. T his enables a
stable feedback loop even when a low ESR capacitor, such as a ceramic capacitor, is used, ensuring stable output voltage.
<Reference Voltage Source>
The reference voltage source provides the reference voltage to ensure stable output voltage of the DC/DC converter.
<Ramp Wave Circuit>
The ramp wave circuit determines switching frequency. The frequency is fixed internally and can be selected from 1.0MHz
and 2.0MHz. Clock pulses generated in this circuit are used to pr oduce r amp waveforms nee ded for P WM operation, and
to synchronize all the internal circuits.
<Error Amplifier>
The error amplifier is designed to monitor output voltage. The amplifier compares the reference voltage with the feedback
voltage divided by the internal resistors (R
output voltage of the error amplifier increases. The gain and frequency characteristics of the error amplifier out put are
fixed internally to deliver an optimized signal to the mixer.
<Current Limit>
The current limiter circuit of the XC9223/XC9224 series monitors the current flowing through the P-channel MOS driver
transistor connected to the Lx pin, and features a combination of the constant-current type current limit mode and the
operation suspension mode. For the current limit values, please sel ect the values either from 1.2A (MIN.) when the LIM
pin is high level or 0.6A (MIN.) when the LIM pin is low level.
1When the driver current is greater than a specific level, the constant-current t ype current limit functio n operates to tur n
off the pulses from the Lx pin at any given time.
2When the driver transistor is turned off, the limiter circuit is then released from the current limit detection state.
3At the next pulse, the driver transistor is turned on. However, the transistor is immediately turned off in the case of an
over current state.
4 When the over current state is eliminated, the IC resumes its normal operation.
The IC waits for the over current state to end by repeating the steps 1 through 3. If an over current state continues for
several msec and the above three steps are repeatedly performed, the IC performs the function of latching the OFF state of
the driver transistor, and goes into operation suspension mode. After being put into suspension mode, the IC can resume
operation by turning itself off once and then starting it up using the CE pin, or by restoring power to the V
latch time may be released from a current limit detection state because of the noise. Depending on the state of a substrate,
it may result in the case where the latch time may become longer or the operation m ay not be latched. Please locate an
input capacitor as close as possible.
IOUT
VOUT
LX
CE
VIN
FB1 and RFB2). When a voltage lower than the reference voltage is fed back, the
Limit < # mS
Limit > # mS
8/24
OUT pin with the voltage feedback via resistors
IN pin. Integral
msms
Current Limit LEVEL
0mA
VSS
Restart
Page 9
)
μ
XC9223/XC9224
■OPERATIONAL EXPLANATION (Continued
<Thermal Shutdown>
For protection against heat damage of the ICs, thermal shutdown function monitors chip temperature. The thermal
shutdown circuit starts operating and the driver transistor will be turned off when the chip’s temperature reaches 150OC.
When the temperature drops to 130
initiate output startup operation.
<Short-Circuit Protection>
The short-circuit protection circuit monitors FB voltage. In case where output is accidentally shorted to the Ground and
when the FB voltage decreases less than half of the FB voltage, the short-circuit protection o perates to turn off and to
latch the driver transistor. In latch mode, the operation can be resumed by either turning the IC off and on via the CE pin,
or by restoring power supply to the V
<Voltage Detector>
The detector block of the XC9223/9224 series detects a signal inputted from the V
open-drain).
<U.V.L.O. Circuit>
When the V
caused by unstable operation of the internal circuitry. When the V
operation takes place. By releasing the U.V.L.O. function, the IC performs the soft-start function to initiate output startup
operation. The U.V.L.O. function operates even when the VIN pin voltage falls below the U.V.L.O. operating voltage for
tens of ns.
<MODE/SYNC>
A MODE/SYNC pin has two functions, a MODE switch and an input of external clock signal. The MODE/SYNC pin
operates as the PWM mode when applying high level of direct current and the PFM/PW M automatic switching mode by
applying low level of direct current, which is the same function as the normal MODE pin. By applying the extern al clock
signal (±25% of the internal clock signal, ON duty 25% to 75%), the MODE/SYNC pin switches to the internal clock signal.
Also the circuit will synchronize with the falling edge of e xternal clock signal. While synchronizing with the external clo ck
signal, the MODE/SYNC pin becomes the PWM mode automatically. If the MODE/SYNC pin holds high or low level of the
external clock signal for several μs, the MODE/SYNC pin stops synchronizing with the external clock and switches to the
internal clock operation. (Refer to the chart below.)
・External Clock Synchronization Function
50mV/div
MODE/SYNC
IN pin voltage becomes 1.8V (TYP.) or lower, the driver transistor is forced OFF to prevent false pulse output
VOUT
Lx
2V/div
External Clock Signal
1.2MHz Duty50%
2V/div
* When an input of MODE/SYNC is changed from “L” voltage into a clock signal of 1.2MHz and 50% duty.
O
C or less after shutting of the current flow, the IC performs the soft start function to
IN pin.
DIN pin by the VDOUT pin (N-ch
IN pin voltage becomes 2.0V (TYP.) or higher, switching
Operates by the
internal clock
1MHz
Synchronous with the
external clock
1.2MHz
Delay time to the external clock synchronization
s/div
1.0
Series
9/24
Page 10
)
XC9223/XC9224Series
■OPERATIONAL EXPLANATION (Continued
<PFM Switch Current>
In PFM control operation, until coil current reaches to a specified level (I
time that the P-ch MOSFET is kept on (TON) can be given by the following formula.
TON= L×IPFM / (VIN-VOUT) →IPFM①
<Maximum IPFM Limit>
In PFM control operation, the maximum duty cycle (MAXPFM) is set to 50% (TYP.). Therefore, under the condition that the
duty increases (e.g. the condition that the step-down ratio is small), it’s possible for P-ch MOSFET to be turned off even when
coil current doesn’t reach to I
Lx
I Lx
PFM. →IPFM②
IPFM①
Ton
IPFM
0mA
10/24
PFM), the IC keeps the P-ch MOSFET on. In this case,
IPFM②
FOSC
Max umum I PF M Current
Lx
I Lx
IPFM
0mA
Page 11
XC9223/XC9224
Series
■NOTES ON USE
1. The XC9223/XC9224 series is designed for use with ceramic output capacitors. If, however, the potential difference
between dropout voltage, a ceramic capacitor may fail to absorb the resulting high switching energ y and oscillation could
occur on the output. In this case, use a larger capacitor etc. to compensate for insufficient capacitance.
2. Spike noise and ripple voltage arise in a switching regulator as with a DC/DC converter. These are greatly influenced by
external component selection, such as the coil inductance, capacitance values, and board layout of external components.
Once the design has been completed, verification with actual components should be done.
3. In PWM control, very narrow pulses will be outputted, and there is the possibility that some cycles may be skipped
completely. This may happens while synchronizing with an external cloc k.
4. When the difference between V
there is the possibility that some cycles may be skipped completely.
5. With the IC, the peak current of the coil is controlled by the current limit circuit. Since the peak current increases when
dropout voltage or load current is high, current limit starts operating, and this can lead to instability. When peak current
becomes high, please adjust the coil inductance value and fully check the circuit operation. In addition, please calculate
the peak current according to the following formula:
Ipk = (V
L: Coil Inductance Value
fosc: Oscillation Frequency
6. When the peak current, which exceeds limit current, flows within the specified time, the built-in P-ch driver transistor is
turned off (an integral latch circuit). During the time until it detects limit current and before the built-in transistor can be
turned off, the current for limit current flows; therefore, care must be taken when selecting the rating for the coil.
7. The voltage drops because of ON resistance of a driver transistor or in-series resistance of a coil. For this, the current
limit may not be attained to the limit current value, when input voltage is low.
8. Malfunction may occur in the U.V.L.O. circuit because of the noise when pulling current at the minimum operation voltage.
9. This IC and the external components should be used within the stated absolute maximum ratings in order to prevent
damage to the device.
10. Depending on the state of the PC Board, latch time may become lo nger and latch operation may not work. The board
should be laid out so that capacitors are placed as close to the chip as possible.
11. In heavy load, the noise of DC/DC may influence and the de lay time of the voltage detector may be prolonged.
12. Output voltage may become unstable when synchronizing high internal frequency with the external clock.
In such a case, please use a larger output capacitor etc. to compensate for insufficient capacitance.
13. When a voltage lower than minimum operating voltage is applied, the output voltage may fall before reaching the over
current limit.
14. When the IC is used in high temperature, output voltage may increase up to input voltage level at light load (less than 100
μA) because of the leak current of the driver transistor.
15. The current limit is set to LIM=H: 2000mA (MAX.). However, the current of 2000mA or more may flow. In case that the
current limit functions while the V
for input voltage will occur at both ends of a coil. F or this, the time rate of coil current becomes large. By contrast,
when N-ch MOSFET is ON, the re is al most no po tential dif ference at both ends of the coil since the V
the GND pin. Consequently, the time rate of coil current becomes quite small. According to the repetition of this
operation, and the delay time of the circuit, coil current will be converged on a certain current value, exceeding the
amount of current, which is supposed to be limited originally. The short protection does not operate during the soft-start
time. The short protection starts to operate and the circuit will be disabled after the soft-start time. Current larger than
over current limit may flow because of a delay time of the IC when step-down ratio is large. A coil should be used within
the stated absolute maximum rating in order to prevent damage to the device.
①Current flows into P-ch MOSFET to reach the current limit (I
②The current of I
the current limit to OFF of P-ch MOSFET.
③Because of no potential difference at both ends of the coil, the time rate of coil current becomes quite small.
④Lx oscillates very narrow pulses by the current limit for several msec.
⑤The short protection operates, stopping its operation.
IN - VOUT) x OnDuty / (2 x L x fosc) + IDOUT
LIM (2000mA, MAX.) or more flows since the delay time of the circuit occurs during from the detection of
VLX
Overcurrent
Limit Value
ILX
(Coil Current)
INand VOUTis small, and the load current is heavy, very wide pulses will be outputted and
OUT pin is shorted to the GND pin, when P-ch MOSFET is ON, the potential difference
OUT pin is shorted to
LIM).
②
Delay
③
④ #ms
⑤
①
11/24
Page 12
XC9223/XC9224Series
■INSTRUCTION ON PATTERN LAYOUT
1. In order to stabilize VIN’s voltage level, we recommend that a by-pass capacitor (CIN) be connected as close as
possible to the V
2. Please mount each external component, especially CI
3. Wire external components as close to the IC as possible and use thick, short connecting traces to reduce the circuit
impedance.
4. Make sure that the PCB GND traces are as thick as possible, as variations in ground potential caused by high
ground currents at the time of switching may result in instability of the IC.
5. Unstable operation may occur at the heavy load because of a spike noise. 2200pF ~0.1μF of a capacitor, C
recommended to use between the AGND pin and the VIN pin for reducing noise.
・TOP VIEW
・BOTTOM VIEW
12/24
IN & VSS pins.
N, as close to the IC as possible.
L
0
R
C
DD, is
Inductor
Jumper Chip
Resistor
Ceramic Capaticor
Page 13
■TEST CIRCUITS
Circuit ①
Circuit ③
Circuit ④
Waveform Measurement Point
VIN
1uF
CE
MODE/
SYNC
ILIM
VDOUT
AGND
* External Components
L (1MHz) : 4.7μH (CDRH4D28C, SUMIDA)
L (2MHz) : 2.2μH (VLCF4020T-2R2N1R7, TDK)
⑥⑦ represents production lot number
01 to 09, 0A to 0Z, 10 to 19, 1A~ in order. (G, I, J, O, Q, W excluded)
Note: No character inversion used.
ex.)
MARKING
⑥⑦
0 3 03
1 A 1A
XC9223/XC9224
Series
PRODUCT SERIES
PRODUCTION
LOT NUMBER
23/24
Page 24
XC9223/XC9224Series
1. The products and product specifications cont ained herein are subje ct to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
24/24
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