Datasheet XC6121, XC612, XC6123, XC6124 Datasheet (TOREX)

Page 1
C
C
X
6121/X
XC6123/XC6124
Series
ETR0209-011
Voltage Detector with Watchdog Function and ON/OFF Control (VDF=1.6V~5.0V)
GENERAL DESCRIPTION
The XC6121/XC6122/XC6123/XC6124 series is a group of high-precision, low current consumption voltage detectors with watchdog functions incorporating CMOS process technology. The series consist of a reference voltage source, delay circuit, comparator, and output driver. With the built-in delay circuit, the series do not require any external components to output signals with release delay time. The output type is V watchdog functions. By setting the EN/ENB pin to low or high level, the watchdog function can be OFF while the voltage detector remains operation. Since the EN/ENB pin of the XC6122 and XC6124 series is internally pulled up to the V pulled down to the V detect voltages are internally fixed 1.6V ~ 5.0V in increments of 0.1V, using laser trimming technology. Six watchdog timeout periods are available in a range from 50ms to 1.6s. Five release delay times are available in a range from 3.13ms to 400ms.
■APPLICATIONS
Microprocessor watchdog monitoring
and reset circuits
Memory battery backup circuits
System power-on reset circuits
Power failure detection
TYPICAL APPLICATION CIRCUIT
pin, these series can be used with the EN/ENB pin left open when the watchdog functions is used. The
SS
DFL low when detected. The EN/ENB pin can control ON and OFF of the
IN pin or
FEATURES
Detect Voltage Range : 1.6V ~ 5.0V, +2% Hysteresis Width : VDFL x 5% (TYP.)
Operating Voltage Range : 1.0V ~ 6.0V Detect Voltage Temperature Characteristics Output Configuration : N-channel open drain Watchdog Pin : Watchdog input
EN/ENB Pin : When the EN/ENB pin voltage is
Release Delay Time : 400ms, 200ms, 100ms, 50ms, Watchdog Timeout Period : 1.6s, 800ms, 400ms, 200ms, Operating Ambient Tempera ture
Packages Environmentally Friendly
(0.1V increments)
: +
100ppm/OC (TYP.)
If watchdog input maintains ‘H’ or ‘L’ within the watchdog timeout period, a reset signal is output from the RESETB pin.
set to low or high level, the watchdog function is forced off.
3.13ms (TYP.)
100ms, 50ms (TYP.)
:
-40~ +85
: SOT-25, USP-6C : EU RoHS Compliant, Pb Free
TYPICAL PERFORMANCE
CHARACTERISTICS
Supply Current vs. Input Voltage
XC6121~XC6124(VDF=2.7V)
14.0
12.0
10.0
(μA)
SS
8.0
6.0
4.0
Supply Current: I
2.0
Ta=25℃
0
0123456
Ta=85℃
Input V oltage: V
Ta=-40℃
(V)
IN
1/26
Page 2
XC6121/XC6122/XC6123/XC6124
PIN CONFIGURATION
PIN ASSIGNMENT
PIN NUMBER
SOT-25 USP-6C
1 4
2 5
3 2 EN/ENB Watchdog ON/OFF Control
4 1 WD Watchdog
5 6 VIN Power Input
- 3 NC No Connection
2/26
SOT-25
(TOP VIEW)
PIN NAME FUNCTION
RESETB Reset Output
V
Ground
SS
Series
USP-6C
(BOTTOM VIEW)
* The dissipation pad for the USP-6C package should be
solder-plated in reference mount pattern and metal masking so as to enhance mounting strength and heat release. If the pad needs to be connected to other pins, it should be connected to the V
SS (No. 5) pin.
Page 3
XC6121/XC6122/XC6123/XC6124
PRODUCT CLASSIFICATION
Selection Guide
RESET OUTPUT EN/ENB PIN FUNCTION
SERIES
VDFL (RESETB)
(*1)
VDFH (RESET)
XC6121 N-channel open drain - EN
XC6122 N-channel open drain - EN
XC6123 N-channel open drain - ENB
XC6124 N-channel open drain -
(*1)
The output type of RESETB is set to L level at the time of detection.
(*2)
EN input logic: The watchdog function turns on when the EN pin becomes high level.
ENB input logic: The watchdog function turns on when the ENB pin becomes low level.
Ordering Information
XC6121①②③④⑤⑥-⑦ XC6122①②③④⑤⑥-⑦ XC6123①②③④⑤⑥-⑦ XC6124①②③④⑤⑥-⑦
(*2)
: N-channel Open Drain Output (RESETB), EN Pin: No Pull-Up Resistor
(*2)
: N-channel Open Drain Output (RESETB), EN Pin: Pull-Up Resistor
(*2)
: N-channel Open Drain Output (RESETB), ENB Pin: No Pull-Down Resistor
(*2)
: N-channel Open Drain Output (RESETB), ENB Pin: Pull-Down Resistor
DESIGNATOR ITEM SYMBOL DESCRIPTION
Release Delay Time
(*1)
Watchdog Timeout Period
③④ Detect Voltage 16 ~ 50
⑤⑥-⑦
(*1)
Please set the release delay time shorter than or equal to the watchdog timeout period.
ex.) XC6121D327MR or XC6121D627MR
(*2)
The “-G” suffix denotes Halogen and Antimony free as well as being fully RoHS compliant.
(*2)
Packages
(Order Unit)
HYSTERESIS
EN/ENB Input
Logic
Available:
x 5% (TYP.)
V
DFL
ENB
A 3.13ms (TYP.)
C 50ms (TYP.)
D 100ms (TYP.)
E 200ms (TYP.)
F 400ms (TYP.)
2 50ms (TYP.)
3 100ms (TYP.)
4 200ms (TYP.)
5 400ms (TYP.)
6 1.6s (TYP.)
7 800ms (TYP.)
Detect voltage ex.) 4.5V: ③⇒4, ④⇒5
MR SOT-25 (3,000/Reel)
MR-G SOT-25 (3,000/Reel)
ER USP-6C (3,000/Reel)
ER-G USP-6C (3,000/Reel)
(*2)
Series
Pull-Up or Down
Resistor
With No Pull-Up
Resistor
With Pull-Up
Resistor
With No Pull-Down
Resistor
With Pull-Down
Resistor
3/26
Page 4
XC6121/XC6122/XC6123/XC6124
BLOCK DIAGRAMS
XC6121 Series
XC6122 Series
4/26
Series
N-ch Open Drain Output
N-ch Open Drain Output
Page 5
BLOCK DIAGRAMS (Continued)
XC6123 Series
XC6124 Series
XC6121/XC6122/XC6123/XC6124
Series
N-ch Open Drain Output
N-ch Open Drain Output
5/26
Page 6
XC6121/XC6122/XC6123/XC6124
■ABSOLUTE MAXIMUM RATINGS
PAR AMET ER SYMBOL RATINGS UNITS
VIN VSS -0.3 ~ 7.0 V
Power Dissipation
6/26
Input Voltage
Output Current I
Output Voltage V
SOT-25 250
USP-6C
Operating Ambient Temperature Topr -40 ~ +85
Storage Temperature Tstg -55 ~ +125
VEN/V
V
RBOUT
RESETB
Pd
WD
Series
Ta =2 5OC
V
ENB
SS-0.3~VIN+0.37.0
V
VSS -0.3 ~ 7.0 V
20 mA
SS -0.3 ~ 7.0
V
120
V
mW
O
C
O
C
Page 7
XC6121/XC6122/XC6123/XC6124
ELECTRICAL CHARACTERISTICS
PAR AMET ER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS CIRCUIT
DFL(T)
Detect Voltage VDFL
V
EN
=VSS
Hysteresis Width VHYS VEN=VSS
Supply Current
(*1)
ISS WD=OPEN
VIN=V
VIN=V
×0.9V - 5 11
DFL(T)
×1.1V - 10 16
DFL(T)
=6.0V - 12 18
V
IN
V
× 0.98
VDFL
× 0.02
VDFL(T)
VDFL
× 0.05
Operating Voltage VIN 1.0 - 6.0 V
VIN=1.0V 0.15 0.5 -
Output Current IRBOUT
Temperature
Characteristics
VDFL /
Topr・VDFL
N-ch. VDS=0.5V
-40OC < Topr < 85
VIN=2.0V (VDFL(T)> 2.0V) 2.0 2.5 -
VIN=3.0V (VDFL(T) >3.0V) 3.0 3.5 -
V
IN=4.0V (VDFL(T) >4.0V) 3.5 4.0 -
O
C - +100 - ppm/
2.00 3.13 5.00
Release Delay Time
(VDFL<1.8V)
tDR
Time until VIN is increased from
1.0V to 2.0V and attains to the release time level, and the Reset output pin releases.
37 50 63
75 100 125 150 200 250 300 400 500
2.00 3.13 5.00
Release Delay Time
(VDFL>1.9V)
tDR
Time until VIN is increased from
1.0V to (VDFL x 1.1V) and attains to the release time level, and the Reset output pin releases.
37 50 63
75 100 125 150 200 250 300 400 500
Time until VIN is decreased from 6.0V to
Detect Delay Time tDF
1.0V and attains to the detect voltage level, and the Reset output pin detects
- 5.5 33 μs
while the WD pin left open.
VDFL
Leakage Current
LEAK VIN=6.0V, V
I
=6.0V - 0.01 0.1 μA
RESETB
37 50 63
Watchdog
Timeout Period
(V
DFL<1.8V)
t
WD
Time until V
1.0V to 2.0V and the Reset output pin is released to go
IN increases form
into the detection state. (WD=OPEN)
75 100 125 150 200 250 300 400 500 600 800 1000
1200 1600 2000
37 50 63
Watchdog
Timeout Period
(V
DFL>1.9V)
t
WD
Time until V
1.0V to (V and the Reset output pin is released to
IN increases from
DFLx1.1V)
go into the detection state. (WD=OPEN)
75 100 125 150 200 250 300 400 500 600 800 1000
1200 1600 2000
VDFL(T)
× 1.02
VDFL
× 0.08
μA
mA
ms
ms
ms
ms
Series
Ta =2 5OC
V
V
O
C
7/26
Page 8
XC6121/XC6122/XC6123/XC6124
ELECTRICAL CHARACTERISTICS (Continued)
Series
PAR AMET ER SYMBOL CONDITIONS MIN. TYP. MAX. UNITS CIRCUIT
V
Watchdog
Minimum Pulse Width
Watchdog
High Level Voltage
Watchdog
Low Level Voltage
Watchdog
Pull-down Resistance
EN/ENB
High Level Voltage
EN/ENB
Low Level Voltage
EN Pull-up
Resistance
ENB Pull-down
Resistance
NOTE: * In case where no EN/ENB pin’s condition written in the test condition field, V ** V
DFL(T)
(*1)
The condition when the watchdog pin is ON.
The EN/ENB pin is CMOS input. For the XC6122 (pull-up resistor) and XC6124 (pull-down resistor),
supply current increases in the following values when the watchdog function is OFF.
XC6122 Series:(V XC6124 Series:V
(*2)
For the XC6122 series only.
(*3)
For the XC6124 series only.
(*2)
(*3)
=Setting detect voltage value
t
WDIN
V
WDH VIN=VDFL x 1.1V ~ 6.0V VIN x 0.7 - 6 V
VWDL VIN=VDFL x 1.1V ~ 6.0V 0 - VIN x 0.3 V
RWD
V
ENH/VENBH VIN=VDFL x 1.1V ~ 6.0V 1.3 - VIN V
V
ENL/VENBL VIN=VDFL x 1.1V ~ 6.0V 0 - 0.35 V
EN VIN=6.0V, V
R
ENB VIN=6.0V, V
R
IN-VEHL)/1.6MΩ(TYP.
EHBH/1.6MΩ(TYP.
IN=6.0V,
Apply pulse from 6.0V to 0V to the WD pin.
VWD=6V, RWD=VWD/IWD
=0V, REN=VIN / IEN
EN
=6V, RENB=VENB / IENB
ENB
EN=VIN
300 - - ns
300
600 900 kΩ
1.0 1.6 2.4 MΩ
and V
ENB=VSS
.
Ta =2 5OC
8/26
Page 9
XC6121/XC6122/XC6123/XC6124
Series
OPERATIONAL EXPLANATION
The XC6121/6122/6123/6124 series compare, using the error amplifier, the voltage of the internal voltage reference source with the voltage divided by R1, R2 and R3 connected to the V activates the watchdog logic, delay circuit and the output driver. When the VIN pin voltage gradually falls and finally reaches the detect voltage, the RESETB pin output goes from high to low in the case of the VDFL type ICs.
<RESETB / RESET Pin Output Signal>
DFL (RESETB) type - output signal: Low when detected.
* V The RESETB pin output goes from high to low whenever the V remains low for the release delay time (tDR) after the VIN pin voltage reaches the release voltage. If neither rising nor falling signals are applied to the WD pin within the watchdog timeout period, the RESETB pin output remains low for the release delay time (t
<Hysteresis> When the internal comparator output is high, the NMOS transistor connected in parallel to R3 is turned ON, activating the hysteresis circuit. The difference between the release and detect voltages represents the hysteresis width, as shown by the following calculations:
V VDR (release voltage) = (R1+R2) x Vref / (R2) VHYS (hysteresis width) =VDR-VDFL (V) V
* Please refer to the block diagrams for R1, R2, R3 and Vref.
<Watchdog (WD) Pin> The series use a watchdog timer to detect malfunction or “runaway” of the microprocessor. If neither rising nor falling signals are applied from the microprocessor within the watchdog timeout period, the RESETB pin output maintains the detection state for the release delay time (t to the VSS internally. When the watchdog pin is not connected, A reset signal comes out after the watchdog timeout period. Six watchdog timeout period settings (t
<EN Pin> In case where the watchdog function is not used, When the EN pin input driven to low level, only the watchdog function is forced off while the detect voltage circuit remains operation. For using the watchdog function, the EN pin should be used in high level. Even after the input voltage and the EN pin voltage are driven back high, the RESETB pin output maintains the detection state for the release delay time (T immediately when the input voltage becomes higher than the release voltage and the EN pin voltage driven from low to high level. (Refer to the TIMING CHART 1-②.) A diode, which is an input protection element, is connected between the EN pin and V avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the EN pin.
<ENB Pin> In case where the watchdog function is not used, when the ENB pin input driven to high level, only the watchdog function is forced off while the detect voltage circuit remains operation. For using the watchdog function, the ENB pin should be used in low level. Even after the input voltage and the ENB pin voltage are driven back low, the RESETB pin output maintains the detection state for the release delay time (t immediately when the input voltage becomes higher than the release voltage and the ENB pin voltage driven from high to low level. (Refer to the TIMING CHART 2-②.) A diode, which is an input protection element, is connected between the ENB pin and V avoiding any damage to the IC, please use this IC within the stated maximum ratings (VSS -0.3 ~ VIN +0.3) on the ENB pin.
<Release Delay Time> Release delay time (tDR) is the time that elapses from when the VIN pin reaches the release voltage, or when the watchdog timeout period expires with no rising signal applied to the WD pin, until the RESETB pin output is released from the detection state. Five release delay time (t
3.13ms.
<Detect Delay Time> Detect Delay Time (t output goes into the detection state.
DR), and thereafter the RESET pin outputs high level signal.
DFL (detect voltage) = (R1+R2+R3) x Vref / (R2+R3)
DR > VDFL
* Hysteresis width is selectable from VDFL x 0.05V (TYP.).
DR), and thereafter the RESETB pin outputs low to high signal. The watchdog pin is pulled down
WD) are available in 1.6s, 800ms, 400ms, 200ms, 100ms, and 50ms.
DR). (Refer to the TIMING CHART 1-.) The watchdog function recovers
IN pin. Therefore, if the EN pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For
DR). (Refer to the TIMING CHART 2-.) The watchdog function recovers
IN pin. Therefore, if the ENB pin is applied voltage that exceeds VIN, the current will flow to VIN through the diode. For
DR) watchdog timeout period settings are available in 400ms, 200ms, 100ms, 50ms, and
DF) is the time that elapses from when the VIN pin voltage falls to the detect voltage until the RESETB pin
IN pin. The resulting output signal from the error amplifier
IN pin voltage falls below the detect voltage. The RESETB pin
9/26
Page 10
XC6121/XC6122/XC6123/XC6124
TIMING CHARTS
1. XC6121/XC6122 Series (EN products)
N-ch Open Drain Output (Rpull=100kΩ)
tDF (N-ch Open Drain Output, Rpull=100kΩ)
10/26
Series
Hysteresis Width
Page 11
TIMING CHARTS (Continued)
2. XC6123/XC6124 Series (ENB products)
N-ch Open Drain Output (Rpull=100kΩ)
tDF (N-ch Open Drain Output, Rpull=100kΩ)
XC6121/XC6122/XC6123/XC6124
Series
Hysteresis Width
11/26
Page 12
XC6121/XC6122/XC6123/XC6124
NOTES ON USE
1. Please use this IC within the stated maximum ratings. For temporary, transitional voltage drop or voltage rising phenomenon, the IC is liable to malfunction should the ratings be exceeded.
2. When a resistor is connected between the V malfunction may occur as a result of the IC’s through current.
3. In order to stabilize the IC’s operations, please ensure that the V 1 μ s/V.
4. Noise at the power supply may cause a malfunction of the watchdog operation or the voltage detector. In such case, please strength V and evaluate the device on the actual board carefully before use.
5. Protecting against a malfunction while the watchdog time out period, an ignoring time (no reaction time) occurs to the rise and fall times. Referring to the figure below, the ignoring time (no reaction time) lasts for 900μs at maximum. (refer to the Figure1 below)
6. The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the V in high level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN pin left open. The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function, please drive the V can be used even the ENB pin left open.
7.
Torex places an importance on improving our products and its reliability.
However, by any possibility, we would request user fail-safe design and post-aging treatment on system or equipment.
IN and GND lines. Also, please connect a capacitor such as 0.22μF between the VIN pin and the GND pin
pin in low level. The ENB pin of the XC6124 series is internally pulled up. The watchdog function
ENB
IN pin and the input, the VIN voltage drops while the IC is operating and a
Series
[Figure1]
IN pin’s input frequency’s rise and fall times are more than
12/26
EN
pin
Page 13
XC6121/XC6122/XC6123/XC6124
PIN LOGIC CONDITIONS
PIN NAME LOGIC CONDITIONS PIN NAME LOGIC CONDITIONS
H VIN>V
DFL+VHYS
H
VIN
L V
EN/ENB
NOTE: V
: Detect Voltage
DFL
V
: Hysteresis Range
HYS
V
: WD High Level Voltage
WDH
V
: WD Low Level Voltage
WDL
t
: WD Pulse Width
WDIN
t
: WD Timeout Period
WD
For the details of each parameter, please see the electrical characteristics.
H
L
V
EN/VENB
V
EN/VENB
L
IN<VDFL
1.30V LH V0.35V
WD
HL V
FUNCTION CHART
VIN
XC6121/XC6122 XC6123/XC6124
VEN V
ENB
VWD V
H
H H L
OPEN
L
Repeating detect and release (H→L→H)
LH
H H H L
NOTE: *1: Including all logics of the WD (V *2: When the V
When the V
*3: V
=L and VEN/V
IN
*4: The RESETB pin becomes indefinite operation while 0.35V<V *5: The EN pin of the XC6121 series is not internally pulled up. When using the watchdog function, please drive the V
level. The EN pin of the XC6122 series is internally pulled up. The watchdog function can be used even the EN pin left open. The ENB pin of the XC6123 series is not internally pulled down. When using the watchdog function, please drive the V low level. The ENB pin of the XC6124 series is internally pulled up. The watchdog function can be used even the ENB pin left open.
RESETB
RESETB
L
=H, L, OPEN, HL, LH).
is High, the circuit is in the release state. is Low, the circuit is in the detection state.
=H can not be combined because the rated input voltage of the EN/ENB pin is Vss-0.3V to VIN+0.3V.
ENB
WD
L
*1
EN/VENB
<1.3V.
The state maintaining WD>
for more than t
The state maintaining WD<V
for more than t
WDL→VWDH
WDH→VWDL
RESETB
, 300ns≦t , 300ns≦t
(*2)
H
L
WD
WD
WDIN≦tWD
WDIN≦tWD
pin in high
EN
pin in
ENB
Series
V
WDH
WDL
13/26
Page 14
XC6121/XC6122/XC6123/XC6124
TEST CIRCUITS
Circuit
Circuit
Circuit
14/26
Series
VDS=0.5V V
=6.0V when measuring
DS
Leakage current
Page 15
TEST CIRCUITS (Continued)
Circuit
Circuit
Circuit
XC6121/XC6122/XC6123/XC6124
Series
15/26
Page 16
XC6121/XC6122/XC6123/XC6124
TEST CIRCUITS (Continued)
Circuit
Circuit
Circuit
16/26
V
REN=VIN/I
I
EN
A
I
ENB
R
ENB=VENB/IENB
EN
V
IN
EN/ENB
VIN
EN/ENB
V
SS
V
SS
RESETB
WD
RESETB
WD
100kΩ
100kΩ
Series
Measurement waveform
Note: The above reference is about the EN/ENB logic operation.
Note: XC6122 series has EN pin, XC6124 Series has ENB pin.
Page 17
XC6121/XC6122/XC6123/XC6124
TYPICAL PERFORMANCE CHARACTERISTICS
1.Supply Current vs. Input Voltage
14.0
12.0
10.0
(μA)
SS
8.0
6.0
4.0
Supply Current: I
2.0
14.0
12.0
10.0
(μA)
SS
8.0
6.0
4.0
Supply Current: I
2.0
2.Detect, Release Voltage vs. Ambient Temperature
1.70
(V)
DR
,V
DF
1.65
1.60
Detect, Release Voltage: V
1.55
XC6121~XC6124(VDF=1.6V)
Ta=85℃
Ta=25℃
Ta=-40℃
0
0123456
Input Voltage: V
IN
(V)
XC6121~XC6124(VDF=5.0V)
Ta=85℃
Ta=25℃
Ta=-40℃
0
0123456
Input Voltage: V
IN
(V)
XC6121~XC6124(VDF=1.6V)
V
DR
V
DF
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
XC6121~XC6124(VDF=2.7V)
14.0
12.0
10.0
(μA)
SS
8.0
Ta=25℃
6.0
4.0
Supply Current: I
2.0
0
0123456
XC6121~XC6124(VDF=2.7V)
2.90
(V)
DR
,V
DF
2.80
2.70
Detect, Release Voltage: V
2.60
-50 -25 0 25 50 75 100
Ta=85℃
Ta=-40℃
Input Voltage: V
V
DR
V
DF
IN
(V)
Ambient Temperature: Ta (℃)
Series
17/26
Page 18
XC6121/XC6122/XC6123/XC6124
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
2.Detect, Release Voltage vs. Ambient Temperature (Continued)
5.30
(V)
DR
,V
DF
5.20
5.10
5.00
Detect, Release Voltage: V
4.90
3.Nch Driver Output Current vs. VDS
(mA)
OUT
Output Current: I
5.Release Delay Time vs. Ambient Temperature
(ms)
DR
Release Delay Time T
XC6121~XC6124(VDF=5.0V)
V
DR
V
DF
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
XC6121~XC6124
30
Ta=25℃
25
V
=5.0V
IN
20
VIN =4.0V
15
10
5
0
VIN =2.0V
VIN =1.0V
VIN =3.0V
0123456
(V)
V
DS
XC6121~XC6124
300
TDR=100ms
250
200
150
100
50
0
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
Series
4.Driver Output Current vs. Input Voltage
XC6121~XC6124
6.0 VDS=0.5V
5.0
(mA)
4.0
OUT
3.0
2.0
Output Current: I
1.0
0.0
0123456
Input Voltage: V
XC6121~XC6124
3000
TDR=1600ms
2500
(ms)
DR
2000
1500
1000
500
Release Delay Time T
0
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
18/26
(V)
IN
Ta=-40℃
Ta=25℃
Ta=85℃
Page 19
XC6121/XC6122/XC6123/XC6124
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
6.Watchdog Timeout Period vs. Ambient Temperature
300
TWD=100ms
250
(ms)
 (ms
WD
WD
200
150
100
50
WD Timeout Piriod T
WD Timeout Period T
0
-50 -25 0 25 50 75 100
XC6121~XC6124
Ambient Temperature: Ta (℃)
7.Release Delay Time vs. Input Voltage
4.0
(ms)
DR
Release Delay Time T
Ta=25℃
3.8
T
3.6
3.4
3.2
3.0
2.8
2.6 01234567
XC6121~XC6124
=3.13ms
DR
Input Voltage: V
IN
(V)
3000
TWD=1600ms
2500
(ms)
 (ms
WD
WD
2000
1500
1000
500
WD Timeout Piriod T
WD Timeout Period T
0
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
8.Watchdog Timeout Period vs. Input Voltage
120
Ta=25℃ T
=100ms
WD
(ms)
 (ms
WD
WD
115
110
105
100
95
WD Timeout Period T
WD Timeout Period T
90
01234567
XC6121~XC6124
XC6121~XC6124
Input Voltage: V
IN
Series
(V)
(9.)
Watchdog Low Level Threshould vs. Ambient Temperature
6.0
(V)
5.0
WDL
4.0
3.0
2.0
1.0
WD LowLevel Threshold V
0.0
-50 -25 0 25 50 75 100
XC6121~XC6124
VIN=6.0V
VIN=3.0V
VIN=1.76V
Ambient Temperature: Ta (℃)
10.)Watchdog High Level Threshould vs. Ambient Temperature
XC6121~XC6124
6.0
(V)
5.0
WDH
VIN=6.0V
4.0
3.0
2.0
VIN=3.0V
1.0
WD Highlevel Threshold V
VIN=1.76V
0.0
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
19/26
Page 20
g
XC6121/XC6122/XC6123/XC6124
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
11.Watchdog Pull-Down Resistance vs. Ambient Temperature
1100
1000
(kΩ)
WD
900
800
700
600
500
400
WDpull-down Resistance R
300
-50-250 255075100
XC6121~XC6124
Ambient Temperature: Ta (℃)
Series
12.EN Pull-Up Resistance vs. Ambient Temperature
3.0
(MΩ)
2.4
EN
1.8
1.2
0.6
EN pull-up Resistance R
0.0
-50 -25 0 25 50 75 100
XC6121~XC6122
Ambient Temperature: Ta (℃)
14.EN Ligh Level Voltage vs. Ambient Temperature
1.10
(V)
1.00
ENL
0.90
0.80
0.70
0.60
EN LowLevel Threshold V
0.50
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
VIN=6.0V
VIN=3.0V
VIN=1.76V
20/26
13.ENB Pull-Down Resistance vs. Ambient Temperature
XC6123~XC6124
3.0
(MΩ)
2.4
ENB
1.8
1.2
0.6
ENBpull-down Resistance R
0.0
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
15.EN Hi
(V)
EN Highlevel Threshold V
ENH
1.10
1.00
0.90
0.80
0.70
0.60
0.50
h Level Voltage vs. Ambient Temperature
XC6121~XC6122
VIN=6.0V
VIN=3.0V
VIN=1.76V
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
Page 21
XC6121/XC6122/XC6123/XC6124
TYPICAL PERFORMANCE CHARACTERISTICS (Continued)
Series
16.ENB Low Level Voltage vs. Ambient Temperature
1.10
(V)
1.00
ENBL
0.90
0.80
0.70
0.60
ENB LowLevel Threshold V
0.50
-50 -25 0 25 50 75 100
12
~X
124
VIN=1.76V
Ambient Temperature: Ta (℃)
VIN=6.0V
VIN=3.0V
17.ENB High Level Voltage vs. Ambient Temperature
1.10
XC6123~XC6124
(V)
1.00
ENBH
0.90 VIN=6.0V
0.80 VIN=3.0V
0.70
VIN=1.76V
0.60
ENB Highlevel Threshold V
0.50
-50 -25 0 25 50 75 100 Ambient Temperature: Ta (℃)
21/26
Page 22
XC6121/XC6122/XC6123/XC6124
PACKAGING INFORMATION
SOT-25
USP-6C Reference Pattern Layout
0.45
1
2
3
0.05
2.4
0.05
1.0
22/26
0.45
Unit :mm
6
5
4
Series
USP-6C
Unit :mm
USP-6C Reference Metal Mask Design
Page 23
MARKING RULE
represents product series
MARK PRODUCT SERIES
E―
F―
H―
K―
represents release delay time and watchdog timeout period
XC6121******
XC6122******
XC6123******
XC6124******
XC6121Series
WATCH DOG
TIMEOUT
PERIOD
PRODUCT
SERIES
MARK
0 3.13ms 50ms XC6121A2****
1 3.13 ms 100ms XC6121A3****
2 3.13 ms 200ms XC6121A4****
3 3.13 ms 400ms XC6121A5****
4 3.13 ms 800ms XC6121A7****
5 3.13 ms 1.6s XC6121A6****
6 50ms 50ms XC6121C2****
7 50ms 100ms XC6121C3****
8 50ms 200ms XC6121C4****
9 50ms 400ms XC6121C5****
A 50ms 800ms XC6121C7****
B 50ms 1.6s XC6121C6****
H 100ms 100ms XC6121D3****
C 100ms 200ms XC6121D4****
L 100ms 400ms XC6121D5****
D 100ms 800ms XC6121D7****
M 100ms 1.6s XC6121D6****
E
R 200ms 400ms XC6121E5****
F 200ms 800ms XC6121E7****
S 200ms 1.6s XC6121E6****
T 400ms 400ms XC6121F5****
K 400ms 800ms XC6121F7****
U 400ms 1.6s XC6121F6****
RELEASE
DELAY
TIME
200ms 200ms XC6121E4****
XC6121/XC6122/XC6123/XC6124
SOT25
54
① ② ③ ④
123
SOT-25
XC6122/XC6123/XC6124Series
RELEASE
MARK
N 3.13ms 50ms XC612*A2****
P 3.13ms 100ms XC612*A3****
R 3.13ms 200ms XC612*A4****
S 3.13ms 400ms XC612*A5****
T 3.13ms 800ms XC612*A7****
U 3.13ms 1.6s XC612*A6****
V 50ms 50ms XC612*C2****
X 50ms 100ms XC612*C3****
Y 50ms 200ms XC612*C4****
Z 50ms 400ms XC612*C5****
A 50ms 800ms XC612*C7****
B 50ms 1.6s XC612*C6****
A 100ms 100ms XC612*D3****
C 100ms 200ms XC612*D4****
B 100ms 400ms XC612*D5****
D 100ms 800ms XC612*D7****
C 100ms 1.6s XC612*D6****
D
E 200ms 400ms XC612*E5****
H 200ms 800ms XC612*E7****
F 200ms 1.6s XC612*E6****
K 400ms 400ms XC612*F5****
M 400ms 800ms XC612*F7****
L 400ms 1.6s XC612*F6****
DELAY
TIME
200ms 200ms XC612*E4****
WATCH DOG
TIMEOUT
PERIOD
PRODUCT
SERIES
Series
23/26
Page 24
XC6121/XC6122/XC6123/XC6124
MARKING RULE (Continued)
represents detect voltage
XC6121 Series
MARK
F 1.6 XC6121**16**
H 1.7 XC6121**17**
K 1.8 XC6121**18**
L 1.9 XC6121**19**
M 2.0 XC6121**20**
N 2.1 XC6121**21**
P 2.2 XC6121**22**
R 2.3 XC6121**23**
S 2.4 XC6121**24**
T 2.5 XC6121**25**
U 2.6 XC6121**26**
V 2.7 XC6121**27**
X 2.8 XC6121**28**
Y 2.9 XC6121**29**
Z 3.0 XC6121**30**
0 3.1 XC6121**31**
1 3.2 XC6121**32**
2
3 3.4 XC6121**34**
4 3.5 XC6121**35**
5 3.6 XC6121**36**
6 3.7 XC6121**37**
7 3.8 XC6121**38**
8 3.9 XC6121**39**
9 4.0 XC6121**40**
A 41 XC6121**41**
B 4.2 XC6121**42**
C 4.3 XC6121**43**
D 4.4 XC6121**44**
E 4.5 XC6121**45**
F 4.6 XC6121**46**
H 4.7 XC6121**47**
K 4.8 XC6121**48**
L 4.9 XC6121**49**
M 5.0 XC6121**50**
VOLTAGE
DETECT
(V)
3.3 XC6121**33**
PRODUCT
SERIES
XC6122/XC6123/XC6124 Series
MARK
Series
DETECT
VOLTAGE
(V)
H 1.6 XC612***16**
K 1.7 XC612***17**
L 1.8 XC612***18**
M 1.9 XC612***19**
N 2.0 XC612***20**
P 2.1 XC612***21**
R 2.2 XC612***22**
S 2.3 XC612***23**
T 2.4 XC612***24**
U 2.5 XC612***25**
V 2.6 XC612***26**
X 2.7 XC612***27**
Y 2.8 XC612***28**
Z 2.9 XC612***29**
0 3.0 XC612***30**
1 3.1 XC612***31**
2 3.2 XC612***32**
3
4 3.4 XC612***34**
5 3.5 XC612***35**
6 3.6 XC612***36**
7 3.7 XC612***37**
8 3.8 XC612***38**
9 3.9 XC612***39**
A 4.0 XC612***40**
B 41 XC612***41**
C 4.2 XC612***42**
D 4.3 XC612***43**
E 4.4 XC612***44**
F 4.5 XC612***45**
H 4.6 XC612***46**
K 4.7 XC612***47**
L 4.8 XC612***48**
M 4.9 XC612***49**
N 5.0 XC612***50**
3.3 XC612***33**
PRODUCT
SERIES
represents production lot number 0 to 9 and A to Z and inverted 0 to 9 and A to Z repeated. (G, I, J, O, Q, W excluded.)
24/26
Page 25
MARKING RULE (Continued)
represents product series
MARK PRODUCT SERIES
P XC6121******
K XC6122******
R XC6123******
U XC6124******
represents release delay time
MARK RELEASE DELAY TIME PRODUCT SERIES
A 3.13ms XC612*A*****
C 50ms XC612*C*****
D 100ms XC612*D*****
E 200ms XC612*E*****
F 400ms XC612*F*****
represents watchdog timeout period
MARK WATCHDOG TIMEOUT PERIOD PRODUCT SERIES
2 50ms XC612*2*****
3 100ms XC612*3*****
4 200ms XC612*4*****
5 400ms XC612*5*****
7 800ms XC612*7*****
6 1.6s XC612*6*****
④⑤ represents detect voltage
MARK
3 3 3.3 XC612***33**
5 0 5.0 XC612***50**
represents production lot number
0 to 9 and A to Z repeated. (G, I, J, O, Q, W excluded.)
*No character inversion used.
DETECT VOLTAGE (V) PRODUCT SERIES
XC6121/XC6122/XC6123/XC6124
USP6C
1
2
3
⑤ ⑥
USP-6C
6
5
4
Series
25/26
Page 26
XC6121/XC6122/XC6123/XC6124
1. The products and product specifications contained herein are subject to change without
notice to improve performance characteristics. Consult us, or our representatives
before use, to confirm that the information in this datasheet is up to date.
2. We assume no responsibility for any infringement of patents, patent rights, or other
rights arising from the use of any information and circuitry in this datasheet.
3. Please ensure suitable shipping controls (including fail-safe designs and aging
protection) are in force for equipment employing products listed in this datasheet.
4. The products in this datasheet are not developed, designed, or approved for use with
Series
such equipment whose failure of malfunction can be reasonably expected to directly
endanger the life of, or cause significant injury to, the user.
(e.g. Atomic energy; aerospace; transport; combustion and associated safety
equipment thereof.)
5. Please use the products listed in this datasheet within the specified ranges.
Should you wish to use the products under conditions exceeding the specifications,
please consult us or our representatives.
6. We assume no responsibility for damage or loss due to abnormal use.
7. All rights reserved. No part of this datasheet may be copied or reproduced without the
prior permission of TOREX SEMICONDUCTOR LTD.
26/26
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