The Intersil X93254 is a dual digitally controlled
potentiometer (XDCP). The device consists of two resistor
arrays, wiper switches, a control section, and nonvolatile
memory. The wiper positions are controlled by individual
Up/Down interfaces.
A potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of each wiper element is controlled by
a set of independent CS
, U/D, and INC inputs. The position
of the wiper can be stored in nonvolatile memory and then
be recalled upon during a subsequent power-up operation.
Each potentiometer is connected as a two-terminal variable
resistor and can be used in a wide variety of applications
including:
• Bias and Gain control
• LCD Contrast Adjustment
Pinout
X93254
(14 LD TSSOP)
TOP VIEW
Features
• Dual solid-state potentiometers
• Independent Up/Down interfaces
• 32 wiper tap points per potentiometer
- Wiper position stored in nonvolatile memory and
recalled on power-up
• 31 resistive elements per potentiometer
- Temperature compensated
- Maximum resistance tolerance of ± 30%
- Terminal voltage, 0 to V
• Low power CMOS
-V
= 3V ±10%
CC
- Active current, 250µA max
- Standby current, 1µA max
• High reliability
- Endurance 200,000 data changes per bit
- Register data retention, 100 years
TOTAL
value = 50kΩ
•R
• 14 Ld TSSOP package
CC
FN8186.1
DNC*
R
CS
INC
U/D
R
V
*Do not connect.
L1
H2
SS
1
2
1
3
2
4
5
2
6
7
14
13
12
11
10
R
H1
U/D
1
INC
1
V
CC
CS
2
R
9
8
L2
DNC*
Ordering Information
PART NUMBERPART MARKING VCC LIMITS (V)R
X93254UV141-3X9325 4UVE3 ±10%50-40 to +8514 Ld TSSOPM14.173
TOTAL
(kΩ)
TEMP
RANGE (°C)PACKAGEPKG DWG. #
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or1-888-468-3774
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2008. All Rights Reserved
| Intersil (and design) is a registered trademark of Intersil Americas Inc.
All other trademarks mentioned are the property of their respective owners.
Page 2
Block Diagram
www.BDTIC.com/Intersil
UP/DOWN
(U/D1)
INCREMENT
(INC
DEVICE SELECT
(CS
UP/DOWN
(U/D2)
INCREMENT
(INC
DEVICE SELECT
(CS
X93254
(SUPPLY VOLTAGE)
V
CC
R
30k
30k
CONTROL
)
1
)
1
)
2
)
2
AND
MEMORY
CONTROL
AND
MEMORY
V
(Ground)
SS
H1
R
L1
R
H2
R
L2
Pin Descriptions
TSSOPSYMBOLDESCRIPTION
1DNCDo Not Connect
2R
3CS
4INC
5U/D
6R
7V
8DNCDo Not Connect
9R
10CS
11V
12INC
13U/D
14R
L1
H2
SS
L2
CC
H1
Low Terminal 1
1
2
2
Chip Select 1
Increment 2
Up/Down 2
High Terminal 2
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
NOTES:
1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V
n = 1 .. 29 only
2. Relative linearity is a measure of the error in step size between taps = V
3. 1 Ml = Minimum Increment = R
4. Typical values are for T
5. Limits established by characterization and are not production tested.
6. When performing multiple write operations, V
7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.
= +25°C and nominal supply voltage.
A
TOT
/31.
must not decrease by more than 150mV from its initial value.
CC
Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C
HIGH Voltage
CS1, CS2, INC1, INC2, U/D1, U/D2 Input
IN
Capacitance
VCC = 3V, VIN = VSS, TA= +25°C,
f = 1MHz (Note 5)
Circuit #2 SPICE Macro Model
PARAMETERMINUNIT
Minimum endurance200,000Data changes per bit
Data retention100Years
Test Circuit #1
TEST POINT
VH/R
H
MIN
(Note 7)
TYP
(Note 4)
MAX
(Note 7)UNIT
50250µA
600µA
1µA
±1µA
V
x 0.7VCC + 0.5V
CC
-0.5V
x 0.1V
CC
10pF
R
R
H
10pF
TOTAL
C
C
H
W
25pF
C
10pF
R
L
L
AC Conditions of Test
V
L
Input pulse levels0V to 3V
Input rise and fall times10ns
Input reference levels1.5V
AC Operating Specifications Over recommended operating conditions, unless otherwise stated. CS, INC, U/D, R
refer to either CS
SYMBOLPARAMETER
t
t
t
t
t
t
CPH
t
CPH
Cl
lD
DI
t
lL
lH
lC
CS to INC Setup100ns
INC HIGH to U/D Change100ns
U/D to INC Setup100ns
INC LOW Period1µs
INC HIGH Period1µs
INC Inactive to CS Inactive1µs
CS Deselect time (No Store)250ns
CS Deselect time (Store)10ms
4
or CS2, etc.
1
MIN
(Note 7)
TYP
(Note 4)
MAX
(Note 7)UNIT
and RL are used to
H
FN8186.1
February 4, 2008
Page 5
X93254
www.BDTIC.com/Intersil
AC Operating Specifications Over recommended operating conditions, unless otherwise stated. CS, INC, U/D, R
refer to either CS
SYMBOLPARAMETER
t
CYC
t
R, tF
(Note 5)
t
R VCC
(Note 5)
t
WR
INC Cycle Time2µs
INC
input Rise and Fall Time500µs
Power-up Rate150V/ms
V
CC
Store Cycle510ms
or CS2, etc. (Continued)
1
MIN
(Note 7)
TYP
(Note 4)
MAX
(Note 7)UNIT
AC Timing
CS
t
INC
U/D
CYC
t
CI
t
IL
t
ID
t
IH
t
IC
t
DI
(STORE)
t
CPH
t
F
90%90%
10%
and RL are used to
H
t
R
Note: CS, INC, U/D, RH and RL are used to refer
to either CS
or CS2, etc.
1
Power-up and Power-down Requirements
There are no restrictions on the power-up or power-down
conditions of V
potentiometer pins provided that V
positive than or equal to V
V
ramp rate specification is always in effect.
CC
and the voltages applied to the
CC
and VL, i.e., VCC ≥ VH,VL. The
H
is always more
CC
Pin Descriptions
In the text, CS, INC, U/D, RH and RL are used to refer to
either CS
independently or at the same time.
RH and R
The R
fixed terminals of a mechanical potentiometer. The minimum
voltage is V
R
H
relation to wiper movement direction selected by the U/D
input per potentiometer.
Up/Down (U/D)
The U/D input controls the direction of a single
potentiometer’s wiper movement and whether the counter is
incremented or decremented.
or CS2, etc. Note: These signals can be applied
1
L
and RL pins of the X93254 are equivalent to the
H
and the maximum is VCC. The terminology of
SS
and R
references the relative position of the terminal in
L
Increment (INC)
The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
corresponding potentiometer’s counter in the direction
indicated by the logic level on the corresponding
potentiometer’s U/D
input.
Chip Select (CS)
A potentiometer is selected when the corresponding C S input
is LOW. Its curren t counter value is store d in nonvo latile
memory when the corresponding CS
the corresponding INC
input is also HIGH. After the store
is returned HIGH while
operation is complete, the affected potentiometer will be
placed in the low power standby mode until the potentiometer
is selected once again.
Principles of Operation
There are multiple sections for each potentiometer in the
X93254: an input control, a counter and decode section; the
nonvolatile memory; and a resistor array. Each input control
section operates just like an up/down counter. The output of
this counter is decoded to turn on a single electronic switch
connecting a point on the resistor array to the wiper output.
Under the proper conditions, the contents of the counter can
be stored in nonvolatile memory and retained for future use.
Each resistor array is comprised of 31 individual resistors
5
FN8186.1
February 4, 2008
Page 6
X93254
www.BDTIC.com/Intersil
connected in series. At either end of the array and between
each resistor is an electronic switch that transfers the
connection at that point to the wiper.
Each wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.
If the wiper is moved several positions, multiple taps are
connected to the wiper for t
(INC to VW change). The
IW
2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.
When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory for each
potentiometer. When power is restored, the contents of the
memory are recalled and each wiper is set to the value last
stored.
Instructions and Programming
The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS
potentiometer is selected and enabled to respond to the U/D
and INC
inputs. HIGH to LOW transitions on INC will
increment or decrement (depending on the state of the U/D
input) a 5-bit counter. The output of this counter is decoded
to select one of thirty two wiper positions along the resistive
array.
The value of the counter is stored in nonvolatile memory
whenever each CS
transitions HIGH while the INC input is
also HIGH. In order to avoid an accidental store during
power-up, each CS
must go HIGH with VCC during initial
power-up. When left open, each CS
to V
by an internal 30k resistor.
CC
The system may select the X93254, move any wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as previously described and once the new position
is reached, the system must keep INC
HIGH. The new wiper position will be maintained until
changed by the system or until a power-up/down cycle
recalled the previously stored data. In order to recall the
stored position of the wiper on power-up, the CS
held HIGH.
This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made. The
set LOW the
pin is internally pulled up
LOW while taking CS
pin must be
adjustments might be based on user preference, system
parameter changes due to temperature drift, or other system
trim requirements.
The state of U/D
may be changed while CS remains LOW.
This allows the host system to enable the device and then
move each wiper up and down until the proper trim is
attained.
Mode Selection
CSINCU/DMODE
LHWiper Up
LLWiper Down
HXStore Wiper Position
HXXStandby Current
LXNo Store, Return to Standby
LHWiper Up (not recommended)
LLWiper Down (not recommended)
Symbol Table
WAVEFORMINPUTSOUTPUTS
Must be
steady
May change
from Low to
High
May change
from High to
Low
Don’t Care:
Changes
Allowed
N/ACenter Line
Will be
steady
Will change
from Low to
High
Will change
from High to
Low
Changing:
State Not
Known
is High
Impedance
Applications Information
Electronic digitally controlled (XDCP) potentiometers provide
three powerful application advantages:
1. The variability and reliability of a solid-state potentiometer
2. The flexibility of computer-based digital controls
3. The retentivity of nonvolatile memory used for the storage
of multiple potentiometer settings or data
6
FN8186.1
February 4, 2008
Page 7
X93254
www.BDTIC.com/Intersil
.
V
R
I
Low Voltage High Impedance Instrumentation Amplifier
3.3V
+
V
IN
–
10k
10k
+
U1A
–
50k
1
/2 X93254 (R
50k
–
U1B
+
TOTAL
)
Two terminal variable resistor.
Variable current
10k50k
–
U1C
+
10k
50k
GAIN =
U1 = LT1467
50k
10k
V
OUT
50k
R
TOTAL
)
(
1 +
Micro-Power LCD Contrast Control
3.3V
240k
100k
3.3V
+
U1A
–
100k
50k
1
/2 X93254 (R
TOTAL
Single Supply Variable Gain Amplifier
V
IN
20k
20k
)
10k
3.3V
100k
300k
1 +
100k
50k + R
V
= -3.88
–
U1B
+
–12V
3.3V
+
U1
–
1
/2 X93254
(R
TOTAL
V
U1 = LMC6042
V
OUT
GAIN =
U1 = LMC6042
)
OUT
= -2.75V TO -11.6V
OUT
R
(
TOTAL
10k
TOTAL
)
7
FN8186.1
February 4, 2008
Page 8
X93254
www.BDTIC.com/Intersil
Thin Shrink Small Outline Plastic Packages (TSSOP)
N
INDEX
AREA
123
0.05(0.002)
-AD
e
b
0.10(0.004)C AMBS
NOTES:
1. These package dimensions are within allowable dimensions of
JEDEC MO-153-AC, Issue E.
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm
(0.006 inch) per side.
4. Dimension “E1” does not include interlead flash or protrusions. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per
side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. Dimension “b” does not include dambar protrusion. Allowable dambar
protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions
are not necessarily exact. (Angles in degrees)
E1
-B-
SEATING PLANE
A
-C-
M
0.25(0.010)BMM
E
α
A1
0.10(0.004)
GAUGE
PLANE
0.25
0.010
A2
L
c
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PLASTIC
PACKAGE
INCHESMILLIMETERS
SYMBOL
A-0.047-1.20-
A10.0020.0060.050.15-
A20.0310.0410.801.05-
b0.00750.01180.190.309
c0.00350.00790.090.20-
D0.1950.1994.955.053
E10.1690.1774.304.504
e0.026 BSC0.65 BSC-
E0.2460.2566.256.50-
L0.01770.02950.450.756
N14147
o
α
0
o
8
o
0
o
8
NOTESMINMAXMINMAX
-
Rev. 2 4/06
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implic atio n or other wise u nde r any p a tent or patent rights of Intersil or its sub sidi aries.
For information regarding Intersil Corporation and its products, see www.intersil.com
8
FN8186.1
February 4, 2008
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