Datasheet X93156 Datasheet (intersil)

®

www.BDTIC.com/Intersil

X93156

Single Digitally Controlled Potentiometer (XDCP™)

Data Sheet November 21, 2007

Low Noise, Low Power, 3 wire Up/Down,
32 Taps

The Intersil X93156 is a three-terminal digitally controlled
potentiometer (XDCP). The device consists of a resistor
array, wiper switches, a control section, and nonvolatile
memory. The wiper position is controlled by an Up/Down
interface.

The potentiometer is implemented by a resistor array
composed of 31 resistive elements and a wiper switching
network. The position of the wiper element is controlled by
the CS

, U/D, and INC inputs. The position of the wiper can
be stored in a nonvolatile memory and then be recalled upon
a subsequent power-up operation.

The device can be used as a three-terminal potentiometer or
as a two terminal variable resistor in a wide variety of
applications including the programming of bias voltages,
LCD brightness and contrast control as well as the
implementation of ladder networks.

Features

• Solid-state potentiometer

• Up/Down interface

• 32 wiper tap points

- Wiper position stored in nonvolatile memory and
recalled on power-up

• 31 resistive elements

- Temperature compensated

- Maximum resistance tolerance of ±25%

- Terminal voltage, 0 to V

• Low power CMOS

-V

= 2.7V to 5.5V

CC

- Active current, 200µA typ.

- Standby current, 2µA max.

• High reliability

- Endurance 200,000 data changes per bit

- Register data retention, 100 years

CC

FN8182.3

•R

value = 12.5kΩ, 50kΩ

TOTAL

• Package

- 8 Ld MSOP

- Pb-free Available (RoHS compliant)

Pinout

X93156

(8 LD MSOP)

TOP VIEW

INC

U/D

V

1

2

R

H

SS

X93156

3

4

8

V

CC

7

CS
R

6

5

L

Rw

1

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005, 2007. All Rights Reserved

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

X93156

www.BDTIC.com/Intersil

Ordering Information

PART

PART NUMBER

MARKING

X93156WM8I AGO 5 ±10% 12.5 -40 to +85 8 Ld MSOP M8.118
X93156WM8I-2.7* AGR 2.7 to 5.5 12.5 -40 to +85 8 Ld MSOP M8.118
X93156UM8I-2.7* AGP 2.7 to 5.5 50 -40 to +85 8 Ld MSOP M8.118
X93156WM8IZ-2.7* (Note) DCK 2.7 to 5.5 12.5 -40 to +85 8 Ld MSOP (Pb-free) M8.118
X93156UM8IZ-2.7* (Note) AKV 2.7 to 5.5 50 -40 to +85 8 Ld MSOP (Pb-free) M8.118
X93156WM8IZ DCJ 5 ±10% 12.5 -40 to +85 8 Ld MSOP (Pb-free) M8.118
*Add “-T1” suffix for tape and reel. Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100%
matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations.
Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J
STD-020.

V

CC

RANGE (V)

R

TOTAL

(kΩ)

TEMP

RANGE (°C) PACKAGE

PKG.

DWG. #

Block Diagram

(SUPPLY VOLTAGE)

V

CC

30k

U/D
INC

CS

5-BIT
UP/DOWN
COUNTER

31

30

R

H

R

UP/DOWN

)

(U/D

INCREMENT

)

(INC

DEVICE SELECT

(CS

)

CONTROL

AND

MEMORY

(GROUND)

V

SS

GENERAL

H

5-BIT

R

W

R

L

V

CC

V

SS

NONVOLATILE

MEMORY

STORE AND

CONTROL

RECALL

CIRCUITRY

Pin Descriptions

MSOP SYMBOL BRIEF DESCRIPTION

1INC

2U/D

3R

4V
5RwR

6R

7CS

8V

Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or
decrement the counter in the direction indicated by the logic level on the U/D

Up/Down (U/D). The U/D input controls the direction of the wiper movement and whether the counter is incremented or
decremented.

RH. The R

H

voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in
relation to wiper movement direction selected by the U/D

Ground.

SS

. The Rw pin of the X93156 is the wiper terminal of the potentiometer which is equivalent to the movable terminal of a

W

mechanical potentiometer.

RL. The R

L

voltage is VSS and the maximum is VCC. The terminology of RH and RL references the relative position of the terminal in
relation to wiper movement direction selected by the U/D

and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum

H

input.

and RL pins of the X93156 are equivalent to the fixed terminals of a mechanical potentiometer. The minimum

H

input.

Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile
memory when CS

is returned HIGH while the INC input is also HIGH. After the store operation is complete, the X93156 will

be placed in the low power standby mode until the device is selected once again.

Supply Voltage.

CC

ONE

OF

THIRTY

TWO

DECODER

29

28

2

1

0

DETAILED

input.

TRANSFER

GATES

RESISTOR

ARRAY

R

W

R

L

2

FN8182.3

November 21, 2007

X93156

www.BDTIC.com/Intersil

Absolute Maximum Ratings Thermal Information

Temperature under bias. . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Storage temperature . . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Voltage on CS

, INC, U/D, RH, RL and V

CC

with respect to VSS. . . . . . . . . . . . . . . . . . . . . . . . . . .-1V to +6.5V

Maximum resistor current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.

NOTE:

is measured with the component mounted on a high effective thermal conductivity test board in free air. See Tech Brief TB379 for details.

1. θ

JA

Potentiometer Specifications Over recommended operating conditions unless otherwise stated.

SYMBOL PARAMETER TEST CONDITIONS/NOTES

R

TOT

V

R

I

W

C

H/CL/CW

R

W

End to end resistance 9.375 12.5 15.625 kΩ

RH, RL terminal voltages 0 V
Power rating (Note 7) 1 mW
Noise Ref: 1kHz (Note 7) -120 dBV
Wiper Resistance 1100 Ω
Wiper Current (Note 6) ±0.6 mA
Resolution 3%
Absolute linearity (Note 2) V

H(n)(actual)

(Note 4)

Relative linearity (Note 3) V

temperature coefficient (Note 7) ±35 ppm/°C

R

TOTAL

H(n + 1)

Potentiometer capacitances See circuit #2 (Note 7) 10/10/25 pF

Thermal Resistance (Typical, Note 1) θ

8 Ld MSOP. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 190

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Recommended Operating Conditions

Temperature Range

Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Supply Voltage V

X93156xxx-2.7. . . . . . . . . . . . . . . . . . . . . . . 2.7V to 5.5V (Note 8)

X93156xxx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5V ±10%

- V

H(n)(expected)

- [V

] (Note 4) ±0.5 MI

H(n) + MI

CC

MIN

(Note 9) TYP

37.5 50 62.5 kΩ

MAX

(Note 9) UNIT

CC

±1 MI

(°C/W)

JA

V

DC Electrical Specifications Over recommended operating conditions unless otherwise specified.

SYMBOL PARAMETER TEST CONDITIONS

I

CC1

I

CC2

I

SB

I

VCC active current (Increment) CS = VIL, U/D = VIL or VIH and INC = 0.4V

VCC active current (Store)
(EEPROM Store)

@ max. t
CS

@ max. t

CYC VCC

= VIL, U/D = VIL or VIH and INC = 0.4V

CYC VCC

CS = VIH, U/D = VIL or VIH and INC =

@max. t

V

IH

CS

= VIH, U/D = VIL or VIH and INC =

V

@max. t

IH

= 3V

= 5V

WR VCC

WR VCC

= 3V

= 5V

Standby supply current CS = VCC - 0.3V, U/D and INC = VSS or

CS input leakage current VIN = V

LI

- 0.3V V

V

CC

= VCC - 0.3V, U/D and INC = VSS or

CS

- 0.3V V

V

CC

CC

CC

CC

= 3V

= 5V

3

MIN

(Note 9)

TYP

(Note 5)

MAX

(Note 9) UNIT

50 250 µA

200 300 µA

600 µA

1400 µA

1µA

2µA

±1 µA

November 21, 2007

FN8182.3

X93156

www.BDTIC.com/Intersil

DC Electrical Specifications Over recommended operating conditions unless otherwise specified. (Continued)

SYMBOL PARAMETER TEST CONDITIONS

I
I

I
V
V
CIN

CS input leakage current VCC = 3V, CS = 0 60 100 150 µA

LI

CS input leakage current VCC = 5V, CS = 0 120 200 250 µA

LI

INC, U/D input leakage current VIN = V

LI

CS, INC, U/D input HIGH voltage V

IH

CS, INC, U/D input LOW voltage -0.5 V

IL

SS

to V

CC

CS, INC, U/D input capacitance VCC = 3V, VIN = VSS, TA= +25°C, f = 1MHz 10 pF

(Note 9)

x 0.7 VCC + 0.5 V

CC

(Notes 7, 8)

NOTES:

MIN

2. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V

(actual)-V

H(n)

n = 1.. 29 only

—[V

3. Relative linearity is a measure of the error in step size between taps = V

4. 1 Ml = Minimum Increment = R

5. Typical values are for T

= +25°C and nominal supply voltage.

A

TOT

/31.

H(n+1)

+ Ml] = ±0.5 Ml, n = 1 .. 29 only.

H(n)

6. This parameter is periodically sampled and not 100% tested

7. This parameter is not 100% tested.

8. When performing multiple write operations, V

must not decrease by more than 150mV from it’s initial value.

CC

9. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.

TYP

(Note 5)

(expected)) = ±1 Ml Maximum.

H(n)

MAX

(Note 9) UNIT

±1 µA

x 0.1 V

CC

Endurance and Data Retention

PARAMETER MIN UNIT

Minimum endurance 200,000 Data changes per bit
Data retention 100 Years

Test Circuit #1

TEST POINT

VH/R

H

Circuit #2 SPICE Macro Model

R

R

H

10pF

TOTAL

C

C

H

W

25pF

AC Conditions of Test

C

10pF

R

L

L

Input pulse levels 0V to 3V
Input rise and fall times 10ns
Input reference levels 1.5V

AC Electrical Specifications Over recommended operating conditions unless otherwise specified.

SYMBOL PARAMETER MIN TYP MAX UNIT

CS to INC setup 100 ns
INC HIGH to U/D change 100 ns
U/D to INC setup 100 ns
INC LOW period 1 µs

lL

INC HIGH period 1 µs
INC Inactive to CS inactive 1 µs
CS Deselect time (NO STORE) 250 ns
CS Deselect time (STORE) 10 ms
INC cycle time 2 µs

t
t
t

t

Cl

t

lD

t

DI

t

t

lH

t

lC

CPH

CPH

CYC

4

FN8182.3

November 21, 2007

X93156

www.BDTIC.com/Intersil

AC Electrical Specifications Over recommended operating conditions unless otherwise specified. (Continued )

SYMBOL PARAMETER MIN TYP MAX UNIT

t

R, tF

(Note 7)

t

R VCC

(Note 7)

t

WR

INC

input rise and fall time 500 µs

VCC power-up rate 0.2 50 V/ms

Store cycle 510ms

AC Timing

CS

t

INC

CYC

t

CI

t

IL

t

IH

t

IC

t

CPHS

90% 90%

10%

t

CPHNS

U/D

R

t

ID

t

IW

W

t

DI

(Note 4)

MI

Power-Up and Down Requirements

There are no restrictions on the power-up or power-down
conditions of V
potentiometer pins provided that V
positive than or equal to V
V

ramp rate spec is always in effect.

CC

and the voltages applied to the

CC

and VL, i.e., VCC ≥ VH,VL. The

H

is always more

CC

Pin Descriptions

RH and R

The R
terminals of a mechanical potentiometer. The minimum
voltage is V
R

and R

H

relation to wiper movement direction selected by the U/D
input.

R

w

The Rw pin of the X93156 is the wiper terminal of the
potentiometer which is equivalent to the movable terminal of
a mechanical potentiometer.

L

and RL pins of the X93156 are equivalent to the fixed

H

and the maximum is VCC. The terminology of

SS

references the relative position of the terminal in

L

t

F

t

R

Up/Down (U/D)

The U/D input controls the direction of the wiper movement
and whether the counter is incremented or decremented.

Increment (INC)

The INC input is negative-edge triggered. Toggling INC will
move the wiper and either increment or decrement the
counter in the direction indicated by the logic level on the
U/D

input.

Chip Select (CS)

The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory when
CS

is returned HIGH while the INC input is also HIGH. After
the store operation is complete the X93156 will be placed in
the low power standby mode until the device is selected
once again.

5

FN8182.3

November 21, 2007

X93156

www.BDTIC.com/Intersil

Principles of Operation

There are three sections of the X93156: the input control,
counter and decode section; the nonvolatile memory; and
the resistor array. The input control section operates just like
an up/down counter. The output of this counter is decoded to
turn on a single electronic switch connecting a point on the
resistor array to the wiper output. Under the proper
conditions the contents of the counter can be stored in
nonvolatile memory and retained for future use. The resistor
array is comprised of 31 individual resistors connected in
series. At either end of the array and between each resistor
is an electronic switch that transfers the connection at that
point to the wiper.

The wiper, when at either fixed terminal, acts like its
mechanical equivalent and does not move beyond the last
position. That is, the counter does not wrap around when
clocked to either extreme.

If the wiper is moved several positions, multiple taps are
connected to the wiper for t

(INC to VW change). The

IW

2-terminal resistance value for the device can temporarily
change by a significant amount if the wiper is moved several
positions.

When the device is powered-down, the last wiper position
stored will be maintained in the nonvolatile memory. When
power is restored, the contents of the memory are recalled
and the wiper is set to the value last stored.

Instructions and Programming

The INC, U/D and CS inputs control the movement of the
wiper along the resistor array. With CS
is selected and enabled to respond to the U/D
inputs. HIGH to LOW transitions on INC
decrement (depending on the state of the U/D
bit counter. The output of this counter is decoded to select
one of thirty two wiper positions along the resistive array.

The value of the counter is stored in nonvolatile memory
whenever CS

transitions HIGH while the INC input is also
HIGH. In order to avoid an accidental store during power-up,
CS

must go HIGH with VCC during initial power-up. When

left open, the CS

pin is internally pulled up to VCC by an

internal 30k resistor.

set LOW the device

and INC

will increment or

input) a five

This procedure allows the system to always power-up to a
preset value stored in nonvolatile memory; then during
system operation minor adjustments could be made. The
adjustments might be based on user preference, system
parameter changes due to temperature drift, or other system
trim requirements.

The state of U/D

may be changed while CS remains LOW.
This allows the host system to enable the device and then
move the wiper up and down until the proper trim is attained.

Mode Selection

CS INC U/D MODE

L H Wiper Up
L L Wiper Down

H X Store Wiper Position

H X X Standby Current

L X No Store, Return to Standby
L H Wiper Up (not recommended)
L L Wiper Down (not recommended)

Symbol Table

WAVEFORM INPUTS OUTPUTS

Must be
steady

May change
from Low to
High

May change
from High to
Low

Don’t Care:
Changes
Allowed

N/A Center Line

Will be
steady

Will change
from Low to
High

Will change
from High to
Low

Changing:
State Not
Known

is High
Impedance

The system may select the X93156, move the wiper and
deselect the device without having to store the latest wiper
position in nonvolatile memory. After the wiper movement is
performed as described above and once the new position is
reached, the system must keep INC

LOW while taking CS
HIGH. The new wiper position will be maintained until
changed by the system or until a power-up/down cycle
recalled the previously stored data. In order to recall the
stored position of the wiper on po wer-up, the CS

pin must be

held HIGH.

6

FN8182.3

November 21, 2007

X93156

www.BDTIC.com/Intersil

Mini Small Outline Plastic Packages (MSOP)

N

EE1

INDEX

AREA

AA1A2

TOP VIEW

-H-

SIDE VIEW

12

b

e

D

NOTES:

1. These package dimensions are within allowable dimensions of
JEDEC MO-187BA.

2. Dimensioning and tolerancing per ANSI Y14.5M-1994.

3. Dimension “D” does not include mold flash, protrusions or gate
burrs and are measured at Datum Plane. Mold flash, protrusion
and gate burrs shall not exceed 0.15mm (0.006 inch) per side.

4. Dimension “E1” does not include interlead flash or protrusions
and are measured at Datum Plane. Interlead flash and
protrusions shall not exceed 0.15mm (0.006 inch) per side.

5. Formed leads shall be planar with respect to one another within

0.10mm (0.004) at seating Plane.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “b” does not include dambar protrusion. Allowable
dambar protrusion shall be 0.08mm (0.003 inch) total in excess
of “b” dimension at maximum material condition. Minimum space
between protrusion and adjacent lead is 0.07mm (0.0027 inch).

- H -

-A -

.

10. Datums and to be determined at Datum plane

11. Controlling dimension: MILLIMETER. Converted inch dimen­sions are for reference only.

-B-

0.20 (0.008) A

GAUGE

PLANE

SEATING

PLANE

0.10 (0.004) C

-A-

0.20 (0.008) C

- B -

0.25

(0.010)

-C-

SEATING
PLANE

a

0.20 (0.008) C

- H -

B

4X θ

C

D

4X θ

L1

C

C

L

E

1

END VIEW

R1

R

L

-B-

M8.118 (JEDEC MO-187AA)

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

INCHES MILLIMETERS

SYMBOL

A 0.037 0.043 0.94 1.10 -

A1 0.002 0.006 0.05 0.15 -

A2 0.030 0.037 0.75 0.95 -

b 0.010 0.014 0.25 0.36 9

c 0.004 0.008 0.09 0.20 -

D 0.116 0.120 2.95 3.05 3

E1 0.116 0.120 2.95 3.05 4

e 0.026 BSC 0.65 BSC -

E 0.187 0.199 4.75 5.05 -

L 0.016 0.028 0.40 0.70 6

L1 0.037 REF 0.95 REF -

N8 87

R 0.003 - 0.07 - -

R1 0.003 - 0.07 - -

05

α

o

o

0

15

o

o

6

o

5

o

0

15

o

o

6

Rev. 2 01/03

NOTESMIN MAX MIN MAX

-

-

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implic atio n or other wise u nde r any p a tent or patent rights of Intersil or its subsidi ari es.

For information regarding Intersil Corporation and its products, see www.intersil.com

7

FN8182.3

November 21, 2007