Datasheet X93154 Datasheet (intersil)

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X93154

Low Noise, Low Power, 32 Taps

Data Sheet February 19, 2008

Digitally Controlled Potentiometer (XDCP™)

The Intersil X93154 is a digitally controlled potentiometer (XDCP). The device consists of a resistor array, wiper switches, a control section, and nonvolatile memory. The wiper position is controlled by a 3-wire interface.

The potentiometer is implemented by a resistor array composed of 31 resistive elements and a wiper switching network. The position of the wiper element is controlled by the CS

, U/D, and INC inputs. The position of the wiper can be stored in nonvolatile memory and then be recalled upon during a subsequent power-up operation.

The device is connected as a two-terminal variable resistor and can be used in a wide variety of applications including:

- Bias and Gain Control

- LCD Contrast Adjustment

FN8180.3

Features

• Solid-State Potentiometer

• 3-Wire Serial Interface

• 32 Wiper Tap Points

- Wiper Position Stored in Nonvolatile Memory and Recalled on Power-up

• 31 Resistive Elements

- Temperature Compensated

- Maximum Resistance Tolerance of ±30%

- Terminal V oltage, 0 to V

• Low Power CMOS

-V

= 3V±10%

- Active Current, 250µA max.

- Standby Current, 1µA max.

• High Reliability

- Endurance 200,000 Data Changes Per Bit

- Register Data Retention, 100 years

Pinouts

INC

U/D

TOTAL

Value = 50kΩ

•R

• Packages

- 8 Ld MSOP, TDFN

• Pb-free Available (RoHS Compliant)

X93154

(8 LD MSOP)

TOP VIEW

CS R

NC can be left unconnected, or connected to any voltage between VSS

and V

INC

U/D

X93154

(8 LD TDFN)

TOP VIEW

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774

| Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

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X93154

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Ordering Information

PKG.

PART NUMBER PART MARKING VCC LIMITS (V) R

(kΩ) TEMP RANGE (°C) PACKAGE

TOTAL

DWG. #

X93154UM8I-3* AGK 3 ±10% 50 -40 to +85 8 Ld MSOP M8.118 X93154UM8IZ-3* (Note) AIW -40 to +85 8 Ld MSOP (Pb-free) M8.118 X93154UU8IZ-3* (Note) AKH -40 to +85 8 Ld TDFN (Pb-free) L8.2.5x2 *Add "T1" suffix for tape and reel. Please refer to TB347 for details on reel specifications.

NOTE: These Intersil Pb-free plastic packaged products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.

Block Diagram

(SUPPLY VOLTAGE)

30k

U/D INC

5-BIT UP/DOWN COUNTER

UP/DOWN

)

(U/D

INCREMENT

(INC

)

DEVICE SELECT

(CS

)

CONTROL

AND

MEMORY

(Ground)

5-BIT

NONVOLATILE

MEMORY

STORE AND

CONTROL

RECALL

CIRCUITRY

ONE

THIRTY

TWO

DECODER

GENERAL

Pin Descriptions

MSOP, TDFN SYMBOL BRIEF DESCRIPTION

1INC

2U/D

4V 5NCNo Connection (or can be connected to any voltage between V 6R

7CS

Increment (INC). The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D

Up/Down (U/D). The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented.

RH. The R

minimum voltage is V

and RL pins of the X93154 are equivalent to the fixed terminals of a mechanical potentiometer. The

and the maximum is VCC. The terminology of RH and RL references the relative position of

the terminal in relation to wiper movement direction selected by the U/D Ground.

RL. The R

minimum voltage is V the terminal in relation to wiper movement direction selected by the U/D

and RL pins of the X93154 are equivalent to the fixed terminals of a mechanical potentiometer. The

and the maximum is VCC. The terminology of RH and RL references the relative position of

Chip Select (CS). The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS

is returned HIGH while the INC input is also HIGH. After the store operation is

complete, the X93154 will be placed in the low power standby mode until the device is selected once again. Supply Voltage.

and VCC.)

DETAILED

input.

TRANSFER

GATES

input.

RESISTOR

ARRAY

FN8180.3

February 19, 2008

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X93154

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Absolute Maximum Ratings Thermal Information

Voltage on CS, INC, U/D, RH, RL and V

with respect to VSS . . . . . . . . . . . . . . . . . . . . . . . . . .-1V to +6.5V

Maximum Resistor Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2mA

Recommended Operating Conditions

Temperature Range

Industrial. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

Supply Voltage

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3V ±10% (Note 6)

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and result in failures not covered by warranty.

NOTES:

1. Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = (V n = 1.. 29 only

2. Relative linearity is a measure of the error in step size between taps = V

3. 1 Ml = Minimum Increment = R

4. Typical values are for T

5. Limits established by characterization and are not production tested.

6. When performing multiple write operations, V

7. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.

= +25°C and nominal supply voltage.

TOT

/31.

must not decrease by more than 150mV from its initial value.

Storage Temperature. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C

Temperature Under Bias . . . . . . . . . . . . . . . . . . . . .-65°C to +135°C

Pb-free Reflow Profile . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

H(n+1)

(actual)-V

H(n)

-[V

+ Ml] = ±0.5 Ml, n = 1 .. 29 only.

H(n)

(expected)) = ±1 Ml Maximum.

H(n)

Potentiometer Specifications Over recommended operating conditions unless otherwise stated.

MIN

SYMBOL PARAMETER TEST CONDITIONS/NOTES

TOT

H/CL/CW

End-to-End Resistance 35 50 65 kΩ RH, RL Terminal Voltages 0 V Power Rating R

Noise Ref: 1kHz -120 dBV

Wiper Resistance (Note 5) 1000 Ω Wiper Current (Note 5) 0.6 mA Resolution 3% Absolute Linearity

Relative Linearity (Note 2) V

Temperature Coefficient (Note 5) ±35 ppm/°C

TOTAL

Potentiometer Capacitances See “Circuit #2 SPICE Macro

(Note 1) V

= 50kΩ 1mW

TOTAL

H(n)(actual)-VH(n)(expected)

-[V

H(n+1)

Model” on page 4

]±0.5MI

H(n)+MI

(Note 7)

DC Electrical Specifications Over recommended operating conditions, unless otherwise specified.

MIN

SYMBOL PARAMETER TEST CONDITIONS

CC1

CC2

VCC Active Current (Increment) CS = VIL, U/D = VIL or VIH and INC =0.4V @

VCC Active Current (Store) (EEPROM Store)

Standby Supply Current CS = VCC - 0.3V, U/D and INC = VSS or

max. t

CYC

CS = VIH, U/D = VIL or VIH and INC =V max. t

- 0.3V

(Note 7)

TYP

(Note 4)

10/10/25 pF

TYP

(Note 4)

50 250 µA

MAX

(Note 7) UNIT

±1 MI

MAX

(Note 7) UNIT

600 µA

1µA

(Note 5)

(Note 3)

(Note 5)

FN8180.3

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DC Electrical Specifications Over recommended operating conditions, unless otherwise specified. (Continued)

SYMBOL PARAMETER TEST CONDITIONS

I I

I V V C

(Note 5)

CS VIN = V

CS VCC = 3V, CS = 0 60 100 150 µA

INC, U/D Input Leakage Current VIN = V

CS, INC, U/D Input HIGH Voltage V

CS, INC, U/D Input LOW Voltage -0.5 V

, INC, U/D Input Capacitance VCC = 3V, VIN = VSS, TA= +25°C, f = 1MHz 10 pF

to V

MIN

(Note 7)

x 0.7 VCC + 0.5 V

TYP

(Note 4)

MAX

(Note 7) UNIT

±1 µA

x 0.1 V

Endurance and Data Retention

Circuit #2 SPICE Macro Model

PARAMETER MIN UNIT

Minimum endurance 200,000 Data changes per bit

Data retention 100 Years

TOTAL

Test Circuit #1

TEST POINT

VH/R

10pF

AC Conditions of Test

Input pulse levels 0V to 3V

Input rise and fall times 10ns Input reference levels 1.5V

AC Electrical Specifications Over recommended operating conditions unless otherwise specified.

SYMBOL PARAMETER

CPH

CYC

R, tF

CS to INC Setup 100 ns

INC HIGH to U/D Change 100 ns

U/D to INC Setup 100 ns

INC LOW Period 1 µs

INC HIGH Period 1 µs

INC Inactive to CS Inactive 1 µs

CS Deselect Time (No Store) 250 ns CS Deselect Time (Store) 10 ms INC Cycle Time 2 µs INC

Input Rise and Fall Time 500 µs

(Note 5)

R VCC

(Note 5)

VCC Power-up Rate 1.0 50 V/ms

Store Cycle 510ms

MIN

(Note 7)

TYP

(Note 4)

25pF

10pF

MAX

(Note 7) UNIT

FN8180.3

February 19, 2008

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AC Timing

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INC

X93154

CYC

(STORE)

CPH

90% 90%

10%

U/D

Power-Up and Power-down Requirements

There are no restrictions on the power-up or power-down conditions of V potentiometer pins provided that V positive than or equal to V V

ramp rate specification is always in effect.

and the voltages applied to the

and VL, i.e., VCC ≥ VH,VL. The

is always more

Pin Descriptions

RH and R

The R fixed terminals of a mechanical potentiometer. The minimum voltage is V R

and R

relation to wiper movement direction selected by the U/D input.

Up/Down (U/D)

The U/D input controls the direction of the wiper movement and whether the counter is incremented or decremented.

Increment (INC)

The INC input is negative-edge triggered. Toggling INC will move the wiper and either increment or decrement the counter in the direction indicated by the logic level on the U/D

Chip Select (CS)

The device is selected when the CS input is LOW. The current counter value is stored in nonvolatile memory when CS

is returned HIGH while the INC input is also HIGH. After the store operation is complete the X93154 will be placed in the low power standby mode until the device is selected once again.

and RL pins of the X93154 are equivalent to the

and the maximum is VCC. The terminology of

references the relative position of the terminal in

input.

Pin Names

SYMBOL DESCRIPTION

U/D INC

CS Chip Select control input

High terminal Low terminal Ground Supply voltage Up/Down control input Increment control input

Principles of Operation

There are three sections of the X93154: the input control, counter and decode section; the nonvolatile memory; and the resistor array. The input control section operates just like an up/down counter. The output of this counter is decoded to turn on a single electronic switch connecting a point on the resistor array to the wiper output. Under the proper conditions the contents of the counter can be stored in nonvolatile memory and retained for future use. The resistor array is comprised of 31 individual resistors connected in series. At either end of the array and between each resistor is an electronic switch that transfers the connection at that point to the wiper.

The wiper, when at either fixed terminal, acts like its mechanical equivalent and does not move beyond the last position. That is, the counter does not wrap around when clocked to either extreme.

If the wiper is moved several positions, multiple taps are connected to the wiper for t 2-terminal resistance value for the dev i ce ca n te mp orarily change by a significant amount if the wiper is moved several positions.

(INC to VW change). The

When the device is powered-down, the last wiper position stored will be maintained in the nonvolatile memory. When power is restored, the contents of the memory are recalled and the wiper is set to the value last stored.

FN8180.3

February 19, 2008

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X93154

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Instructions and Programming

The INC, U/D and CS inputs control the movement of the wiper along the resistor array. With CS is selected and enabled to respond to the U/D inputs. HIGH to LOW transitions on INC decrement (depending on the state of the U/D counter. The output of this counter is decoded to select one of thirty two wiper positions along the resistive array.

The value of the counter is stored in nonvolatile memory whenever CS

transitions HIGH while the INC input is also HIGH. In order to avoid an accidental store during power-up, CS

must go HIGH with VCC during initial power-up. When performing multiple write operations, V by more than 150mV from its initial value. When left open, the CS

pin is internally pulled up to VCC by an internal 30k

resistor. The system may select the X93154, move the wiper and

deselect the device without having to store the latest wiper position in nonvolatile memory. After the wiper movement is performed as previously described and once the new position is reached, the system must keep INC taking CS

HIGH. The new wiper position will be maintained until changed by the system or until a power-up/down cycle recalled the previously stored data. In order to recall the stored position of the wiper on po wer-up, the CS held HIGH.

This procedure allows the system to always power-up to a preset value stored in nonvolatile memory; then during system operation minor adjustments could be made. The adjustments might be based on user preference, system parameter changes due to temperature drift, or other system trim requirements.

The state of U/D

may be changed while CS remains LOW. This allows the host system to enable the device and then move the wiper up and down until the proper trim is attained.

set LOW, the device

and INC

will increment or

input) a 5-bit

must not decrease

LOW while

pin must be

Mode Selection

CS INC U/D MODE

L H Wiper Up L L Wiper Down

H X Store Wiper Position

H X X Standby Current

L X No Store, Return to Standby L H Wiper Up (not recommended) L L Wiper Down (not recommended)

Symbol Table

WAVEFORM INPUTS OUTPUTS

Must be steady

May change from Low to High

May change from High to Low

Don’t Care: Changes Allowed

N/A Center Line

Will be steady

Will change from Low to High

Will change from High to Low

Changing: State Not Known

is High Impedance

Applications Information

Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages:

1. The variability and reliability of a solid-state potentiometer

2. The flexibility of computer-based digital controls

3. The retentivity of nonvolatile memory used for the storage of multiple potentiometer settings or data

Two terminal variable resistor. Variable current

FN8180.3

February 19, 2008

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X93154

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Low Voltage High Impedance Instrumentation Amplifier

3.3V

50k

10k

3.3V

U1A

100k

U1A

X93154 (R

U1B

50k

100k

TOTAL

)

300k

U1B

-12V

Micro-Power LCD Contrast Control

3.3V

240k

100k

10k 50k

U1C

10k

50k

= -3.88

OUT

= -2.75V TO -11.6V

OUT

U1 = LMC6042

50k

Gain =

10k

U1 = LT1467

(

1 +

OUT

(

1 +

100k

50k + R

50k

TOTAL

)

X93154 (R

TOTAL

Single Supply Variable Gain Amplifier

)

20k

3.3V

10k

3.3V

X93154 (R

TOTAL

OUT

Gain =

U1 = LMC6042

)

TOTAL

10k

FN8180.3

February 19, 2008

Page 8

X93154

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Thin Dual Flat No-Lead Plastic Package (TDFN)

(DATUM A)

NX (b)

INDEX AREA

SEATING

(DATUM B)

INDEX AREA

NX L

PLANE

(A1)

TOP VIEW

SIDE VIEW

D2/2

N-1

(Nd-1)Xe

REF.

BOTTOM VIEW

NX b

L8.2.5x2

8 LEAD THIN DUAL FLAT NO-LEAD PLASTIC PACKAGE

MILLIMETERS

SYMBOL

NOTESMIN NOMINAL MAX

ABC0.15

0.15

A 0.70 0.75 0.80 -

A1 - - 0.05 A3 0.20 REF -

b 0.20 0.25 0.30 5, 8

D 2.00 BSC -

D2 0.90 1.00 1.10 7, 8

0.10

0.08

E 2.50 BSC -

E2 1.20 1.30 1.40 7, 8

e 0.50 BSC k0.20 - - L 0.30 0.40 0.50 8

N 8 2

Nd 4 3

Rev. 0 8/05

NX k

NOTES:

1. Dimensioning and tolerancing conform to ASME Y14.5-1994.

2. N is the number of terminals.

E2/2

3. Nd refers to the number of terminals on D.

4. All dimensions are in millimeters. Angles are in degrees.

5. Dimension b applies to the metallized terminal and is measured between 0.25mm and 0.30mm from the terminal tip.

6. The configuration of the pin #1 identifier is optional, but must be located within the zone indicated. The pin #1 identifier may be

0.10

BAMC

either a mold or mark feature.

7. Dimensions D2 and E2 are for the exposed pads which provide improved electrical and thermal performance.

8. Nominal dimensions are provided to assist with PCB Land

Pattern Design efforts, see Intersil Technical Brief TB389.

SECTION "C-C"

FOR EVEN TERMINAL/SIDE

TERMINAL TIP

FN8180.3

February 19, 2008

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X93154

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Mini Small Outline Plastic Packages (MSOP)

EE1

INDEX

AREA

AA1A2

-H-

SIDE VIEW

TOP VIEW

NOTES:

1. These package dimensions are within allowable dimensions of JEDEC MO-187BA.

2. Dimensioning and tolerancing per ANSI Y14.5M-1994.

3. Dimension “D” does not include mold flash, protrusions or gate burrs and are measured at Datum Plane. Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006 inch) per side.

4. Dimension “E1” does not include interlead flash or protrusions and are measured at Datum Plane. Interlead flash and protrusions shall not exceed 0.15mm (0.006 inch) per side.

5. Formed leads shall be planar with respect to one another within

0.10mm (0.004) at seating Plane.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “b” does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm (0.003 inch) total in excess of “b” dimension at maximum material condition. Minimum space between protrusion and adjacent lead is 0.07mm (0.0027 inch).

- H -

-A -

10. Datums and to be determined at Datum plane

11. Controlling dimension: MILLIMETER. Converted inch dimensions are for reference only.

-B-

0.20 (0.008) A

GAUGE PLANE

SEATING

PLANE

0.10 (0.004) C

-A-

0.20 (0.008) C

- B -

0.25

(0.010)

-C-

SEATING PLANE

0.20 (0.008) C

- H -

4X θ

END VIEW

-B-

M8.118 (JEDEC MO-187AA)

8 LEAD MINI SMALL OUTLINE PLASTIC PACKAGE

INCHES MILLIMETERS

SYMBOL

A 0.037 0.043 0.94 1.10 -

A1 0.002 0.006 0.05 0.15 -

A2 0.030 0.037 0.75 0.95 -

b 0.010 0.014 0.25 0.36 9

c 0.004 0.008 0.09 0.20 -

D 0.116 0.120 2.95 3.05 3

E1 0.116 0.120 2.95 3.05 4

e 0.026 BSC 0.65 BSC -

E 0.187 0.199 4.75 5.05 -

L 0.016 0.028 0.40 0.70 6

L1 0.037 REF 0.95 REF -

N8 87

R 0.003 - 0.07 - -

R1 0.003 - 0.07 - -

Rev. 2 01/03

NOTESMIN MAX MIN MAX

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implic atio n or other wise u nde r any p a tent or patent rights of Intersil or it s sub sidi ari es.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN8180.3

February 19, 2008