Datasheet WS1M32-120G3MA, WS1M32-70G3CA, WS1M32-70G3C, WS1M32-85G3MA, WS1M32-85G3M Datasheet (White Electronic Designs)

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Page 1
4
SRAM MODULES
WS1M32-XG3X
1
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54
9
V
A
0
A
1
A
2
A
3
A
4
A
5
A
6
OE
1
OE
2
OE
3
OE
4
NC
A
7
A
8
A
9
A
10
A
11
A
12
A
13
GND
V
CC
I/O0I/O1I/O2I/O3I/O4I/O5I/O6I/O
7
CS
1
NC
CS
2
I/O8I/O
9
I/O10I/O11I/O12I/O13I/O14I/O
15
GND
GND NC NC NC NC NC NC NC NC WE
4
WE
3
WE
2
WE
1
NC NC A
18
A
17
A
16
A
15
A
14
V
GND
I/O31I/O
3
0
I/O
2
9
I/O
2
8
I/O
2
7
I/O
2
6
I/O
2
5
I/O
2
4
NCNCNC
I/O
2
3
I/O22I/O21I/O
2
0
I/O
1
9
I/O
1
8
I/O
1
7
I/O
1
6
V
CC
876543 184838281807978772
37
38 39 40 41 42 43 45 46 47 48 49 50 51 52 5344
76 75
11
10
33
34 35 36
1Mx32 SRAM MODULE
PRELIMINARY*
FEATURES
Access Time of 70, 85, 100, 120ns
84 lead, 28mm CQFP, (Package 511)
Organized as two banks of 512Kx32, User Configurable as
1Mx16 or 2Mx8
Commercial, Industrial and Military Temperature Ranges
PIN CONFIGURATION FOR WS1M32-XG3X
PIN DESCRIPTION
I/O0-31 Data Inputs/Outputs
A0-18 Address Inputs
WE1-4 Write Enables
CS1-2 Chip Selects
OE1-4 Output Enables
VCC Power Supply
GND Ground
NC Not Connected
TOP VIEW
TTL Compatible Inputs and Outputs
5 Volt Power Supply
Low Power CMOS
Weight - 20 grams typical
*This data sheet describes a product under development, not fully
characterized, and is subject to change without notice.
May 2001 Rev. 2
BLOCK DIAGRAM
8
I/O
0-7
CS
1
I/O
8-15
CS
2
I/O
16-23
I/O
24-31
A
0-18
WE
1
8
2M x 8
8
512K x 8
8
512K x 8
2M x 8
512K x 8
512K x 8
2M x 8
512K x 8
512K x 8
2M x 8
512K x 8
512K x 8
OE
1
WE
2
OE
2
WE
3
OE
3
WE
4
OE
4
NOTE: CS1& CS2 are used as bank select
The White 84 lead G3 CQFP fills the same fit and function as the JEDEC 84 lead CQFJ or 84 PLCC. But the G3 has the TCE and lead inspection advantage of the CQFP form.
1.146"
Page 2
2
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS1M32-XG3X
TRUTH TABLE
CS1 CS2 OE WE Mode Data I/O Power
H H X X Standby High Z Standby L H L H Read Data Out Active L H H H Out Disable High Z Active L H X L Write Data In Active H L L H Read Data Out Active H L H H Out Disable High Z Active H L X L Write Data In Active L L X X Invalid State Invalid State Invalid State
Parameter Symbol Min Max Unit
Operating Temperature T
A -40 +85 °C
Storage Temperature T
STG -65 +150 °C
Signal Voltage Relative to GND V
G -0.5 Vcc + 0.5 V
Junction Temperature T
J 150 °C
Supply Voltage V
CC -0.5 7.0 V
RECOMMENDED OPERATING CONDITIONS
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Min Max Unit
Supply Voltage VCC 4.5 5.5 V
Input High Voltage VIH 2.2 VCC + 0.3 V
Input Low Voltage VIL -0.5 +0.8 V
Operating Temp (Ind.) T
A -40 +85 °C
CAPACITANCE
(T
A = +25°C)
Parameter
Symbol
Conditions Max Unit
OE1-4 capacitance COE
VIN = 0 V, f = 1.0 MHz
30 pF
WE1-4 capacitance CWE
VIN = 0 V, f = 1.0 MHz
30 pF
CS1-2 capacitance CCS
VIN = 0 V, f = 1.0 MHz
30 pF
Data I/O capacitance CI/O
V
I/O
= 0 V, f = 1.0 MHz
30 pF
Address input capacitance C
ADVIN
= 0 V, f = 1.0 MHz
100 pF
This parameter is guaranteed by design but not tested.
Parameter Symbol Conditions Units
Min Max
Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current x 32 Mode ICC x 32 CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 220 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 10 mA Standby Current (Low Power) ISB2 CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 900 µA
Output Low Voltage VOL IOL = 8mA, Vcc = 4.5 0.4 V
Output High Voltage V
OH IOH = -4.0mA, Vcc = 4.5 2.4 V
NOTE: DC test conditions: V
IH = VCC -0.3V, VIL = 0.3V
DC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, TA = -55°C to +125°C)
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SRAM MODULES
WS1M32-XG3X
3
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
Parameter Symbol -70 -85 -100 -120 Units Read Cycle Min Max Min Max Min Max Min Max
Read Cycle Time tRC 70 85 100 120 ns Address Access Time tAA 70 85 100 120 ns Output Hold from Address Change tOH 5555 ns Chip Select Access Time tACS 70 85 100 120 ns Output Enable to Output Valid tOE 35 40 50 60 ns Chip Select to Output in Low Z tCLZ
1
10 10 10 10 ns
Output Enable to Output in Low Z tOLZ
1
5555 ns
Chip Disable to Output in High Z tCHZ
1
25 25 35 35 ns
Output Disable to Output in High Z t
OHZ
1
25 25 35 35 ns
1. This parameter is guaranteed by design but not tested.
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, TA
= -55°C to +125°C)
AC TEST CIRCUIT
NOTES:
V
Z is programmable from -2V to +7V.
I
OL & IOH programmable from 0 to 16mA.
Tester Impedance Z
0 = 75 Ω.
V
Z is typically the midpoint of VOH and VOL.
I
OL & IOH
are adjusted to simulate a typical resistive load circuit.
ATE tester includes jig capacitance.
I
Current Source
D.U.T.
C = 50 pf
eff
I
OL
V ≈ 1.5V (Bipolar Supply)
Z
Current Source
OH
AC CHARACTERISTICS
(V
CC
= 5.0V, GND = 0V, TA
= -55°C to +125°C)
AC TEST CONDITIONS
Parameter Typ Unit
Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V
Parameter Symbol -70 -85 -100 -120 Units Write Cycle Min Max Min Max Min Max Min Max
Write Cycle Time tWC 70 85 100 120 ns Chip Select to End of Write tCW 60 75 80 100 ns Address Valid to End of Write tAW 60 75 80 100 ns Data Valid to End of Write tDW 30 30 40 40 ns Write Pulse Width tWP 50 50 60 60 ns Address Setup Time tAS 0000 ns Address Hold Time tAH 5555 ns Output Active from End of Write tOW
1
5555 ns
Write Enable to Output in High Z tWHZ
1
25 25 35 35 ns
Data Hold Time t
DH 0000 ns
1. This parameter is guaranteed by design but not tested.
Page 4
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White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS1M32-XG3X
WS32K32-XHX
TIMING WAVEFORM - READ CYCLE
WRITE CYCLE - CS CONTROLLED
WRITE CYCLE - WE CONTROLLED
ADDRESS
DATA I/O
WRITE CYCLE 2, CS CONTROLLED
t
AW
t
AS
t
CW
t
AH
t
WP
t
DH
t
DW
t
WC
CS
WE
DATA VALID
ADDRESS
DATA I/O
READ CYCLE 2 (WE = V
IH
)
t
AA
t
ACS
t
OE
t
CLZ
t
OLZ
t
OHZ
t
RC
DATA VALID
HIGH IMPEDANCE
CS
OE
t
CHZ
ADDRESS
DATA I/O
READ CYCLE 1 (CS = OE = V
IL
, WE = VIH)
t
AA
t
OH
t
RC
DATA VALIDPREVIOUS DATA VALID
ADDRESS
DATA I/O
WRITE CYCLE 1, WE CONTROLLED
t
AW
t
CW
t
AH
t
WP
t
DW
t
WHZ
t
AS
t
OW
t
DH
t
WC
DATA VALID
CS
WE
Page 5
4
SRAM MODULES
WS1M32-XG3X
5
White Electronic Designs Corporation • (602) 437-1520 • www.whiteedc.com
ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES
PACKAGE 511: 84 LEAD, CERAMIC QUAD FLAT PACK (G3)
0.38 (0.015)
± 0.05 (0.002)
4.12 (0.162) ± 0.20 (0.008)
1.27 (0.050) TYP
29.11 (1.146) ± 0.25 (0.010)
25.40 (1.000) TYP
4.29 (0.169) ± 0.28 (0.011)
0.19 (0.008) ± 0.06 (0.003)
1.02 (0.040)
± 0.12 (0.005)
0.25 (0.010)
± 0.03 (0.002)
1° / 7°
R 0.127 (0.005) MIN
DETAIL A
SEE DETAIL "A"
Pin 1
0.27 (0.011)
± 0.04 (0.001)
+
30.23 (1.190) ± 0.25 (0.010) SQ
27.18 (1.070) ± 0.25 (0.010) SQ
The White 84 lead G3 CQFP fills the same fit and function as the JEDEC 84 lead CQFJ or 84 PLCC. But the G3 has the TCE and lead inspection advantage of the CQFP form.
1.146"
Page 6
6
White Microelectronics • Phoenix, AZ • (602) 437-1520
4
SRAM MODULES
WS1M32-XG3X
ORDERING INFORMATION
LEAD FINISH:
Blank = Gold plated leads A = Solder dip leads
DEVICE GRADE:
M= Military Screened -55°C to +125°C I = Industrial -40°C to +85°C C = Commercial 0 to +70°C
PACKAGE TYPE:
G3 = 28 mm CQFP (Package 511)
ACCESS TIME (ns)
ORGANIZATION, two banks of 512Kx32
User configurable as 1Mx16 or 2Mx8
SRAM
WHITE ELECTRONIC DESIGNS
W S 1M32 - XXX G3 X X
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