Datasheet WMS512K8L-85CIE, WMS512K8L-85CCEA, WMS512K8L-85CCE, WMS512K8L-70DEMEA, WMS512K8L-70DEME Datasheet (White Electronic Designs)

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SRAM MONOLITHICS

1

WMS512K8-XXX

512Kx8 MONOLITHIC SRAM, SMD 5962-95613

FEATURES

■ Access Times 70, 85, 100, 120ns

■ MIL-STD-883 Compliant Devices Available

■ Evolutionary, Corner Power/Ground Pinout

JEDEC Approved

•32 pin Ceramic DIP (Package 300)

•32 lead Ceramic SOJ (Package 101)

■ Commercial, Industrial and Military Temperature Ranges

■ 5 Volt Power Supply

■ Low Power CMOS

■ Low Power Data Retention

■ TTL Compatible Inputs and Outputs

EVOLUTIONARY PINOUT

32 DIP
32 CSOJ (DE)

TOP VIEW

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

A18
A16
A14
A12

A7
A6
A5
A4
A3
A2
A1

A0
I/O0
I/O1
I/O2

V

SS

V

CC

A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3

A0-18 Address Inputs

I/O0-7 Data Input/Output

CS Chip Select

OE Output Enable
WE Write Enable
VCC +5.0V Power

GND Ground

PIN DESCRIPTION

February 2000 Rev. 2

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SRAM MONOLITHICS

WMS512K8-XXX

TRUTH TABLEABSOLUTE MAXIMUM RATINGS

Parameter Symbol Min Max Unit

Operating Temperature T

A -55 +125 °C

Storage Temperature T

STG -65 +150 °C

Signal Voltage Relative to GND V

G -0.5 Vcc+0.5 V

Junction Temperature T

J 150 °C

Supply Voltage V

CC -0.5 7.0 V

CS OE WE Mode Data I/O Power

H X X Standby High Z Standby
L L H Read Data Out Active
L X L Write Data In Active
L H H Out Disable High Z Active

RECOMMENDED OPERATING CONDITIONS

DC CHARACTERISTICS

(VCC = 5.0V, GND = 0V, TA = -55°C to +125°C)

Parameter Symbol Min Max Unit

Supply Voltage V

CC 4.5 5.5 V

Input High Voltage V

IH 2.2 VCC + 0.3 V

Input Low Voltage V

IL -0.3 +0.8 V

Operating Temp. (Mil.) TA -55 +125 °C

Parameter Symbol Conditions Units

Min Max

Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA
Output Leakage Current ILO CS = VIH, OE = VIH, VOUT = GND to VCC 10 µA
Operating Supply Current ICC CS = VIL, OE = VIH, f = 5MHz, Vcc = 5.5 50 mA
Standby Current ISB CS = VIH, OE = VIH, f = 5MHz, Vcc = 5.5 1 mA
Output Low Voltage VOL IOL = 2.1mA, VCC = 4.5 0.4 V
Output High Voltage V

OH IOH = -1.0mA, VCC = 4.5 2.4 V

NOTE: DC test conditions: V

IH = VCC -0.3V, VIL = 0.3V

Parameter

Symbol

Condition Max Unit

Input capacitance CIN

VIN = 0V, f = 1.0MHz

12 pF

Output capacitance C

OUT

V

OUT

= 0V, f = 1.0MHz

12 pF

This parameter is guaranteed by design but not tested.

CAPACITANCE

(T

A = +25°C)

Parameter Symbol Conditions Military Units

Min Typ Max

Data Retention Supply Voltage VDR CS ≥ VCC -0.2V 2.0 5.5 V
Data Retention Current I

CCDR1 VCC = 3V 100 400 µA

DATA RETENTION CHARACTERISTICS

(TA = -55°C to +125°C)

Parameter Symbol Conditions Units

Min Max

Data Retention Supply Voltage VDR CS ≥ VCC -0.2V 2.0 5.5 V
Low Power Data Retention (L) I

CCDR1 VCC = 2V 185 µA

DATA RETENTION CHARACTERISTICS FOR LOW POWER “L” VERSION

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SRAM MONOLITHICS

3

WMS512K8-XXX

AC CHARACTERISTICS

(V

CC

= 5.0V, GND = 0V, TA = -55°C to +125°C)

AC CHARACTERISTICS

(V

CC

= 5.0V, GND = 0V, TA = -55°C to +125°C)

Parameter Symbol -70 -85 -100 -120 Units
Read Cycle Min Max Min Max Min Max Min Max

Read Cycle Time tRC 70 85 100 120 ns
Address Access Time tAA 70 85 100 120 ns
Output Hold from Address Change tOH 55 55ns
Chip Select Access Time tACS 70 85 100 120 ns
Output Enable to Output Valid tOE 35 40 50 60 ns
Chip Select to Output in Low Z tCLZ

1

10 10 10 10 ns

Output Enable to Output in Low Z tOLZ

1

55 55ns

Chip Disable to Output in High Z tCHZ

1

25 25 35 35 ns

Output Disable to Output in High Z t

OHZ

1

25 25 35 35 ns

1. This parameter is guaranteed by design but not tested.

Parameter Symbol -70 -85 -100 -120 Units
Write Cycle Min Max Min Max Min Max Min Max

Write Cycle Time tWC 70 85 100 120 ns
Chip Select to End of Write tCW 60 75 80 100 ns
Address Valid to End of Write tAW 60 75 80 100 ns
Data Valid to End of Write tDW 30 30 40 40 ns
Write Pulse Width tWP 50 50 60 60 ns
Address Setup Time tAS 00 0 0ns
Address Hold Time tAH 55 5 5ns
Output Active from End of Write tOW

1

55 5 5ns

Write Enable to Output in High Z tWHZ

1

25 25 35 35 ns

Data Hold from Write Time t

DH 00 0 0ns

1. This parameter is guaranteed by design but not tested.

I

Current Source

D.U.T.

C = 50 pf

eff

I

OL

V ≈ 1.5V
(Bipolar Supply)

Z

Current Source

OH

NOTES:

V

Z is programmable from -2V to +7V.

I

OL & IOH programmable from 0 to 16mA.

Tester Impedance Z

0 = 75 Ω.

V

Z is typically the midpoint of VOH and VOL.

I

OL & IOH

are adjusted to simulate a typical resistive load circuit.

ATE tester includes jig capacitance.

AC TEST CIRCUIT

Parameter Typ Unit

Input Pulse Levels VIL = 0, VIH = 3.0 V
Input Rise and Fall 5 ns
Input and Output Reference Level 1.5 V
Output Timing Reference Level 1.5 V

AC TEST CONDITIONS

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SRAM MONOLITHICS

WMS512K8-XXX

WS32K32-XHX

TIMING WAVEFORM - READ CYCLE

WRITE CYCLE - CS CONTROLLED

WRITE CYCLE - WE CONTROLLED

ADDRESS

DATA I/O

WRITE CYCLE 1, WE CONTROLLED

t

AW

t

CW

t

AH

t

WP

t

DW

t

WHZ

t

AS

t

OW

t

DH

t

WC

DATA VALID

CS

WE

ADDRESS

DATA I/O

WRITE CYCLE 2, CS CONTROLLED

t

AW

t

AS

t

CW

t

AH

t

WP

t

DH

t

DW

t

WC

CS

WE

DATA VALID

ADDRESS

DATA I/O

READ CYCLE 2 (WE = V

IH

)

t

AA

t

ACS

t

OE

t

CLZ

t

OLZ

t

OHZ

t

RC

DATA VALID

HIGH IMPEDANCE

CS

OE

t

CHZ

ADDRESS

DATA I/O

READ CYCLE 1 (CS = OE = V

IL

, WE = VIH)

t

AA

t

OH

t

RC

DATA VALIDPREVIOUS DATA VALID

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SRAM MONOLITHICS

5

WMS512K8-XXX

PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED

2.5 (0.100)
TYP

1.27 (0.050)

± 0.1 (0.005)

0.46 (0.018)

± 0.05 (0.002)

0.84 (0.033)
± 0.4 (0.014)

3.2 (0.125) MIN

15.04 (0.592)
± 0.3 (0.012)

0.25 (0.010)

± 0.05 (0.002)

15.25 (0.600)

± 0.25 (0.010)

42.4 (1.670) ± 0.4 (0.016)

4.34 (0.171) ± 0.79 (0.031)

PIN 1 IDENTIFIER

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

PACKAGE 101: 32 LEAD, CERAMIC SOJ

1.27 (0.050) TYP

21.1 (0.830) ± 0.25 (0.010)

PIN 1 IDENTIFIER

19.1 (0.750) TYP

11.3 (0.446)

± 0.2 (0.009)

3.96 (0.156) MAX

0.2 (0.008)

± 0.05 (0.002)

9.55 (0.376) ± 0.25 (0.010)

1.27 (0.050) ± 0.25 (0.010)

0.89 (0.035)
Radius TYP

6

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SRAM MONOLITHICS

WMS512K8-XXX

DEVICE TYPE SPEED PACKAGE SMD NO.

512K x 8 SRAM Monolithic 120ns 32 pin DIP (C) 5962-95613 01HYX
512K x 8 SRAM Monolithic 100ns 32 pin DIP (C) 5962-95613 02HYX
512K x 8 SRAM Monolithic 85ns 32 pin DIP (C) 5962-95613 03HYX
512K x 8 SRAM Monolithic 70ns 32 pin DIP (C) 5962-95613 04HYX

512K x 8 SRAM Monolithic 120ns 32 lead SOJ Evol (DE) 5962-95613 01HTX
512K x 8 SRAM Monolithic 100ns 32 lead SOJ Evol (DE) 5962-95613 02HTX
512K x 8 SRAM Monolithic 85ns 32 lead SOJ Evol (DE) 5962-95613 03HTX
512K x 8 SRAM Monolithic 70ns 32 lead SOJ Evol (DE) 5962-95613 04HTX

ORDERING INFORMATION

LEAD FINISH:

Blank = Gold plated leads
A = Solder dip leads

SPECIAL PROCESSING:

E = Epitaxial Layer

DEVICE GRADE:

M= Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C

PACKAGE:

C = 32 Pin Ceramic 0.600" DIP (Package 300)
DE = 32 Lead Ceramic SOJ (Package 101) Evolutionary

ACCESS TIME (ns)

IMPROVEMENT MARK

L = Low Power Data Retention

ORGANIZATION, 512K x 8

SRAM

MONOLITHIC

WHITE MICROELECTRONICS

W M S 512K 8 L - XXX X X X X