Datasheet WMF128K8-90FFQ5A, WMF128K8-90FFQ5, WMF128K8-90FFM5A, WMF128K8-90FFM5, WMF128K8-70FEI5A Datasheet (White Electronic Designs)

1

White Electronic Designs Corporation • [phone] • www.whiteedc.com

HI-RELIABILITY PRODUCT

WMF128K8-XXX5

128Kx8 MONOLITHIC FLASH, SMD 5962-96690

FEATURES

■ Access Times of 50*, 60, 70, 90, 120, 150ns

■ Packaging

•32 lead, Hermetic Ceramic, 0.400" SOJ (Package 101)

•32 pin, Hermetic Ceramic, 0.600" DIP (Package 300)

• 32 lead, Flatpack (Package 220)

• 32 lead, Formed Flatpack (Package 221)

• 32 pin, Rectangular Ceramic Leadless Chip Carrier
(Package 601)

■ 100,000 Erase/Program Cycles Minimum

■ Sector Erase Architecture

• 8 equal size sectors of 16KBytes each

• Any combination of sectors can be concurrently
erased. Also supports full chip erase

PIN CONFIGURATION FOR WMF128K8-XXX5

A0-16 Address Inputs

I/O0-7 Data Input/Output

CS Chip Select

OE Output Enable

WE Write Enable

VCC +5.0V Power

VSS Ground

PIN DESCRIPTION

TOP VIEW

32 DIP
32 CSOJ
32 FLATPACK

1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16

32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17

NC
A16
A15
A12

A7
A6
A5
A4
A3
A2
A1

A0
I/O0
I/O1
I/O2

V

SS

V

CC

WE
NC
A14
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3

5
6
7
8
9
10
11
12
13

29
28
27
26
25
24
23
22
21

4321323130

14 15 16 17 18 19 20

A7
A6
A5
A4
A3
A2
A1
A0

I/O

0

I/O1

I/O2

V

SS

I/O3

I/O4

I/O5

I/O6

A14
A13
A8
A9
A11
OE
A10
CS
I/O7

A12

A15

A16NCVCCWE

NC

PIN CONFIGURATION FOR WMF128K8-XCLX5

TOP VIEW

32 CLCC

■ Organized as 128Kx8

■ Commercial, Industrial and Military Temperature Ranges

■ 5 Volt Programming. 5V ± 10% Supply.

■ Low Power CMOS

■ Embedded Erase and Program Algorithms

■ TTL Compatible Inputs and CMOS Outputs

■ Page Program Operation and Internal Program Control Time.

Note: For programming information refer to Flash Programming 1M5

Application Note.

* The access time of 50ns is available in Industrial and Commercial

temperature ranges only.

April 2001 Rev. 5

2

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WMF128K8-XXX5

ABSOLUTE MAXIMUM RATINGS (1)

NOTES:

1. Stresses above the absolute maximum rating may cause permanent damage
to the device. Extended operation at the maximum levels may degrade
performance and affect reliability.

2. Minimum DC voltage on input or I/O pins is -0.5V. During voltage transitions,
inputs may overshoot V

SS to -2.0 V for periods of up to 20ns. Maximum DC

voltage on output and I/O pins is V

CC + 0.5V. During voltage transitions,

outputs may overshoot to Vcc + 2.0 V for periods of up to 20ns.

3. Minimum DC input voltage on A

9 pin is -0.5V. During voltage transitions, A9 may

overshoot Vss to -2V for periods of up to 20ns. Maximum DC input voltage on A

9

is +13.5V which may overshoot to 14.0 V for periods up to 20ns.

DC CHARACTERISTICS - CMOS COMPATIBLE

(V

CC = 5.0V, VSS = 0V, TA = -55°C to +125°C)

Parameter Unit

Operating Temperature -55 to +125 °C

Supply Voltage Range (VCC) -2.0 to +7.0 V

Signal voltage range (any pin except A9) (2) -2.0 to +7.0 V
Storage Temperature Range -65 to +150 °C
Lead Temperature (soldering, 10 seconds) +300 °C

Data Retention Mil Temp 10 years

Endurance (write/erase cycles) Mil Temp 10,000 min. cycles

A

9 Voltage for sector protect (VID) (3) -2.0 to +14.0 V

Parameter Symbol Conditions Min Max Unit

Input Leakage Current ILI VCC = 5.5, VIN = GND to VCC 10 µA
Output Leakage Current ILO VCC = 5.5, VIN = GND to VCC 10 µA

VCC Active Current for Read (1) ICC1 CS = VIL, OE = VIH 35 mA

V

CC Active Current for Program ICC2 CS = VIL, OE = VIH 50 mA

or Erase (2)

VCC Standby Current ICC3 VCC = 5.5, CS = VIH, f = 5MHz 1.6 mA

Output Low Voltage VOL IOL = 8.0 mA, VCC = 4.5 0.45 V

Output High Voltage VOH1 IOH = -2.5 mA, VCC = 4.5 0.85 x VCC V
Output High Voltage VOH2 IOH = -100 µA, VCC = 4.5 VCC - 0.4 V
Low VCC Lock Out Voltage VLKO 3.2 V

CAPACITANCE

(TA = +25°C)

Parameter

Symbol

Conditions Max Unit

Address Input capacitance CAD

V

I/O

= 0 V, f = 1.0 MHz

15 pF

Output Enable capacitance COE

VIN = 0 V, f = 1.0 MHz

15 pF

Write Enable capacitance CWE

VIN = 0 V, f = 1.0 MHz

15 pF

Chip Select capacitance CCS

VIN = 0 V, f = 1.0 MHz

15 pF

Data I/O capacitance C

I/OVI/O

= 0 V, f = 1.0 MHz

15 pF

This parameter is guaranteed by design but not tested.

RECOMMENDED OPERATING CONDITIONS

Parameter Symbol Min Max Unit

Supply Voltage V

CC 4.5 5.5 V

Input High Voltage V

IH 2.0 VCC + 0.3 V

Input Low Voltage V

IL -0.5 +0.8 V

Operating Temp. (Mil.) T

A -55 +125 °C

Operating Temp. (Ind.) T

A -40 +85 °C

A

9 Voltage for Sector Protect VID 11.5 12.5 V

NOTES:

1. The I

CC current listed includes both the DC operating current and the frequency dependent component (at 5 MHz).

The frequency component typically is less than 2 mA/MHz, with OE at V

IH.

2. I

CC active while Embedded Algorithm (program or erase) is in progress.

3. DC test conditions: V

IL = 0.3V, VIH = VCC - 0.3V

AC TEST CIRCUIT

AC TEST CONDITIONS

I

Current Source

D.U.T.

C = 50 pf

eff

I

OL

V ≈ 1.5V
(Bipolar Supply)

Z

Current Source

OH

NOTES:

V

Z is programmable from -2V to +7V.

I

OL & IOH programmable from 0 to 16mA.

Tester Impedance Z

0 = 75 Ω.

V

Z is typically the midpoint of VOH and VOL.

I

OL & IOH

are adjusted to simulate a typical resistive load circuit.

ATE tester includes jig capacitance.

Parameter Typ Unit

Input Pulse Levels V

IL = 0, VIH = 3.0 V

Input Rise and Fall 5 ns

Input and Output Reference Level 1.5 V

Output Timing Reference Level 1.5 V

3

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WMF128K8-XXX5

AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, WE CONTROLLED

(V

CC = 5.0V, VSS = 0V, TA = -55°C to +125°C)

Parameter Symbol -50 -60 -70 -90 -120 -150 Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Write Cycle Time tAVAV t WC 50 60 70 90 120 150 ns

Chip Select Setup Time tELWL tCS 000000ns

Write Enable Pulse Width tWLWH tWP 25 30 35 45 50 50 ns

Address Setup Time tAVWL t AS 000000ns

Data Setup Time tDVWH tDS 25 30 30 45 50 50 ns

Data Hold Time tWHDX t DH 000000ns

Address Hold Time tWLAX tAH 40 45 45 45 50 50 ns

Chip Select Hold Time tWHEH t CH 000000ns

Write Enable Pulse Width High tWHWL tWPH 20 20 20 20 20 20 ns
Duration of Byte Programming Operation (min) tWHWH1 14 14 14 14 14 14 µs

Sector Erase Time tWHWH2 2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 sec

Read Recovery Time Before Write tGHWL 000000ns
VCC Setup Time tVCS 50 50 50 50 50 50 µs

Chip Programming Time 12.5 12.5 12.5 12.5 12.5 12.5 sec

Output Enable Setup Time tOES 000000ns

Output Enable Hold Time (1) t

OEH 10 10 10 10 10 10 ns

1. For Toggle and Data Polling.

Parameter Symbol -50 -60 -70 -90 -120 -150 Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Read Cycle Time tAVAV tRC 50 60 70 90 120 150 ns

Address Access Time tAVQV t ACC 50 60 70 90 120 150 ns

Chip Select Access Time tELQV tCE 50 60 70 90 120 150 ns

OE to Output Valid t GLQV tOE 25 30 35 40 50 55 ns

Chip Select to Output High Z (1) tEHQZ tDF 20 20 20 25 30 35 ns

OE High to Output High Z (1) tGHQZ tDF 20 20 20 25 30 35 ns

Output Hold from Address, CS or OE Change, t

AXQX t OH 00 000 0ns

whichever is first

1. Guaranteed by design, not tested.

AC CHARACTERISTICS – READ ONLY OPERATIONS

(V

CC = 5.0V, VSS = 0V, TA = -55°C to +125°C)

4

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AC CHARACTERISTICS – WRITE/ERASE/PROGRAM OPERATIONS, CS CONTROLLED

(V

CC = 5.0V, VSS = 0V, TA = -55°C to +125°C)

Parameter Symbol -50 -60 -70 -90 -120 -150 Unit

Min Max Min Max Min Max Min Max Min Max Min Max

Write Cycle Time tAVAV tWC 50 60 70 90 120 150 ns

WE Setup Time tWLEL tWS 000000ns

CS Pulse Width tELEH tCP 25 30 35 45 50 50 ns

Address Setup Time tAVEL tAS 000000ns

Data Setup Time tDVEH tDS 25 30 30 45 50 50 ns

Data Hold Time tEHDX tDH 000000ns

Address Hold Time tELAX tAH 40 45 45 45 50 50 ns

WE Hold from WE High tEHWH t WH 000000ns

CS Pulse Width High tEHEL tCPH 20 20 20 20 20 20 ns
Duration of Programming Operation tWHWH1 14 14 14 14 14 14 µs

Duration of Erase Operation tWHWH2 2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 2.2 60 sec

Read Recovery before Write tGHEL 000000ns

Chip Programming Time 12.5 12.5 12.5 12.5 12.5 12.5 sec

WMF128K8-XXX5

5

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AC WAVEFORMS FOR READ OPERATIONS

Addresses

CS

OE

WE

Outputs

High Z

Addresses Stable

t

OE

t

RC

Output Valid

t

CE

t

ACC

t

OH

High Z

t

DF

WMF128K8-XXX5

6

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WRITE/ERASE/PROGRAM OPERATION, WE CONTROLLED

NOTES:

1. PA is the address of the memory location
to be programmed.

2. PD is the data to be programmed at byte address.

3. I/O

7 is the output of the complement of the

data written to the device.

4. I/OOUT is the output of the data written to
the device.

5. Figure indicates last two bus cycles of four bus
cycle sequence.

Addresses

CS

OE

WE

Data

5.0 V

5555H PA PA

t

WC

tCS

PD

I/O7

I/OOUT

tAH

tWPH

tDH

tDS

Data Polling

tAS

tRC

tWP

A0H

tOE

tDF

tOH

tCE

tGHWL

tWHWH1

WMF128K8-XXX5

7

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AC WAVEFORMS CHIP/SECTOR ERASE OPERATIONS

NOTES:

1. SA is the sector address
for Sector Erase.

Addresses

CS

OE

WE

Data

V

CC

5555H 2AAAH 2AAAH SA5555H 5555H

t

WP

t

CS

t

VCS

10H/30H55H80H55H AAHAAH

t

AH

t

AS

t

GHWL

t

WPH

t

DH

t

DS

WMF128K8-XXX5

8

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AC WAVEFORMS FOR DATA POLLING DURING
EMBEDDED ALGORITHM OPERATIONS

CS

OE

WE

tOE

tOE

tCE

tCH

tOH

I/O7

I/O7 =

Valid Data

High Z

I/O0-6 = Invalid

I/O

0-7

Valid Data

t

DF

I/O7

I/O0-6

tOEH

tWHWH 1 or 2

Data

WMF128K8-XXX5

9

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WRITE/ERASE/PROGRAM OPERATION, CS CONTROLLED

NOTES:

1. PA represents the address of the memory location to be programmed.

2. PD represents the data to be programmed at byte address.

3. I/O

7 is the output of the complement of the data written to the device.

4. I/O

OUT is the output of the data written to the device.

5. Figure indicates the last two bus cycles of a four bus cycle sequence.

Addresses

WE

OE

CS

Data

5.0 V

5555H PA PA

t

WC

t

WS

PD

I/O

7

I/O

OUT

t

AH

t

CPH

t

CP

t

DH

t

DS

Data Polling

t

AS

t

GHEL

A0H

t

WHWH1

WMF128K8-XXX5

10

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ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

PACKAGE 101: 32 LEAD, CERAMIC SOJ

1.27 (0.050) TYP

21.1 (0.830) ± 0.25 (0.010)

PIN 1 IDENTIFIER

19.1 (0.750) TYP

11.3 (0.446)
± 0.2 (0.009)

3.96 (0.156) MAX

0.2 (0.008)

± 0.05 (0.002)

9.55 (0.376) ± 0.25 (0.010)

1.27 (0.050) ± 0.25 (0.010)

0.89 (0.035)
Radius TYP

PACKAGE 220: 32 LEAD, CERAMIC FLATPACK

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

10.41 (0.410)

± 0.13 (0.005)

2.60 (0.102) MAX

0.127 (0.005)
+ 0.05 (0.002)
–

0.025 (0.001)

PIN 1
IDENTIFIER

1.27 (0.050) TYP

19.05 (0.750) TYP

10.16 (0.400)
± 0.51 (0.020)

0.43 (0.017)
± 0.05 (0.002)

20.83 (0.820)
± 0.25 (0.010)

WMF128K8-XXX5

11

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PACKAGE 300: 32 PIN, CERAMIC DIP, SINGLE CAVITY SIDE BRAZED

2.5 (0.100)
TYP

1.27 (0.050)

± 0.1 (0.005)

0.46 (0.018)

± 0.05 (0.002)

0.99 (0.039)

± 0.51 (0.020)

3.2 (0.125) MIN

0.25 (0.010)

± 0.05 (0.002)

15.25 (0.600)

± 0.25 (0.010)

42.8 (1.686) MAX

5.13 (0.202) MAX

PIN 1 IDENTIFIER

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

PACKAGE 221: 32 LEAD, FORMED CERAMIC FLATPACK

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

10.41 (0.410)

± 0.13 (0.005)

1.27 (0.050) TYP

19.05 (0.750) TYP

1.52 (0.060) TYP

0.43 (0.017)
± 0.05 (0.002)

20.83 (0.820)
± 0.25 (0.010)

3.35 (0.132)
MAX

1.27 (0.050) TYP

0.15 (0.006)
TYP

0° / -4°

0.63 (0.025) TYP

+

+

13.47 (0.530)

± 0.13 (0.005)

WMF128K8-XXX5

12

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7.62 (0.300) TYP

5.08

(0.200)

TYP

3.81
(0.150) TYP

10.16

(0.400)

TYP

0.38 (0.015) x 45°

PIN 1 IDENTIFIER

0.56 (0.022)

0.71 (0.028)

11.25 (0.443)

11.60 (0.457)

13.79 (0.543)

14.15 (0.557)

1.63 (0.064)

2.54 (0.100)

PIN 1

1.02 (0.040) x 45°
3 PLACES

32PinCLCCpkgdim.eps

ALL LINEAR DIMENSIONS ARE MILLIMETERS AND PARENTHETICALLY IN INCHES

PACKAGE 601: 32 PIN, RECTANGULAR CERAMIC LEADLESS CHIP CARRIER

WMF128K8-XXX5

13

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LEAD FINISH:

Blank = Gold plated leads
A = Solder dip leads

V

PP PROGRAMMING VOLTAGE

5 = 5V

DEVICE GRADE:

Q = MIL-STD-883 Compliant
M = Military Screened -55°C to +125°C
I = Industrial -40°C to +85°C
C = Commercial 0°C to +70°C

PACKAGE TYPE:

DE = 32 Lead Ceramic SOJ (Package 101)
C = 32 Pin Ceramic DIP (Package 300)
FE = 32 Lead Ceramic Flatpack (Package 220)
FF = 32 Lead Formed Ceramic Flatpack (Package 221)
CL = 32 Pin rectangular Ceramic Leadless Chip Carrier (Package 601)

ACCESS TIME (ns)

ORGANIZATION, 128K x 8

Flash

MONOLITHIC

WHITE ELECTRONIC DESIGNS CORP.

ORDERING INFORMATION

W M F 128K8 - XXX X X 5 X

WMF128K8-XXX5

14

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DEVICE TYPE SECTOR SIZE SPEED PACKAGE SMD NO.

128K x 8 Flash Monolithic 16KByte 150ns 32 pin DIP (C) 5962-96690 01HYX

128K x 8 Flash Monolithic 16KByte 120ns 32 pin DIP (C) 5962-96690 02HYX

128K x 8 Flash Monolithic 16KByte 90ns 32 pin DIP (C) 5962-96690 03HYX

128K x 8 Flash Monolithic 16KByte 70ns 32 pin DIP (C) 5962-96690 04HYX

128K x 8 Flash Monolithic 16KByte 60ns 32 pin DIP (C) 5962-96690 05HYX

128K x 8 Flash Monolithic 16KByte 150ns 32 lead SOJ (DE) 5962-96690 01HXX

128K x 8 Flash Monolithic 16KByte 120ns 32 lead SOJ (DE) 5962-96690 02HXX

128K x 8 Flash Monolithic 16KByte 90ns 32 lead SOJ (DE) 5962-96690 03HXX

128K x 8 Flash Monolithic 16KByte 70ns 32 lead SOJ (DE) 5962-96690 04HXX

128K x 8 Flash Monolithic 16KByte 60ns 32 lead SOJ (DE) 5962-96690 05HXX

128K x 8 Flash Monolithic 16KByte 150ns 32 lead Flatpack (FE) 5962-96690 01HTX

128K x 8 Flash Monolithic 16KByte 120ns 32 lead Flatpack (FE) 5962-96690 02HTX

128K x 8 Flash Monolithic 16KByte 90ns 32 lead Flatpack (FE) 5962-96690 03HTX

128K x 8 Flash Monolithic 16KByte 70ns 32 lead Flatpack (FE) 5962-96690 04HTX

128K x 8 Flash Monolithic 16KByte 60ns 32 lead Flatpack (FE) 5962-96690 05HTX

128K x 8 Flash Monolithic 16KByte 150ns 32 lead Formed Flatpack (FF) 5962-96690 01HUX

128K x 8 Flash Monolithic 16KByte 120ns 32 lead Formed Flatpack (FF) 5962-96690 02HUX

128K x 8 Flash Monolithic 16KByte 90ns 32 lead Formed Flatpack (FF) 5962-96690 03HUX

128K x 8 Flash Monolithic 16KByte 70ns 32 lead Formed Flatpack (FF) 5962-96690 04HUX

128K x 8 Flash Monolithic 16KByte 60ns 32 lead Formed Flatpack (FF) 5962-96690 05HUX

WMF128K8-XXX5