Datasheet W91824N, W91824AN, W91822N, W91822AN, W91820N Datasheet (Winbond Electronics)

W91820N SERIES

13-MEMORY TONE/PULSE DIALER WITH

HANDFREE, LOCK AND HOLD FUNCTIONS

GENERAL DESCRIPTION

The W91820N is a series of tone/pulse switchable telephone dialers with 13 memory, keytone, hold,
lock, and handfree dialing control features. These chips are fabricated using Winbond's high­performance CMOS technology and thus offer good performance in low-voltage, low-power
operations.

FEATURES

• Tone/pulse switchable dialer

• Two by 32 digits redial and save memory

• Three by 32 digits one-touch direct repertory memory

• Ten by 32 digits two-touch indirect repertory memory

• Pulse-to-tone (*/T) keypad for long distance call operation

• Chain dialing

• Uses 5 × 5 keyboard

• Easy operation with redial, flash, pause, and */T keypads

• Pause, P→T (pulse-to-tone) can be stored as a digit in memory

• Dialing rate:10 ppS or 20 ppS by mask option

• Minimum tone output duration: 93 mS (unless W91824N/AN is 87 mS)

• Minimum intertone pause: 93 mS (unless W91824N/AN is 87mS)

• Pause time: 3.6 sec. (unless W91824N/AN is 2.0 sec.)

• Flash break time (73 mS, 100 mS, 300 mS, or 600 mS) selectable by keypad; pause time is 1.0 S

• Make/break ratio (2:3 or 1:2) selectable by MODE pin

• Mute key for speech network mute

• No key will be accepted except the "HOLD" key when in the Hold mode

• Key tone output for valid keypad entry recognition

• On-chip power-on reset

• Uses 3.579545 MHz crystal or ceramic resonator

• 20, or 22-pin dual-in-line plastic package

• The different dialers in the W91820N series are shown in the following table:

TYPE NO. PULSE (ppS) LOCK KEY TONE HANDFREE DIALING PACKAGE (PINS)

W91820N/824N 10 ­W91820AN/824AN 10 ­W91820LN 10
W91820ALN 10
W91822N 20 ­W91822AN 20 -

Note: W91824N/824AN for French only.

√

√ √
√
√

- - 20

-

√

√ √

- 20
22

√

- 20

22

22

Publication Release Date: May 1999

- 1 - Revision A2

PIN CONFIGURATIONS

W91820N SERIES

C2

C4

KT

H/P MUTE

V

XT
XT

T/P MUTE

LOCK

H/P MUTE

V

XT
XT

T/P MUTE

1
2

3

C3

4
5

6

SS

7
8

9

10

W91820N/822N
/824N

C1

1

C2

2

C3

3

C4

4
5

6
7

SS

8
9

10 11

W91820LN

1

20

R4C1

19

R3
R2

18

R1

17
16

N.C.
V

15
14

13
12

11

DD

MODE
DTMF

DP
HKS

20

R4

19

R3
R2

18

R1

17

N.C.

16

V

DD

15

MODE

14

DTMF

13
12

DP

HKS

H/P MUTE

T/P MUTE

LOCK

H/P MUTE

V

T/P MUTE

HFI

2

C2

3

C3

4

C4

5

KT

6

V

SS

7

XT

8
9

XT

10

HFI

11

W91820AN/822AN
/824AN

1

C1

2

C2

3

C3

4

C4

5
6

SS

7

XT

8

9
10
11

R4C1

22

R3

21
20

R2

19

R1
N.C.

18

V

DD

17

MODE

16

DTMF

15
14

DP

13

HKS

HFO

12

22

R4

21

R3

20

R2

19

R1

18

N.C.
V

17
16

15
14

13
12

DD

MODE
DTMF

DPXT
HKS

HFO

W91820ALN

- 2 -

W91820N SERIES

XT

MUTE

MUTE

HKS

HKS

HKS

HKS

HKS

PIN DESCRIPTION

SYMBOL 20-PIN 22-PIN I/O FUNCTION

Column­Row
Inputs

XT 8 8 I A built-in inverter together with an inexpensive 3.579545 MHz

T/P

N.C. 16 18 - No connect
MODE 14 16 I Connecting the mode pin to VSS places the dialer in tone

1−4

&

17−20

9 9 O Crystal oscillator output pin.

10 10 O

1−4

&

19−22

I

The keyboard input is compatible with a standard 5 × 5
keyboard, an inexpensive single contact (Form A) keyboard,
and electronic input.

In normal operation, any single button can be pushed to
produce dual tone, pulses, or functions. Activation of two or
more buttons will result in no response except for a single
tone.

crystal supplies the oscillator. The oscillator stops when there
is no keypad input. The crystal frequency deviation is 0.02%.

The T/P
drain output.

The output transistor turns on with a low level during a dialing
sequence (both pulse and tone mode). Otherwise, it is off.

mode.
Connecting the mode pin to VDD places the dialer in pulse

mode with an M/B ratio of 40:60.
Leaving the mode pin floating places the dialer in pulse mode

with an M/B ratio of 33.3:66.7.

is a conventional CMOS N-channel open

KT

(W91820N/8
20AN/822N/
824N/822AN
/824AN only)

11 13 I

5 5 O The key tone output is a conventional CMOS inverter. The

The
handset is on-hook or off-hook.

In on-hook state,
operation.

In off-hook state,
operation.

key tone is generated when any valid key is pressed; the KT
pin generates a 1.2 KHz square wave at 35 mS. When no key
is pressed, the KT pin remains in low state.

(hook switch) input is used to sense whether the

= 1: chip is in sleeping mode, no

= 0: chip is enabled for normal

pin is pulled to VDD by internal resistor.

Publication Release Date: May 1999

- 3 - Revision A2

W91820N SERIES

LOCK

LOCK

DP

Pin Description, continued

SYMBOL 20-PIN 22-PIN I/O FUNCTION

5 5 I The function of this terminal is to prevent "0" dialing and "9"

(W91820LN/
820ALN only)

dialing under PABX system long distance call control. When
the first key input after reset is 0 or 9, all key inputs,
including the 0 or 9 key, become invalid and the chip
generates no output. The telephone is reinitialized by a
reset.

The function of the

LOCK PIN

V

DD

Floating

V

SS

"0", "9" dialing inhibited

Normal dialing Mode

"0" dialing inhibited

pin is shown below:

FUNCTION

H/P MUTE 6 6 I The H/P MUTE is a conventional inverter output. During

pulse dialing, flash break or hold period, this output is active
high; otherwise, it remains in low state.

12 14 O N-channel open drain dialing pulse output.

Flash key will cause DP to be active in either tone mode or
pulse mode.

In lock mode, the DP remains low for 300 mS durint off­hook delay time.

The timing diagram for pulse mode is shown in Figure 1(a,
b).

DTMF 13 15 O During pulse dialing, this pin remains in a low state

regardless of the keypad input. In tone mode, it will output a
dual or single tone.

A detailed timing diagram for tone mode is shown in Figure
2(a, b).

OUTPUT FREQUENCY

R1
R2
R3
R4
C1
C2
C3

Specified

697
770
852

941
1209
1336
1477

Actual

699
766
848

948
1216
1332
1472

Error %
+0.28

-0.52

-0.47
+0.74
+0.57

-0.30

-0.34

VDD, VSS 15, 7 17, 7 I Power input pins for the dialer chip. VDD is the power and

VSS is the ground.

- 4 -

W91820N SERIES

HFI

HFI

HFI

Pin Description, continued

SYMBOL 20-PIN 22-PIN I/O FUNCTION

, HFO

- 11, 12 I, O Handfree control pins.

BLOCK DIAGRAM

A low pulse on the

input pin toggles the handfree
control state. The status of the handfree control state is
listed in the following table:

INPUT
HFI

HFI
HFI

Off Hook
On Hook
On Hook

NEXT STATE

HFO

DIALING
High
Low
Low
Low
Low
High

Yes

No
Yes
Yes

No
Yes

CURRENT STATE

HOOK SW.

­On Hook
Off Hook
On Hook
Off Hook
Off Hook

The

pin is pulled to VDD by an internal resistor.

HFO
Low
High
High

­Low
High

A detailed timing diagram is shown in Figure 3.

XT XT

ROW

(R1 ~ R4, Vx/R5)

COLUMN

(C1 ~ C4, Vss)

DTMF

KEYBOARD

INTERFACE

D/A

CONVERTER

LOCATION

LATCH

ROW & COLUMN

PROGRAMMABLE

COUNTER

- 5 - Revision A2

HKS

HFI

READ/WRITE

COUNTER

RAM

DATA LATCH

SYSTEM CLOCK

& DECODER

GENERATOR

CONTROL

LOGIC

PULSE

CONTROL

LOGIC

LOCK

MODE

T/P MUTE

KT

DP

HFO
H/P MUTE

Publication Release Date: May 1999

W91820N SERIES

HFI

HFI

HFI

FUNCTIONAL DESCRIPTION

Keyboard Operation

C1 C2 C3 C4 VSS

1 2 3 S EM1 R1
4 5 6 F4 EM2 R2
7 8 9 A EM3 R3

*/T

F1 F2 F3 H Vx/R5

• S: Store function key

• A: Indirect repertory memory dialing function key

• H: Hold function key

• R/P: Redial and pause function key

• */T: * in tone mode and P→T key in pulse mode

• SAVE: Save function key for one-touch 32-digit memory

• EM1, ..., EM3: Emergency one-touch memory key

• F1, ..., F4: Flash function keys: F1 = 600 mS, F2 = 300 mS, F3 = 73 mS, F4 = 100 mS; all flash

pause time is 1.0 mS

0 # R/P SAVE R4

Note: D1, ..., Dn, D1`, ..., Dn`, */T, #, Mn: EM1, ..., EM3, Ln: 0−9

Normal Dialing

OFF HOOK (or ON HOOK &

1. D1, D2, …, Dn will be dialed out.

2. Dialing length is unlimited, but redial is inhibited if length oversteps 32 digits in normal dialing.

), D1 , D2

, …,

Dn

Redialing Dialing

OFF HOOK (or ON HOOK &

Come ON HOOK , OFF HOOK (or ON HOOK &

The R/P key can execute redial function only as first key-in after off-hook. Otherwise, it will invoke
the pause function.

• The below cases are selected by mask option for W91824N/AN (French version) only.
In tone mode:

D1, D2, D3,*(or #), D4, D5, D6
The chip will only output D1, D2, D3 and ignore *(or #), D4, D5, D6.

In pulse mode:
D1, D2, D3, */T, D4, D5, D6

, D1 , D2

, …,

Dn , BUSY

), R/P

- 6 -

W91820N SERIES

HFI

HFI

HFI

HFI

HFI

HFI

The chip will only output D1,D2,D3 and do not transfer to tone mode. In pulse mode, the # sign

does not effect.

Number Store

1. OFF HOOK (or ON HOOK &
EMn (or A , Ln or SAVE )

a. The dialing out of D1 to Dn must first be finished before the S key is pressed.
b. D1, D2, …, Dn will be stored in memory location Mn or saved and then dialed out.

2. OFF HOOK (or ON HOOK &
EMn (or A , Ln or SAVE )

a. D1, D2, …, Dn will be stored in memory location, Mn (or saved), but will not be dialed out.

b. R/P and */T keys can be stored as a digit in memory, but the R/P key cannot be the

first digit. In store mode, R/P is the pause function key.

c. The store mode is released after the store function is executed or when the state of the hook

switch changes or the flash function is executed.

), D1 , D2 , ..., Dn , S , S ,

), S , D1 , D2 , ..., Dn , S ,

Save

OFF HOOK (or ON HOOK &

a. D1, D2, ..., Dn will be dialed out.

), D1 , D2 , ..., Dn , Save

b. If the dialing of D1 to Dn is finished, pressing SAVE will duplicate D1 to Dn to the save

memory.

OFF HOOK (or ON HOOK &
come on OFF HOOK (or ON HOOK &
c. D1 to Dn will be dialed out after the SAVE key is pressed.

),

), SAVE

Repertory Dialing Procedure

One-touch direct repertory dialing:

OFF HOOK (or ON HOOK &

), Mn (or SAVE )

Publication Release Date: May 1999

- 7 - Revision A2

Two-touch direct repertory dialing:

HFI

HFI

HFI

HFI

W91820N SERIES

OFF HOOK (or ON HOOK &

), A , Ln

Access Pause

OFF HOOK (or ON HOOK &

1. The pause function can be stored in memory.

2. The pause function is executed with normal dialing, redialing or memory dialing.

3. The pause function timing diagram is shown in Figure 6.

), D1 , D2 , R/P , D3 , ..., Dn

Pulse-to-tone (*/T)

OFF HOOK (or ON HOOK &
, D2' , ..., Dn'

1. If the mode switch is set in pulse mode, then it will perform
case a: D1, D2, ---, Dn, Pause (3.6 sec), D1', D2', ---, Dn'

(Pulse) (Tone)

case b: (only for French version)

D1, D2, ---, Dn, * , D1', D2', ---, Dn'

(Pulse) (Tone)

), D1 , D2 , ..., Dn , */T , D1' ,

2. If the mode switch is set in tone mode, then the output signal will be:
D1, D2, ---, Dn, * , D1', D2', ---, Dn'

(Tone)

3. It can be reset to pulse mode only if ON HOOK is active. This is because it remains in tone mode
when the digits have been dialed out.

4. The function timing diagram is shown in Figure 7.

Flash

OFF HOOK (or ON HOOK &

1. Fn = F1−F4. If
(F2), 73 mS (F3) or 100 mS (F4) and a pause time of 1.0 second, after which the next digit is dialed

out.

2. The flash key has the first priority of the keyboard function only one flash key will be released to

the user.

3. When the flash key is key in, the system will return to the initial state after the flash pause time is

finished.

4. The flash function timing diagram is shown in Figure 8.

Fn is pressed, the dialer will execute a flash break time of 600 mS (F1), 300 mS

), Fn

- 8 -

Cascaded Dialing

HFI

W91820N SERIES

OFF HOOK (or ON HOOK &

1. Normal Dialing + Repertory Dialing + Normal Dialing
(1st sequence) (2nd sequence)

2. Repertory Dialing + Normal Dialing + Repertory Dialing
(1st sequence) (2nd sequence)

3. Redialing + Normal Dialing + Repertory Dialing
(1st sequence) (2nd sequence)

Redialing is valid only for the first key-in.
The second sequence should not be operated until the first sequence is dialed out completely.

)

ABSOLUTE MAXIMUM RATING

PARAMETER SYMBOL RATING UNIT

DC Supply Voltage

VDD−VSS

VIL VSS -0.3 V

-0.3 to +7.0 V

Input/Output Voltage VIH VDD +0.3 V

VOL VSS -0.3 V

VOH VDD +0.3 V
Power Dissipation PD 120 mW
Operation Temperature TOPR -20 to +70
Storage Temperature TSTG -55 to +150

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability

of the device.

Publication Release Date: May 1999

- 9 - Revision A2

°C
°C

W91820N SERIES

HKS

HKS

DP

DC CHARACTERISTICS

(VDD−VSS = 2.5V, Fosc. = 3.58 MHz, TA = 25° C, all outputs unloaded)

PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT

Operating Voltage VDD - 2.0 - 5.5 V
Operating Current IOP Tone - 0.4 0.6 mA

Pulse - 0.2 0.4 mA

Standby Current ISB

Memory Retention Current IMR
Tone Output Voltage VTO

Pre-emphasis
DTMF Distortion THD
DTMF Output DC Level VTDC
DTMF Output Sink Current ITL VTO = 0.5V 0.2 - - mA

Output Sink Current

T/P MUTE Output Sink
Current

KT Drive/Sink Current IKTH VKTH = 2.0V 0.5 - - mA

HFO Drive/Sink Current IHFH VHFH = 2.0V 0.5 - - mA

H/P MUTE IHPH VHPH = 2.0V 0.5 - - mA
Drive/Sink Current IHPL VHPL = 0.5V 0.5 - - mA

IPL VPO = 0.5V 0.5 - - mA
IML VMO = 0.5V 0.5 - - mA

IKTL VKTL = 0.5V 0.5 - - mA

IHFL VHFL = 0.5V 0.5 - - mA

= 0, No load &

No key entry

= 1, VDD = 1.0V

Row group, RL = 5 KΩ
Col/Row, VDD = 2.0−5.5V
RL = 5 KΩ, VDD = 2.0−5.5V
RL = 5 KΩ, VDD = 2.0−5.5V

- - 15

- - 1

130 150 170 mVrms

1 2 3 dB

- -30 -23 dB

1.0 - 3.0 V

µA

µA

Keypad Input Drive Current IKD VI = 0V 4 - -

HKS Pull High Resister
Keypad Input Sink Current IKS VI = 2.5V 200 400 ­Keypad Resistance - - 5.0

RHKS 300 500 -

- 10 -

µA

KΩ

µA

KΩ

W91820N SERIES

AC CHARACTERISTICS

PARAMETER SYM. CONDITIONS MIN. TYP. MAX. UNIT

Key-in Debounce TKID - - 20 - mS
Key Release Debounce TKRD - - 20 - mS
On-hook Debounce TOHD Lock Mode - 20 - mS

Unlock Mode - 150 - mS

Pre-digit Pause1 TPDP1 Mode Pin = VDD - 40 - mS

10 ppS Mode Pin = Floating - 33.3 - mS

Pre-digit Pause2 TPDP2 Mode Pin = VDD - 20 - mS

20 ppS Mode Pin = Floating - 16.7 - mS
Inter Digit Pause
(Auto Dialing)

Interdigit Pause TIDP 10 ppS - 800 - mS
(Auto dialing) 20 ppS - 500 - mS
Make/Break Ratio M:B Mode Pin = VDD - 40:60 - %

Tone Output Duration TTD - - 93 - mS
Intertone Pause TITP - - 93 - mS
Flash Break Time TFB F1 - 600 - mS

Flash Pause Time TFP - - 1.0 - S
Pause Time TP - - 3.6 - S

Key Tone Frequency FKT - - 1.2 - KHz
Key Tone Duration TKTD - - 35 - mS
One-key Redialing

Pause Time
One-key Redialing

Break Time
First Key-in Delay TFKD Lock only - 300 - mS

Notes:

1. Crystal parameters suggested for proper operation are Rs < 100 Ω, Lm = 96 mH, Cm = 0.02 pF, Cn = 5 pF, Cl = 18 pF,
Fosc. = 3.579545 MHz ±0.02%.

2. Crystal oscillator accuracy directly affects these times.

TIDP 10 ppS

(W91820N/W91820AN/820LN
/820ALN/824N/824AN only)

20 ppS

(W91822N/822AN only)

- 800 - mS

- 500 - mS

Mode Pin = Floating - 33.3:66.7 - %

F2 - 300 ­F3 - 73 ­F4 - 100 -

(W91824N/AN only)

- 2.0 - S

TRP - - 600 - mS

TRB - - 2.2 - S

Publication Release Date: May 1999

- 11 - Revision A2

TIMING WAVEFORMS

KT

HKS

W91820N SERIES

KEY IN

T/P MUTE

H/P MUTE

DTMF

OSC.

HKS

KEY IN

DP

T/P MUTE

(long mute)

4 2

T

DP

KID

B

T

PDP

M

M

IDP

B

T

IDP

T

LOW

OSC.

Figure 1(a). Pulse Mode Tming Diagram (Normal dialing without lock function)

300 mS

4 2

T

FKD

M

B

T

IDP

M

B

T

IDP

2

T

KID

T

T

IDP

PDP

OSC.

2

T

KID

T

IDP

T

PDP

H/P MUTE

DTMF

OSC.

LOW

OSC.

Figure 1(b). Pulse Mode Timing Diagram (Normal dialing with lock function)

- 12 -

OSC.

Timing Waveforms, continued

HKS

W91820N SERIES

KEY IN

DP

T/P MUTE

(long mute)

H/P MUTE

KT

DTMF

OSC.

HKS

R/P

M

B

T

PDP

M

IDP

B

T

T

IDP

LOW

OSC.

ON HOOK

Figure 1(c). Pulse Mode Timing Diagram (Auto dialing without lock)

300 mS

T

PDP

T

IDP

KEY IN

DP

T/P MUTE

(long mute)

H/P MUTE

DTMF

OSC.

R/P

M

T

FKD

B

T

IDP

T

PDP

T

IDP

LOW

OSC.

Figure 1(d).Pulse Mode Timing Diagram (Auto dialing with lock function)

Publication Release Date: May 1999

- 13 - Revision A2

Timing Waveforms, continued

HKS

W91820N SERIES

KEY IN

DTMF

T/P MUTE

H/P MUTE

KT

DTMF

OSC.

HKS

KEY IN

DTMF

T/P MUTE

H/P MUTE

3 2 6 5

T

KID

T

TD

T

KRD

T

ITP

T

KRD

T

T

ITP

LOW

HIGH

OSC. OSC.

Figure 2(a). Tone Mode Timing Diagram

300 mS

3 2 6 5

T

KRD

T

FKD

T

KRD

T

TD

T

ITP

T

KID

T

ITP

LOW

KID

T

KRD

T

ITP

T

KRD

T

ITP

DP

OSC.

HIGH

OSC.

OSC.

Figure 2(b). Tone Mode Timing Diagram (Normal dialing with lock function)

- 14 -

Timing Waveforms, continued

HKS

KEY IN

DTMF

T/P MUTE

R/P

T

T

TD

KID

T T < T

T

ITP

W91820N SERIES

OHD

T

ITP

H/P MUTE

KT

DP

OSC.

HKS

KEY IN

DTMF

T/P MUTE

H/P MUTE

LOW

HIGH

OSC.

ON HOOK

Figure 2(c). Tone Mode Timing Diagram (Auto dialing without lock function)

300 mS

T

T < T

OHD

R/P

T

TD

T

FKD

T

KID

LOW

T

ITP

T

ITP

DP

OSC.

HIGH

OSC.

Figure 2(d). Tone Mode Timing Diagram (Auto dialing with lock function)

Publication Release Date: May 1999

- 15 - Revision A2

Timing Waveforms, continued

KT

W91820N SERIES

HKS

KEY IN

DTMF

T/P MUTE

H/P MUTE

DP

OSC.

T

T > T

OHD

R/P

T

KID

T

TD

OSC.

ON HOOK

T

ITP

LOW

HIGH

(return to initial state)

Figure 2(c). Tone Mode Timing Diagram with On-hook Debounce (Auto dialing)

HKS

HFI

H KEY

HFO

T/P MUTE

H/P MUTE

CHIP ENABLE

OFF HOOK

Note: The H KEY can not be enabled during chip dissable.

ON HOOK

HIGH

LOW

Figure 3(a)

- 16 -

Timing Waveforms, continued

W91820N SERIES

HKS

HFI

H KEY

HFO

T/P MUTE

H/P MUTE

CHIP ENABLE

OFF HOOK

HIGH

Figure 3(b)

Note: The H KEY and HFI inputs will toggle the HFO signal. The first time HFI or H KEY are activated, the HFO signal will go

high and the previous active input will be neglected.

ON HOOK

HKS

HFI

H KEY

HFO

T/P MUTE

H/P MUTE

CHIP ENABLE

HIGH

Figure 3(c)

Note: The HKS signal change of state from high to low will initialize both the HFO and H/P MUTE signals.

Publication Release Date: May 1999

- 17 - Revision A2

Timing Waveforms, continued

W91820N SERIES

HKS

KEY IN

T/P MUTE

H/P MUTE

DTMF

OSC.

CHIP ENABLE

HKS

DP

ON HOOK

T

T<T

4

T

KID

T

FKD

OHD

M

B

T

PDP

LOW

OSC.

T

IDP

Figure 4. Lock Function Timing Diagram

LOW

T

OSC.

OFD

T

OHD

KEY IN

DP

T/P MUTE

H/P MUTE

KT

DTMF

OSC.

OKR

T

RB

T

KID

T

RP

M

B

T

PDP

T

IDP

LOW

OSC

Figure 5. Pulse Mode One-key Redialing Timing Diagram

- 18 -

T

PDP

T

IDP

Timing Waveforms, continued

KT

KT

HKS

W91820N SERIES

KEY IN

T/P MUTE

H/P MUTE

DTMF

HKS

KEY IN

DP

T/P MUTE

DTMF

H/P MUTE

DP

OSC.

4 2

T

KID

B

T

PDP

M

T

IDP

LOW

OSC

R/P 2

M

B

T

IDP

Figure 6. Pause Function Timing Diagram

4 2

T

KID

B

T

PDP

M

T

IDP

*/T 8

M

B

T

IDP

T

IDP

T

PDP

T

P

T

P

T

ITP

OSC.

OSC.

Figure 7(a). Pulse to Tone Function Timing Diagram

Publication Release Date: May 1999

- 19 - Revision A2

Timing Waveforms, continued

KT

HKS

KEY IN

DP

T/P MUTE

H/P MUTE

4 2

T

KID

B

T

PDP

W91820N SERIES

*/T 8

M

M

IDP

B

T

IDP

T

DTMF

OSC.

HKS

KEY IN

DP

T/P MUTE

H/P MUTE

KT

* 8

T

ITP

OSCILLATION

Figure 7(b). Pulse to tone function timing diagram (only for French version)

R/P

M

B

T

PDP

M

IDP

B

T

IDP

T

T

ITP

DTMF

OSC.

ON HOOK

LOW

OSC

Figure 7(c). Pulse mode auto-redialing timing diagram continue Figure 6(b). (only for French version)

- 20 -

Timing Waveforms, continued

KT

HKS

W91820N SERIES

KEY IN

DTMF

T/P MUTE

H/ P MUTE

R/P

T

T

TD

KID

4

T

ITP

2

LOW

KT

DP

OSC.

OSC

ON HOOK

HIGH

Figure 7(d). Tone mode auto-redialing timing diagram continue Figure 6(b). (only for French version)

HKS

KEY IN

DP

Fn

T

KID

T

FB

LOW

T/P MUTE

H/P MUTE

DTMF

OSC.

LOW

T

FP

OSC.

Figure 8. Flash Operation Timing Diagram

- 21 - Revision A2

Publication Release Date: May 1999

W91820N SERIES

Headquarters

No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: [phone]
FAX: [phone]
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006

Winbond Electronics (H.K.) Ltd.

Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: [phone]
FAX: [phone]

Taipei Office

11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: [phone]
FAX: [phone]

Note: All data and specifications are subject to change without notice.

- 22 -

Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.

2727 N. First Street, San Jose,
CA 95134, U.S.A.
TEL: [phone]

FAX: [phone]