Page 1
W83783S
Winbond H/W
Monitoring IC
Page 2
W83783S Data Sheet Revision History
Pages Dates Version Version
1
2
3
4
5
6
7
8
9
10
n.a. n.a. All the version before 0.50 are for internal use.
n.a. 98/7 0.5 n.a. First publication.
P.36 99/4 0.55 A1 Add the content of Diode Selection Register Index
P.38 99/4 0.55 A1 Add the content of 7.25 Fan Divisor Register and
Main Contents
on Web
59h( Bank0)
rename to VBAT Monitor Control Register Index
5Dh( Bank0)
Please note that all data and specifications are subject to change without notice. All
the trade marks of products and companies mentioned in this data sheet belong to
their respective owners.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or
systems where malfunction of these products can reasonably be expected to result
in personal injury. Winbond customers using or selling these products for use in
such applications do so at their own risk and agree to fully indemnify Winbond for
any damages resulting from such improper use or sales.
Page 3
W83783S
Preliminary
TABLE OF CONTENTS
1. GENERAL DESCRIPTION.......................................................................................................................1
2. FEATURES.....................................................................................................Error! Bookmark not defined.
2.1 Monitoring Items...................................................................................................................................2
2.2 Actions Enabling ...................................................................................................................................2
2.3 General..................................................................................................................................................2
2.4 Package ................................................................................................................................................. 2
3. KEY SPECIFICATIONS............................................................................................................................3
4. PIN CONFIGURATION .............................................................................................................................3
5. PIN DESCRIPTION....................................................................................................................................4
6. FUNCTIONAL DESCRIPTION.................................................................................................................6
6.1 General Description............................................................................................................................... 6
6.2 Access Interface.....................................................................................................................................6
6.2.1 The first serial bus access timing are shown as follow:.....................................................................6
6.2.2 The serial bus timing of the temperature 2 and 3 is shown as follow:................................................ 7
6.3 Analog Inputs......................................................................................................................................10
6.3.1 Monitor over 4.096V voltage:.........................................................................................................11
6.3.2 Monitor negative voltage:..............................................................................................................12
6.3.3 Monitor temperature from thermistor: ............................................................................................13
6.3.4 Monitor temperature from Pentium IITM thermal diode or bipolar transistor 2N3904 ..................... 13
6.4 FAN Speed Count and FAN Speed Control..........................................................................................14
6.4.1 Fan speed count.............................................................................................................................14
6.4.2 Fan speed control...........................................................................................................................15
6.5 Temperature Measurement Machine....................................................................................................16
6.5.1 The W83783S temperature sensor 2 SMI# interrupt has two modes:...............................................17
6.5.2 The W83783S temperature sensor 1 SMI# interrupt has three modes ..............................................18
6.5.3 The W83783S temperature sensor 1 Over-Temperature (OVT#) has three modes............................19
6.6 Voltage and Fan SMI# mode :..............................................................................................................20
6.6.1 Voltage SMI# mode :......................................................................................................................20
6.6.2 Fan SMI# mode :............................................................................................................................20
Publication Release Date: April 1999
- I - Version
0.55
Page 4
W83783S
Preliminary
7. REGISTERS AND RAM .......................................................................................................................... 22
7.1 Configuration Register Index 40h....................................................................................................22
7.2 Interrupt Status Register 1 Index 41h...............................................................................................23
7.3 Interrupt Status Register 2 Index 42h..............................................................................................23
7.4 SMI# Mask Register 1 Index 43h....................................................................................................24
7.5 SMI# Mask Register 2 Index 44h....................................................................................................25
7.6 Reserved Register Index 45h-- 46h ..................................................................................................25
7.7 VID/Fan Divisor Register Index 47h...............................................................................................26
7.8 Serial Bus Address Register Index 48h ............................................................................................26
7.9 Value RAM Index 20h- 3Fh or 60h - 7Fh........................................................................................27
7.10 Voltage ID (VID4) & Device ID - Index 49h......................................................................................29
7.11 Temperature 2 and Temperature 3 Serial Bus Address Register--Index 4Ah....................................... 29
7.12 Pin Control Register - Index 4Bh .......................................................................................................30
7.13 IRQ#/OVT# Property Select - Index 4Ch ........................................................................................... 31
7.14 FAN IN/OUT and BEEP/GPO# Control Register - Index 4Dh ........................................................... 32
7.15 Register 50h ~ 5Fh Bank Select - Index 4Eh......................................................................................33
7.16 Winbond Vendor ID - Index 4Fh........................................................................................................33
7.17 Winbond Test Register -- Index 50h - 55h (Bank 0)..........................................................................34
7.18 BEEP Control Register 1-- Index 56h (Bank 0)..................................................................................34
7.19 BEEP Control Register 2-- Index 57h (Bank 0)..................................................................................35
7.20 Chip ID -- Index 58h (Bank 0)...........................................................................................................36
7.21 Diode Selection Register -- Index 59h (Bank 0).................................................................................36
7.22 PWMOUT1 Control Register -- Index 5Ah (Bank 0)......................................................................36-A
7.23 PWMOUT2 Control Register -- Index 5Bh (Bank 0)..........................................................................37
7.24 PWMOUT1/2 Clock Select Register -- Index 5Ch (Bank 0)................................................................ 37
7.25 VBAT Monitor Control Register -- Index 5Dh (Bank 0).....................................................................38
7.26 Reserved Register -- Index 5Eh (Bank 0)............................................................................................39
7.27 Reserved Register -- Index 5Fh (Bank 0)........................................................................................... 39
7.28 Temperature Sensor 1 Temperature (High Byte) Register - Index 00h................................................39
7.29 Temperature Sensor 1 Temperature (Low Byte) Register - Index 00h................................................. 39
7.30 Temperature Sensor 1 Configuration Register - Index 01h .................................................................40
7.31 Temperature Sensor 1 Hysteresis (High Byte) Register - Index 02h....................................................41
Publication Release Date: April 1999
- II - Version
0.55
Page 5
W83783S
Preliminary
7.32 Temperature Sensor 1 Hysteresis (Low Byte) Register - Index 02h.....................................................41
7.33 Temperature Sensor 1 Over-temperature (High Byte) Register - Index 03h.........................................42
7.34 Temperature Sensor 1 Over-temperature (Low Byte) Register - Index 03h .........................................42
7.35 Reserved Register -- Index 50h--52h (BANK4).................................................................................43
7.36 BEEP Control Register 3 -- Index 53h (Bank 4).................................................................................43
7.37 Reserved Register -- Index 54h--58h (Bank 4)....................................................................................43
7.38 Real Time Hardware Status Register I -- Index 59h (Bank 4) .............................................................43
7.39 Real Time Hardware Status Register II -- Index 5Ah (Bank 4) ........................................................... 44
8. SPECIFICATIONS...................................................................................................................................46
8.1 Absolute Maximum Ratings .................................................................................................................46
8.2 DC Characteristics...............................................................................................................................46
8.3 AC Characteristics...............................................................................................................................48
8.3.1 Serial Bus Timing Diagram...........................................................................................................48
9. HOW TO READ THE TOP MARKING.................................................................................................49
10. PACKAGE DIMENTIONS.....................................................................................................................50
11. APPLICATION CIRCUIT OF WINBOND W83783S ...........................................................................52
Publication Release Date: April 1999
- III - Version
0.55
Page 6
W83783S
WINBOND H/W MONITORING IC
1. GENERAL DESCRIPTION
W83783S is an evolving version of W83782D --- Winbond's most popular hardware status
monitoring IC. The W83783S can be used to monitor several critical hardware parameters of the
system, including power supply voltages, fan speeds, and temperatures, which are very important for
a high-end computer system to work stable and properly. W83783S provides I2CTM serial bus
interface.
An 8-bit analog-to-digital converter (ADC) was built inside W83783S. The W83783S can monitor 6
analog voltage inputs, 3 fan tachometer inputs, and 3 remote temperature. The remote temperature
sensing can be performed by thermistors, or 2N3904 NPN-type transistors, or directly from Intel
Deschutes CPU thermal diode output. Also the W83783S provides: 2 PWM (pulse width modulation)
outputs for the fan speed control; beep tone output for warning; SMI#, OVT#, GPO# signals for
system protection events.
Through the application software or BIOS, the users can read all the monitored parameters of system
from time to time. And a pop-up warning can be also activated when the monitored item was out of
the proper/preset range. The application software could be Winbond's Hardware DoctorTM, or Intel
LDCM (LanDesk Client Management), or other management application software. Also the users can
set up the upper and lower limits (alarm thresholds) of these monitored parameters and to activate
one programmable and maskable interrupts. An optional beep tone could be used as warning signal
when the monitored parameters is out of the preset range.
TM
TM
Additionally, 5 VID inputs are provided to read the VID of CPU (i.e. PentiumTM II) if applicable. This is
to provide the Vcore voltage correction automatically. Also W83783S uniquely provides an optional
feature: early stage (before BIOS was loaded) beep warning. This is to detect if the fatal elements
present --- Vcore or +3.3V voltage fail, and the system can not be boomed up.
Publication Release Date: April 1999
- 1 - Revision 0.55
Page 7
W83783S
Preliminary
2. FEATURES
2.1 Monitoring Items
• 3 thermal inputs from remote thermistors or 2N3904 NPN-type transistors or PentiumTM II
(Deschutes) thermal diode output
• 6 voltage inputs
• --- typical for Vcore, +3.3V, +12V, -12V, +5V, -5V
• 3 fan speed monitoring inputs
• Case open detection input
• WATCHDOG comparison of all monitored values
• Programmable hysteresis and setting points (alarm thresholds) for all monitored items
2.2 Actions Enabling
• Beep tone warning
•
2 PWM (pulse width modulation) outputs for fan speed control (MUX optional)
--- Total up to 2 sets of fan speed monitoring and controlling
• Issue SMI#, OVT#, GPO# signals to activate system protection
• Warning signal pop-up in application software
2.3 General
• I2CTM serial bus interface
• 5 VID input pins for CUP Vcore identification (for PentiumTM II)
• Initial power fault beep (for +3.3V, Vcore)
• IntelTM LDCM (DMI driver 2.0) support
• AcerTM ADM (DMI driver 2.0) support
• Winbond hardware monitoring application software (Hardware Doctor
Windows 95/98 and Windows NT 4.0/5.0
• Input clock rate optional for 24, 48, 14.318 Mhz
• 5V Vcc operation
2.4 Package
• 24-pin SOP
TM
) support, for both
Publication Release Date: April 1999
- 2 - Revision 0.55
Page 8
3. KEY SPECIFICATIONS
• Voltage monitoring accuracy ±1% (Max)
• Monitoring Temperature Range and Accuracy
- 40°C to +120°C ± 3°C(Max)
• Supply Voltage 5V
• Operating Supply Current 5 mA typ.
• ADC Resolution 8 Bits
4. PIN CONFIGURATION
W83783S
Preliminary
VID4
FANIN1
FANIN2
FANIN3/PWMOUT1
OVT#
BEEP/GPO#
VID3
CLKIN
SMI#/PWMOUT2
GNDD
SCL
SDA
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
VCC
VT1/PII1
VREF
VCORE
+3.3VIN
+12VIN
-12VIN
-5VIN/VT2/PII2
GNDA
VID0
VID1
VID2
Publication Release Date: April 1999
- 3 - Revision 0.55
Page 9
5. PIN DESCRIPTION
I/O
- TTL level bi-directional pin with 12 mA source-sink capability
12t
I/O
- TTL level and schmitt trigger
12ts
OUT12 - Output pin with 12 mA source-sink capability
AOUT - Output pin(Analog)
OD12 - Open-drain output pin with 12 mA sink capability
INt - TTL level input pin
INts - TTL level input pin and schmitt trigger
AIN - Input pin(Analog)
Pin Name Pin No. Type Description
W83783S
Preliminary
VID4 1 IN
FANIN1 2 IN
FANIN2 3 IN
FANIN3/
PWMOUT1
4 INts /
OUT
t
ts
ts
12t
Voltage Supply readouts from Pentium IITM.
0V to 5V amplitude fan tachometer input.
0V to 5V amplitude fan tachometer input.
0V to 5V amplitude fan tachometer input. /
Fan speed control (PWM) output.
This multi-functional pin is programmable.
OVT# 5 OD
BEEP/GPO# 6 OD
12
12
Over temperature Shutdown Output.
Beep (Default) / General purpose output
This multi-functional pin is programmable.
VID3 7 IN
CLKIN 8 IN
t
t
Voltage Supply readouts from Pentium IITM.
System clock input. Can select 48MHz or 24MHz
or 14.318MHz. The default is 24MHz.
SMI# /
9 OD12 /
System Management Interrupt (open drain). The
default state is disabled.
PWMOUT2
OUT
12t
Fan speed control (PWM) output.
This multi-functional pin is programmable.
GNDD 10 DGROUND Internally connected to all digital circuitry.
SCL 11 IN
SDA 12
OD
VID2 13 IN
ts
12
t
Serial Bus Clock.
Serial Bus bi-directional Data.
Voltage Supply readouts from Pentium IITM.
Publication Release Date: April 1999
- 4 - Revision 0.55
Page 10
Pin Discription, continued
Pin Name Pin No. Type Description
W83783S
Preliminary
VID1 14 IN
VID0 15 IN
t
t
Voltage Supply readouts from Pentium IITM.
Voltage Supply readouts from Pentium IITM.
GNDA 16 AGROUND Internally connected to all analog circuitry. The
ground reference for all analog inputs.
-5VIN /
VT2 /
PII2
17 AIN 0V to 4.096V FSR Analog Inputs (Default). /
Thermistor 2 terminal input. /
Pentium II
TM
thermal 2 diode input.
This multi-functional pin is programmable.
-12VIN 18 AIN 0V to 4.096V FSR Analog Inputs.
+12VIN 19 AIN 0V to 4.096V FSR Analog Inputs.
+3.3VIN 20 AIN 0V to 4.096V FSR Analog Inputs.
VCOREA 21 AIN 0V to 4.096V FSR Analog Inputs.
VREF 22 AOUT Reference Voltage.
VT1 /
PII1
23 AIN Thermistor 1 terminal input. /
Pentium II
TM
thermal diode 1 input.
VCC (+5V) 24 POWER +5V VCC power. Bypass with the parallel
combination of 10µF (electrolytic or tantalum) and
0.1µF (ceramic) bypass capacitors.
Publication Release Date: April 1999
- 5 - Revision 0.55
Page 11
W83783S
Preliminary
6. FUNCTIONAL DESCRIPTION
6.1 General Description
The W83783S provides at most 6 analog positive inputs, 3 fan speed monitors, 2 sets for fan PWM
(Pulse Width Modulation) control, 2 thermal inputs from remote thermistors or 2N3904 transistors or
Pentium
exceed the set limit value including voltage, temperature, or fan counter. When start the monitor
function on the chip, the watch dog machine monitor every function and store the value to registers. If
the monitor value exceeds the limit value, the interrupt status will be set to 1.
6.2 Access Interface
The W83783S provides I2C Serial Bus to read/write internal reigsters. In the W83783S there are two
serial bus address. The first address defined at CR[48h] can read/write all registers excluding Bank 1
temperature sensor registers and the address default value is 0101101. The second address defined
at CR[4Ah] bit2-0 only read/write temperature sensor 1 registers and the address default value is
1001001.
TM
II (Deschutes) thermal diode outputs and beep function output when the monitor value
6.2.1 The first serial bus access timing are shown as follow:
(a) Serial bus write to internal address register followed by the data byte
SCL
SDA
0
0 1 0 1 1 0 1 D7 D6 D5 D4 D3 D2 D1 D0
Start By
Master
Figure 1. Serial Bus Write to Internal Address Register followed by the Data Byte
Frame 1
Serial Bus Address Byte
SCL
(Continued)
SDA (Continued)
7 8 0 7 8
R/W
Ack
by
781D
0
D7 D6 D5 D4 D3 D2 D1 D0
Frame 2
Internal Index Register Byte
Frame 3
Data Byte
7 8
Ack
by
781D
Stop
by
Master
Ack
by
781D
Publication Release Date: April 1999
- 6 - Revision 0.55
Page 12
(b) Serial bus write to internal address register only
W83783S
Preliminary
SCL
SDA
0
0 1 0 1 1 0 1 D7 D6 D5 D4 D3 D2 D1 D0
Start By
Master
Frame 1
Serial Bus Address Byte
7 8 0 7 8
R/W
Ack
by
781D
0
Frame 2
Internal Index Register Byte
Ack
781D
Stop by
by
Master
Figure 2. Serial Bus Write to Internal Address Register Only
(c) Serial bus read from a register with the internal address register prefer to desired location
SCL
SDA
0
0 1 0 1 1 0 1 D7 D6 D5 D4 D3 D2 D1 D0
Start By
Master
Frame 1
Serial Bus Address Byte
Figure 3. Serial Bus Write to Internal Address Register Only
7 8 0 7 8
R/W
Ack
by
781D
0
Frame 2
Internal Index Register Byte
Ack
by
Master
Stop by
Master
6.2.2 The serial bus timing of the temperature 2 and 3 is shown as follow:
(a) Typical 2-byte read from preset pointer location (Temp, TOS, T
SCL
SDA
0
0 1 0 1 1 0 1 D7 D1 D0
Start By
Master
Frame 1
Serial Bus Address Byte
Figure 4. Typical 2-Byte Read From Preset Pointer Location
7 8 0 7 8
... ...
R/W
Ack
by
782D
...
Frame 2
MSB Data Byte
Ack
by
Master
Publication Release Date: April 1999
- 7 - Revision 0.55
)
HYST
0 7
D7 D1 D0
...
Frame 3
LSB Data Byte
Ack
by
Master
Stop by
Master
Page 13
W83783S
Preliminary
(b) Typical pointer set followed by immediate read for 2-byte register (Temp, TOS, T
Frame 2
Pointer Byte
Ack
by
Master
4
D1 D0
0 7
D7 D1 D0
...
Frame 5
LSB Data Byte
Ack
by
782D
SCL
SDA
SCL
SDA
0
1 0 0 1 A2 A1 A0 R/W
Start By
Master
0
Frame 1
Serial Bus Address Byte
7 8 0
0 0 0 0 0 0
Ack
by
782D
7 8 0 7 8
... ...
D7 D1 D0
1 0 0 1 A2 A1 A0 R/W
Start By
Master
Frame 3
Serial Bus Address Byte
Ack
by
782D
0
Figure 5. Typical Pointer Set Followed by Immediate Read for 2-Byte Register
...
Frame 4
MSB Data Byte
(c) Typical read 1-byte from configuration register with preset pointer
SCL
SDA
0
1 0 0 1 A2 A1 A0 R/W D1D5 D4 D3D6
Start By
Master
Frame 1
Serial Bus Address Byte
7 8 0
D7 D2
Ack
by
782D
Frame 2
Data Byte
8
7
D0
No Ack
by
Master
HYST
No Ack
by
Master
Stop by
Master
)
Stop by
Master
Figure 6. Typical 1-Byte Read From Configuration With Preset Pointer
Publication Release Date: April 1999
- 8 - Revision 0.55
Page 14
(d) Typical pointer set followed by immediate read from configuration register
W83783S
Preliminary
SCL
0
SDA
1 0 0 1 A2 A1 A0 R/W
Start By
Master
Frame 1
Serial Bus Address Byte
0
7 8 0
SCL (Cont..)
SDA (Cont..)
1 0 0 1 A2 A1 A0 R/W
Repea
Start
By
Master
Frame 3
Serial Bus Address Byte
Figure 7. Typical Pointor Set Followed by Immediate Read from Temp 2/3
Configuration Register
(e) Temperature 2/3 configuration register Write
SCL
SDA
0
1 0 0 1 A2 A1 A0 R/W
Start By
Master
Frame 1
Serial Bus Address Byte
7 8 0
7 8 0
0 0 0 0 00
Ack
by
782D
D7 D5 D4
Ack
by
782D
D6 D3
Frame 4
MSB Data Byte
Frame 2
Pointer Byte
4
0 0 0 0 0 0 0
Ack
782D
by
Frame 2
Pointer Byte
4
D2 D1 D0
D1 D0
D1 D0
7
No Ack
Master
7 8
7 8
8
by
Ack
by
782D
Ack
by
782D
Stop by
Master
...
...
SCL (Cont...)
0
SDA (Cont...)
0 0 D4 D3 D2 D10 D0
Frame 3
Configuration Data Byte
Figure 8. Configuration Register Write
- 9 - Revision 0.55
7 8
Ack
Stop
by
by
782D
Master
Publication Release Date: April 1999
Page 15
W83783S
Preliminary
(f) Temperature 2/3 TOS and T
SCL
SDA
SCL (Cont...)
SDA (Cont...)
0
1 0 0 1 A2 A1 A0 R/W
Start By
Master
0
Frame 1
Serial Bus Address Byte
D6 D5 D4 D3 D2 D1D7 D0
Frame 3
MSB Data Byte
HYST
write
7 8 0
Ack
by
782D
7 8
Ack
by
781D
4
0
0
0 0 0 0
Frame 2
Pointer Byte
0 7 8
D6 D5 D4 D3 D2 D1D7 D0
Frame 4
LSB Data Byte
7 8
D1 D0
Ack
by
782D
Ack
782D
Stop
by
by
Master
Figure 9. Configuration Register Write
6.3 Analog Inputs
The maximum input voltage of the analog pin is 4.096V because the 8-bit ADC has a 16mv LSB.
Really, the application of the PC monitoring would most often be connected to power suppliers. The
CPU V-core voltage ,+3.3V and battery voltage can directly connected to these analog inputs. The
5VSB and +12V inputs should be reduced a factor with external resistors so as to obtain the input
range. As Figure 11 shows.
Publication Release Date: April 1999
- 10 - Revision 0.55
Page 16
W83783S
Ω
Preliminary
VCORE
+3.3VIN
VDD(+5V)
R
10K, 1%
VREF Pin 22
VT1 Pin 23
**The connections of VT2
is same as VT1
N12VIN Pin 18
N5VIN
R8
V1
Positive Input
Negative Input
Typical Thermister Connection
V3
V4
Positive Inputs
R1
R7
R2
12VIN
R5
R
THM
10K, 25 C
Figure 11.
6.3.1 Monitor over 4.096V voltage:
The input voltage +12VIN can be expressed as following equation.
Pin 21
Pin 20
Pin 24
Pin 19
8-bit ADC
with
16mV LSB
Pin 17
R6
R
12
VIN V
= ×
1
2
R R
+
1 2
The value of R1 and R2 can be selected to 28K Ohms and 10K Ohms, respectively, when the input
voltage V1 is 12V. The node voltage of +12VIN can be subject to less than 4.096V for the maximun
input range of the 8-bit ADC. The Pin 24 is connected to the power supply VCC with +5V. There are
two functions in this pin with 5V. The first function is to supply internal analog power in the W83783S
and the second function is that this voltage with 5V is connected to internal serial resistors to monitor
the +5V voltage. The value of two serial resistors are 34K ohms and 50K ohms so that input voltage
to ADC is 2.98V which is less than 4.096V of ADC maximum input voltage. The express equation can
represent as follows.
K
V VCC
= ×
in
50
K K
50 34
+
Ω Ω
≅
2 98
.
V
where VCC is set to 5V.
Publication Release Date: April 1999
- 11 - Revision 0.55
Page 17
W83783S
Ω
−
×−β
−
×−γ
Preliminary
6.3.2 Monitor negative voltage:
The negative voltage should be connected two series resistors and a positive voltage VREF (is equal
to 3.6V). In the Figure 11, the voltage V3 and V4 are two negative voltage which they are -12V and 5V respectively. The voltage V3 is connected to two serial resistors then is connected to another
terminal VREF which is positive voltage. So as that the voltage node N12VIN can be obtain a
posedge voltage if the scales of the two serial resirtors are carefully selected. It is recommanded from
Winbond that the scale of two serial resistors are R5=232K ohms and R6=56K ohm. the The input
voltage of node -12VIN can be calculated by following equation.
K
N VIN VREF V
If the V5 is equal to -12V then the voltage is equal to 0.567V and the converted hexdecimal data is set
to 35h by the 8-bit ADC with 16mV-LSB.This monitored value should be converted to the real
negative votage and the express equation is shown as follows.
= + ×
where VREF is equal 3.6V.
5 5
232
K K
232 56
+
Ω Ω
V12
+( ) ( )
N VIN VREF
V
Where β is 232K/(232K+56K). If the N2VIN is 0.567 then the V5 is approximately equal to -12V.
The another negative voltage input V6 (approximate -5V) also can be evaluated by the similar
method and the serial resistors can be selected with R7=120K ohms and R8=56K ohms by the
Winbond recommended. The expression equation of V6 With -5V voltage is shown as follows.
V
Where the β is set to 120K/(120K+56K). If the monitored ADC value in the N5VIN channel is 0.8635,
VREF=3.6V and the parameter β is 0.6818 then the negative voltage of V6 can be evalated to be -
5V.
12
=
5
N VIN VREF
5
=
6
1
β
1
γ
Publication Release Date: April 1999
- 12 - Revision 0.55
Page 18
W83783S
Preliminary
6.3.3 Monitor temperature from thermistor:
The W83783S can connect three thermistors to measure three different envirment temperature. The
specification of thermistor should be considered to (1) β value is 3435K, (2) resistor value is 10K
ohms at 25°C. In the Figure 11, the themistor is connected by a serial resistor with 10K Ohms, then
connect to VREF (Pin 37).
6.3.4 Monitor temperature from Pentium IITM thermal diode or bipolar transistor 2N3904
The W83783S can alternate the thermistor to Pentium IITM (Deschutes) thermal diode interface or
transistor 2N3904 and the circuit connection is shown as Figure 12. The pin of Pentium IITM D- is
connected to power supply ground (GND) and the pin D+ is connected to pin PIIx in the W83783S.
The resistor R=30K ohms should be connected to VREF to supply the diode bias current and the
bypass capacitor C=3300pF should be added to filter the high frequency noise. The transistor 2N3904
should be connected to a form with a diode, that is, the Base (B) and Collector (C) in the 2N3904
should be tied togeter to act as a thermal diode.
Bipolar Transistor
Temperature Sensor
C
B
2N3904
E
OR
Pentium II
CPU D+
Therminal
Diode
VREF
R=30K, 1%
PIITDx
C=3300pF
W83783S
R=30K, 1%
PIITDx
C=3300pF
D-
Figure 12.
Publication Release Date: April 1999
- 13 - Revision 0.55
Page 19
W83783S
Preliminary
6.4 FAN Speed Count and FAN Speed Control
6.4.1 Fan speed count
Inputs are provides for signals from fans equipped with tachometer outputs. The level of these signals
should be set to TTL level, and maximum input voltage can not be over +5.5V. If the input signals
from the tachometer outputs are over the VCC, the external trimming circuit should be added to
reduce the voltage to obtain the input specification. The normal circuit and trimming circuits are
shown as Figure 13.
Determine the fan counter according to:
6
×
135 10
Count
In other words, the fan speed counter has been read from register CR28 or CR29 or CR2A, the fan
speed can be evaluated by the following equation.
RPM
=
.
=
RPM Divisor
×
6
×
1 35 10
.
Count Divisor
×
The default divisor is 2 and defined at CR47.bit7~4, CR4B.bit7~6, and Bank0 CR5D.bit5~7 which are
three bits for divisor. That provides very low speed fan counter such as power supply fan. The
followed table is an example for the relation of divisor, PRM, and count.
Divisor Nominal
PRM
1 8800 6.82 ms 153 6160 9.74 ms
2 (default)
4 2200 27.27 ms 153 1540 38.96 ms
8 1100 54.54 ms 153 770 77.92 ms
16 550 109.08 ms 153 385 155.84 ms
32 275 218.16 ms 153 192 311.68 ms
64 137 436.32 ms 153 96 623.36 ms
128 68 872.64 ms 153 48 1246.72 ms
4400 13.64 ms 153 3080 19.48 ms
Time per
Revolution
Counts 70% RPM Time for 70%
Table 1.
Publication Release Date: April 1999
- 14 - Revision 0.55
Page 20
W83783S
Output and Register Attenuator
and Zener Clamp
Preliminary
+12V
diode diode
+12V
FAN Out
GND
+5V
Pull-up resister
4.7K Ohms
Fan Input
FAN
Connector
Figure 13-1. Fan with Tach Pull-Up to +5V
+12V
FAN Out
FAN
Connector
diode
+12V
GND
Pull-up resister
Fan Input
3.9V Zener
Pin 18/19/20
W83783S
> 1K
Pin 18/19/20
W83783S
+12V
Pull-up resister
4.7K Ohms
+12V
FAN Out
GND
FAN
14K~39K
Fan Input
10K
Connector
Figure 13-2. Fan with Tach Pull-Up to +12V, or Totem-Pole
+12V
Pull-up resister < 1K
or totem-pole output
> 1K
Fan Input
Pin 18/19/20
FAN Out
FAN
Connector
diode
+12V
GND
3.9V Zener
Pin 18/19/20
W83783S
W83783S
Figure 13-3. Fan with Tach Pull-Up to +12V
Figure 13-4. Fan with Tach Pull-Up to +12V, or
Totem-Pole Putput and Zener Clamp
6.4.2 Fan speed control
The W83783S provides four sets for fan PWM speed control. The duty cycle of PWM can be
programmed by a 8-bit registers which are defined in the Bank0 CR5A and CR5B. The default duty
cycle is set to 100%, that is, the default 8-bit registers is set to FFh. The expression of duty can be
represented as follows.
Duty cycle
− = ×(%) 100%
Programmed 8 - bit Register Value
255
The PWM clock frequency also can be program and defined in the Bank0.CR5C . The application
circuit is shown as follows.
Publication Release Date: April 1999
- 15 - Revision 0.55
Page 21
PWM Clock Input
G
6.5 Temperature Measurement Machine
R1
D
NMOS
S
Figure 14.
+12V
R2
PNP Transistor
+
C
-
W83783S
Preliminary
FAN
The temperature data format is 8-bit two’s-complement for sensor 2 and 9-bit two -complement for
sensor 1. The 8-bit temperature data can be obtained by reading the CR[27h]. The 9-bit temperature
data can be obtained by reading the 8 MSBs from the Bank1 CR[50h] and the LSB from the Bank1
CR[51h] bit 7. The format of the temperature data is show in Table 1.
Temperature 8-Bit Digital Output 9-Bit Digital Output
8-Bit Binary 8-Bit Hex 9-Bit Binary 9-Bit Hex
+125øC 0111,1101 7Dh 0,1111,1010 0FAh
+25øC 0001,1001 19h 0,0011,0010 032h
+1øC 0000,0001 01h 0,0000,0010 002h
+0.5øC - - 0,0000,0001 001h
+0øC 0000,0000 00h 0,0000,0000 000h
-0.5øC - - 1,1111,1111 1FFh
-1øC 1111,1111 FFh 1,1111,1110 1FFh
-25øC 1110,0111 E7h 1,1100,1110 1CEh
-55øC 1100,1001 C9h 1,1001,0010 192h
Table 2.
Publication Release Date: April 1999
- 16 - Revision 0.55
Page 22
W83783S
Preliminary
6.5.1 The W83783S temperature sensor 2 SMI# interrupt has two modes:
(1) Comparator Interrupt Mode
Setting the T
the Comparator Interrupt Mode. Temperature exceeds TO (Over Temperature) Limit causes an
interrupt and this interrupt will be reset by reading all the Interrupt Status Register. Once an
interrupt event has occurred by exceeding TO, then reset, if the temperature remains above the
TO , the interrupt will occur again when the next conversion has completed. If an interrupt event
has occurred by exceeding TO and not reset, the interrupts will not occur again. The interrupts
will continue to occur in this manner until the temperature goes below TO. (Figure 15-1 )
(2) Two-Times Interrupt Mode
Setting the T
Mode. Temperature exceeding TO causes an interrupt and then temperature going below T
will also cause an interrupt if the previous interrupt has been reset by reading all the interrupt
Status Register. Once an interrupt event has occurred by exceeding TO , then reset, if the
temperature remains above the T
(Temperature Hysteresis) limit to 127øC will set temperature sensor 1 SMI# to
HYST
lower than TO will set temperature sensor 1 SMI# to the Two-Times Interrupt
HYST
, the interrupt will not occur. (Figure 15-2 )
HYST
HYST
T
HYST
127'C
T
OI
SMI# SMI#
Figure 15-1. Comparator Interrupt Mode
* *
* * * **
*Interrupt Reset when Interrupt Status Registers are read
T
T
HYST
OI
Figure 15-2. Two-Times Interrupt Mode
Publication Release Date: April 1999
- 17 - Revision 0.55
Page 23
W83783S
Preliminary
6.5.2 The W83783S temperature sensor 1 SMI# interrupt has three modes
(1) Comparator Interrupt Mode
Temperature exceeding TO causes an interrupt and this interrupt will be reset by reading all the
Interrupt Status Register. Once an interrupt event has occurred by exceeding TO, then reset, if
the temperature remains above the T
has completed. If an interrupt event has occurred by exceeding TO and not reset, the interrupts
will not occur again. The interrupts will continue to occur in this manner until the temperature
goes below T
. ( Figure 16-1 )
HYST
(2) Two-Times Interrupt Mode
Temperature exceeding TO causes an interrupt and then temperature going below T
cause an interrupt if the previous interrupt has been reset by reading all the interrupt Status
Register. Once an interrupt event has occurred by exceeding TO , then reset, if the temperature
remains above the T
, the interrupt will not occur. (Figure 16-2 )
HYST
(3) One-Time Interrupt Mode
Temperature exceeding TO causes an interrupt and then temperature going below T
cause an interrupt. Once an interrupt event has occurred by exceeding TO , then going below
T
an interrupt will not occur again until the temperature exceeding TO. (Figure 16-3 )
HYST,
, the interrupt will occur again when the next conversion
HYST
HYST
HYST
will also
will not
T
OI
T
HYST
SMI# SMI#
Figure 16-1. Comparator Interrupt Mode
* * *
* * * **
*Interrupt Reset when Interrupt Status Registers are read
T
T
HYST
OI
- 18 - Revision 0.55
Figure 16-2. Two-Times Interrupt Mode
Publication Release Date: April 1999
Page 24
T
T
HYST
W83783S
Preliminary
OI
SMI#
*Interrupt Reset when Interrupt Status Registers are read
Figure 16-3. One-Time Interrupt Mode
* *
6.5.3 The W83783S temperature sensor 1 Over-Temperature (OVT#) has three modes
(1) Comparator Mode :
Setting Bank1 CR[52h] bit 2 to 0 will set OVT# signal to comparator mode. Temperature
exceeding TO causes the OVT# output activated until the temperature is less than T
Figure 17)
(2) Interrupt Mode:
Setting Bank1 CR[52h] bit 2 to 1 will set OVT# signal to interrupt mode. Setting Temperature
exceeding TO causes the OVT# output activated indefinitely until reset by reading temperature
sensor 2 or sensor 3 registers. Temperature exceeding TO , then OVT# reset, and then
temperature going below T
will also cause the OVT# activated indefinitely until reset by
HYST
reading temperature sensor2 or sensor 3 registers. Once the OVT# is activated by exceeding T
, then reset, if the temperature remains above T
, the OVT# will not be activated again.(
HYST
Figure 17)
HYST
. (
O
Publication Release Date: April 1999
- 19 - Revision 0.55
Page 25
T
HYST
W83783S
Preliminary
To
(Comparator Mode; default)
(Interrupt Mode)
OVT#
OVT#
*Interrupt Reset when Temperature 2/3 is read
Figure 17. Over-Temperature Response Diagram
* * *
*
6.6 Voltage and Fan SMI# mode :
6.6.1 Voltage SMI# mode :
SMI# interrupt for voltage is Two-Times Interrupt Mode. Voltage exceeding high limit or going
below low limit will causes an interrupt if the previous interrupt has been reset by reading all the
interrupt Status Register. (Figure 18-1 )
6.6.2 Fan SMI# mode :
SMI# interrupt for fan is Two-Times Interrupt Mode. Fan count exceeding the limit, or exceeding
and then going below the limit, will causes an interrupt if the previous interrupt has been reset by
reading all the interrupt Status Register. (Figure 18-2 )
Publication Release Date: April 1999
- 20 - Revision 0.55
Page 26
High limit
W83783S
Preliminary
Low limit
SMI#
* * *
Figure 18-1. Voltage SMI# Mode
*
Fan Count limit
SMI#
*Interrupt Reset when Interrupt Status Registers are read
Figure 18-2. Fan SMI# Mode
*
*
Publication Release Date: April 1999
- 21 - Revision 0.55
Page 27
7. REGISTERS AND RAM
7.1 Configuration Register Index 40h
Register Location: 40h
Power on Default Value 00000001 binary
Attribute: Read/write
Size: 8 bits
7 6 5 4 3 2 1 0
START
SMI#Enable
RESERVED
INT_Clear
RESERVED
RESERVED
BEEP/GPO#
INITIALIZATION
W83783S
Preliminary
Bit 7: A one restores power on default value to all registers except the Serial Bus Address register.
This bit clears itself since the power on default is zero.
Bit 6: The logical 1 in this bit drives a zero on BEEP/GPO# pin.
Bit 5: Reserved
Bit 4: Reserved
Bit 3: A one disables the SMI# output without affecting the contents of Interrupt Status Registers.
The device will stop monitoring. It will resume upon clearing of this bit.
Bit 2: Reserved
Bit 1: A one enables the SMI# Interrupt output.
Bit 0: A one enables startup of monitoring operations, a zero puts the part in standby mode.
Note: The outputs of Interrupt pins will not be cleared if the user writes a zero to this location after an
interrupt has occurred unlike "INT_Clear'' bit.
Publication Release Date: April 1999
- 22 - Revision 0.55
Page 28
7.2 Interrupt Status Register 1 Index 41h
Register Location: 41h
Power on Default Value 00h
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
VCORE
Reserved
+3.3VIN
+5VIN
TEMP2
TEMP1
FAN1
FAN2
W83783S
Preliminary
Bit 7: A one indicates the fan count limit of FAN2 has been exceeded.
Bit 6: A one indicates the fan count limit of FAN1 has been exceeded.
Bit 5: A one indicates a High limit of VT1 has been exceeded from temperature sensor.
Bit 4: A one indicates a High limit of VT2 has been exceeded from temperature sensor .
Bit 3: A one indicates a High or Low limit of +5VIN has been exceeded.
Bit 2: A one indicates a High or Low limit of +3.3VIN has been exceeded.
Bit 1: Reserved.
Bit 0: A one indicates a High or Low limit of VCORE has been exceeded.
7.3 Interrupt Status Register 2 Index 42h
Register Location: 42h
Power on Default Value 00h
Attribute: Read Only
Size: 8 bits
Publication Release Date: April 1999
- 23 - Revision 0.55
Page 29
7 6 5 4 3 2 1 0
SMI
+12VIN
-12VIN
-5VIN
FAN3
Reserved
Reserved
Reserved
Reserved
Bit 7-4:Reserved.This bit should be set to 0.
Bit 3: A one indicates the fan count limit of FAN3 has been exceeded.
Bit 2: A one indicates a High or Low limit of -5VIN has been exceeded.
Bit 1: A one indicates a High or Low limit of -12VIN has been exceeded.
Bit 0: A one indicates a High or Low limit of +12VIN has been exceeded.
W83783S
Preliminary
7.4 SMI# Mask Register 1 Index 43h
Register Location: 43h
Power on Default Value 00h
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
Bit 7-0: A one disables the corresponding interrupt status bit for
VCORE
Reserved
+3.3VIN
+5VIN
TEMP2
TEMP1
FAN1
FAN2
interrupt.
Publication Release Date: April 1999
- 24 - Revision 0.55
Page 30
7.5 SMI# Mask Register 2 Index 44h
SMI
Register Location: 44h
Power on Default Value 00h
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
+12VIN
-12VIN
-5VIN
FAN3
Reserved
Reserved
Reserved
Reserved
W83783S
Preliminary
Bit 7-4: Reserved. This bit should be set to 0.
Bit 3-0: A one disables the corresponding interrupt status bit for
7.6 Reserved Register Index 45h-- 46h
interrupt.
Publication Release Date: April 1999
- 25 - Revision 0.55
Page 31
7.7 VID/Fan Divisor Register Index 47h
Register Location: 47h
Power on Default Value <7:4> is 0101, <3:0> is mapped to VID<3:0>
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
VID0
VID1
VID2
VID3
FAN1DIV_B0
FAN1DIV_B1
FAN2DIV_B0
FAN2DIV_B1
Bit 7-6: FAN2 Speed Control.
W83783S
Preliminary
Bit 5-4: FAN1 Speed Control.
Bit 3-0: The VID <3:0> inputs
Note : Please refer to Bank0 CR[5Dh] , Fan divisor table.
7.8 Serial Bus Address Register Index 48h
Register Location: 48h
Power on Default Value Serial Bus address <6:0> = 0101101 and <7> = 0 binary
Size: 8 bits
7 6 5 4 3 2 1 0
Serial Bus Address
Reserved
Bit 7: Read Only - Reserved.
Bit 6-0: Read/Write - Serial Bus address <6:0>.
Publication Release Date: April 1999
- 26 - Revision 0.55
Page 32
7.9 Value RAM Index 20h- 3Fh or 60h - 7Fh
Index Description
20h or 60h VCORE reading
21h or 61h Reserved
22h or 62h +3.3VIN reading
23h or 63h +5VIN reading
24h or 64h +12VIN reading
25h or 65h -12VIN reading
26h or 66h -5VIN reading
27h or 67h Temperature sensor 2 (VT2) reading
28h or 68h FAN1 reading
Note: This location stores the number of counts of the internal clock
per revolution.
W83783S
Preliminary
29h or 69h FAN2 reading
Note: This location stores the number of counts of the internal clock
per revolution.
2Ah or 6Ah FAN3 reading
Note: This location stores the number of counts of the internal clock
per revolution.
2Bh or 6Bh VCORE High Limit, default value is defined by Vcore Voltage +0.2v.
2Ch or 6Ch VCORE Low Limit, default value is defined by Vcore Voltage -0.2v.
2Dh or 6Dh Reserved
2Eh or 6Eh Reserved
2Fh or 6Fh +3.3VIN High Limit
30h or 70h +3.3VIN Low Limit
31h or 71h +5VIN High Limit
32h or 72h +5VIN Low Limit
Publication Release Date: April 1999
- 27 - Revision 0.55
Page 33
7.12 Value RAM Index 20h- 3Fh or 60h - 7Fh, continued
Address A6-A0 Description
33h or 73h +12VIN High Limit
34h or 74h +12VIN Low Limit
35h or 75h -12VIN High Limit
36h or 76h -12VIN Low Limit
37h or 77h -5VIN High Limit
38h or 78h -5VIN Low Limit
39h or 79h Temperature sensor 2 (VT2) High Limit
3Ah or 7Ah Temperature sensor 2 (VT2) Hysteresis Limit
3Bh or 7Bh FAN1 Fan Count Limit
Note: It is the number of counts of the internal clock for the Low Limit
of the fan speed.
3Ch or 7Ch FAN2 Fan Count Limit
Note: It is the number of counts of the internal clock for the Low Limit
of the fan speed.
W83783S
Preliminary
3Dh or 7Dh FAN3 Fan Count Limit
Note: It is the number of counts of the internal clock for the Low Limit
of the fan speed.
3E- 3Fh or 7E-7Fh Reserved
Setting all ones to the high limits for voltages and fans (0111 1111 binary for temperature) means
interrupts will never be generated except the case when voltages go below the low limits.
Publication Release Date: April 1999
- 28 - Revision 0.55
Page 34
7.10 Voltage ID (VID4) & Device ID - Index 49h
Register Location: 49h
Power on Default Value <7:1> is 000,0001b
<0> is mapped to VID <4>
Size: 8 bits
7 6 5 4 3 2 1 0
W83783S
Preliminary
VID4
DID<6:0>
Bit 7-1: Read Only - Device ID<6:0>
Bit 0 : Read/Write - The VID4 inputs.
7.11 Temperature 2 and Temperature 3 Serial Bus Address Register--Index 4Ah
Register Location: 4Ah
Power on Default Value <7:0> = 0000,0001 binary. Reset by MR
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
I2CADDR2
I2CADDR2
I2CADDR2
DIS_T2
Reserved
Reserved
Reserved
Reserved
Publication Release Date: April 1999
- 29 - Revision 0.55
Page 35
W83783S
Preliminary
Bit 7-4 : Reserved
Bit 3: Set to 1, disable temperature Sensor 1 and can not access any data from Temperature Sensor 1.
Bit 2-0: Temperature 2 Serial Bus Address. The serial bus address is 1001xxx. Where xxx are defined in
these bits.
7.12 Pin Control Register - Index 4Bh
Register Location: 4Bh
Power on Default Value <7:0> 44h. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
Bit 7-6:Fan3 speed divisor.
Please refer to Bank0 CR[5Dh] , Fan divisor table.
Bit 5-4: Select A/D Converter Clock Input.
<5:4> = 00 - default. ADC clock select 22.5 Khz.
<5:4> = 01- ADC clock select 5.6 Khz. (22.5K/4)
<5:4> = 10 - ADC clock select 1.4Khz. (22.5K/16)
<5:4> = 11 - ADC clock select 0.35 Khz. (22.5K/64)
Reserved
Reserved
CLKINSEL
CLKINSEL
ADCOVSEL
ADCOVSEL
FAN3DIV_B0
FAN3DIV_B1
Publication Release Date: April 1999
- 30 - Revision 0.55
Page 36
Bit 3-2: Clock Input Select.
EN_ONE_INTMODE
<3:2> = 00 - Pin 3 (CLKIN) select 14.318M Hz clock.
<3:2> = 01 - Default. Pin 3 (CLKIN) select 24M Hz clock.
<3:2> = 10 - Pin 3 (CLKIN) select 48M Hz clock .
<3:2> = 11 - Reserved. Pin3 no clock input.
Bit 1-0: Reserved. User defined.
7.13 IRQ#/OVT# Property Select - Index 4Ch
Register Location: 4Ch
Power on Default Value <7:0> --0000,0001. Reset by MR.
Attribute: Read/Write
Size: 8 bits
W83783S
Preliminary
7 6 5 4 3 2 1 0
Reserved
Reserved
OVTPOL
DIS_OVT
Reserved
T1_INTMode
PWM2SEL
Bit 7: Set to 1 , select pin 9 SMI#/PWMOUT2 as PWM output. Set to 0, select pin 9 as SMI# output.
Bit6: Set to 1, the SMI# output type of temperature sensor 1 is set to Comparator Interrupt mode. Set
to 0, the SMI# output type is set to Interrupt mode (defined by CR[4Ch] Bit 5 ).
Bit 5: Set to 1, the SMI# output type of temperature sensor 1 is set to One-Time interrupt mode. Set
to 0, the SMI# output type of temperature sensor 1 is set to Two-Times interrupt mode.
Bit 4 : Reserved. User Defined.
Bit 3: Disable temperature sensor 1 over-temperature (OVT) output if set to 1. Default 0, enable
OVT1 output through pin OVT#.
Bit 2: Over-temperature polarity. Write 1, OVT# active high. Write 0, OVT# active low. Default 0.
Bit 1-0: Reserved. User Defined.
Publication Release Date: April 1999
- 31 - Revision 0.55
Page 37
W83783S
Preliminary
7.14 FAN IN/OUT and BEEP/GPO# Control Register - Index 4Dh
Register Location: 4Dh
Power on Default Value <7:0> 0001,0101. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
FANINC1
FANOPV1
FANINC2
FANOPV2
FANINC3
FANOPV3
GPOSEL
DIS_ABN
Bit 7: Disable power-on abnormal the monitor voltage including V-Core A and +3.3V. If these voltage
exceed the limit value, the pin (Open Drain) of BEEP will drives 300Hz and 600Hz frequency
signal. Write 1, the frequency will be disable. Default 0. After power on, the system should set
1 to this bit to 1 in order to disable BEEP.
Bit 6: BEEP/GPO# Pin Function Select. Write 1 Select GPO# function. Set 0, select BEEP function.
This bit default 0.
Bit 5: FAN 3 output value if FANINC3 sets to 0. Write 1, then pin 4 always generate logic high
signal. Write 0, pin 4 always generates logic low signal. This bit default 0.
Bit 4: FAN 3 Input Control. Set to 1, pin 4 acts as FAN clock input, which is default value. Set to 0,
this pin 4 acts as FAN control signal and the output value of FAN control is set by this register
bit 5. This output pin can connect to power PMOS gate to control FAN ON/OFF.
Bit 3: FAN 2 output value if FANINC2 sets to 0. Write 1, then pin 3 always generate logic high
signal. Write 0, pin 3 always generates logic low signal. This bit default 0.
Bit 2: FAN 2 Input Control. Set to 1, pin 3 acts as FAN clock input, which is default value. Set to 0,
this pin 3 acts as FAN control signal and the output value of FAN control is set by this register
bit 3. This output pin can connect to power NMOS gate to control FAN ON/OFF.
Bit 1: FAN 1 output value if FANINC1 sets to 0. Write 1, then pin 2 always generate logic high
signal. Write 0, pin 2 always generates logic low signal. This bit default 0.
Bit 0: FAN 1 Input Control. Set to 1, pin 2 acts as FAN clock input, which is default value. Set to 0,
this pin 2 acts as FAN control signal and the output value of FAN control is set by this register
bit 1. This output pin can connect to power PMOS gate to control FAN ON/OFF.
Publication Release Date: April 1999
- 32 - Revision 0.55
Page 38
7.15 Register 50h ~ 5Fh Bank Select - Index 4Eh
Register Location: 4Eh
Power on Default Value <6:3> = Reserved, <7> = 1, <2:0> = 0. Reset by MR
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
BANKSEL0
BANKSEL1
BANKSEL2
Reserved
Reserved
Reserved
Reserved
HBACS
W83783S
Preliminary
Bit 7: HBACS- High byte access. Set to 1, access Register 4Fh high byte register.
Set to 0, access Register 4Fh low byte register. Default 1.
Bit 6-3: Reserved. This bit should be set to 0.
Bit 2-0: Index ports 0x50~0x5F Bank select.
7.16 Winbond Vendor ID - Index 4Fh
Register Location: 4Fh
Power on Default Value <15:0> = 5CA3h
Attribute: Read Only
Size: 16 bits
15 8 7 0
VIDH
VIDL
Bit 15-8: Vendor ID High Byte if CR4E.bit7=1.Default 5Ch.
Bit 7-0: Vendor ID Low Byte if CR4E.bit7=0. Default A3h.
- 33 - Revision 0.55
Publication Release Date: April 1999
Page 39
7.17 Winbond Test Register -- Index 50h - 55h (Bank 0)
7.18 BEEP Control Register 1-- Index 56h (Bank 0)
Register Location: 56h
Power on Default Value <7:0> 0000,0000. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
EN_VC_BP
Reserved
EN_V33_BP
EN_V5_BP
EN_T2_BP
EN_T1_BP
EN_FAN1_BP
EN_FAN2_BP
W83783S
Preliminary
Bit 7: Enable BEEP Output from FAN 2 if the monitor value exceed the limit value. Write 1, enable
BEEP output, which is default value.
Bit 6: Enable BEEP Output from FAN 1 if the monitor value exceed the limit value. Write 1, enable
BEEP output, which is default value.
Bit 5: Enable BEEP Output from Temperature Sensor 1 if the monitor value exceed the limit value.
Write 1, enable BEEP output. Default 0
Bit 4: Enable BEEP output for Temperature Sensor 2 if the monitor value exceed the limit value.
Write 1, enable BEEP output. Default 0
Bit 3: Enable BEEP output from VDD (+5V), Write 1, enable BEEP output if the monitor value exceed
the limits value. Default 0, that is disable BEEP output.
Bit 2: Enable BEEP output from +3.3V. Write 1, enable BEEP output, which is default value.
Bit 1: Reserved.
Bit 0: Enable BEEP Output from VCORE if the monitor value exceed the limits value. Write 1,
enable BEEP output, which is default value
Publication Release Date: April 1999
- 34 - Revision 0.55
Page 40
W83783S
Preliminary
7.19 BEEP Control Register 2-- Index 57h (Bank 0)
Register Location: 57h
Power on Default Value <7:0> 1000-0000. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
EN_V12_BP
EN_NV12_BP
EN_NV5_BP
EN_FAN3_BP
Reserved
Reserved
Reserved
EN_GBP
Bit 7: Enable Global BEEP. Write 1, enable global BEEP output. Default 1. Write 0, disable all BEEP
output.
Bit 6-4: Reserved.
Bit 3: Enable BEEP Output from FAN 3 if the monitor value exceed the limit value. Write 1, enable
BEEP output. Default 0.
Bit 2: Enable BEEP output from -5V, Write 1, enable BEEP output if the monitor value exceed the
limits value. Default 0, that is disable BEEP output.
Bit 1: Enable BEEP output from -12V, Write 1, enable BEEP output if the monitor value exceed the
limits value. Default 0, that is disable BEEP output.
Bit 0: Enable BEEP output from +12V, Write 1, enable BEEP output if the monitor value exceed the
limits value. Default 0, that is disable BEEP output.
Publication Release Date: April 1999
- 35 - Revision 0.55
Page 41
7.20 Chip ID -- Index 58h (Bank 0)
Register Location: 58h
Power on Default Value <7:0> 0100-0000. Reset by MR.
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
CHIPID
Bit 7: Winbond Chip ID number. Read this register will return 40h.
W83783S
Preliminary
7.21 Diode Selection Register -- Index 59h (Bank 0)
Register Location: 59h
Power on Default Value <7>=0 and <6:4> = 111 and <3:0> = 0000
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
Reserved
Reserved
Reserved
Reserved
SELPIIV2
SELPIIV1
Reserved
Reserved
Bit 7-6: Reserved
Bit 5: Temperature sensor diode 1. Set to 1, select Pentium II compatible Diode. Set to 0 to select 2N3904
Bipolar mode.
Bit 4: Temperature sensor diode 2. Set to 1, select Pentium II compatible Diode. Set to 0 to select 2N3904
Bipolar mode.
Bit 3-0: Reserved
Publication Release Date: April 1999
- 36 - Revision 0.55
Page 42
7.22 PWMOUT1 Control Register -- Index 5Ah (Bank 0)
Register Location: 5Ah
Power on default value: <7:0> 1111-1111. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
W83783S
Preliminary
PWM1_DUTY
Bit 7: PWMOUT1 duty cycle control
Write FF, Duty cycle is 100%, Write 00, Duty cycle is 0%.
Publication Release Date: April 1999
- 36-A - Revision 0.55
Page 43
7.23 PWMOUT2 Control Register -- Index 5Bh (Bank 0)
Register Location: 5Bh
Power on default value: <7:0> 1111-1111. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
Bit 7: PWMOUT2 duty cycle control
Write FF, Duty cycle is 100%,
Write 00, Duty cycle is 0%.
W83783S
Preliminary
PWM2_DUTY
7.24 PWMOUT1/2 Clock Select Register -- Index 5Ch (Bank 0)
Register Location: 5Ch
Power on Default Value <7:0> 0001-0001. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
PWM2CLKSEL
PWM2CLKSEL
PWM2CLKSEL
EN_FANPWM1
PWM1CLKSEL
PWM1CLKSEL
PWM1CLKSEL
Reserved
Bit 7: Reserved
Bit 6-4: PWMOUT1 clock selection.
The clock defined frequency is same as PWMOUT2 clock selection.
Publication Release Date: April 1999
- 37 - Revision 0.55
Page 44
Bit 3: Set to 1. Enable PWMOUT1 PWM Control
Bit 2-0: PWMOUT2 clock Selection.
<2:0> = 000: 46.87K Hz
<2:0> = 001: 23.43K Hz (Default)
<2:0> = 010: 11.72K Hz
<2:0> = 011: 5.85K Hz
<2:0> = 100: 2.93K Hz
7.25 VBAT Monitor Control Register -- Index 5Dh (Bank 0)
Register Location: 5Dh
Power on Default Value <7:0> 0000-0000. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
W83783S
Preliminary
Reserved
DIODES2
DIODES1
Reserved
Reserved
FANDIV1_B2
FANDIV2_B2
FANDIV3_B2
Bit 7: Fan3 divisor Bit 2.
Bit 6: Fan2 divisor Bit 2.
Bit 5: Fan1 divisor Bit 2.
Bit 4: Reserved
Bit 3: Reserved
Bit 2: Temperature sensor 1 select into thermal diode such as Pentium II CPU supported. Set to 1,
select bipolar sensor. Set to 0, select thermistor sensor.
Bit 1: Temperature Sensor 2 type selection. Defined as DIODES1 described in the bit 2.
Bit 0: Reserved
Fan divisor table :
Bit 2 Bit 1 Bit 0 Fan
Divisor
0 0 0 1 1 0 0 16
0 0 1 2 1 0 1 32
0 1 0 4 1 1 0 64
0 1 1 8 1 1 1 128
Bit 2 Bit 1 Bit 0 Fan Divisor
Publication Release Date: April 1999
- 38 - Revision 0.55
Page 45
7.26 Reserved Register -- Index 5Eh (Bank 0)
7.27 Reserved Register -- Index 5Fh (Bank 0)
7.28 Temperature Sensor 1 Temperature (High Byte) Register - Index 00h
Register Location: 00h
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
W83783S
Preliminary
TEMP2<8:1>
Bit 7: Temperature <8:1> of sensor 2, which is high byte.
7.29 Temperature Sensor 1 Temperature (Low Byte) Register - Index 00h
Register Location: 00h
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
Reserved
TEMP2<0>
Bit 7: Temperature <0> of sensor2, which is low byte.
Bit 6-0: Reserved. This bit should be set to 0.
Publication Release Date: April 1999
- 39 - Revision 0.55
Page 46
7.30 Temperature Sensor 1 Configuration Register - Index 01h
Register Location: 01h
Power on Default Value <7:0> = 0x00
Size: 8 bits
7 6 5 4 3 2 1 0
STOP2
INTMOD
Reserved
FAULT
FAULT
Reserved
Reserved
Reserved
Bit 7-5: Read - Reserved. This bit should be set to 0.
W83783S
Preliminary
Bit 4-3: Read/Write - Number of faults to detect before setting OVT# output to avoid false tripping
due to noise.
Bit 2: Read - Reserved. This bit should be set to 0.
Bit 1: Read/Write - OVT# Interrupt mode select. This bit default is set to 0, which is compared mode.
When set to 1, interrupt mode will be selected.
Bit 0: Read/Write - When set to 1 the sensor will stop monitor.
Publication Release Date: April 1999
- 40 - Revision 0.55
Page 47
W83783S
Preliminary
7.31 Temperature Sensor 1 Hysteresis (High Byte) Register - Index 02h
Register Location: 02h
Power on Default Value <7:0> = 0x4B
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
THYST2<8:1>
Bit 7-0: Temperature hysteresis bit 8-1, which is High Byte. The temperature default 75 degree C.
7.32 Temperature Sensor 1 Hysteresis (Low Byte) Register - Index 02h
Register Location: 02h
Power on Default Value <7:0> = 0x0
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
Reserved
THYST2<0>
Bit 7: Temperature hysteresis bit 0, which is low Byte.
Bit 6-0: Reserved. This bit should be set to 0.
Publication Release Date: April 1999
- 41 - Revision 0.55
Page 48
W83783S
Preliminary
7.33 Temperature Sensor 1 Over-temperature (High Byte) Register - Index 03h
Register Location: 03h
Power on Default Value <7:0> = 0x50
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
TOVF2<8:1>
Bit 7-0: Over-temperature bit 8-1, which is High Byte. The temperature default 80 degree C.
7.34 Temperature Sensor 1 Over-temperature (Low Byte) Register - Index 03h
Register Location: 03h
Power on Default Value <7:0> = 0x0
Size: 8 bits
7 6 5 4 3 2 1 0
Reserved
TOVF2<0>
Bit 7: Read/Write - Over-temperature bit 0, which is low Byte.
Bit 6-0: Read Only - Reserved. This bit should be set to 0.
Publication Release Date: April 1999
- 42 - Revision 0.55
Page 49
W83783S
Preliminary
7.35 Reserved Register -- Index 50h--52h (BANK4)
7.36 BEEP Control Register 3 -- Index 53h (Bank 4)
Register Location: 53h
Power on Default Value <7:0> 0000,0000. Reset by MR.
Attribute: Read/Write
Size: 8 bits
7 6 5 4 3 2 1 0
Reserved
Reserved
Reserved
Reserved
Reserved
EN_USER_BP
Reserved
Reserved
Bit 7-6: Reserved.
Bit 5: User define BEEP output function. Write 1, the BEEP is always active. Write 0, this function is
inactive. (Default 0)
Bit 4-0: Reserved.
7.37 Reserved Register -- Index 54h--58h (Bank 4)
7.38 Real Time Hardware Status Register I -- Index 59h (Bank 4)
Register Location: 59h
Power on Default Value <7:0> 0000,0000. Reset by MR.
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
VCORE_STS
Reserved
+3.3VIN_STS
+5VIN_STS
TEMP2_STS
TEMP1_STS
FAN1_STS
FAN2_STS
Publication Release Date: April 1999
- 43 - Revision 0.55
Page 50
W83783S
Preliminary
Bit 7: FAN 2 Status. Set 1, the fan speed counter is over the limit value. Set 0, the fan speed counter
is in the limit range.
Bit 6: FAN 1 Status. Set 1, the fan speed counter is over the limit value. Set 0, the fan speed counter
is in the limit range.
Bit 5: Temperature sensor 1 Status. Set 1, the voltage of temperature sensor is over the limit value.
Set 0, the voltage of temperature sensor is in the limit range.
Bit 4: Temperature sensor 2 Status. Set 1, the voltage of temperature sensor is over the limit value.
Set 0, the voltage of temperature sensor is in the limit range.
Bit 3: +5V Voltage Status. Set 1, the voltage of +5V is over the limit value. Set 0, the voltage of +5V
is in the limit range.
Bit 2: +3.3V Voltage Status. Set 1, the voltage of +3.3V is over the limit value. Set 0, the voltage of
+3.3V is in the limit range.
Bit 1: Reserved.
Bit 0: VCORE Voltage Status. Set 1, the voltage of VCORE is over the limit value. Set 0, the
voltage of VCORE is in the limit range.
7.39 Real Time Hardware Status Register II -- Index 5Ah (Bank 4)
Register Location: 5Ah
Power on Default Value <7:0> 0000,0000. Reset by MR.
Attribute: Read Only
Size: 8 bits
7 6 5 4 3 2 1 0
+12VIN_STS
-12VIN_STS
-5VIN_STS
FAN3_STS
Reserved
Reserved
Reserved
Reserved
Publication Release Date: April 1999
- 44 - Revision 0.55
Page 51
W83783S
Preliminary
Bit 7-4: Reserved
Bit 3: FAN3 Voltage Status. Set 1, the fan speed counter is over the limit value. Set 0, the fan speed
counter is during the limit range.
Bit 2: -5V Voltage Status. Set 1, the voltage of -5V is over the limit value. Set 0, the voltage of -5V is
during the limit range.
Bit 1: -12V Voltage Status. Set 1, the voltage of -12V is over the limit value. Set 0, the voltage of -
12V is during the limit range.
Bit 0: +12V Voltage Status. Set 1, the voltage of +12V is over the limit value. Set 0, the voltage of
+12V is in the limit range.
Publication Release Date: April 1999
- 45 - Revision 0.55
Page 52
8. SPECIFICATIONS
12ts
8.1 Absolute Maximum Ratings
PARAMETER RATING UNIT
Power Supply Voltage -0.5 to 7.0 V
Input Voltage -0.5 to VDD+0.5 V
W83783S
Preliminary
Operating Temperature 0 to +70
Storage Temperature -55 to +150
Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the
device.
° C
° C
8.2 DC Characteristics
(Ta = 0° C to 70° C, VDD = 5V ± 10%, VSS = 0V)
PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
I/O
- TTL level bi-directional pin with source-sink capability of 12 mA
12t
Input Low Voltage VIL 0.8 V
Input High Voltage VIH 2.0 V
Output Low Voltage VOL 0.4 V IOL = 12 mA
Output High Voltage VOH 2.4 V IOH = - 12 mA
Input High Leakage ILIH +10
Input Low Leakage ILIL -10
I/O
- TTL level bi-directional pin with source-sink capability of 12 mA and schmitt-trigger level
input
Input Low Threshold Voltage Vt- 0.5 0.8 1.1 V VDD = 5 V
µA
µA
VIN = VDD
VIN = 0V
Input High Threshold Voltage Vt+ 1.6 2.0 2.4 V VDD = 5 V
Hysteresis VTH 0.5 1.2 V VDD = 5 V
Output Low Voltage VOL 0.4 V IOL = 12 mA
Output High Voltage VOH 2.4 V IOH = - 12 mA
Input High Leakage ILIH +10
Input Low Leakage ILIL -10
- 46 - Revision 0.55
µA
µA
Publication Release Date: April 1999
VIN = VDD
VIN = 0V
Page 53
W83783S
8.2 DC Characteristics, continued
PARAMETER SYM. MIN. TYP. MAX. UNIT CONDITIONS
Preliminary
OUT
Output Low Voltage VOL 0.4 V IOL = 12 mA
Output High Voltage VOH 2.4 V IOH = -12 mA
OD8 - Open-drain output pin with sink capability of 8 mA
Output Low Voltage VOL 0.4 V IOL = 8 mA
OD12 - Open-drain output pin with sink capability of 12 mA
Output Low Voltage VOL 0.4 V IOL = 12 mA
OD48 - Open-drain output pin with sink capability of 48 mA
Output Low Voltage VOL 0.4 V IOL = 48 mA
INt - TTL level input pin
Input Low Voltage VIL 0.8 V
Input High Voltage VIH 2.0 V
Input High Leakage ILIH +10
Input Low Leakage ILIL -10
IN
Input Low Threshold Voltage Vt- 0.5 0.8 1.1 V VDD = 5 V
Input High Threshold Voltage Vt+ 1.6 2.0 2.4 V VDD = 5 V
- TTL level output pin with source-sink capability of 12 mA
12t
- TTL level Schmitt-triggered input pin
ts
µA
µA
VIN = VDD
VIN = 0 V
Hysteresis VTH 0.5 1.2 V VDD = 5 V
Input High Leakage ILIH +10
Input Low Leakage ILIL -10
Publication Release Date: April 1999
- 47 - Revision 0.55
µA
µA
VIN = VDD
VIN = 0 V
Page 54
8.3 AC Characteristics
8.3.1 Serial Bus Timing Diagram
SCL
t
HD;SDA
t
SCL
t
HD;DAT
W83783S
Preliminary
t
SU;STO
SDA IN
SDA OUT
VALID DATA
Serial Bus Timing Diagram
Serial Bus Timing
PARAMETER SYMBOL MIN. MAX. UNIT
SCL clock period t
Start condition hold time t
Stop condition setup-up time t
DATA to SCL setup time t
DATA to SCL hold time t
SCL and SDA rise time t
SCL and SDA fall time t
t
SU;DAT
HD;SDA
SU;STO
SU;DAT
HD;DAT
SCL
R
F
10 uS
4.7 uS
4.7 uS
120 nS
5 nS
1.0 uS
300 nS
Publication Release Date: April 1999
- 48 - Revision 0.55
Page 55
9. HOW TO READ THE TOP MARKING
The top marking of W83783S
W83783S
2826978Y-61
814OB
Left: Winbond logo
1st line: Winbond logo and the type number: W83783S
2nd line: Tracking code 2 826978Y-61
2: wafers manufactured in Winbond FAB 2
826978Y-61: wafer production series lot number
3rd line: Tracking code 814 O B
814: packages made in '98, week 14
O: assembly house ID; A means ASE, S means SPIL, O means OSE
B: IC revision
W83783S
Preliminary
Publication Release Date: April 1999
- 49 - Revision 0.55
Page 56
10. PACKAGE DIMENTIONS
(24-pin SOP)
W83783S
Preliminary
24
1
Headquarters
No. 4, Creation Rd. III
Science-Based Industrial Park
Hsinchu, Taiwan
TEL: 886-35-770066
FAX: 886-35-789467
www: http://www.winbond.com.tw/
Taipei Office
11F, No. 115, Sec. 3, Min-Sheng East Rd.
Taipei, Taiwan
TEL: 886-2-7190505
FAX: 886-2-7197502
TLX: 16485 WINTPE
13
E
12
Winbond Electronics (H.K.) Ltd.
Rm. 803, World Trade Square, Tower II
123 Hoi Bun Rd., Kwun Tong
Kowloon, Hong Kong
TEL: 852-27516023-7
FAX: 852-27552064
Control demensions are in milmeters .
E
θ
Winbond Electronics
(North America) Corp.
2730 Orchard Parkway
San Jose, CA 95134 U.S.A.
TEL: 1-408-9436666
FAX: 1-408-9436668
Please note that all data and specifications are subject to change without notice. All the
trademarks of products and companies mentioned in this data sheet belong to their
respective owners.
These products are not designed for use in life support appliances, devices, or systems
where malfunction of these products can reasonably be expected to result in personal
injury. Winbond customers using or selling these products for use in such applications
do so at their own risk and agree to fully indemnify Winbond for any damages resulting
from such improper use or sale.
Publication Release Date: April 1999
- 50 - Revision 0.55
Page 57
11. APPLICATION CIRCUIT OF WINBOND W83783S
Beep Circuits
BEEP/GPO#
TO PIIX4
R2
R
510
3VCC
THRM#
{
EXTSMI#
3VCC
R4R0
SDA
SCL VT1/PII1
R3
0
R
+12V
JP2
3
2
1
HEADER 3
(CPU FAN)
Fan Speed Control Circuit
PWMOUT1
VCC
1N4148
R12
R
10K
R7
R
4.7K
D2
R21 510
R13
R
100
LS1
SPEAKER
Q1
NPN
3904
U1
R8
R
4.7K
OVT# OVT# +3.3VIN
SMDAT
SMCLK
1K
R22
10K
CLKIN
FANIN2
Q2
3906
C3
47u
SMI# SMI# GNDA
R5
R
4.7K
R24
4.7K
R6
R
4.7K
R23 27K
R20 4.7K
R19
Q3
MOSFET N
2N7002
VID4
FANIN1 VT1/PII1
FANIN2 VREF
PWMOUT1 VCORE
BEEP/GPO# +12VIN
VID3 -12VIN
SCL VID1
SDA VID2
+12V
1N4148
JP1
+
3
2
1
HEADER 3
(SYSTEM FAN)
1
VID4
2
FANIN1
3
FANIN2
4
FANIN3/PWMOUT1
5
OVT#
6
BEEP/GPO#
7
VID3
8
CLKIN
9
SMI#/PWMOUT2
10
GNDD
11
SCL
12
SDA
W83783S
D1
R18
4.7K
R17 27K
FANIN1
R16
10K
VT1/PII1
VCORE
+3.3VIN
+12VIN
-12VIN
-5VIN/VT2/PII2
VREF
GNDA
VOLTAGE SENSORING CIRCUIT
R10 R
56K 1%
R32 R
56K 1%
10K 1%
PIID+
PIID-
R9 R
10K
R1 R
10K
R14
10K 1%
R30 R
R31 R
30K 1%
CPU_VCORE
3VCC
R
R15
28K 1%
232K 1%
-12VIN
R33
120K 1%
R
R11
-5VIN
R
R
RT1
THERMISTOR
-12V
+12V
10K 1%
T
C4
CAPACITOR NON-POL
3300p
-5V
GNDA
VCORE
+3.3VIN
VCC
C1
CAP
10u
24
VCC
23
22
21
20
19
18
17
16
15
VID0
14
VID1
13
VID2
-5VIN
C2
CAP
0.1u
VID0
L1
INDUCTOR
FB
TEMPERATURE SENSORING CIRCUIT
+12VIN
GNDA
VREF
(Select one of the
following method)
VREF GNDA
VREF VT1/PII1
Note:
1. VT1 is for CPU temperature
2. VT2 is for SYSTEM temperature
CPU Voltage ID output
3VCC
R25
R26
R27
R28
R29
10K
10K
VID4
VID3
VID2
VID1
VID0
WINBOND ELECTRONICS CORP.
W83783S Application Circuit
1 1Wednesday, July 22, 1998
0.2
PIIVID4
PIIVID3
PIIVID2
PIIVID1
PIIVID0
10K
10K
10K
Title
Size Document Number Rev
Custom
Date: Sheet of
Loading...