Datasheet W24258S-70LL, W24258S-55LL, W24258Q-70LL, W24258Q-55LL, W24258-70LL Datasheet (Winbond Electronics)

W24258/LL

R

CS

WE

OE

32K × 8 CMOS STATIC RAM

GENERAL DESCRIPTION

The W24258/LL is a normal speed, very low power CMOS static RAM organized as 32768 × 8 bits
that operates on a single 5-volt power supply. This device is manufactured using Winbond's high
performance CMOS technology.

FEATURES

• Low power consumption:

− Active: 350 mW (max.)

− Standby: 25 µW (max.)

• Access time: 55/70 nS (max.)

• Single 5V power supply

• Fully static operation

• All inputs and outputs directly TTL compatible

• Three-state outputs

• Battery back-up operation capability

• Data retention voltage: 2V (min.)

• Packaged in 28-pin 600 mil DIP, 330 mil SOP

and standard type one TSOP (8 mm × 13.4
mm)

PIN CONFIGURATIONS

1

A14
A12

2

A7

3

A6

4

A5

5

A4

6

28-pin

7

DIP
8
9
10
11
12
13
14

28-pin
TSOP

A11

A13
V

A14
A12

WE

A3
A2

A1

A0

I/O1
I/O2
I/O3

V

SS

1

OE

2
3

A9

4

A8

5
6
7

DD

8
9
10

A7

11

A6

12

A5

13

A4

14

A3

BLOCK DIAGRAM

CLK GEN.

A12
A14
A2

WE
CS
OE

A3
A4
A5
A6
A7
A13
I/O1
I/O8

DATA
CNTRL.

CLK
GEN.

28

V

DD

27

WE

26

A13

25

A8

24

A9

23

A11

22

OE

21

A10

20

CS

19

I/O8

18

I/O7

17

I/O6

16

I/O5

15

I/O4

PRECHARGE CKT.

R
O

W

CORE CELL ARRAY
D
E
C

64 X 8 COLUMNS

O
D
E

COLUMN DECODER

A11

512 ROWS

I/O CKT.

A10 A1 A0A8A9

PIN DESCRIPTION

A10

28

CS

27

I/O8

26

I/O7

25

I/O6

24

I/O5

23

I/O4

22

V

21

SS

I/O3

20

I/O2

19

I/O1

18

A0

17

A1

16

A2

15

SYMBOL DESCRIPTION

A0−A14

I/O1−I/O8

Address Inputs
Data Inputs/Outputs
Chip Select Input
Write Enable Input
Output Enable Input

VDD Power Supply
VSS Ground

Publication Release Date: November 1998

- 1 - Revision A5

TRUTH TABLE

CSOEWE

WE

CS

CS

CS

W24258/LL

MODE

H X X Not Selected High Z ISB, ISB1

L H H Output Disable High Z IDD
L L H Read Data Out IDD
L X L Write Data In IDD

I/O1−I/O8

VDD CURRENT

DC CHARACTERISTICS

Absolute Maximum Ratings

PARAMETER RATING UNIT

Supply Voltage to VSS Potential -0.5 to +7.0 V
Input/Output to VSS Potential -0.5 to VDD +0.5 V
Allowable Power Dissipation 1.0 W
Storage Temperature -65 to +150
Operating Temperature 0 to 70

Note: Exposure to conditions beyond those listed under Absolute Maximum Ratings may adversely affect the life and reliability of the

device.

°C
°C

Operating Characteristics

(VDD = 5V ±10%; VSS = 0V; TA = 0° C to 70° C)

PARAMETER SYM. TEST CONDITIONS MIN. TYP.* MAX. UNIT

Input Low Voltage VIL - -0.5 - +0.8 V
Input High Voltage VIH - +2.2 - VDD +0.5 V
Input Leakage Current ILI VIN = VSS to VDD -1 - +1
Output Leakage Current ILO

Output Low Voltage VOL IOL = +2.1 mA - - 0.4 V
Output High Voltage VOH IOH = -1.0 mA 2.4 - - V
Operating Power IDD

Supply Current

Standby Power Supply
Current

Note : Typical parameter is measured under ambient temperature TA = 25° C and VDD = 5V.

ISB

ISB1

VI/O = VSS to VDD, CS = VIH
(min.) or OE = VIH (min.) or

= VIL (max.)

= VIL (max.), I/O = 0

I/O = 0 mA, Cycle =
min.

Duty =100%

= VIH (min.), Cycle = min.

Duty = 100%

≥ VDD -0.2V

- 2 -

55 - - 70 mA
70 - - 60 mA

-1 - +1

- - 3 mA

- 0.7 5

µA
µA

µA

W24258/LL

CAPACITANCE

(VDD = 5V, TA = 25° C, f = 1 MHz)

PARAMETER SYM. CONDITIONS MAX. UNIT

Input Capacitance CIN VIN = 0V 6 pF
Input/Output Capacitance CI/O VOUT = 0V 8 pF

Note: These parameters are sampled but not 100% tested.

AC CHARACTERISTICS

AC Test Conditions

PARAMETER CONDITIONS

Input Pulse Levels 0V to 3.0V
Input Rise and Fall Times 5 nS
Input and Output Timing Reference Level 1.5V
Output Load See the drawing below

AC TEST LOADS AND WAVEFORM

1 TTL

OUTPUT

100 pF
Including
Jig and
Scope

3.0V

0V

OUTPUT

5 pF
Including
Jig and
Scope

(For T T T T T T )

CLZ, OLZ, CHZ, OHZ, WHZ, OW

90%

10%

5 nS

90%

10%

5 nS

1 TTL

Publication Release Date: November 1998

- 3 - Revision A5

W24258/LL

CS, WE

AC Characteristics, continued
(VDD = 5V ±10%; VSS = 0V; TA = 0° C to 70° C)

Read Cycle

PARAMETER SYM. W24258-55LL W24258-70LL UNIT

MIN. MAX. MIN. MAX.

Read Cycle Time TRC 55 - 70 - nS
Address Access Time TAA - 55 - 70 nS
Chip Select Access Time TACS - 55 - 70 nS
Output Enable to Output Valid TAOE - 27 - 35 nS
Chip Selection to Output in Low Z TCLZ* 10 - 10 - nS
Output Enable to Output in Low Z TOLZ* 5 - 5 - nS
Chip Deselection to Output in High Z TCHZ* - 25 - 30 nS
Output Disable to Output in High Z TOHZ* - 25 - 30 nS
Output Hold from Address Change TOH 10 - 10 - nS

∗ These parameters are sampled but not 100% tested

Write Cycle

PARAMETER SYM. W24258-55LL W24258-70LL UNIT

MIN. MAX. MIN. MAX.

Write Cycle Time TWC 55 - 70 - nS
Chip Selection to End of Write TCW 40 - 50 - nS
Address Valid to End of Write TAW 40 - 50 - nS
Address Setup Time TAS 0 - 0 - nS
Write Pulse Width TWP 40 - 50 - nS
Write Recovery Time

Data Valid to End of Write TDW 25 - 30 - nS
Data Hold from End of Write TDH 0 - 0 - nS
Write to Output in High Z TWHZ* - 20 - 25 nS
Output Disable to Output in High Z TOHZ* - 20 - 25 nS
Output Active from End of Write TOW 5 - 5 - nS

∗ These parameters are sampled but not 100% tested

TWR 0 - 0 - nS

- 4 -

TIMING WAVEFORMS

AA

Read Cycle 1

(Address Controlled)

Address

DOUT

Read Cycle 2

(Chip Select Controlled)

W24258/LL

T

RC

T

T

OH

T

OH

CS

D

OUT

Read Cycle 3

(Output Enable Controlled)

Address

OE

CS

D

OUT

T

ACS

T

CLZ

RC

T

T

AA

AOE

T

TOLZ

TACS

CLZT

T

CHZ

TOH

TOHZ

CHZ

T

Publication Release Date: November 1998

- 5 - Revision A5

Timing Waveforms, continued

Write Cycle 1

Address

OE

CS

WE

DOUT

DIN

W24258/LL

T

WC

T

WR

T

CW

T

AW

T

T

AS

T

OHZ

(1, 4)

WP

T

DW

T

DH

Write Cycle 2
(OE = VIL Fixed)

T

WC

Address

T

T

CW

CS

AWT

WE

D

OUT

DIN

T

AS

T

WP

T

WHZ

(1, 4)

Notes:

1. During this period, I/O pins are in the output state, so input signals of opposite phase to the outputs should not be applied.

2. The data output from DOUT are the same as the data written to DIN during the write cycle.

3. DOUT provides the read data for the next address.

4. Transition is measured ±500 mV from steady state with CL = 5 pF. This parameter is guaranteed but not 100% tested.

WR

T

OH

T

OW

DW

TDH

T

(2) (3)

- 6 -

DATA RETENTION CHARACTERISTICS

CS

CS

(TA = 0° C to 70° C)

PARAMETER SYM. TEST CONDITIONS MIN. TYP. MAX. UNIT

W24258/LL

VDD for Data Retention VDR
Data Retention Current IDDDR
Chip Deselect to Data

TCDR See data retention waveform 0 - - nS

≥ VDD -0.2V
≥ VDD -0.2V, VDD = 3V

2.0 - - V

- - 2

Retention Time
Operation Recovery Time TR TRC* - - nS

* Read Cycle Time

DATA RETENTION WAVEFORM

DD

V

CS

0.9DDV
T

CDR

IH

V

>

VDR2V

=

>

DD

VCS

=

-0.2V

0.9DDV

R

T

IH

V

ORDERING INFORMATION

PART NO. ACCESS

TIME

(nS)

W24258-55LL 55 70 5 600 mil DIP
W24258-70LL 70 60 5 600 mil DIP
W24258S-55LL 55 70 5 330 mil SOP
W24258S-70LL 70 60 5 330 mil SOP
W24258Q-55LL 55 70 5 Standard type one TSOP
W24258Q-70LL 70 60 5 Standard type one TSOP

OPERATING

CURRENT MAX.

(mA)

STANDBY

CURRENT MAX.

(

µ

A)

PACKAGE

µA

Notes:

1. Winbond reserves the right to make changes to its products without prior notice.

2. Purchasers are responsible for performing appropriate quality assurance testing on products intended for use in applications
where personal injury might occur as a consequence of product failure.

Publication Release Date: November 1998

- 7 - Revision A5

PACKAGE DIMENSIONS

28-pin P-DIP

W24258/LL

28

E

1

1

S

A

2A

L

D

B
B

1

28-pin SOP Wide Body

28

1

D

S

Seating Plane

e

Dimension in Inches

Symbol

Min. Nom. Max. Max.Nom.Min.

A

0.010

1

A

0.150

0.155

2

A

0.016

1

0.008

0.540

0.090

1

0.120
0 15

0.630

A

Dimension in Inches

Min.

0.004

1

0.093

2

0.014

E

0.059

E

0 10

0.018

0.060 1.52

0.010

1.460 1.470

0.6000.590

0.100

0.130

0.650

Nom.

0.098

0.016

0.0100.008

0.713

0.067

B
B
c
D

15

14

E

A

1

Base Plane

Seating Plane

e

1

a

e

A

c

E
E1
e
L

a

e
S

Notes:

1. Dimensions D Max. & S include mold flash or
tie bar burrs.

2. Dimension E1 does not include interlead flash.

3. Dimensions D & E1 include mold mismatch and
are determined at the mold parting line.

4. Dimension B1 does not include dambar
protrusion/intrusion.

5. Controlling dimension: Inches.

6. General appearance spec. should be based on
final visual inspection spec.

Symbol

A

15

E H

E

14

b

e

1

θ

L

Detail F

A
A

b
c

D
E

e
H
L
L
S

y

θ

Notes:

1. Dimensions D Max. & S include mold flash

e

1

A

A

2

A

y

1

See Detail F

c

L

E

or tie bar burrs.

2. Dimension b does not include dambar
protrusion/intrusion.

3. Dimensions D & E include mold mismatch
and determined at the mold parting line.

4. Controlling dimension: Inches.

5. General appearance spec should be based
on final visual inspection spec.

Dimension in mm

0.210

0.160

0.022

0.0640.058

0.014

0.610

0.5500.545

0.110

0.140

0.670

0.090

14.99

13.72

16.00 16.51

5.33

0.25

3.81

3.94

4.06

0.41

0.46

0.56

2.29

0.25

37.08

15.24

2.54 2.79

3.30

1.631.47

0.36

37.34

15.49

13.9713.84

3.56

17.02

2.29

0.20

3.05

.

Dimension in mm

Nom.

Max. Max.

Min.

0.112

0.103

0.020

0.014 0.36

0.733

0.3360.3310.326

0.4770.4650.453 12.1211.8111.51

0.044

0.075

0.004

2.85

0.10

2.36

2.49

2.62

0.36

0.41

0.51

0.250.20

18.62

18.11

8.53

8.28

8.41

1.12 1.27 1.420.044 0.050 0.056

0.91 1.120.028 0.036

0.71

1.50

1.70

1.91

1.190.047

0.10

0

10

.

150

- 8 -

Package Dimensions, continued

28-pin Standard Type One TSOP

H

D

D

1

e

b

θ

L

L1

W24258/LL

Dimension In Inches

Symbol

Min.

Nom. Max. Min. Nom.

c

E

A

2

A

A

1

Y

A

0.002

A

1

A

2

b
c
D
E
HD
e

L

L

1

Y

θ

Controlling dimension: Millimeters

0.040

0.035

0.007 0.008 0.011

0.004

0.006

0.461 0.465 0.469

0.311 0.315 0.319

0.520 0.528 0.536

0.022

0.020

0.024 0.028

0.010

0.000
0 3

0.047

0.006

0.041

0.008

0.004
5

Dimension In mm

0.05

1.000.95

0.20 0.27

0.17

0.10

0.15 0.21

11.70

11.80

8.00 8.10

7.90

13.20

13.40

0.55

0.50

0.60

0.25

0.00
3 5

0

Max.

1.20

0.15

1.05

11.90

13.60

0.70

0.10

Publication Release Date: November 1998

- 9 - Revision A5

VERSION HISTORY

VERSION DATE PAGE DESCRIPTION

A4 Apr. 1998 2 Add standby power supply current (ISB1) typical

parameter when operation temperature TA = 25° C

A5 Nov. 1998 1, 2, 7, 9 Deduct reverse type one TSOP package

W24258/LL

Headquarters

No. 4, Creation Rd. III,
Science-Based Industrial Park,
Hsinchu, Taiwan
TEL: [phone]
FAX: [phone]
http://www.winbond.com.tw/
Voice & Fax-on-demand: 886-2-27197006

Winbond Electronics (H.K.) Ltd.

Rm. 803, World Trade Square, Tower II,
123 Hoi Bun Rd., Kwun Tong,
Kowloon, Hong Kong
TEL: [phone]
FAX: [phone]

Taipei Office

11F, No. 115, Sec. 3, Min-Sheng East Rd.,
Taipei, Taiwan
TEL: [phone]
FAX: [phone]

Note: All data and specifications are subject to change without notice.

- 10 -

Winbond Electronics North America Corp.
Winbond Memory Lab.
Winbond Microelectronics Corp.
Winbond Systems Lab.

2727 N. First Street, San Jose,
CA 95134, U.S.A.
TEL: [phone]
FAX: [phone]