
● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
P-Channel Enhancement-Mode
YY = Year Sealed
WW = Week Sealed
= “Green” Packaging
S i V P
2 1 0 6
Y Y W W
Vertical DMOS FET
VP2106
Features
Free from secondary breakdown
►
Low power drive requirement
►
Ease of paralleling
►
Low C
►
High input impedance and high gain
►
Excellent thermal stability
►
Integral source-to-drain diode
►
and fast switching speeds
ISS
Applications
Motor controls
►
Converters
►
Amplifiers
►
Switches
►
Power supply circuits
►
Drivers (relays, hammers, solenoids, lamps,
►
General Description
The Supertex VP2106 is an enhancement-mode (normallyoff) transistor that utilizes a vertical DMOS structure
and Supertex’s well-proven silicon-gate manufacturing
process. This combination produces a device with the
power handling capabilities of bipolar transistors, and the
high input impedance and positive temperature coefficient
inherent in MOS devices. Characteristic of all MOS
structures, this device is free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a
wide range of switching and amplifying applications where
very low threshold voltage, high breakdown voltage, high
input impedance, low input capacitance, and fast switching
speeds are desired.
memories, displays, bipolar transistors, etc.)
Ordering Information
Device
Package Option
TO-92
BV
DSS
/BV
(V)
DGS
VP2106 VP2106N3-G -60 12 -500
-G indicates package is RoHS compliant (‘Green’)
R
DS(ON)
(max)
(Ω)
I
D(ON)
(min)
(mA)
Absolute Maximum Ratings
Parameter Value
Drain-to-source voltage BV
Drain-to-gate voltage BV
Gate-to-source voltage ±20V
Operating and storage temperature -55OC to +150OC
Soldering temperature* 300OC
Absolute Maximum Ratings are those values beyond which damage to the device
may occur. Functional operation under these conditions is not implied. Continuous
operation of the device at the absolute rating level may affect device reliability. All
voltages are referenced to device ground.
* Distance of 1.6mm from case for 10 seconds.
DSS
DGS
Pin Configuration
TO-92 (N3)
Product Marking
Package may or may not include the following marks: Si or
TO-92 (N3)

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Thermal Characteristics
90%
10%
90%
90%
10%
10%
PULSE
GENERATO
R
V
DD
R
L
Output
D.U.T
.
t
(ON)
t
d(ON)
t
(OFF)
t
d(OFF)
t
F
t
r
INPUT
INPUT
OUTPUT
0V
V
DD
R
GEN
0V
-10V
Package
TO-92 -250 -800 0.74 125 170 -250 -800
Notes:
† ID (continuous) is limited by max rated Tj .
(continuous)
I
D
(mA)
VP2106
I
†
D
(pulsed)
(mA)
Power Dissipation
@TA = 25OC
(W)
θ
jc
(OC/W)
θ
ja
(OC/W)
I
DR
(mA)
†
I
DRM
(mA)
Electrical Characteristics (T
= 25OC unless otherwise specified)
A
Sym Parameter Min Typ Max Units Conditions
BV
V
ΔV
GS(th)
GS(th)
I
GSS
Drain-to-source breakdown voltage -60 - - V VGS = 0V, ID = -1.0mA
DSS
Gate threshold voltage -1.5 - -3.5 V VGS = VDS, ID= -1.0mA
Change in V
with temperature - 5.8 6.5 mV/OC VGS = VDS, ID= -1.0mA
GS(th)
Gate body leakage - -1.0 -100 nA VGS = ± 20V, VDS = 0V
- - -10 µA VGS = 0V, VDS = Max Rating
I
DSS
I
D(ON)
R
DS(ON)
ΔR
DS(ON)
G
C
C
C
t
d(ON)
t
d(OFF)
V
t
Notes:
1.
2.
OSS
RSS
t
t
Zero gate voltage drain current
- - -1.0 mA
VDS = 0.8 Max Rating,
VGS = 0V, TA = 125°C
On-state drain current -0.5 -1.0 - A VGS = -10V, VDS = -25V
Static drain-to-source on-state resistance
- 11 15
VGS = -5.0V, ID = -100mA
Ω
- 9.0 12 VGS = -10V, ID = -500mA
Change in R
Forward transductance 150 200 - mmho VDS = -25V, ID = -500mA
FS
Input capacitance - 45 60
ISS
Common source output capacitance - 22 30
Reverse transfer capacitance - 3.0 8.0
with temperature - 0.55 1.0 %/OC VGS = -10V, ID = -500mA
DS(ON)
VGS = 0V,
pF
VDS = -25V,
f = 1.0MHz
Turn-on delay time - 4.0 5.0
Rise time - 5.0 8.0
r
Turn-off delay time - 5.0 9.0
Fall time - 4.0 8.0
f
Diode forward voltage drop - -1.2 -2.0 V VGS = 0V, ISD = -500mA
SD
Reverse recovery time - 400 - ns VGS = 0V, ISD = -500mA
rr
All D.C. parameters 100% tested at 25OC unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
All A.C. parameters sample tested.
ns
VDD = -25V,
ID = -500mA,
R
GEN
= 25Ω
Switching Waveforms and Test Circuit
2

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves
Output Characteristics
-2.0
-1.6
-1.2
-0.8
-0.4
0
Saturation Characteristics
-1.0
-0.8
-0.6
-0.4
-0.2
-0
Maximum Rated Safe Operating Area
-0.1 -100-10-1.0
-0.01
-0.1
-1.0
-0.001
Thermal Response Characteristics
)d
e
zilamro
n(
ecn
a
tsise
R
lamr
e
hT
1.0
0.8
0.6
0.4
0.2
0
0.001 1
00.01 0.1 1.0
Transconductance vs. Drain Current
Power Dissipation vs. Ambient Temperatur
e
0 15010050
1.0
0.5
0
1257525
VDS = 25V
TO -9 2 ( DC )
0 -
10 -20 -30 -50-40
0 -2 -4 -
6 -10-8
TO -9 2 ( pu lse d)
250
200
150
100
50
0
0 -0.2 -0.4 -0.6 -1.0-0.8
-7V
-6V
-5V
-4V
-3V
-9V
-7V
-6V
-5V
-4V
-8V
-9V
TA = 25°C
TO -9 2
PD= 1.0W
TA = 2 5°C
TO -9 2
V
GS
= -10V
VDS (volts)
I
D
)sere
p
m
a(
I
D
)serepma(
VDS (volts)
VGS= -10V
G
SF
)sne
m
ei
si
llim(
ID (amperes) TA (°C)
P
D
)sttaw(
TA = 125°C
TA = 25°C
TA= -55°C
VDS (volts)
I
D
)ser
e
pma(
tp (seconds)
-8V
VP2106
3

● 1235 Bordeaux Drive, Sunnyvale, CA 94089 ● Tel: 408-222-8888 ● www.supertex.com
Typical Performance Curves (cont.)
Gate Drive Dynamic Characteristics
On-Resistance vs. Drain Current
Transfer Characteristics
Capacitance vs. Drain-to-Source Voltage
100
75
50
25
0
)sdarafocip
(
C
0 -10 -20 -30 -40
0 -2 -4 -6 -
8 -10
-1.0
-0.8
-0.6
-0.4
-0.2
0
-50 0 50 100 150
-1.1
-1.0
20
16
12
8
4
0
1.4
1.2
1.0
0.8
0.6
-1
0
-8
-6
-4
-2
0
-50 0
50 100 150
35 pF
VGS = -10V
125°
C
0 -0.2 -0.4 -0.6 -1.0-0.8
f = 1MHz
C
ISS
C
OSS
C
RSS
-0.9
101 pF
2.0
1.6
1.2
0.8
0.4
0
V
(th)
@ 1mA
R
DS(ON)
@ -10V, 0.5A
25
°C
0
1.0
2.0
R
)NO(SD
)smho(
V
B
SSD
)d
e
zi
lam
ro
n(
Tj (°C)
I
D
(amperes)
BV
DSS
Variation with Temperature
VGS = -5V
Tj (°C)
V
)
h
t(SG
)dezilamron(
V
(th)
and RDS Variation with Temperature
VGS (volts)
I
D
)ser
e
p
m
a(
R
)NO(SD
)dezilamron(
VDS = -25V
T
A
= -55
°C
QG (nanocoulombs)
V
SG
)stlov(
VDS (volts)
VDS= -40V
V
DS
= -10V
VP2106
4

Supertex inc. does not recommend the use of its products in life support applications, and will not knowingly sell them for use in such applications unless it receives an
adequate “product liability indemnification insurance agreement.” Supertex inc. does not assume responsibility for use of devices described, and limits its liability to the
replacement of the devices determined defective due to workmanship. No responsibility is assumed for possible omissions and inaccuracies. Circuitry and specifications
are subject to change without notice. For the latest product specifications refer to the Supertex inc. website: http//www.supertex.com
.
©2009 All rights reserved. Unauthorized use or reproduction is prohibited.
1235 Bordeaux Drive, Sunnyvale, CA 94089
Tel: 408-222-8888
www.supertex.com
3-Lead TO-92 Package Outline (N3)
Seating Plane
1
2
3
Front View
Side View
Bottom View
E1
E
D
e1
L
e
c
1 2 3
b
A
VP2106
Symbol A b c D E E1 e e1 L
MIN .170 .014
Dimensions
(inches)
NOM - - - - - - - - -
MAX .210 .022
JEDEC Registration TO-92.
* This dimension is not specified in the original JEDEC drawing. The value listed is for reference only.
† This dimension is a non-JEDEC dimension.
Drawings not to scale.
Supertex Doc.#: DSPD-3TO92N3, Version D080408.
(The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline
†
†
.014
.022
†
.175 .125 .080 .095 .045 .500
†
.205 .165 .105 .105 .055 .610*
information go to http://www.supertex.com/packaging.html.)
Doc.# DSFP-VP2106
A012409
5