Datasheet VND810MSP Datasheet (SGS Thomson Microelectronics)

®

VND810 MS P

DOUBLE CHANNEL HIGH SIDE DRIVER

TYPE R

DS(on)

I

OUT

V

CC

VND810 M SP 150 mΩ (*) 0.6 A (*) 36 V

(*) Per each channel

■ CMOS COMPATIBLE INPUTS

■ OPEN DRAIN STATUS OUTPUTS

■ ON STATE OPEN LOAD DETECTION

■ OFF STATE OPEN LOAD DETECTION

■ SHORTED LOAD PROTECTION

■ UNDERVOLTAGE AND OVERVOLTAGE

SHUTDOWN

■ PROTECTION AGAINST LOSS OF GROUND

■ VERY LOW STAND-BY CURRENT

■ REVERSE BATTERY PROTECTIO N (**)

DESCRIPTION

The VND810MSP is a monolithic device designed in STMicroelectronics VIPower M0-3 Technology, intended for driving any kind of load with one side connected to ground. Active VCC pin voltag e clamp protects th e dev ice against low energy spikes (see ISO7637 transient compatibility table). Active current limitation

BLO C K DIAG RA M

10

1

PowerSO-10

™

ORDER CODES

PACKAGE TUBE T&R

PowerSO-1 0™ VND810MSP VND810MSP13TR

combined with thermal shutdown and automatic restart protects the device against overloa d. The current limitati on threshold is aimed at d etecting the 21W/12V sta ndard bulb as an o verload fault. The device detects open load condition both in on and off state. Output shorted to VCC is detected in the off state. Device automatically turns off in case of ground pin disconnection.

V

cc

V

cc

CLAMP

GND

INPUT1

STATUS1

OVERTEMP. 1

INPUT2

STATUS2

OVERTEMP. 2

(**) See appl ic ation schema tic at page 8

LOGIC

OVERVO LTAGE

UNDERVOLTAGE

CLAMP 1

DRIVER 1

CURRENT LIMITER 1

OPENLOAD ON 1

OPENLOAD OFF 1

CLAMP 2

DRIVER 2

CURRENT LIMITER 2

OPENLOAD ON 2

OPENLOAD OFF 2

OUTPUT1

OUTPUT2

July 2002 1/18

1

VND810MSP

ABSOLUTE MAXIMUM RATI NG

Symbol Parameter Value Unit

tot

DC Supply Voltage 41 V Reverse DC Supply Voltage - 0.3 V

CC

DC Reverse Ground Pin Current - 200 mA DC Output Current Internally Limited A Reverse DC Output Current - 6 A DC Input Current +/- 10 mA DC Status Cur rent +/- 10 mA Electros tatic Discharge (Hum an Body Model: R=1.5KΩ; C=100pF)

- INPUT

- STATUS

- OUTPU T

- V

CC

Maximum Switching Energy (L=400mH; R

=0Ω; V

L

=13.5V; T

bat

=150ºC; IL=0.9A)

jstart

4000 4000 5000 5000

225 mJ

Powe r Dissipation TC=25°C 52 W Junction Operating Temperature Internally Limited °C

j

Case Operating Temperature - 40 to 150 °C

c

Storage Temperature - 55 to 150 °C

V

CC

- V

- I

GND

I

OUT

- I

OUT

I

IN

I

stat

V

ESD

E

MAX

P

T

stg

CONNECTION DIAGRAM (TOP VIEW)

V V V V

GROUND INPUT 1 STATUS 1 STA TUS 2 INPUT 2

V

CC

CURRENT AND VOLTAGE CO NVENTIONS

I

IN1

STAT1

V

I

IN2

V

STAT2

V

IN1

V

INP UT 1

STAT1

STATUS 1

IN2

INPUT 2

STAT2

STATUS 2

6 7 8 9

10

11

GND

5 4 3

2 1

V

CC

OUTPUT 1

OUTPUT 2

I

GND

OUTPUT 1 OUTPUT 1 N.C. OUTPUT 2 OUTPUT 2

I

OUT2

V

OUT2

I

OUT1

V

OUT1

I

S

V

CC

2/18

1

VND810MSP

THERMAL DATA

Symbol Parameter Value Unit

R

thj-case

R

thj-amb

(*) When mounted on a standard single-sided FR-4 board with 0.5cm2 of Cu (at least 35µm thick). Horizontal mounting and no artificial air

flow.

ELECTRICAL CHARACTERISTICS (8V<VCC<36V; -40°C < Tj <150°C, unless otherwise specified)

(Per each channel) POWER OUTPUTS

Symbol Parameter Test Conditions Min Typ Max Unit

V

CC

V

USD

V

OV

R

ON

I

S

I

L(off1)

I

L(off2)

I

L(off3)

I

L(off4)

(**) Per device

SWITCHING (VCC=13V)

Symbol Parame ter Test Condit ions Min Typ Max Unit

t

d(on)

t

d(off )

dV

OUT

dt

(on)

dV

OUT

dt

(off)

Thermal R esistanc e Junctio n-case 2.4 °C/W

Thermal Resistance Junctio n-ambient 52.4 (*) °C/W

(**) Operating Supply Voltage 5.5 13 36 V

(**) Undervoltage Shut -down 3 4 5.5 V

(**) Overvoltage Shut-down 36 V

On State Resistance

(**) Supply Current

Off State Output Curr ent VIN=V Off State Output Curr ent VIN=0V; V Off State Output Curr ent VIN=V Off State Output Curr ent VIN=V

Turn-on Delay Time

Turn-off Delay Time

/

Turn-on Voltage Slope

/

Turn-off Voltage Slope

=0.5A; Tj=25°C

I

OUT

I

=0.5A; VCC>8V

OUT

Off State; V Off State; V

=13V; VIN=V

CC

=13V; VIN=V

CC

OUT OUT

Tj=25°C

On State; V

RL=13Ω from VIN rising edge to V

=1.3V

OUT

RL=13Ω from VIN falling edge to V

=11.7V

OUT

RL=13Ω from V V

=10.4V

OUT

RL=13Ω from V V

=1.3V

OUT

=13V; VIN=5V; I

CC

=0V 0 50 µA

OUT

=3.5V -75 0 µA

OUT

=0V; Vcc=13V; Tj =125°C 5 µA

OUT

=0V; Vcc=13V; Tj =25°C 3 µA

OUT

=1.3V to

OUT

=11.7V to

OUT

=0V =0V;

=0A

12

30 µs

See

relative

diagram

See

relative

diagram

150 320

40

25

5

7

mΩ mΩ

µA

mA

V/µs

LOGIC INPUT

Symbol Param eter Test Conditions Min Typ Max Unit

Input Low Level 1.25 V

IL

Low Level Input Current VIN = 1.25V 1 µA

IL

Input High Level 3.25 V

IH

High Level Input Curr ent VIN = 3.25V 10 µA Input Hyst eresis Vo lt age 0.5 V

I

Input Clamp Voltage

= 1mA

IN

I

= -1mA

IN

66.8

-0.7

8V

V

I

V

I

IH

I(hyst)

ICL

V

3/18

1

VND810MSP

ELECTRICAL CHARACTERISTICS (continued)

STATUS PIN

Symbol Parameter Test Conditions Min Typ Max Unit

V

STAT

I

LSTAT

C

STAT

V

SCL

Status Low Output Voltage I Status Leakage Current Normal Operation; V Status Pin Input

Capacitance Status Clamp Voltage

PROTECTIONS

Symbol Parame ter Test Condit ions Min Typ Max Unit

T

TSD

T

t

SDL

I

V

demag

hyst

lim

Shut-down Temperature 150 175 200 °C

Reset Temp erature 135 °C

R

Ther ma l Hy steresi s 7 15 °C Status Delay in Overload

Conditions Current limitation Turn-off Output Clamp

Voltage

= 1.6 mA 0.5 V

STAT

Normal Operation; V

= 1mA

I

STAT

I

= - 1mA

STAT

Tj>T

TSD

= 5V 10 µA

STAT

= 5V 100 pF

STAT

66.8

-0.7

0.6 0.9 1.2

5.5V<V I

OUT

<36V

CC

=0.5A; L=6mH VCC-41 VCC-48 VCC-55 V

8V

20 µs

1.2

V

A A

OPENLOAD DETECTION

Symbol Parameter Test Conditions Min Typ Max Unit

I

OL

t

DOL(on)

V

t

DOL(off)

OPEN LOAD STATUS TIMING (with external pull-up)

V

INn

V

STAT n

Openload ON State Detectio n Threshol d Openload ON State Detection Delay

=5V 20 40 80 mA

V

IN

=0A 200 µs

I

OUT

Openload OFF State Voltage Detection

OL

Threshold Openload Detection Delay

at Turn Off

V

OUT

t

DOL(off)

VIN=0V 1.5 2.5 3.5 V

> V

OL

I

OUT

t

DOL(on)

< I

OL

V

INn

V

STAT n

1000 µs

OVER TEMP STATUS TIMING

Tj > T

TSD

t

SDL

t

SDL

4/18

2

1

Switching time Waveforms

V

OUTn

dV

/dt

OUT

(on)

V

INn

t

d(on)

80%

10%

VND810MSP

90%

dV

/dt

OUT

(off)

t

td

(off)

t

TRUTH TABLE

CONDITIONS INPUT OUTPUT STATUS

Normal Ope ration

Current Limitation

Overtem peratur e

Undervoltage

Overvoltage

Output Voltage > V

Output Current < I

OL

L H

L H H

L H

L

H

L X X

(T

< T

j

> T

j

L

L H

H

L H

TSD TSD

H H

H

) H

) L

H L

X X

H H

L H

H L

5/18

1

VND810MSP

ELECTRICAL TRANS IENT REQUIREMENTS ON VCC PIN

ISO T/R 7637/1

Test Pulse

1 -25 V -50 V -75 V -100 V 2 ms 10 Ω

2 +25 V +50 V +75 V +100 V 0.2 ms 10 Ω 3a -2 5 V -50 V -100 V -150 V 0.1 µs 50 Ω 3b + 25 V +50 V +75 V +100 V 0.1 µs 50 Ω

4 -4 V -5 V -6 V -7 V 100 ms, 0.01

5 +26.5 V +46.5 V +66.5 V +86.5 V 400 ms, 2

ISO T/R 76 37 / 1

Test Pulse

1CCCC

2CCCC 3aCCCC 3bCCCC

4CCCC

5CEEE

CLASS CONTENTS

C All functions of the device are perfo rmed as designed after exposure to disturbance . E One or more functions of the dev ice is not performed as desig ned after exposure and cannot be

returned to prop er operat ion without replacing the devi ce.

I II III IV Delays and

I II III IV

TEST LEVELS

TEST LEVELS RESULTS

Impedance

Ω

6/18

1

Figure1: Waveforms

INPUT

n

OUTPUT VOLTAGE STATUS

V

CC

INPUT

n

OUTPUT VOLTAGE STATUS

V

CC

INPUT

n

OUTPUT VOLTAGE STATUS

VND810MSP

NORMAL OPERATION

n

UNDERVOLTAGE

V

USDhyst

V

USD

n

OVERVOLTAGE

VCC<V

OV

n

undefined

VCC>V

OV

INPUT

n

OUTPUT VOLTAGE STATUS

INPUT

n

OUTP U T VO LTAGE STATUS

T

INPUT

n

j

n

OUTPUT CURRENT

STATUS

n

OPEN LOAD wi th external pull-up

V

n

V

OL

OUT>VOL

OPEN LOAD without external pull-up

n

OVERTEMPE RATURE

T

TSD

T

R

n

7/18

1

VND810MSP

APPLICATION SCHEMATIC

+5V

R

prot

µ

C

R

prot

R

prot

R

prot

STA T US1

INPUT1

STA TUS2

INPUT2

GND PROTECTION NETWORK AGAINST REVERSE BATTERY

Soluti on 1: Resistor in the ground line (R can be us ed with any t ype of load .

The fo llowin g is an indica tion on how to dim ension the

resistor.

R

GND

1) R

2) R

where -I be found in the absolute maximum rating section of the

≤ 600mV / I

GND

≥ (−VCC) / (-I

GND

is the DC re vers e grou nd pi n cu rren t an d can

GND

S(on)max

)

GND

.

device’s datasheet. Power Dissipation in R

battery situations) is:

= (-VCC)2/R

P

D

GND

(when VCC<0: during reverse

GND

This resistor can be shared amongst several different HSD. Please note that the value of this resis t o r sh ould be calcul ated with form ula (1) wher e I sum of the maximum on-state currents of the different

S(on)max

devices. Please note that if the microprocessor ground is not

common with the device ground then the R produce a shift (I and the status output values. This shift will vary

S(on)max

* R

) in the input thresholds

GND

only). This

GND

becomes t he

GND

will

V

CC

OUTPUT1

D

OUTPUT2

GND

R

V

GND

depending on how man y devic es are ON in the ca se of several high side drivers sharing the same R

If the calculated power dissipation leads to a large resistor or seve ral de vic es have to s hare t he s ame r esisto r then the ST suggest to utiliz e Solu tio n 2 (see below ).

Solution 2: A resistor (R

D

GND

A diode (D

=1kΩ) should be inserted in parallel to

GND

if the devi ce will be driving an inductive load.

) in the gro und line.

GND

This small signal diode can be safely shared amongst several different HSD . Also in this case, the presence of the ground network wi ll produce a shift ( input threshold and the status output values if the microprocessor ground is not common with the device ground. This shift will not vary if more than one HSD shares the same diode/resistor netw ork.

LOAD DUMP PROTECTION

Dld is necessary (Voltage Transient Suppressor) if the load dump peak voltage exceeds VCC max DC rating. The same applies if the device will be subject to transients on the VCC line that are grea ter tha n the ones sh own in the ISO T/R 7637/1 table.

D

ld

.

GND

j

600mV) in t he

8/18

1

C I/Os PROTECTION:

µ

If a ground protection network is used and negative transient are present on the VCC line, the control pins will be pulled negative. ST suggests to insert a resistor (R in line to prevent the µC I/Os pins to latch-up.

prot

The valu e of these res istors is a compromise between the leakage current of µC and the current required by the HSD I/Os (Input levels compatibility) with the latch-up limit of µC I/Os.

-V

CCpeak/Ilatchup

prot

≤ (V

OHµC-VIH-VGND

) / I

IHmax

≤ R

Calcu lation exam ple:

CCpeak

prot

= - 100V and I

≤ 65kΩ .

For V 5kΩ ≤ R Recomm ended R

value is 10kΩ.

prot

latchup

≥ 20mA; V

OHµC

≥ 4.5V

OPEN LOAD DETECTION IN OFF STATE

Off state open load detection requires an external pull-up resistor (R

positive supply voltage (V

) connected between OUTPUT pin and a

PU

) like the +5 V line used to

PU

Open Load detection in off state

VND810MSP

supply the microprocesso r. The exter na l res i stor ha s to be s ele ct ed ac cor d ing t o th e follow i n g re quirements:

)

1) no fal s e ope n l oad in dica t ion w he n l oad is conn ec ted: in this c ase we ha ve to av oid V

V

; this results in the following condition

Olmin

V

=(VPU/(RL+RPU))RL<V

OUT

2) no misdetection when load is disconnected: in this case the V

has to be higher than V

OUT

results in the following condition R I

.

L(off2)

Beca us e I

may si gn ifi c a ntly increase if V

s(OFF)

high (up t o several mA ), the pul l-up resi stor R be conne cted t o a su pp ly t ha t is swit ch ed OFF when t h e

module is in standby. The values of V

OLmin

, V

OLmax

and I

the Electrical Characteristics section.

to be high er tha n

OUT

Olmin.

PU

L(off2)

<(V

are available in

; this

OLmax

PU–VOLma x

is pulled

out

should

PU

)/

INPUT

STATUS

DRIVER

+

LOGIC

V batt. VPU

CC

V

OUT

+

R

-

OL

V

GROUND

L(off2)

I

PU

R

L

R

9/18

11

VND810MSP

Off State Output Current

IL(off1) (uA)

1.6

1.44

1.28

1.12

0.96

0.8

0.64

0.48

0.32

0.16 0

-50 -25 0 25 50 75 100 125 150 175

Off state Vcc=36V

Vin=Vout=0V

High Level Input Current

Iih (uA)

5

4.5

3.5

2.5

1.5

0.5

Vin=3.25V

4

3

2

1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

Input Clamp Voltage Status Leakage Current

Vicl (V)

8

7.8

7.6

7.4

7.2

7

6.8

6.6

6.4

6.2 6

Iin=1mA

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Ilstat (uA)

0.05

0.04

Vstat=5V

0.03

0.02

0.01

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

10/18

1

Vstat (V)

0.8

0.7

Istat=1.6mA

0.6

0.5

0.4

0.3

0.2

0.1

0

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Status Clamp VoltageStatus Low Output Voltage

Vscl (V)

8

7.8

7.6

7.4

7.2

6.8

6.6

6.4

6.2

Istat=1mA

7

6

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

VND810MSP

On State Resistance Vs T

Ron (mOhm)

400

350

300

250

200

150

100

50

0

-50 -25 0 25 50 75 100 125 150 175

Iol (mA)

60

55

50

45

40

35

30

25

20

15 10

-50 -25 0 25 50 75 100 125 150 175

Iout=1A

Vcc=8V; 13V & 36V

Vcc=13V

Vin=5V

case

Tc (ºC)

Tc (°C)

On State Resistance Vs V

Ron (mOhm)

400

350

300

250

200

150

100

50

0

5 10152025303540

Iout=1A

Vcc (V)

Input High LevelOpenload On State Detection Threshold

Vih (V)

3.6

3.4

3.2

3

2.8

2.6

2.4

2.2

2

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

CC

Tc= 125ºC

Tc= 25ºC

Tc= - 40ºC

Vil (V)

2.6

2.4

2.2

2

1.8

1.6

1.4

1.2

1

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Input Hysteresis VoltageInput Low Level

Vhyst (V)

1.5

1.4

1.3

1.2

1.1

1

0.9

0.8

0.7

0.6

0.5

-50 -25 0 25 50 7 5 100 125 150 175

Tc (°C)

11/18

1

VND810MSP

Overvoltage Shutdown

Vov (V)

50

48

46

44

42

40

38

36

34

32 30

-50 -25 0 25 50 75 100 125 150 175

Openload Off State Voltage Detection Threshold

Vol (V)

5

4.5

4

3.5

3

2.5

2

1.5

1

0.5 0

Vin=0V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Turn-on Voltage Slope Turn-off Voltage Slope

dVout/dt(on) (V/ms)

1000

900

800

700

600

500

400

300

200

100

Vcc=13V

Rl=13Ohm

0

-50 -25 0 25 50 75 100 125 150 175

Tc (ºC)

dVout/dt(off) (V/ms)

500

450

400

350

300

250

200

150

100

50

0

Vcc=13V

Rl=13Ohm

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Tc (ºC)

I

LIM

12/18

11

Vs T

case

Ilim (A)

2

1.8

1.6

1.4

1.2

1

0.8

0.6

0.4

0.2 0

Vcc=13V

-50 -25 0 25 50 75 100 125 150 175

Tc (°C)

Maximum turn off current versus load inductance

LMAX (A)

I

10

1

VND810MSP

A

B C

0.1 1 10 100 1000 10000

A = Single Pulse at T

B= Repetitive pulse at T C= Repetitive Pulse at T

Conditions: VCC=13.5V

Values are generated with RL=0Ω In case of repetitive pulses, T

the temperature specified above for curves B and C.

VIN, I

L

=150ºC

Jstart

=100ºC

Jstart

=125ºC

Jstart

jstart

Demagnetization

(at beginning of each demagnetization) of every pulse must not exceed

L(mH)

Demagnetization

t

13/18

VND810MSP

PowerSO-10™ PC Board

PowerSO-10™ THERMAL DATA

R

thj-amb

Layout condition of Rth and Zth measurements (PCB FR 4 area= 58mm x 58mm, PCB thi ckness=2mm, Cu thickness=35µm, Copper areas: from minimum pad lay-out to 8cm

Vs PCB copper area in open box free air condition

2

).

RTHj_amb (°C/W)

55

Tj-Tamb=50°C

50

45

40

35

14/18

30

0246810

PCB Cu heatsink area (cm^2)

PowerSO-10 Thermal Impedance Junction Ambient Single Pulse

ZTH (°C/W)

1000

VND810MSP

100

10

1

0.1

0.0001 0.001 0.01 0.1 1 10 100 1000 Time (s)

Thermal fitting model of a doubl e channel H SD in PowerSO-10

Pulse calculation formula

Z

THδ

where

RTHδ Z

δ tpT⁄=

THtp

2

0.5 cm

2

6 cm

1 δ–()+⋅=

Tj_1

Pd1

Tj_2

C1

C1 C2

R1

Pd2

Thermal Parameter

C3 C4

R3R1 R6R5R2

R2

T_amb

C5 C6C2

R4

Area/island (cm2)0.56

R1 (°C/W) 0.35 R2 (°C/W) 1.8 R3( °C/W) 1.1 R4 (°C/W) 0.8 R5 (°C/W) 12 R6 (°C/W) 37 22 C1 (W.s/°C) 0.0001 C2 (W.s/°C) 7.00E-04 C3 (W.s/°C) 0.008 C4 (W.s/°C) 0.3 C5 (W.s/°C) 0.75 C6 (W.s/°C) 3 5

15/18

VND810MSP

PowerSO-10™ MECHANICAL DATA

DIM.

MIN. TYP MAX. MIN. TYP. MAX.

mm. inch

A 3.35 3.65 0.132 0.144

A (*) 3.4 3.6 0.134 0.142

A1 0.00 0.10 0.000 0.004

B 0.40 0.60 0.016 0.024

B (*) 0.37 0.53 0.014 0.021

C 0.35 0.55 0.013 0.022

C (*) 0.23 0.32 0.009 0.0126

D 9.40 9.60 0.370 0.378

D1 7.40 7.60 0.291 0.300

E 9.30 9.50 0.366 0.374

E2 7.20 7.60 0.283 300

E2 (*) 7.30 7.50 0.287 0.295

E4 5.90 6.10 0.232 0.240

E4 (*) 5.90 6.30 0.232 0.248

e 1.27 0.050 F 1.25 1.35 0.049 0.053

F (*) 1.20 1.40 0.047 0.055

H 13.80 14.40 0.543 0.567

H (*) 13.85 14.35 0.545 0.565

h 0.50 0.002 L 1.20 1.80 0.047 0.070

L (*) 0.80 1.10 0.031 0.043

α 0º 8º 0º 8º

α (*) 2 º 8º 2º 8º

(*) Muar only POA P013P

16/18

HE

h

A

F

A1

10

1

eB

0.25

D

= =

D1

= =

E2

DETAIL "A"

B

0.10 A

E

SEATING

PLANE

A

C

α

B

E4

SEATING

PLANE

A1

L

P095A

111

1

VND810MSP

PowerSO-10™ SUGGESTED PAD LAYOUT

14.6 - 14.9

10.8 - 11

6.30

0.67 - 0.73 1 2 3

9.5 4

5

10

0.54 - 0.6

9 8 7

1.27

6

TAPE AND REEL SHIPMENT (suf fix “13TR”)

TUBE SHIPMENT (no suffix)

C

A

B

A

All dimensi ons ar e in mm.

Base Q.ty Bulk Q.ty Tube length (± 0.5) A B C (± 0.1)

Casablanca 50 1000 532 10.4 1 6.4 0.8

Muar 50 1000 532 4.9 17.2 0.8

MUARCASABLANCA

B

REEL DIMENSIONS

Base Q.ty 600 Bulk Q.ty 600 A (max) 330 B (min) 1.5 C (± 0.2) 13

F 20.2 G (+ 2 / -0) 24.4 N (min) 60 T (max) 30.4

C

TAPE DIMENSIONS

According to Electronic Industries Association (EIA) Standard 481 rev. A, Feb 1986

Tape width W 24 Tape Hole Spacing P0 (± 0.1) 4 Component Spacing P 24 Hole Diameter D (± 0.1/-0) 1.5 Hole Diameter D1 (min) 1.5 Hole Position F (± 0.05) 11.5 Compartm ent Depth K (max) 6.5 Hole Spacing P1 (± 0.1) 2

All dimensions are in mm.

Top

cover

tape

End

500mm min

All dimensions are in mm.

Empty components pockets saled with cover tape.

User direction of feed

Start

No componentsNo components Components

500mm min

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VND810MSP

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