Datasheet UT6264BPC-70L, UT6264BPC-70LL, UT6264BPC-70, UT6264BSC-70LL, UT6264BSC-70L Datasheet (UTRON)

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A

A1 A

A

UTRON

Rev 1.0

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8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

FEATURES

Access time : 35/70ns (max.)

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Low power consumption:

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Operating : 60/40 mA (typical) Standby :0.3 mA (typical) normal

2 µA (typical) L-version 1 µA (typical) LL-version

Single 5V power supply

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All inputs and outputs TTL compatible

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Fully static operation

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Three state outputs

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Data retention voltage : 2V (min.)

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Package : 28-pin 600 mil PDIP

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28-pin 330 mil SOP

FUNCTIONAL BLOCK DIAGRAM

A4

A3

12

A7

A6

A5

A8

A2

I/O1

.

I/O8

CE

WE

OE

DECODER

.

CONTROL

.

CONTROL

ROW

I/O

LOGI C

.

256 ROWS × 256 COLUMNS

.

. .

.

COLUMN DECODER

10

MEMORY ARRAY

.

. .

COLUMN I/ O

11

9

0

The UT6264B is a 65,536-bit low power CMOS static random access memory organized as 8,192 words by 8 bits. It is fabricated using high performance, high reliability CMOS technology.

The UT6264B is designed for high-speed and low power application. It is particularly well suited for battery back-up nonvolatile memory application.

The UT6264B operates from a single 5V power supply and all inputs and outputs are fully TTL compatible.

PIN CONFIGURATION

Vcc

28

27

WE

26

NC

25

A8

24

A9

23

A11

22

OE

21

A10

20

CE

19

I/O8

18

I/O7

17

I/O6

16

I/O5

15

I/O4

VCC

VSS

NC

A12

A7

A6

A5

A4

A3

A2

A1

A0

I/O1

I/O2

I/O3

Vss

1

2

3

4

UT6264B

5

6

7

8

9

10

11

12

13

14

PDIP / SOP

PIN DESCRIPTION

SYMBOL DESCRIPTION

A0 – A12 Address Inputs I/O1 – I/O8 Data Inputs/Outputs

CE

WE

OE

Chip Enable Input

Write Enable Input Output Enable Input

VCC Power Supply VSS Ground NC No Connection

GENERAL DESCRIPTION

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UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

1



L

UTRON

Rev 1.0

____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

ABSOLUTE MAXIMUM RATINGS

*

PARAMETER SYMBOL RATING UNIT

Terminal Voltage with Respect to VSS V Operating Temperature TA 0 to +70

Storage Temperature T

-0.5 to +7.0 V

TERM

-65 to +150

STG

℃

℃ Power Dissipation PD 1 W DC Output Current I Soldering Temperature (under 10 sec) Tsolder 260

*Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect device reliability.

50 mA

OUT

℃

TRUTH TABLE

MODE

CE

OE

Standby H X X High - Z Output Disable L H H High - Z Read L L H Write L X L

Note: H = VIH, L=VIL, X = Don't care.

I/O OPERATION SUPPLY CURRENT

WE

I

SB, ISB1

D

OUT

D

IN

I

CC

I

CC

I

CC

DC ELECTRICAL CHARACTERISTICS

(VCC = 5V±10%, TA = 0℃ to 70℃)

PARAMETER

Input High Voltage Input Low Voltage V Input Leakage Current I

Output Leakage Current I

Output High Voltage V Output Low Voltage V

Supply Current

Standby Power Supply Current

SYMBO

V

I

TEST CONDITION MIN. TYP. MAX. UNIT

2.2 - VCC+0.5 V

IH

- 0.5 - 0.8 V

IL

LI

LO

OH

OL

CC

SB

SB1

≦

V

SS

≦

V

SS

=V

CE

I

= - 1mA 2.4 - - V

OH

I

= 4mA - - 0.4 V

OL

Cycle time=Min,

= V

CE

= V

CE

≧

IH

V

IN

V

I/O

or

IL , II/O

IH

-0.2V

CC

≦

OE

VCC

V

CC

=V

=

IH

0mA,

or

WE

Normal - 1 10 mA I

- L/- LL - - 3 mA

Normal - 0.3 5 mA

- 1 - 1 µA

=V

IL

- 35 - 60 100 mA Operating Power

- 70 - 40 70 mA

- L - 2 100

A

µ

- LL - 1 50

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

2

A

µ



UTRON

Rev 1.0

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CAPACITANCE

(T

8K X 8 BIT LOW POWER CMOS SRAM

=25℃, f=1.0MHz)

A

UT6264B

PARAMETER SYMBOL MIN. MAX UNIT

Input Capacitance Input/Output Capacitance

Note : These parameters are guaranteed by device characterization, but not production tested.

C

IN

I/O

-

8 pF 10 pF

AC TEST CONDITIONS

Input Pulse Levels 0V to 3.0V Input Rise and Fall Times 5ns Input and Output Timing Reference Levels 1.5V Output Load CL = 100pF, IOH/IOL = -1mA/4mA

AC ELECTRICAL CHARACTERISTICS

(1) READ CYCLE

PARAMETER

Read Cycle Time Address Access Time Chip Enable Access Time Output Enable Access Time Chip Enable to Output in Low Z Output Enable to Output in Low Z Chip Disable to Output in High Z Output Disable to Output in High Z Output Hold from Address Change

(2) WRITE CYCLE PARAMETER SYMBOL UT6264B-35 UT6264B-70 UNIT

Write Cycle Time Address Valid to End of Write Chip Enable to End of Write Address Set-up Time Write Pulse Width Write Recovery Time Data to Write Time Overlap Data Hold from End of Write Time Output Active from End of Write Write to Output in High Z

*These parameters are guaranteed by device characterization, but not production tested.

SYMBOL UT6264B-35 UT6264B-70 UNIT

tRC 35 - 70 - ns tAA - 35 - 70 ns t

ACE

tOE - 25 - 35 ns t

CLZ*

t

OLZ*

t

CHZ*

t

OHZ*

tOH 5 - 5 - ns

tWC 35 - 70 - ns tAW 30 - 60 - ns tCW 30 - 60 - ns tAS 0 - 0 - ns tWP 25 - 50 - ns tWR 0 - 0 - ns tDW 20 - 30 - ns tDH 0 - 0 - ns t

OW*

t

WHZ*

(VCC = 5V±10% , TA = 0℃ to 70℃)

MIN. MAX. MIN. MAX.

- 35 - 70 ns

10 - 10 - ns 5 - 5 - ns

- 25 - 35 ns

MIN. MAX. MIN. MAX.

5 - 5 - ns

- 15 - 25 ns

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

3



UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

TIMING WAVEFORMS

READ CYCLE 1

(Address Controlled)

Address

t

OH

DOUT Data Valid

READ CYCLE 2

(CE and OE Controlled)

(1,2,4)

t

RC

t

AA

t

OH

(1,3,5,6)

t

RC

Address

t

AA

CE

t

ACE

OE

t

OE

t

CLZ

D

OUT

Notes :

1.

2. Device is continuously selected

3. Address must be valid prior to or coincident with

4.

5. t

6. At any given temperature and voltage condition, t

is HIGH for read cycle.

WE

is LOW.

OE

, t

CLZ

OLZ

High-z

, t

CHZ

and t

are specified with CL=5pF. Transition is measured ±500mV from steady state.

OHZ

t

OLZ

=V

IL.

CE

Data valid

transition; otherwise t

CE

is less than t

CHZ

CLZ

t

CHZ

, t

OHZ

t

OHZ

t

OH

is the limiting parameter.

AA

is less than t

OLZ.

High-Z

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

4



(4)

UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

WRITE CYCLE 1

Address

CE

WE

D

OUT

IN

(WE Controlled)

t

AS

(1,2,3,5)

t

WC

t

AW

t

CW

t

WP

t

WHZ

High-Z

t

DW

Data Valid

t

WR

t

OW

(4)

t

DH

WRITE CYCLE 2

(CE Controlled)

(1,2,5)

t

WC

Address

CE

WE

D

Notes :

1.

2. A write occurs during the overlap of a low

3. During a drivers

to turn off and data to be placed on the bus.

4. During this period, I/O pins are in the output state, and input singals must not be applied.

5. If the

6. t

OUT

D

IN

must be HIGH during all address transitions.

or

CE

WE

controlled with write cycle with

WE

LOW transition occurs simultaneously with or after

CE

impedance state.

and t

OW

are specified with CL=5pF. Transition is measured ±500mV from steady state.

WHZ

t

AW

t

AS

t

WHZ

(4)

t

CW

and a low

CE

t

OE

WP

LOW, t

High-Z

t

DW

Data Valid

.

WE

must be greater than t

WP

LOW transition, the outputs remain in a high

WE

t

WR

t

DH

WHZ+tDW

to allow the I/O

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

5



UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

(T

DATA RETENTION CHARACTERISTICS

= 0℃ to 70℃)

A

PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT

Vcc for Data Retention

Data Retention Current I

Chip Disable to Data

Retention Time Recovery Time

t

= Read Cycle Time

RC*

V

t

DR

CDR

R

≧ V

CE

Vcc=3V

≧ V

CE

See Data Retention Waveforms (below)

CC

-0.2V

2.0 - 5.5 V

- L - 1 50 µA

- LL - 0.5 20 µA

0 - - ns

t

- - ns

RC*

DATA RETENTION WAVEFORM

VCC

CE

VSS

4.5V

t

CDR

Date Retention Mode

CE

DR

≧ 2V

≧ V

CC

-0.2V

V

4.5V

t

R

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

6



UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

PACKAGE OUTLINE DIMENSION

28 pin 600 mil PDIP Package Outline Dimension

SYMBOL

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

UNIT

INCH(BASE) MM(REF)

A1 0.010 (MIN) 0.254 (MIN) A2

B 0.020 (MAX) 0.508(MAX)

B1 0.055 (MAX) 1.397(MAX)

c 0.012 (MAX) 0.304 (MAX) D 1.430 (MAX) 36.322 (MAX) E 0.625 (MAX) 15.87 (MAX)

E1 0.52 (MAX) 13.208 (MAX)

e 0.100 (TYP) 2.540(TYP)

eB 0.6 (TYP) 15.24 (TYP)

L 0.180(MAX) 4.572(MAX) S 0.06 (MAX) 1.524 (MAX)

Q1 0.08(MAX) 2.032(MAX)

Θ

0.150±0.005 3.810±0.127

o

(MAX) 15o(MAX)

15

7



UTRON

Rev 1.0

_____________________________________________________________________________________________

28 pin 330 mil SOP Package Outline Dimension

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

UNIT

SYMBOL

A 0.120 (MAX) 3.048 (MAX) A1 0.002(MIN) 0.05(MIN) A2

b

c 0.010 (TYP) 0.254(TYP) D 0.728 (MAX) 18.491 (MAX) E 0.350 (MAX) 8.890 (MAX)

E1

e 0.050 (TYP) 1.270(TYP)

L 0.05 (MAX) 1.270 (MAX)

L1

S 0.047 (MAX) 1.194 (MAX)

y 0.003(MAX) 0.076(MAX)

Θ

0

INCH(BASE) MM(REF)

0.098±0.005 2.489±0.127

0.015 (MIN)

0.020 (MAX)

0.465±0.012 11.811±0.305

0.067±0.008 1.702±0.203

o

〜

10

0

0.38 (MIN)

0.50 (MAX)

o

〜

10

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

8



UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

ORDERING INFORMATION

PART NO. ACCESS TIME

(ns)

UT6264BPC-70 70 5 mA 28 PIN PDIP UT6264BPC-70L 70 100

UT6264BPC-70LL 70 50 UT6264BSC-35 35 5 mA 28 PIN SOP

UT6264BSC-35L 35 100 UT6264BSC-35LL 35 50 UT6264BSC-70 70 5 mA 28 PIN SOP

UT6264BSC-70L 70 100 UT6264BSC-70LL 70 50

STANDBY CURRENT

µ

A)

(

A 28 PIN PDIP

µ

A 28 PIN PDIP

µ

A 28 PIN SOP

µ

A 28 PIN SOP

µ

A 28 PIN SOP

µ

A 28 PIN SOP

µ

PACKAGE

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

9



UTRON

Rev 1.0

_____________________________________________________________________________________________

8K X 8 BIT LOW POWER CMOS SRAM

UT6264B

REVISION HISTORY

REVISION DESCRIPTION DATE

Rev. 0.9 Original. Nov,2000 Rev. 1.0 The symbols CE#,OE# and WE# are revised as

CE,OE

and

WE

Jun.18,2001

_____________________________________________________________________________________________

UTRON TECHNOLOGY INC. P80039 1F, No. 11, R&D Rd. II, Science-Based Industrial Park, Hsinchu, Taiwan, R. O. C. TEL: 886-3-5777882 FAX: 886-3-5777919

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