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171 RadHard MSI Logic
UT54ACS245S
Radiation-Hardened
Schmitt Octal Bus Transceiver with Three-State Outputs
FEATURES
Three-state outputs drive bus line directly
radiation-hardened CMOS
- Latchup immune
High speed
Low power consumption
Single 5 volt supply
Available QML Q or V processes
Flexible package
- 20-pin DIP
- 20-lead flatpack
DESCRIPTION
The UT54ACS245S is a non-inverting octal bus transceiver
with Schmitt Trigger input levels. The circuit is designed for
asynchronous two-way communication between data buses.
The control function implementation minimizes external timing
requirements.
The device allows data transmission from the A bus to the B bus
or from the B bus to the A bus depending upon the logic level
at the direction control (DIR) input. The enable input (G) disables the device so that the buses are effectively isolated.
The device is characterized over full military temperature range
of -55 C to +125 C.
FUNCTION TABLE
PINOUTS
20-Pin DIP
Top View
20-Lead Flatpack
Top View
LOGIC SYMBOL
ENABLEGDIRECTION
CONTROL DIR OPERATION
L L B Data To A Bus
L H A Data To B Bus
H X Isolation
1
2
3
4
5
7
6
20
19
18
17
16
14
15
DIR
A1
A2
A3
A4
A5
A6
V
DD
G
B1
B2
B3
B5
8
13
A7
B6
B4
9
12
A8 B7
10
11
V
SS
B8
1
2
3
4
5
7
6
20
19
18
17
16
14
15
DIR
A1
A2
A3
A4
A5
A6
V
DD
G
B1
B2
B3
B5
8
13
A7
B6
B4
9
12
A8
B7
10
11
V
SS
B8
(19)
G G3
(2)
A1
(3)
A2
(4)
(18)
B1
(16)
(17)
B2
Note:
1. Logic symbol in accordance with ANSI/IEEE Std 91-1984 and IEC
Publication 617-12.
A3
(5)
A4
(6)
A5
(7)
A6
B3
(13)
B6
(14)
B5
(15)
B4
(8)
A7
(9)
A8
(11)
B8
(12)
B7
(1)
DIR 3 EN1 (BA)
3 EN2 (AB)
1
2
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RadHard MSI Logic 172
UT54ACS245S
LOGIC DIAGRAM
A1
A2
A3
A4
A5
A6
A7
A8
DIR
(1)
(2)
(19)
(18)
(3)
(17)
(4)
(16)
(5)
(15)
(6)
(14)
(7)
(13)
(8)
(12)
(9)
(11)
B1
B2
B3
B6
B5
B4
B8
B7
G
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173 RadHard MSI Logic
UT54ACS245S
RADIATION HARDNESS SPECIFICATIONS
1
Notes:
1. Logic will not latchup during radiation exposure within the limits defined in the table.
2. Device storage elements are immune to SEU affects.
ABSOLUTE MAXIMUM RATINGS
Note:
1. Stresses outside the listed absolute maximum ratings may cause permanent damage to the device. This is a stress rating only, functional operation of the device
at these or any other conditions beyond limits indicated in the operational sections is not recommended. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
PARAMETER LIMIT UNITS
Total Dose 1.0E6 rads(Si)
SEU Threshold
2
80
MeV-cm2/mg
SEL Threshold
3
120
MeV-cm2/mg
Neutron Fluence 1.0E14
n/cm
2
SYMBOL PARAMETER LIMIT UNITS
V
DD
Supply voltage -0.3 to 7.0 V
V
I/O
Voltage any pin -.3 to VDD +.3 V
T
STG
Storage Temperature range -65 to +150 C
T
J
Maximum junction temperature +175 C
T
LS
Lead temperature (soldering 5 seconds) +300 C
JC
Thermal resistance junction to case 20 C/W
I
I
DC input current 10 mA
P
D
Maximum power dissipation 1 W
SYMBOL PARAMETER LIMIT UNITS
V
DD
Supply voltage 4.5 to 5.5 V
V
IN
Input voltage any pin 0 to V
DD
V
T
C
Temperature range -55 to + 125 C
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RadHard MSI Logic 174
UT54ACS245S
DC ELECTRICAL CHARACTERISTICS
7
(VDD = 5.0V 10%; VSS = 0V6, -55 C < TC < +125 C)
SYMBOL PARAMETER CONDITION MIN MAX UNIT
VT+
Schmitt Trigger, positive going threshold
1
ACS
.7V
DD
V
VT-
Schmitt Trigger, negative going threshold
1
ACS
.3V
DD
V
V
H
Schmitt Trigger, typical range of hysteresis
2
ACS
0.6 1.5 V
I
IN
Input leakage current
ACS VIN = V
DD
or V
SS
-1
1 A
V
OL
Low-level output voltage
3
ACS
I
OL
= 100 A
0.25 V
V
OH
High-level output voltage
3
ACS
I
OH
= -100 A
VDD - 0.25 V
I
OL
Output current (Sink)
10
VIN=VDD or V
SS
VOL=0.4V
12 mA
I
OH Output current (Source)
10
VIN=VDD or V
SS
VOH=VDD - 0.4
-12 mA
I
OZ
Three-state output leakage current VO = VDD and V
SS
-30 30 A
I
OS Short-circuit output current
2, 4
ACS
VO = VDD and V
SS
-300 300 mA
P
total
Power dissipation
2, 8, 9
CL = 50pF 2.0 mW/MHz
I
DDQ
Quiescent Supply Current VDD = 5.5V 10 A
C
IN Input capacitance
5
= 1MHz @ 0V 15 pF
C
OUT Output capacitance
5
= 1MHz @ 0V 15 pF
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175 RadHard MSI Logic
UT54ACS245S
Notes:
1. Functional tests are conducted in accordance with MIL-STD-883 with the following input test conditions: VIH = VIH(min) + 20%, - 0%; VIL = VIL(max) + 0%,
- 50%, as specified herein, for TTL, CMOS, or Schmitt compatible inputs. Devices may be tested using any input voltage within the above specified range, but
are guaranteed to VIH(min) and VIL(max).
2. Supplied as a design limit, but not guaranteed or tested.
3. Per MIL-PRF-38535, for current density 5.0E5 amps/cm2, the maximum product of load capacitance (per output buffer) times frequency should not exceed
3,765 pF/MHz.
4.Not more than one output may be shorted at a time for maximum duration of one second.
5.Capacitance measured for initial qualification and when design changes may affect the value. Capacitance is measured between the designated terminal and VSS
at frequency of 1MHz and a signal amplitude of 50mV rms maximum.
6. Maximum allowable relative shift equals 50mV.
7. All specifications valid for radiation dose 1E6 rads(Si).
8. Power does not include power contribution of any TTL output sink current.
9. Power dissipation specified per switching output.
10.Guaranteed based on characterization data, but not tested.
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RadHard MSI Logic 176
UT54ACS245S
AC ELECTRICAL CHARACTERISTICS
2
(VDD = 5.0V 10%; VSS = 0V 1, -55 C < TC < +125 C)
Notes:
1. Maximum allowable relative shift equals 50mV.
2. All specifications valid for radiation dose 1E6 rads(Si)
SYMBOL PARAMETER MINIMUM MAXIMUM UNIT
t
PLH
Data to bus 2 15 ns
t
PHL
Data to bus 2 15 ns
t
PZL
G low to bus active 2 12 ns
t
PZH
G low to bus active 2 12 ns
t
PLZ
G high to bus three-state 2 15 ns
t
PHZ
G high to bus three-state 2 15 ns
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