Page 1
US1075
7.5A LOW DROPOUT POSITIVE
ADJUSTABLE REGULATOR
FEATURESFEATURES
1V Dropout at Full Load Current
Fast Transient Response
1% Voltage Reference Initial Accuracy
Output Current Limiting
Built-in Thermal Shutdown
APPLICATIONSAPPLICATIONS
Low Voltage Processor Applications such as :
P54C,P55C,Cyrix M2,
POWER PC,AMD
GTL+ Termination
PENTIUM PRO, KLAMATH
Low Voltage Memory Termination Applications
Standard 3.3V Chip-Set and Logic Applications
TYPICAL APPLICATIONTYPICAL APPLICATION
DESCRIPTIONDESCRIPTION
The US1075 product is a low dropout three terminal adjustable regulator with minimum of 7.5A output current
capability. This product is specifically designed to provide well regulated supply for low voltage IC applications
such as Pentium P54C,P55C as well as GTL+
termination for Pentium Pro and Klamath pro-
cessor applications . The US1075 is also well suited for
other processors such as Cyrix,AMD and Power
PCapplications. The US 1075 is guaranteed to have
<1.2V drop out at full load current making it ideal to
provide well regulated outputs such as 3.3V with input
supply voltage as low as 4.5V minimum.
5V
C1
1500uF
Vin
3
Vout
Adj
2
R1
121
1
R2
200
US1075
1075app1-1.0
Typical Application of US1075 in a 5V to 3.3V regulator
Notes: Pentium P54C,P55C ,Klamath,Pentium Pro,VRE,are trade marks of Intel Corp.Cyrix M2 is trade mark of Cyrix Corp.
Power PC is trade mark of IBM Corp.
3.3V
C2
2x 1500uF
PACKAGE ORDER INFORMATIONPACKAGE ORDER INFORMATION
Tj (°C) 3 PIN PLASTIC 3 PIN PLASTIC 3 PIN PLASTIC
TO220 (T) TO263 (M) POWER FLEX (P)
0 TO 150 US1075CT US1075CM US1075CP
Rev. 1.0
9/14/99
2-33
Page 2
US1075
ABSOLUTE MAXIMUM RATINGSABSOLUTE MAXIMUM RATINGS
Input Voltage (Vin) .................................................................. 7V
Power Dissipation ............................................ Internally Limited
Storage Temperature Range .............................. -65°C TO 150°C
Operating Junction Temperature Range .................. 0°C TO 150°C
PACKAGE INFORMATIONPACKAGE INFORMATION
3 PIN PLASTIC TO220 ( T ) 3 PIN PLASTIC TO263 ( M ) 3 PIN PLASTIC POWER FLEX ( P )
Tab is
Vout
FRONT VIEW
3
2
1
Vin
Vout
Adj
Tab is
Vout
FRONT VIEW
3
Vin
2
Vout
1
Adj
θJT=2.7°C/W θJA=60°C/W θJA=35°C/W for 1" Square pad θJA=35°C/W for 1" Square pad
ELECTRICAL SPECIFICATIONSELECTRICAL SPECIFICATIONS
Unless otherwise specified ,these specifications apply over ,Cin=1uF,Cout=10uF,and Tj=0 to 150°C.Typical
values refer to Tj=25°C.
Tab is
Vout
FRONT VIEW
3
Vin
2
Vout
1
Adj
PARAMETER SYM TEST CONDITION MIN TYP MAX UNITS
Reference Voltage VREF Io=10mA,Tj=25°C,(Vin-Vo)=1.5V 1.238 1.250 1.262 V
Io=10mA, (Vin-Vo)=1.5V 1.225 1.250 1.275
Line Regulation Io=10mA,1.3V<(Vin-Vo)<7V 0.2 %
Load Regulation (note 1) Vin=3.3V,Vadj=0,10mA<Io<7.5A 0.4 %
Dropout Voltage Io=7.5A 1.0 1.2 V
(note 2) ∆VO Io=4A 0.92 1.1
Current Limit Vin=3.3V,dVo=100mV 7.6 9 A
Minimum Load Current Vin=3.3V,Vadj=0V 5 10 mA
(note 3)
Thermal Regulation 30 mS PULSE,Vin-Vo=3V,Io=7.5A 0.02 %/W
Ripple Rejection f=120HZ ,Co=25uF Tan
Io=7.5A,Vin-Vo=3V 60 70 dB
Adjust Pin Current IADJ Io=10mA,Vin-Vo=1.5V,Tj=25
Io=10mA,Vin-Vo=1.5V 55 120 uA
Adjust Pin Current Change Io=10mA,Vin-Vo=1.5V,Tj=25 0.2 5 uA
Temperature Stability Vin=3.3V,Vadj=0V,Io=10mA 0.5 %
Long Term Stability Tj=125°C,1000 Hrs 0.3 %
RMS Output Noise Tj=25°C 10hz<f<10khz 0.003 %Vo
Note 1 : Low duty cycle pulse testing with Kelvin connections are required in order to maintain accurate data.
Note 2 : Drop-out voltage is defined as the minimum
differential voltage between Vin and Vout required to maintain regulation at Vout. It is measured when the output
Note 3 : Minimum load current is defined as the minimum current required at the output in order for the output voltage to maintain regulation. Typically the resistor
dividers are selected such that it automatically maintains this current.
voltage drops 1% below its nominal value.
2-34
Rev. 1.0
9/14/99
Page 3
US1075
PIN DESCRIPTIONSPIN DESCRIPTIONS
PIN # PIN SYMBOL PIN DESCRIPTION
1 Adj A resistor divider from this pin to the Vout pin and ground sets the output voltage.
2 Vout The output of the regulator. A minimum of 10uF capacitor must be connected
from this pin to ground to insure stability.
3 Vin The input pin of the regulator. Typically a large storage capacitor is connected
from this pin to ground to insure that the input voltage does not sag below the
minimum drop out voltage during the load transient response. This pin must
always be 1.3V higher than Vout in order for the device to regulate properly.
BLOCK DIAGRAMBLOCK DIAGRAM
Vin 3
+
CURRENT
LIMIT
THERMAL
SHUTDOWN
Figure 1 - Simplified block diagram of the US1050
APPLICATION INFORMATIONAPPLICATION INFORMATION
Introduction
The US1075 adjustable Low Dropout (LDO) regulator is
a 3 terminal device which can easily be programmed
with the addition of two external resistors to any voltages within the range of 1.25 to 5.5 V.This regulator
unlike the first generation of the 3T regulators such as
LM117 that required 3V differential between the input
and the regulated output,only needs 1.3V differential to
maintain output regulation. This is a key requirement for
today’s microprocessors that need typically 3.3V supply and are often generated from the 5V supply. Another
major requirement of these microprocessors such as
the Intel P54C is the need to switch the load current
from zero to several amps in tens of nanoseconds at
2 Vout
1.25V
1075blk1-1.0
the processor pins ,which translates to an approximately
300 to 500 nS current step at the regulator . In addition,
the output voltage tolerances are also extremely tight
and they include the transient response as part of the
specification.For example Intel VRE specification calls
for a total of ±100mV including initial tolerance,load regu-
lation and 0 to 4.6A load step.
The US1075 is specifically designed to meet the fast
current transient needs as well as providing an accurate
initial voltage , reducing the overall system cost with the
need for fewer output capacitors.
+
1 Adj
Rev. 1.0
9/14/99
2-35
Page 4
US1075
Output Voltage Setting
The US1075 can be programmed to any voltages in the
range of 1.25V to 5.5V with the addition of R1 and R2
external resistors according to the following formula:
R
2
V V
OUT REF ADJ
Where : V Typically
I lly
ADJ
= uA Typica
R in figure
1 2
& R as shown
Vin
= +
REF
V = .
50
+ ×1
R
1
125
US1075
Adj
I R
VoutVin
IAdj = 50uA
2
2
Vout
R1
Vref
R2
1075app2-1.0
regulation is achieved when the bottom side of R2 is
connected to the load and the top side of R1 resistor is
connected directly to the case or the Vout pin of the
regulator and not to the load. In fact , if R1 is connected
to the load side, the effective resistance between the
regulator and the load is gained up by the factor of (1+R2/
R1) ,or the effective resistance will be ,Rp(eff)=Rp*(1+R2/
R1).It is important to note that for high current applications, this can represent a significant percentage of the
overall load regulation and one must keep the path from
the regulator to the load as short as possible to minimize this effect.
PARASITIC LINE
RESISTANCE
Vin
VoutVin
US1075
Adj
Rp
R1
R2
R
L
Figure 2 - Typical application of the US1075
for programming the output voltage.
The US1075 keeps a constant 1.25V between the output pin and the adjust pin. By placing a resistor R1 across
these two pins a constant current flows through R1, adding to the Iadj current and into the R2 resistor producing
a voltage equal to the (1.25/R1)*R2 + Iadj*R2 which will
be added to the 1.25V to set the output voltage. This is
summarized in the above equation. Since the minimum
load current requirement of the US1075 is 10 mA , R1 is
typically selected to be 121Ω resistor so that it automatically satisfies the minimum current requirement.
Notice that since Iadj is typically in the range of 50uA it
only adds a small error to the output voltage and should
only be considered when a very precise output voltage
setting is required. For example, in a typical 3.3V application where R1=121Ω and R2=200Ω the error due to
Iadj is only 0.3% of the nominal set point.
Load Regulation
Since the US1075 is only a 3 terminal device , it is not
possible to provide true remote sensing of the output
voltage at the load.Figure 3 shows that the best load
1075app3-1.0
Figure 3 - Schematic showing connection for best load
regulation
Stability
The US1075 requires the use of an output capacitor as
part of the frequency compensation in order to make the
regulator stable. Typical designs for microprocessor applications use standard electrolytic capacitors with a
typical ESR in the range of 50 to 100 mΩ and an output
capacitance of 500 to 1000uF. Fortunately as the capacitance increases, the ESR decreases resulting in a
fixed RC time constant. The US1075 takes advantage of
this phenomena in making the overall regulator loop
stable.For most applications a minimum of 100uF aluminum electrolytic capacitor such as Sanyo MVGX series ,Panasonic FA series as well as the Nichicon PL
series insures both stability and good transient response.
2-36
Rev. 1.0
9/14/99
Page 5
US1075
=
(
)
(
)
∆
TTC=−=−=°
1163581
6
9
Thermal Design
The US1075 incorporates an internal thermal shutdown
that protects the device when the junction temperature
exceeds the maximum allowable junction temperature.
Although this device can operate with junction tempera-
tures in the range of 150°C ,it is recommended that the
selected heat sink be chosen such that during maximum continuous load operation the junction temperature is kept below this number. The example below
shows the steps in selecting the proper Regulator heat
sink for the worst case current consumption using Intel
200MHz microprocessor as the load .
Assuming the following specifications :
V V
IN
5
V V
O
=
35
.
I A
OUT
MAX
=
46
.
T C
A
= °
35
The steps for selecting a proper heat sink to keep the
junction temperature below 135°C is given as :
∆T=Temperature Rise Above Ambient
T
∆
θ
SA
=
D
P
81
θ
SA
= = °
C W
117.. /
5) Next , a heat sink with lower θsa than the one calculated in step 4 must be selected. One way to do this is
to simply look at the graphs of the “Heat Sink Temp
Rise Above the Ambient” vs. the “Power Dissipation” and
select a heat sink that results in lower temperature rise
than the one calculated in previous step. The following
heat sinks from AAVID and Thermaloy meet this criteria.
Air Flow (LFM)
0 100 200 300 400
Thermalloy 6021PB 6021PB 6073PB 6109PB 7141D
AAVID 534202B 534202B 507302 575002 576802B
1) Calculate the maximum power dissipation using :
P I V V
D O UT IN O UT
= × −
P . . . W
D
= × − =46 5 3 5 69
( )
2) Select a package from the Regulator data sheet
and record its junction to case (or Tab) thermal
resistance.
Selecting TO220 package gives us :
θJC C W= °27. /
3) Assuming that the heat sink is Black Anodized, cal-
culate the maximum Heat sink temperature allowed :
Assume , θcs=0.05°C/W (Heat sink to Case thermal
resistance for Black Anodized)
T T P
S J D= − × +
= − × + = °
ST C135 6 9 27 0 05 116
θ θJC CS
. . .
( )
4) With the maximum heat sink temperature calcu-
lated in the previous step, the Heat Sink to Air thermal
resistance (θsa) is calculated by first calculating the
temperature rise above the ambient as follows :
T S A
Rev. 1.0
9/14/99
2-37
Loading...