The µPD6P4B is a microcontroller for infrared remote control transmitters which is provided with a one-time
PROM as the program memory.
Because users can write programs for the µPD6P4B, it is ideal for program evaluation and small-scale production
µ
of the application systems using the
When reading this document, also refer to the µPD62 Data Sheet (U14208E) and the µPD63, 63A, 64 Data
Sheet (U11371E).
PD62, 63, 63A, or 64.
FEATURES
• Program memory (one-time PROM): 1002 × 10 bits
• Data memory (RAM): 32 × 4 bits
• Built-in carrier generation circuit for infrared remote control
• 9-bit programmable timer: 1 channel
µ
• Command execution time: 16
• Stack level: 1 level (Stack RAM is for data memory RF as well.)
• I/O pins (KI/O): 8 units
• Input pins (K
• Sense input pin (S0): 1 unit
•S1/LED pin (I/O): 1 unit (In output mode, this is the remote control transmission display
• Power supply voltage: V
• Operating ambient temperature: T
• Oscillator frequency: fX = 2.4 to 8 MHz
• POC circuit
APPLICATION
Infrared remote control transmitter (for AV and household electric appliances)
I): 4 units
s (when operating at fX = 4 MHz: ceramic oscillation)
pin.)
DD = 2.2 to 3.6 V (at fX = 4 MHz)
VDD = 2.7 to 3.6 V (at fX = 8 MHz)
A = –40 to +85 °C
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. U13594EJ2V0DS00 (2nd edition)
Date Published May 1999 N CP(K)
Printed in Japan
These pins refer to the 8-bit I/O ports. I/O switching can
be made in 8-bit units.
In INPUT mode, a pull-down resistor is added.
In OUTPUT mode, they can be used as the key scan
output of the key matrix.
Refers to the input port.
Can also be used as the key return input of the key
matrix.
In INPUT mode, the availability of the pull-down resistor
of the S0 and S1 ports can be specified by software in
terms in 2-bit units.
If INPUT mode is canceled by software, this pin is placed
in OFF mode and enters the high-impedance state.
Refers to the I/O port.
In INPUT mode (S1), this pin can also be used as the key
return input of the key matrix.
The availability of the pull-down resistor of the S0 and S1
ports can be specified by software in 2-bit units.
In OUTPUT mode (LED), it becomes the remote control
transmission display output (active low). When the
remote control carrier is output from the REM output, this
pin outputs the low level from the LED output synchronously
with the REM signal.
Refers to the infrared remote control transmission output.
The output is active high.
Carrier frequency: fX/8, fX/64, fX/96, high-level,
fX/16, fX/128, fX/192 (usable on software)
Refers to the power supply.
These pins are connected to system clock ceramic
resonators.
Refers to the ground.
Normally, this pin is a system reset input. By inputting
a low level, the CPU can be reset. When resetting with
the POC circuit a low level is output. A pull-up resistor
is incorporated.
Note 2
These pins refer to the 4-bit input ports.
They can be used as the key return input of the key
matrix.
The use of the pull-down resistor can be specified by
software in 4-bit units.
Note 1
(OFF mode)
(LED)
—Input (low-level)
Notes 1. Be careful about this because the drive capability of the low-level output side is held low.
2. In order to prevent malfunction, be sure to input a low level to more than one of pins KI0 to KI3 when
reset is released (when RESET pin changes from low level to high level, or POC is released due to
supply voltage startup).
6
Data Sheet U13594EJ2V0DS00
Page 7
µ
1.2 PROM Programming Mode
Pin No.SymbolFunctionI/O
1, 2D0-D78-bit data input/output when writing/verifying program memoryI/O
15-20
3CLKClock input for updating address when writing/verifying programInput
memory
6VDDPower Supply.–
Supply +6 V to this pin when writing/verifying program memory.
7XOUTClock necessary for writing program memory. Connect 4 MHz ceramic–
8XINresonator to these pins.Input
9GNDGND–
10VPPSupplies voltage for writing/verifying program memory.–
Apply +12.5 V to this pin.
11-14MD0-MD3Input for selecting operation mode when writing/verifying program memory. Input
PD6P4B
Data Sheet U13594EJ2V0DS00
7
Page 8
1.3 INPUT/OUTPUT Circuits of Pins
The input/output circuits of the µPD6P4B pins are shown in partially simplified forms below.
I/O0-KI/O7(4) S0
(1) K
V
DD
data
Output
latch
P-ch
Input buffer
µ
PD6P4B
output
disable
Selector
Input buffer
Note The drive capability is held low.
I0-KI3
(2) K
standby
release
Input buffer
pull-down flag
N-ch
N-ch
Note
N-ch
standby
release
REM
output latch
pull-down flag
(5) S1/LED
output
disable
standby
release
pull-down flag
OFF mode
Input buffer
V
N-ch
DD
P-ch
N-ch
N-ch
(3) REM(6) RESET
VDD
P-ch
data
8
Output
latch
N-ch
Carrier
generator
Internal reset signal
other than POC
Data Sheet U13594EJ2V0DS00
POC circuit
Input buffer
V
DD
P-ch
N-ch
Page 9
1.4 Dealing with Unused Pins
The following connections are recommended for unused pins in the normal operation mode.
Inside the microcontrollerOutside the microcontroller
Built-in POC circuitOpen
Connection
Note If the circuit is an applied one requiring high reliability, be sure to design it in such a manner that the RESET
signal is entered externally.
Caution The I/O mode and the terminal output level are recommended to be fixed by setting them
repeatedly in each loop of the program.
1.5 Notes on Using KI Pin at Reset
In order to prevent malfunction, be sure to input a low level to more than one of pins KI0 to KI3 when reset is
released (when RESET pin changes from low level to high level, or POC is released due to supply voltage startup).
Data Sheet U13594EJ2V0DS00
9
Page 10
µ
PD6P4B
2. DIFFERENCES AMONG µPD62, 63, 63A, 64, AND µPD6P4B
Table 2-1 shows the differences among the µPD62, 63, 63A, 64, and µPD6P4B.
The only differences among these models are the program memory, supply voltage, system clock frequency,
oscillation stabilization wait time, and POC circuit (mask option), and the CPU function and internal peripheral
hardware are the same.
The electrical characteristics also differ slightly. For the electrical characteristics, refer to the Data Sheet of each
model.
µ
Table 2-1. Differences among
(1) When POC circuit (mask option) is provided to
PD62, 63, 63A, 64, and µPD6P4B
µ
PD62, 63, 63A, and 64
Item
ROMOne-time PROM Mask ROM
Oscillation stabilization wait time
• On releasing STOP mode by release286/fX52/fX
condition
• On releasing STOP or HALT mode by478/fX to 926/fX246/fX to 694/fX
RESET input and at reset
VPP pin and operating mode select pinProvidedNot provided
Electrical specificationsSome electrical specifications, such as data retention voltage and current
µ
PD6P4B
1002 × 10 bits512 × 10 bits768 × 10 bits1002 × 10 bits
(000H to 3E9H)(000H to 1FFH)(000H to 2FFH)(000H to 3E9H)
consumption, differ. For details, refer to Data Sheet of each model.
µ
PD62, 63
µ
PD63A
µ
PD64
(2) When POC circuit (mask option) is not provided to µPD62, 63, 63A, and 64
Item
ROMOne-time PROMMask ROM
Oscillation stabilization wait time
• On releasing STOP mode by release286/fX52/fX
condition
• On releasing STOP or HALT mode by478/fX to 926/fX246/fX to 694/fX
RESET input and at reset
VPP pin and operating mode select pinProvidedNot provided
POC circuitIncorporatedNot provided
Supply voltage
System clock frequency
Electrical specificationsSome electrical specifications, such as data retention voltage and current
µ
PD6P4B
1002 × 10 bits512 × 10 bits768 × 10 bits1002 × 10 bits
(000H to 3E9)(000H to 1FFH)(000H to 2FFH)(000H to 3E9H)
VDD = 2.2 to 3.6 V
(TA = –40 to +85 °C)
•fX = 2.4 to 4 MHz
•fX = 4 to 8 MHz
consumption, differ. For details, refer to Data Sheet of each model.
µ
PD62, 63
VDD = 1.8 to 3.6 V (TA = –40 to +85 °C)
•fX = 2.4 to 4 MHz
Note
• fX = 2.4 to 8 MHz (VDD = 2.2 to 3.6 V)
µ
PD63A
µ
PD64
Note It is necessary to design the application circuit so that the RESET pin goes low when the supply voltage
This one-time PROM is configured with 10 bits per step and is addressed by the program counter.
The program memory stores programs and table data.
The 22 steps from addresses 3EAH through 3FFH constitute a test program area and must not be used.
Figure 2-1. Program Memory Map
10 bits
000H
3E9H
3EAH
3FFH
Note Even if execution jumps to the test program area by mistake, it returns to address 000H.
Test program area
Note
Data Sheet U13594EJ2V0DS00
11
Page 12
µ
3. WRITING AND VERIFYING ONE-TIME PROM (PROGRAM MEMORY)
The program memory of the µPD6P4B is a one-time PROM of 1002 × 10 bits.
To write or verify this program memory, the pins shown in Table 3-1 are used. Note that no address input pin
is used. Instead, the address is updated by using the clock input from the CLK pin.
Table 3-1. Pins Used to Write/Verify Program Memory
Pin NameFunction
VPPSupplies voltage when writing/verifying program memory.
Apply +12.5 V to this pin.
VDDPower supply.
Supply +6 V to this pin when writing/verifying program memory.
CLKInputs clock to update address when writing/verifying program memory.
By inputting pulse four times to CLK pin, address of program memory is updated.
MD0-MD3Input to select operation mode when writing/verifying program memory.
D0-D7Inputs/outputs 8-bit data when writing/verifying program memory.
XIN, XOUTClock necessary for writing program memory. Connect 4 MHz ceramic resonator to this pin.
PD6P4B
3.1 Operating Mode When Writing/Verifying Program Memory
The µPD6P4B is set in the program memory write/verify mode when +6 V is applied to the VDD pin and +12.5
V is applied to the VPP pin after the µPD6P4B has been in the reset status (VDD = 5 V, VPP = 0 V) for a specific time.
In this mode, the operating modes shown in Table 3-2 can be set by setting the MD
all the pins other than those shown in Table 3-1 to GND via pull-down resistor.
The program memory is written at high speed in the following procedure.
(1) Pull down the pins not used to GND via resistor. Keep the CLK pin low.
(2) Supply 5 V to the V
(3) Supply 5 V to the V
(4) Wait for 2 ms until oscillation of the ceramic resonator connected across the XIN and XOUT pins stabilizes.
(5) Set the program memory address 0 clear mode by using the mode setting pins.
(6) Supply 6 V to V
(7) Set the program inhibit mode.
(8) Write data to the program memory in the 1-ms write mode.
(9) Set the program inhibit mode.
(10) Set the verify mode. If the data have been written to the program memory, proceed to (11). If not, repeat
steps (8) through (10).
(11) Additional writing of (number of times of writing in (8) through (10): X) × 1 ms.
(12) Set the program inhibit mode.
(13) Input a pulse to the CLK pin four times to update the program memory address (+1).
(14) Repeat steps (8) through (13) up to the last address.
(15) Set the 0 clear mode of the program memory address.
(16) Change the voltages on the V
(17) Turn off power.
DD pin. Keep the VPP pin low.
PP pin after waiting for 10
DD and 12.5 V to VPP.
DD and VPP pins to 5 V.
µ
s.
The following figure illustrates steps (2) through (13) above.
Data Sheet U13594EJ2V0DS00
13
Page 14
µ
3.3 Program Memory Reading Procedure
(1) Pull down the pins not used to GND via resistor. Keep the CLK pin low.
(2) Supply 5 V to the V DD pin. Keep the VPP pin low.
(3) Supply 5 V to the VPP pin after waiting for 10 µs.
(4) Wait for 2 ms until oscillation of the ceramic resonator connected across the X
(5) Set the program memory address 0 clear mode by using the mode setting pins.
(6) Supply 6 V to VDD and 12.5 V to V PP.
(7) Set the program inhibit mode.
(8) Set the verify mode. Data of each address is output sequentially each time the clock pulse is input to
the CLK pin four times.
(9) Set the program inhibit mode.
(10) Set the program memory address 0 clear mode.
(11) Change the voltage on the V
DD and VPP pins to 5 V.
(12) Turn off power.
The following figure illustrates steps (2) through (10) above.
Oscillation stabilization
Reset
V
PP
PP
V
V
DD
GND
wait time
IN and XOUT pins stabilizes.
PD6P4B
V
DD
V
+1
DD
V
DD
GND
CLK
D0-D
MD
MD
MD
MD
7
0
1
2
3
Hi-ZHi-Z
"L"
Data outputData output
14
Data Sheet U13594EJ2V0DS00
Page 15
µ
PD6P4B
4. ELECTRICAL SPECIFICATIONS
Absolute Maximum Ratings (TA = +25 °C)
ParameterSymbolTest ConditionsRatingUnit
Power supply voltageVDD–0.3 to +7.0V
VPP–0.3 to +13.5V
Input voltageVIKI/O, KI, S0, S1, RESET–0.3 to VDD + 0.3V
Output voltageVO–0.3 to VDD + 0.3V
High-level output currentIOH
Low-level output currentIOL
Operating ambientTA–40 to +85°C
temperature
Storage temperatureTstg–65 to +150°C
Note
REMPeak value–30mA
rms–20mA
LEDPeak value–7.5mA
rms–5mA
One KI/O pinPeak value–13.5mA
rms–9mA
Total of LED and KI/O pinsPeak value–18mA
rms–12mA
Note
REMPeak value7.5mA
rms5mA
LEDPeak value7.5mA
rms5mA
Note Work out the rms with: [rms] = [Peak value] × Duty.
Caution Product quality may suffer if the absolute rating is exceeded for any parameter, even momen-
tarily. In other words, an absolute maxumum rating is a value at which the possibility of psysical
damage to the product cannnot be ruled out. Care must therefore be taken to ensure that the
these ratings are not exceeded during use of the product.
Recommended Power Supply Voltage Range (T
ParameterSymbolTest ConditionsMIN.TYP.MAX.Unit
Power supply voltageVDDfX = 2.4 to 4 MHz2.23.03.6V
fX = 4 to 8 MHz
A = –40 to +85 °C)
Note
2.73.03.6V
Note It is necessary to design the application circuit so that the RESET pin goes low when the supply voltage
is less than 2.7 V.
Data Sheet U13594EJ2V0DS00
15
Page 16
µ
DC Characteristics (TA = –40 to +85 °C, VDD = 2.2 to 3.6 V)
ParameterSymbolTest ConditionsMIN.TYP.MAX.Unit
High-level input voltageVIH1RESET0.8 VDDVDDV
VIH2KI/O0.65 VDDVDDV
VIH3KI, S0, S10.65 VDDVDDV
Low-level input voltageVIL1RESET00.2 VDDV
VIL2KI/O00.3 VDDV
VIL3KI, S0 , S100.15 VDDV
High-level inputILH1KI3
leakage currentVI = VDD, pull-down resistor not incorporated
ILH2S0, S13
VI = VDD, pull-down resistor not incorporated
Low-level input leakageIUL1KIVI = 0 V–3
currentIUL2KI/OVI = 0 V–3
Cautions 1. Keep VPP to within +13.5 V including overshoot.
2. Apply VDD before VPP and turns it off after VPP.
µ
A
18
Data Sheet U13594EJ2V0DS00
Page 19
µ
PD6P4B
AC Programming Characteristics (TA = 25 °C, VDD = 6.0 ±0.25 V, VPP = 12.5 ±0.3 V)
ParameterSymbolNote1Test ConditionsMIN.TYP.MAX.Unit
Address setup time
MD1 setup time (vs. MD0↓)tM1StOES2
Data setup time (vs. MD0↓)tDStDS2
Address hold time
Data hold time (vs. MD0↑)tDHtDH2
MD0↑→ data output float delay timetDFtDF0130ns
VPP setup time (vs. MD3↑)tVPStVPS2
VDD setup time (vs. MD3↑)tVDStVCS2
Initial program pulse widthtPWtPW0.951.01.05ms
Additional program pulse widthtOPWtOPW0.9521.0ms
MD0 setup time (vs. MD1↑)tMOStCES2
MD0↓→ data output delay timetDVtDVMD0 = MD1 = VIL1
MD1 hold time (vs. MD0↑)tM1HtOEHtM1H+tM1R≥ 50 µs2
MD1 recovery time (vs. MD0↓)tM1RtOR2
Program counter reset timetPCR–10
CLK input high-, low-level widthtXH, tXL–0.125
CLK input frequencyfX–8MHz
Initial mode set timetI–2
MD3 setup time (vs. MD1↑)tM3S–2
MD3 hold time (vs. MD1↓)tM3H–2
MD3 setup time (vs. MD0↓)tM3SR–
Note 2
Address
Address
MD3 hold time (vs. MD0↑)tM3HR–
MD3↓→ data output float delay timetDFR–
Reset setup timetRES–10
Oscillation stabilization wait time
Note 2
Note 2
(vs. MD0↓)tAStAS2
Note 2
(vs. MD0↑)tAHtAH2
→ data output delay time
→ data output hold timetHADtOH
Note 3
tOADtACC
tWAIT–2ms
When program memory is read
When program memory is read
When program memory is read
When program memory is read
When program memory is read
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
µ
2
2
0130ns
2
2
µ
µ
µ
µ
µ
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
s
Notes 1. Equivalent symbol of the corresponding µPD27C256A (The µPD27C256A is a maintenance product.)
2. The internal address signal is incremented at the falling edge of the third clock of CLK.
3. Connect a 4 MHz ceramic resonator between the X
Remark When the POC circuit is used effectively, it is not necessary to connect the capacitor enclosed in the
dotted lines.
Data Sheet U13594EJ2V0DS00
23
Page 24
7. PACKAGE DRAWINGS
20 PIN PLASTIC SOP (300 mil)
110
µ
PD6P4B
1120
detail of lead end
P
A
G
C
D
M
M
N
E
F
NOTE
Each lead centerline is located within 0.12 mm (0.005 inch) of
its true position (T.P.) at maximum material condition.
H
I
J
L
B
K
ITEM MILLIMETERSINCHES
A
12.7±0.3
B
0.78 MAX.
C
1.27 (T.P.)
D0.420.017
E
F
G
H
I5.6±0.20.220
J
K0.22
L0.6±0.20.024
M
N
P3°3°
+0.08
–0.07
0.1±0.1
1.8 MAX.
1.55±0.05
7.7±0.3
1.1
+0.08
–0.07
0.12
0.10
+7°
–3°
0.500±0.012
0.031 MAX.
0.050 (T.P.)
0.004±0.004
0.071 MAX.
0.061±0.002
0.303±0.012
0.043
0.009
0.005
0.004
+7°
–3°
P20GM-50-300B, C-5
+0.003
–0.004
+0.009
–0.008
+0.003
–0.004
+0.008
–0.009
24
Data Sheet U13594EJ2V0DS00
Page 25
20 PIN PLASTIC SSOP (300 mil)
2011
F
detail of lead end
G
µ
PD6P4B
T
E
110
A
S
NS
C
DM
M
NOTE
Each lead centerline is located within 0.12 mm of
its true position (T.P.) at maximum material condition.
B
K
P
L
U
H
I
ITEM MILLIMETERS
6.65±0.15
A
B
0.475 MAX.
C
0.65 (T.P.)
D
E
F
G
H
I
J
K
L
M
N
P
+0.08
0.24
−0.07
0.1±0.05
1.3±0.1
1.2
8.1±0.2
6.1±0.2
1.0±0.2
0.17±0.03
0.5
0.13
0.10
+5°
3°
−3°
0.25T
0.6±0.15U
S20MC-65-5A4-1
J
Data Sheet U13594EJ2V0DS00
25
Page 26
µ
8. RECOMMENDED SOLDERING CONDITIONS
Carry out the soldered packaging of this product under the following recommended conditions.
For details of the soldering conditions, refer to information material Semiconductor Device Mounting
Technology Manual (C10535E).
For soldering methods and conditions other than the recommended conditions, please consult one of our NEC
sales representatives.
Table 8-1. Soldering Conditions for Surface-Mount Type
µ
PD6P4BGS-×××: 20-pin plastic SOP (300 mil)
(1)
PD6P4B
Soldering MethodSoldering Condition
Infrared reflowPackage peak temperature: 235 °C, Time: 30 secs. max. (210 °C min.),IR35-00-2
Number of times: Twice max.
VPSPackage peak temperature: 215 °C, Time: 40 secs. max. (200 °C min.),VP15-00-2
Number of times: Twice max.
Wave solderingSolder bath temperature: 260 °C max., Time: 10 secs. max., Number of times: once, WS60-00-1
Preheating temperature: 120 °C max. (package surface temperature.)
Partial heatingPin temperature: 300 °C or less ; time: 3 secs or less (for each side of the device)—
Recommended
Condition Symbol
Caution Do not use two or more soldering methods in combination (except partial heating).
µ
PD6P4BMC-5A4: 20-pin plastic SSOP (300 mil)
(2)
Soldering MethodSoldering Condition
Infrared reflowPackage peak temperature: 235 °C, Time: 30 secs. max. (210 °C min.),IR35-00-3
Number of times: Three times max.
VPSPackage peak temperature: 215 °C, Time: 40 secs. max. (200 °C min.),VP15-00-3
Number of times: Three times max.
Wave solderingSolder bath temperature: 260 °C max., Time: 10 secs. max., Number of times: once, WS60-00-1
Preheating temperature: 120 °C max. (package surface temperature.)
Partial heatingPin temperature: 300 °C or less ; time: 3 secs or less (for each side of the device)—
Recommended
Condition Symbol
Caution Do not use two or more soldering methods in combination (except partial heating).
26
Data Sheet U13594EJ2V0DS00
Page 27
APPENDIX A. DEVELOPMENT TOOLS
A PROM programmer, program adapter, and emulator are provided for the µPD6P4B.
Hardware
µ
PD6P4B
• PROM programmer (AF-9704
Note
, AF-9705
Note
, AF-9706
Note
)
This PROM programmer supports the µPD6P4B.
µ
By connecting a program adapter to this PROM programmer, the
PD6P4B can be programmed.
Note These are products of Ando Electric Co., Ltd. For details, consult Ando Electric Co., Ltd (03-3733-1163).
• Program adapter (PA-61P34, PA-61P34BMC)
µ
It is used to program the
PD6P4B in combination with AF-9704, AF-9705, or AF-9706.
The usable package differs depending on the program adapter.
µ
• PA-61P34:
PD6P4BGS
• PA-61P34BMC :µPD6P4BGS, µPD6P4BMC-5A4
Note
• Emulator (EB-6133
)
It is used to emulate the µPD6P4B.
Note This is a product of Naito Densei Machida Mfg. Co., Ltd. For details, consult Naito Densei Machida
Mfg. Co., Ltd. (044-822-3813).
Software
• Assembler (AS6133)
• This is a development tool for remote control transmitter software.
Part Number List of AS6133
Host MachineOSSupply MediumPart Number
PC-9800 seriesMS-DOSTM (Ver. 5.0 to Ver. 6.2)3.5-inch 2HD
(CPU: 80386 or more)
IBM PC/ATTM compatibleMS-DOS (Ver. 6.0 to Ver. 6.22)3.5-inch 2HC
PC DOSTM (Ver. 6.1 to Ver. 6.3)
µ
S5A13AS6133
µ
S7B13AS6133
Caution Although Ver.5.0 or later has a task swap function, this function cannot be used with this
software.
Data Sheet U13594EJ2V0DS00
27
Page 28
µ
APPENDIX B. EXAMPLE OF REMOTE-CONTROL TRANSMISSION FORMAT
(in the case of NEC transmission format in command one-shot transmission mode)
Caution When using the NEC transmission format, please apply for a custom code at NEC.
(1) REM output waveform (From <2> on, the output is made only when the key is kept pressed.)
REM output
58.5 to 76.5 ms
< 1 >
108 ms108 ms
Remark If the key is repeatedly pressed, the power consumption of the infrared light-emitting diode (LED) can
be reduced by sending the reader code and the stop bit from the second time.
(2) Enlarged waveform of <1>
< 3 >
< 2 >
PD6P4B
REM output
9 ms
Leader code
4.5 ms
13.5 ms
(3) Enlarged waveform of <3>
REM output
(4) Enlarged waveform of <2>
REM output
Custom code
9 ms
9 ms
8 bits
13.5 ms
18 to 36 ms
Custom code'
8 bits
58.5 to 76.5 ms
4.5 ms
2.25 ms
Data code
0.56 ms
1.125 ms
8 bits
2.25 ms
0
1100
Data code
8 bits
27 ms
Stop Bit
1 bit
28
11.25 ms
Leader code
Data Sheet U13594EJ2V0DS00
0.56 ms
Stop Bit
Page 29
(5) Carrier waveform (Enlarged waveform of each code’s high period)
REM output
8.77 s
9 ms or 0.56 ms
Carrier frequency : 38 kHz
26.3 s
µ
µ
(6) Bit array of each code
µ
PD6P4B
C0C1C2C3C4C5C6C7C0'
C1'
C2'
C3'
C4'
=======
C
C
C
0
1
or
or
or
C
o
C
1
C
C5'
C
C
C
2
3
4
5
or
or
or
2
C
3
C
4
C
5
C6'
C7'
D0D1D2D3D4D5D6D7D0D1D2D3D4D5D6D
=
C
C
6
7
or
or
C
6
C
7
Data codeData codeCustom code'Custom codeLeader code
Caution To prevent malfunction with other systems when receiving data in the NEC transmission
format, not only fully decode (make sure to check Data Code as well) the total 32 bits of the
16-bit custom codes (Custom Code, Custom Code’) and the 16-bit data codes (Data Code,
Data Code) but also check to make sure that no signals are present.
7
Data Sheet U13594EJ2V0DS00
29
Page 30
NOTES FOR CMOS DEVICES
1PRECAUTION AGAINST ESD FOR SEMICONDUCTORS
Note:
Strong electric field, when exposed to a MOS device, can cause destruction of the gate oxide and
ultimately degrade the device operation. Steps must be taken to stop generation of static
electricity as much as possible, and quickly dissipate it once, when it has occurred. Environmental
control must be adequate. When it is dry, humidifier should be used. It is recommended to avoid
using insulators that easily build static electricity. Semiconductor devices must be stored and
transported in an anti-static container, static shielding bag or conductive material. All test and
measurement tools including work bench and floor should be grounded. The operator should be
grounded using wrist strap. Semiconductor devices must not be touched with bare hands. Similar
precautions need to be taken for PW boards with semiconductor devices on it.
2HANDLING OF UNUSED INPUT PINS FOR CMOS
Note:
No connection for CMOS device inputs can be cause of malfunction. If no connection is provided
to the input pins, it is possible that an internal input level may be generated due to noise, etc., hence
causing malfunction. CMOS devices behave differently than Bipolar or NMOS devices. Input
levels of CMOS devices must be fixed high or low by using a pull-up or pull-down circuitry. Each
unused pin should be connected to V
possibility of being an output pin. All handling related to the unused pins must be judged device
by device and related specifications governing the devices.
DD or GND with a resistor, if it is considered to have a
µ
PD6P4B
3STATUS BEFORE INITIALIZATION OF MOS DEVICES
Note:
Power-on does not necessarily define initial status of MOS device. Production process of MOS
does not define the initial operation status of the device. Immediately after the power source is
turned ON, the devices with reset function have not yet been initialized. Hence, power-on does
not guarantee out-pin levels, I/O settings or contents of registers. Device is not initialized until
the reset signal is received. Reset operation must be executed immediately after power-on for
devices having reset function.
30
Data Sheet U13594EJ2V0DS00
Page 31
µ
PD6P4B
Regional Information
Some information contained in this document may vary from country to country. Before using any NEC
product in your application, please contact the NEC office in your country to obtain a list of authorized
representatives and distributors. They will verify:
• Device availability
• Ordering information
• Product release schedule
• Availability of related technical literature
• Development environment specifications (for example, specifications for third-party tools and
components, host computers, power plugs, AC supply voltages, and so forth)
• Network requirements
In addition, trademarks, registered trademarks, export restrictions, and other legal issues may also vary
from country to country.
Electron Devices Division
Rodovia Presidente Dutra, Km 214
07210-902-Guarulhos-SP Brasil
Tel: 55-11-6465-6810
Fax: 55-11-6465-6829
J99.1
Data Sheet U13594EJ2V0DS00
31
Page 32
µ
PD6P4B
MS-DOS is either a registered trademark or a trademark of Microsoft Corporation in the United States and/
or other countries.
PC/AT and PC DOS are trademarks of IBM Corp.
The export of this product from Japan is regulated by the Japanese government. To export this product may be prohibited
without governmental license, the need for which must be judged by the customer. The export or re-export of this product
from a country other than Japan may also be prohibited without a license from that country. Please call an NEC sales
representative.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual
property rights of third parties by or arising from use of a device described herein or any other liability arising
from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights
or other intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated “quality assurance program“ for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special:Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific:Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98.8
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