Datasheet UPC8158K-E1, UPC8158K Datasheet (NEC)

Page 1
PRELIMINARY DATA SHEET
BIPOLAR ANALOG INTEGRATED CI RCUIT
µµµµ
PC8158K
RF UP-CONVERTER WITH AGC FUNCTION + IF QUADRATURE MODULATOR IC
FOR DIGITAL MOBILE COMMUNICATION SYSTEMS
DESCRIPTION
The µPC8158K is a silicon microwave monolithic integrated circuit designed as quadrature modulator for digital mobile communication systems. This MMIC consists of 0.8 GHz to 1.5 GHz up-converter and 100 MHz to 300 MHz quadrature modulator which are equipped with AGC and power save functions. This configuration suits to IF modulation system. The package is 28-pin QFN suitable for high density mounting. The chip is manufactured using NEC’s. 20 GHz fT silicon bipolar process NESATTM III to realize low power consumption. Consequently the
PC8158K can contribute to make RF blocks smaller size, higher performance and lower power consumption.
µ
FEATURES
• Supply voltage: VCC = 2.7 to 4.0 V, ICC = 28 mA @ VCC = 3.0 V
• Built-in LPF suppresses spurious multipled by TX local (LO1)
• AGC amplifier is installed in local port of up converter: GCR = 35 dB MIN. @ fout = 1.5 GHz
• Excellent performance: P
• External IF filter can be applied between modulator output and up converter input terminal.
APPLICATIONS
• Digital cellular phones (PDC800M, PDC1.5G and so on)
ORDERING INFORMATION
Part Number Package Supplying Form
µ
PC8158K-E1 28-pin plastic QFN
Remark
To order evaluation samples, please contact your local NEC sales office. (Part number for sample order:
PC8158K)
µ
adj
= –65 dBc TYP. @ ∆f = ±50 kHz, EVM = 1.2 % rms TYP.
Embossed tape 12 mm wide.
(5.1 × 5.5 × 0.95 mm)
Pin 1 is in pull-out direct i on. QTY 2.5 kp/Reel.
Caution Electro-static sensitive device
The information in this document is subject to change without notice.
1998©
Page 2
INTERNAL BLOCK DIAGRAM AND PIN CONNECTIONS (TOP View)
µµµµ
PC8158K
out
RF
N.C.
V
CC
Output Buffer
Fil1
Fil2
GND
QMOD + AGC + Up-Mix
23
24
25
26
27
28
N.C.
GND
V
GND
N.C.
CC
Output Buffer
QMOD + AGC + Up-Mix
QMOD + AGC + Up-Mix
22 21 20 19 18 17 16 15
AGCcont
Up-Mix
AGC
LPF
I/Q-Mix
AGC
/V
PS
V
REG
REG
N.C.
GND
QMOD + AGC + Up-Mix
14
13
12
11
10
φ
9
Phase Shifter
LO2inb
LO2in
GND
QMOD + AGC + Up-Mix
CC
V
QMOD + AGC + Up-Mix
LO1in
LO1inb
12345678
Iin
Iinb
N.C.
Qinb
Qin
N.C.
N.C.
N.C.
2
Preliminary Data Sheet P13831EJ1V1DS00
Page 3
QUADRATURE MODULATOR SERIES
µµµµ
PC8158K
LO1in
Part Number Functions ICC (mA)
PC8101GR 150 MHz Quad. Mod
µ
PC8104GR RF Up-Converter + IF
µ
Quad. Mod
PC8105GR 400 MHz Quad. Mod
µ
PC8110GR 1GHz Direct Quad. Mod
µ
PC8125GR RF Up-Converter + IF
µ
Quad. Mod + AGC
PC8126GR 915 to 960
µ
PC8126K
µ
PC8129GR
µ
PC8139GR-7JH Tran scei ver IC
µ
PC8158K RF Up-Converter + IF
µ
900 MHz Direct Quad. Mod with Offset-Mix er
2LO IF Quad. Mod +
×
RF Up-Converter
(1.9 GHz Indirect Quad. Mod + RX-IF + IF VCO)
Quad. Mod + AGC
15/@ 2.7 V 28/@ 3.0 V
16/@ 3.0 V
24/@ 3.0 V
36/@ 3.0 V
35/@ 3.0 V
28/@ 3.0 V
TX: 32.5 RX: 4.8 /@ 3.0 V
28/@ 3.0 V
f
(MHz)
100 to 300 50 to 150
100 to 400
100 to 400 External 16-pin
800 to 1 000 Direct PDC800 MHz,
220 to 270
889 to 960
200 to 800 100 to 400
220 to 270
100 to 300
MODout
f (MHz)
Up-Converter
RFout
(MHz)
f
External F/F CT-2, etc.
900 to 1 900
1 800 to 2 000
915 to 960
(LO pre-mixer)
800 to 1900
1 800 to 2 000
800 to 1 500
Phase Shifter
Doubler
+ F/F
F/F 20-pin
CR
Package Application
20-pin SSOP (225 mil)
SSOP (225 mil) 20-pin
SSOP (225 mil)
28-pin QFN
SSOP (225 mil) 30-pin
TSSOP (225 mil)
28-pin QFN PDC800 M/
Digital Comm.
etc. PHS
PDC800 MHz
GSM, DCS1800, etc.
PHS
1.5 G
For outline of the quadrature modulator series, please refer to the application note ‘Usage of µPC8101, 8104, 8105, 8125, 8129’ (Document No. P13251E) and so on.
SYSTEM APPLICATION EXAMPLE
[PDC800 MHz/1.5 GHz]
ANTSUB
LNA
SW
MAIN ANT
SW
PA
1st MIX
SW
AGC
2nd MIX
1st LO
PLL1 PLL2
LO2 LO1
(CR)
φ
2nd LO
0°
90°
RSSI
To DEMOD
RSSI OUT
I
Q
PC8158K
Filter
Preliminary Data Sheet P13831EJ1V1DS00
µ
3
Page 4
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Rating Unit
µµµµ
PC8158K
Supply Voltage V
Power Save and AGC Control Pi n
VPS/V
Applied Voltage Power Dissipation P Operating Ambient Temperature T Storage Temperature T
Mounted on double sided copper clad 50 × 50 × 1.6 mm epoxy glass PWB.
Note
RECOMMENDED OPERATING CONDITIONS
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit Supply Voltage V Power Save Voltage V AGC Control Voltage V Operating Ambient Temperature T Up-converter RF Output Frequency f LO2 Input Frequency f I/Q Input Frequency f
LO1 Input Level P LO2 Input Level P I/Q Input Amplitude V Up-converter Input Frequency f Modulator Output Frequency f LO1 Input Frequency f
AGCPS
RFout
LO2in
UPCONin
MODout
LO1in
CC
PS
I/Qin
LO1in
LO2in
I/Qin
CC
AGC
D
A
stg
Pin11, 20 and 25,
A
= +25°C
T Pin17, TA = +25°C 5.0 V
TA = +85°C
Note
5.0 V
430 mW
–40 to +85 °C
–55 to +150 °C
Pin11, 20 and 25 2.7 3.0 4.0 V Pin17 0 – 0.3 V Pin17 1.0 – 2.5 V
A
–30 +25 +80 °C 800 – 1500 MHz
LO2in
P
= –15 dBm 600 – 1750 MHz
I/Qin
V
= 500 mV
P-P
MAX.
DC – 10 MHz
(Differential input)
–18 –15 –12 dBm –18 –15 –12 dBm
I, Ib, Q, Qb each – 420 500 mV
P-P
100 – 300 MHz
LO1in
P
= –15 dBm
4
Preliminary Data Sheet P13831EJ1V1DS00
Page 5
ELECTRICAL CHARACTERISTICS
Conditions (Unless otherwise specified):
A
= +25 °C, VCC1 = VCC2
T I/Q (DC) = Ib/Qb (DC) = VCC/2 = 1.5 V, V
/4DQPSK wave input, transmission rate 42 kbps, filter roll-off α = 0.5,
π
= VCC
3 = 3.0 V, VPS/V
I/Ibin
= V
AGC
Q/Qbin
= 2.5 V,
= 500 mV
Modulation Pattern: <0000>
LO1in
f
= 178.05 MHz, P
LO2in
f
= 1619.05 MHz, P
RFout
f
= 1441 MHz – f
Parameter Symbol Test Conditions MIN. TYP. MAX. Unit UP-CONVERTER + QUADRATURE MODULATOR TOTAL Total Circuit Current I Total Circuit Current at Power S ave Mode I
LO1in
LO2in
I/Qin
= –15 dBm
= –15 dBm
CC (TOTAL)
CC (PS) TOTAL
No input signal 23.7 28 37.6 mA VPS ≤ 0.5 V (Low),
No input signal
P-P
(each), f
I/Qin
= 2.625 kHz,
µµµµ
PC8158K
–0.310
A
µ
Total Output Power 1 P Total Output Power 2 P
RFout
1V
RFout
2V
LO Carrier Leak LOL f
AGC
= 2.5 V –15 –11.5 –8 dBm
AGC
= 1.0 V –56.5 –52 –46.5 dBm
LOL
LO1
+ f
LO2
– –40 –30 dBc
= f Image Rejection (Side Band Leak ) ImR – –40 –30 dBc I/Q 3rd order distortion IM AGC Gain Control Range GCR V
3 (I/Q)
– –50 –30 dBc
AGC
= 2 V → 1 V 35 40 – dB Error Vector Magnitude EVM MOD Pattern: PN9 – 1.2 3.0 %rms Adjacent channel interference P
adj
f = ±50 kHz,
∆
– –65 –60 dBc
MOD Pattern: PN9
Spurious suppression P
out
Power Save Rise Time T Power Save Fall Time T I/Q input impedance Z I/Q input bias current I LO1 input VSWR Z
Without external LC between Fil1 and Fil2 pin on this frequency conditions.
Note
(8fLO1)
PS (Rise)
PS (Fall)
I/Q
I/Q
LO1
fLO1 × 8, fLO1 × 8 (image) VPS VPS
(Low)
(High)
→ VPS → VPS
(High)
(Low)
Between pin I/Ib, Q/Qb 80 200 – k Between pin I/Ib, Q/Qb – 5 13
LO1
f
= 100 M to 300 MHz – 1.5:1 – –
Note
– –70 –65 dBc –25 –25
s
µ
s
µ
Ω
A
µ
Spectrum analyzer conditions: VBW = 300 Hz, RBW = 300 Hz.
Remark
Electrical characteristics in this document is described for 1.5 GHz system.
Preliminary Data Sheet P13831EJ1V1DS00
5
Page 6
PIN EXPLANATIONS
µµµµ
PC8158K
Pin No.
Symbol
Supply Voltage
(V)
Pin Voltage
Note
(V)
Function and Application
1IinVCC/2 – Input for I s i gnal . This input
impedance is 200 kΩ. In the case of that I/Q input signals are single ended, amplitude of the signal i s
P-P
500 m V
max.
2IinbVCC/2 – Input for I s i gnal . This input
impedance is 200 kΩ. In the case of that I/Q input signals are single
CC
ended, V
/2 biased DC signal should be input. In the cas e of the I/Q input signals are dif ferential, amplitude of the signal is 500 m V max.
3 N.C. – – This pin is not connected to internal
circuit. This pin s houl d be opened or grounded.
4QinbVCC/2 – Input for Q s i gnal . Thi s input
impedance is 200 kΩ. In the case of that I/Q input signals are single ended, amplitude of the signal i s
P-P
500 m V
max.
5QinVCC/2 – Input for I s i gnal . This input
impedance is 200 kΩ. In the case of that I/Q input signals are single
CC
ended, V
/2 biased DC signal should be input. In case of the I/Q input signals are different i al , amplitude of the signal is 500 m V max.
6N.C. 7N.C.
– – These pins are not connected to
internal circuit. Thes e pi ns should be opened or grounded.
8N.C. 9 LO1inb – 2.98 Bypass pin of modulator’s local
input. This pin should be decoupl ed with 330 pF capacitor.
10 LO1in – 2.98 Local signal input f or modulator.
This pin must be coupled wit h DC cut capacitor 330 pF and should be terminated with 51 Ω resistor.
11 V
CC
2.7 to 4.0 – Supply voltage pin for modulator, up-converter and AGC circui ts.
Internal Equivalent Circ ui t
21
P-P
–––––––––––––––––
54
P-P
–––––––––––––––––
9 10
–––––––––––––––––
CC
Pin Voltages are measured on V
Note
6
= 3.0 V.
Preliminary Data Sheet P13831EJ1V1DS00
Page 7
µµµµ
PC8158K
Pin
Symbol
No.
12 GND 0 – Ground pin for modulator, up-
13 LO2in – 1.8 Local signal input for modulator.
14 LO2inb – 1.8 Bypass pin of up-converter’s loc al
15 N.C. – – This pin i s not connected to internal
16 GND 0 – Ground pin for modulator, up-
17 VPS/V
Supply Voltage
(V)
AGCVPS/VAGC
Pin Voltage
Note
(V)
–
Function and Application
converter and AGC circuit s. This pin should be grounded with minimum inductance. Form the ground pattern as widely as poss i bl e to minimize ground impedance.
This pin must be coupled wit h DC cut capacitor 33 pF and should be terminated with 51 Ω resistor.
signal input. This pin s houl d be decoupled with 33 pF capacitor.
circuit. This pin s houl d be opened or grounded.
converter and AGC circuit s. This pin should be grounded with minimum inductance.
Power save control pin for modulator, up-converter and AGC circuits. This pi n al so assigned as gain control pin for AGC circ ui ts. Operation status with appli ed voltages are as follows.
AGC
VPS/V
(V) STATE 0 to 0 .4 OFF (Sleep Mode) 1 to 2.5 On (AGC Mode)
Internal Equivalent Circ ui t
–––––––––––––––––
13 14
–––––––––––––––––
–––––––––––––––––
REG
17
AGC Cont
18 N.C. – – This pin i s not connected to internal
circuit. This pin s houl d be opened or grounded.
19 GND 0 – Ground pin for modulator, up-
converter and AGC circuit s. This pin should be grounded with minimum inductance.
20 V
21 GND 0 – Ground pin for RF output buf fer.
CC
2.7 to 4.0 – Supply voltage pin for modulator,
Pin Voltages are measured on V
Note
up-converter and AGC circui ts.
This pin should be grounded with minimum inductance.
CC
= 3.0 V.
Preliminary Data Sheet P13831EJ1V1DS00
–––––––––––––––––
–––––––––––––––––
–––––––––––––––––
–––––––––––––––––
7
Page 8
µµµµ
PC8158K
Pin
Symbol
No.
22 N.C. – – This pin i s not connected to internal
23 RFout – 1.75 RF output pi n. Thi s pin is emitter
24 N.C. – – These pins are not connected to
25 V
26 Fil1 – 2.76 27 Fil2 – 2.76
Supply Voltage
(V)
CC
2.7 to 4.0 – Supply voltage pin for RF output
Pin Voltage
Note
(V)
Function and Application
circuit. This pin s houl d be opened or grounded.
follower which is low im pedance output port. This pin can be eas i l y matched to 50 Ω impedance using external coupling and decoupling capacitors.
internal circuit. Thes e pi ns should be opened or grounded.
buffer. External inductor and capac i tor can
supress harmonics spuri ous of LO1 frequency. LC value should be determined according to LO1 input frequency and suppression level.
Internal Equivalent Circ ui t
–––––––––––––––––
External
23
–––––––––––––––––
–––––––––––––––––
External
26 27
28 GND 0 – Ground pin for modulator, up-
converter and AGC circuit s. This pin should be grounded with minimum inductance. Form the ground pattern as widely as poss i bl e to minimize ground impedance.
CC
Pin Voltages are measured on V
Note
= 3.0 V.
–––––––––––––––––
8
Preliminary Data Sheet P13831EJ1V1DS00
Page 9
TEST CIRCUIT
Voltage Source
Vector Signal Analyzer or Spectrum Analyzer
µ
0.22 F
1 000 pF
Voltage Source
2 pF
100 pF
23 24 25
26 27 28
RF
V
Fil1 Fil2
GND
µ
0.22 F
out
CC
Voltage Source or Pulse Pattern Generator
1 000 pF
100 pF
22 21 20 19 18
GND
VCCGND
AGCcont
UP-CON
AGC
LPF
I/Q Mixer
I
Ib
Qb
1 2 3 4 5
µµµµ
PC8158K
17
16 15
AGC
/V
PS
V
GND
33 pF
LO2b
14 13 12
11 10
9
330 pF
33 pF
330 pF
LO2in GND
REG REG
Phase Shifter
V
CC
LO1in LO1b
Q
6
7 8
Signal Generator
51 Ω
BPF
51
Ω
1 000 pF
100 pF
BPF
51 Ω
Signal Generator or Network Analyzer
Voltage Source
µ
0.22 F
TEST CONDITIONS
LO1in
= 178.05 MHz, P
f
LO2in
f
= 1619.05 MHz, P
RFout
f
= 1441 MHz – f
LO1in
LO2in
I/Qin
100 pF 100 pF
= –15 dBm
= –15 dBm
100 pF 100 pF
I/Q Signal
Generator
Preliminary Data Sheet P13831EJ1V1DS00
9
Page 10
PACKAGE DIMENSIONS
28 pin plastic QFN (UNIT: mm)
4 – 0.5
4 – 0.5
0.5
2 × 0.5 = 1
µµµµ
PC8158K
Pin 28
Pin 1
0.22
0.5
7 × 0.5 = 3.5
5.5 ± 0.1
(5.5 ± 0.1)
(5.1)
0.22
0.125
0.5
0.95 ± 0.1
1.2
2 × 0.5 = 1
5.1 ± 0.1
0.5(4.1)0.5
(5.1 ± 0.1)
(0.22)
0.5
(4.7)
(0.22)
(4.5)
0.3
0.5
10
Bottom View
Preliminary Data Sheet P13831EJ1V1DS00
Page 11
µµµµ
PC8158K
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
PC8158K
µµµµ
Soldering Method Solderi ng Condi tions
Infrared Reflow P ackage peak temperature: 235°C or below
Time: 30 seconds or less (at 210°C) Count: 2, Exposure limi t
Partial Heating Pin temperature: 300°C
Time: 3 seconds or less (per side of device) Exposure limit
After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.
Note
Note
: None
Note
: None
Recommended Condition Symbol
IR35-00-2
–
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
Preliminary Data Sheet P13831EJ1V1DS00
11
Page 12
µµµµ
PC8158K
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product.
M4 96. 5
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