DATA SHEET
BIPOLAR ANALOG + DIGITAL INTEGRATED CIRCUIT
PB1005GS
µµµµ
REFERENCE FREQUENCY 16.368 MHz, 2ND IF FREQUENCY 4.092 MHz
RF/IF FREQUENCY DOWN-CONVERTER +
PLL FREQUENCY SYNTHESIZER IC FOR GPS RECEIVER
DESCRIPTION
The µPB1005GS is a silicon monolithic integrated circuit for GPS receiver. This IC is designed as double
conversion RF block integrated RF/IF down-converter + PLL frequency synthesizer on 1 chip.
The µPB1005GS features shrink package, fixed prescaler and supply voltage. The 30-pin plastic SSOP package
is suitable for high density surface mounting. The fixed division internal prescaler is needless to input serial counter
data. Supply voltage is 3 V. Thus, the µPB1005GS can make RF block fewer components and lower power
consumption.
This IC is manufactured using NEC’s 20 GHz fT NESATTMIII silicon bipolar process. This process uses direct
silicon nitride passivation film and gold electrodes. These materials can protect the chip surface from pollution and
prevent corrosion/migration. Thus, this IC realizes excellent performance, uniformity and reliability.
FEATURES
• Double conversion : f
• Integrated RF block : RF/IF frequency down-converter + PLL frequency synthesizer
• High-density surface mountable : 30-pin plastic SSOP (9.85 × 6.1 × 2.0 mm)
• Needless to input counter data : fixed division internal prescaler
• VCO side division :÷ 200 (÷ 25, ÷ 8 serial prescaler)
• Reference division :÷ 2
• Supply voltage : VCC = 2.7 to 3.3 V
• Low current consumption : ICC = 45.0 mA TYP.@VCC = 3.0 V
• Gain adjustable externally : Gain control voltage pin (control voltage up vs. gain down)
REFin
= 16.368 MHz, f
2ndIFout
= 4.092 MHz
APPLICATION
• Consumer use GPS receiver of reference frequency 16.368 MHz, 2nd IF frequency 4.092 MHz
ORDERING INFORMATION
Part Number Package Supplying Form
µ
PB1005GS-E1 30-pin plastic SSOP
(7.62 mm (300))
Embossed tape 16 mm wide.
Pin 1 is in tape pull-out direc tion.
QTY 2.5 kpcs/reel.
Remark
Document No. P13860EJ3V0DS00 (3rd edition)
Date Published April 2000 N CP(K)
Printed in Japan
To order evaluation samples, please contact your local NEC sales office. (Part number for sample
order:
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
PB1005GS)
µ
Caution Electro-static sensitive devices
The mark shows major revised points.
©
1998, 2000
PIN CONNECTIONS AND INTERNAL BLOCK DIAGRAM
IF-MIX
in
1
GND (IF-MIX)
RF-MIX
VCC (RF-MIX)
RF-MIX
GND (RF-MIX)
V
CC
(1stLO-OSC)
1stLO-OSC1
1stLO-OSC2
GND (1stLO-OSC)
V
CC
(phase detector)
PD-V
PD-V
PD-V
GND (phase detector)
2
out
3
4
in
5
6
÷
25
7
8
÷
9
8
10
11
out
3
12
out
2
13
out
1
14
PD
÷
2
15
30
CC
(IF-MIX)
V
29
V
GC
(IF-MIX)
28
IF-MIX
out
27
GND (2ndIF-AMP)
26
2ndlF
in
1
25
2ndlF
in
2
24
2ndlFbypass
23
V
CC
(2ndIF-AMP)
22
2ndIF
out
21
REF
out
20
VCC (reference block)
19
REF
in
18
GND (divider block)
LO
out
17
16
VCC (divider block)
µµµµ
PB1005GS
2
Data Sheet P13860EJ3V0DS00
µµµµ
PB1005GS
PRODUCT LINE-UP (TA = +25
Type Part Number
General
PC2756T 6-pin
µ
Purpose
Wideband
Separate
PC2756TB
µ
IC
PC2753GR IF down-converter with gain
µ
Clock
PB1003GS RF/IF down-converter
µ
Frequency
Specific
1 chip IC
PB1004GS
µ
PB1005GS
µ
Remark
Typical performance. Please refer to ELECTRICAL CHARACTERISTICS in detail.
To know the associated products, please refer to their latest data sheets.
RF down-converter with osc. Tr
control amplifier
+ PLL synthesizer
REF = 18.414
1stIF = 28.644/2ndIF = 1.023
RF/IF down-converter
+ PLL synthesizer
REF = 16.368
1stIF = 61.380/2ndIF = 4.092
Functions
(Frequency unit: MHz)
C, VCC = 3.0 V)
°°°°
CC
V
(V)
2.7 to 3.3
2.7 to 3.3
2.7 to 3.3
2.7 to 3.3
2.7 to 3.3
CC
I
(mA)
CG
(dB)
614
(°C)
40 to
−
85
+
A
T
6.5 60 to 79
37.5 72 to 92−20 to
85
+
37.5 72 to 92−20 to
85
+
45.0 72 to 92−40 to
85
+
Package Status
Available
minimold
6-pin super
minimold
20-pin plastic
SSOP
30-pin plastic
Discontinued
SSOP
Available
SYSTEM APPLICATION EXAMPLE
GPS receiver RF block diagram
60f
0
BPF
IF-MIX
out
RF-MIX
BPF
0
1540f
OSC
RF-MIX
0
1600f
0
1stLO-OSC21stLO-OSC1
1575.42 MHz
from
Antenna
LNA 1540f
µ
PC2749TBexample:
Caution This diagram schematically shows only the
This diagram does not present the actual application circuits.
in
IF-MIX
1/25 1/8 P D
64f
0
40f
IF-MIX
V
GC
0
LO
8f
out
LPF
out
LOOP
0
AMP
PB1005GS’s internal functions on the system.
µµµµ
2ndlFin1
2ndlFbypass
2ndlF-Amp
8f
0
1/2
16f
TCXO
V
CC
16.368 MHz
• f0 = 1.023 MHz in the diagram.
• PB1005GS is in .
µ
2ndlF
in
2
4.092 MHz
4f
0
Buff
16.368 MHz
16f
0
Buff
REF
0
to Demodulator
to Demodulator
Data Sheet P13860EJ3V0DS00
3
ABSOLUTE MAXIMUM RATINGS
Parameter Symbol Conditions Ratings Unit
µµµµ
PB1005GS
Supply Voltage V
Total Circuit Current I
Power Dissipation P
Operating Ambient Temperature T
Storage Temperature T
CC
CC
D
A
stg
RECOMMENDED OPERATING RANGE
Parameter Symbol MIN. TYP. MAX. Unit
RFin
1stLOin
1stIFin
2ndLOin
2ndIFin
2ndIFout
f
REFin
REFout
f
CC
A
Supply Voltage V
Operating Ambient Temperature T
RF Input Frequency f
1stLO Oscillating Frequency f
1stIF Input Frequency f
2ndLO Input Frequency f
2ndIF Input/output Frequency f
Reference Input/output Frequency f
TA = +25°C3.6V
TA = +25°C 128 mA
Mounted on double-sided copper clad
50 × 50 × 1.6 mm epoxy glass P WB at T
A
= +85°C
464 mW
40 to +85
−
55 to +150
−
C
°
C
°
2.7 3.0 3.3 V
40 +25 +85
−
1575.42
C
°
MHz
1616.80 1636.80 1656.80 MHz
61.380
65.472
4.092
16.368
MHz
MHz
MHz
MHz
4
Data Sheet P13860EJ3V0DS00
µµµµ
PB1005GS
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, TA = +25
C, VCC = 3.0 V)
°°°°
Parameter Symbol Conditions MIN. TYP. MAX. Unit
Total Circuit Current ICCtotal ICC1 + ICC2 + ICC3 + ICC4 32.0 45.0 60.0 mA
RF Down-converter Block (f
RFin
= 1575.42 MHz, f
1stLOin
= 1636.80 MHz, P
LOin
= −10 dBm, ZL = ZS = 50 Ω)
Circuit Current 1 ICC1 No Signals 6.0 10.0 14.0 mA
RF Conversion Gain CG
RF-SSB Noise Figure NF
Maximum IF Output Power P
IF Down-converter Block (f
O(sat)RF
1stIFIn
= 61.38 MHz, f
RF
RF
RFin
P
= −40 dBm 12.5 15.5 18.5 dB
RFin
P
= −40 dBm 7 10 13 dB
RFin
P
= −10 dBm
2ndLOIn
= 65.472 MHz, ZS = 50 Ω, ZL = 2 kΩ)
5.5
−
2.5 +0.5 dBm
−
Circuit Current 2 ICC2 No Signals 3.4 5.3 7. 2 mA
IF Voltage Conversion Gain CG
IF-SSB Noise Figure NF
Maximum 2nd IF Output
O(sat)IF
P
(GV)IF
IF
at Maximum Gain, P
at Maximum Gain, P
at Maximum Gain, P
1stIFin
= −50 dBm 38 41 44 dB
1stIFin
= −50 dBm 8.5 11.5 14.5 dB
1stIFin
= −20 dBm
9.5
−
6.5
−
3.5 dBm
−
Power
Gain Control Voltage V
Gain Control Range D
2nd IF Amplifier (f
2ndIF
= 4.092 MHz, ZS = 50 Ω, ZL = 2 kΩ)
GC
GC
Voltage at Maximum Gain of CG
1stIFin
P
= −50 dBm 20
IF
1.0 V
Circuit Current 3 ICC3 No Signals 1.55 2.40 3.25 mA
Voltage Gain G
Maximum Output Power P
V
O(sat)
2ndIFin
P
= −60 dBm 37 40 43 dB
2ndIFin
P
= −30 dBm
−
14.5
−
11.5
−
8.5 dBm
PLL Synthesizer Block
Circuit Current 4 ICC4 PLL All Block Operati ng 18.5 28.5 38.5 mA
Phase Comparing
PD
f
PLL Loop 8.0 8.184 8.4 MHz
Frequency
Reference Input Minimum
Level
Loop Filter Output Level (H) V
Loop Filter Output Level (L) V
Reference Output Swing V
V
REFout
REFin
LP(H)
LP(L)
ZL = 10 kΩ//20 pF (Impedance of
measurement equipment)
ZL = 10 kΩ//2 pF (Impedance of
200
2.8
1.0
0.4 V
measurement equipment)
mV
V
dB
P-P
V
P-P
Data Sheet P13860EJ3V0DS00
5
µµµµ
PB1005GS
STANDARD CHARACTERISTICS (Unless otherwise specified TA = +25
Parameter Symbol Conditions Reference Unit
RF Down-converter Block (P
LO Leakage to IF Pin LO
LO Leakage to RF Pin LO
Input 3rd Order Intercept
Point
IF Down-converter Block (1stLO oscillating, ZS = 50 Ω, ZL = 2 kΩ)
LO Leakage to 2nd IF Pin LO
LO Leakage to 1st IF Pin LO
Input 3rd Order Intercept
Point
1stLOin
= −10 dBm, ZL = ZS = 50 Ω)
if
1stLOin
f
rf
1stLOin
f
IIP3RF f
2ndif
1stif
IIP3IF f
RFin
1 = 1600 MHz, f
1stLOin
f
2ndLOin
f
2ndLOin
f
1stIFin
2ndLOin
f
= 1636.80 MHz
= 1636.80 MHz
= 1660 MHz
= 65.472 MHz
= 65.472 MHz
1 = 61.38 MHz, f
= 65.472 MHz
RFin
2 = 1605 MHz
1stIFIn
2 = 61.48 MHz
C, VCC = 3.0 V)
°°°°
30 dBm
−
30 dBm
−
13 dBm
−
20 dBm
−
40 dBm
−
34 dBm
−
6
Data Sheet P13860EJ3V0DS00
PIN EXPLANATION
µµµµ
PB1005GS
Pin
No.
Pin Name
3RX-MIX
out
Applied
Voltage
(V)
4VCC (RF-MIX) 2.7 to 3.3
5RF-MIX
in
6 GND (RF-MIX) 0
CC
7V
2.7 to 3.3
(1stLO-OSC)
81stLO-OSC1
91stLO-OSC2
10 GND
0
(1stLO-OSC)
11 VCC (phase
2.7 to 3.3
detector)
12 PD-V
out
3 Pull-up
with
resistor
13 PD-V
14 PD-V
out
2
out
1 Pull-up
with
resistor
15 GND (phase
0
detector)
Pin
Voltage
Function and Application Internal E qui valent Circuit
(V)
1.68 Output pin of RF mixer.
1st IF filter mus t be inserted
between pin 1 & 3.
Supply voltage pin of RF mixer
block. This pin must be
decoupled with capacitor
(eg. 1 000 pF).
1.20 Input pin of RF mixer.
1 575.42 MHz band pass filter
can be inserted between pin 5
and external LNA.
Ground pin RF mixer.
Supply voltage pin of dif ferential
amplifier for 1st LO oscillator
circuit.
1.88
Pin 8 & 9 are each base pin of
differential amplifi er f or 1st LO
oscillator. These pins should be
1.88
equipped with LC and varactor
to oscillate on 1636.80 MHz as
VCO.
Ground pin of differential
amplifier for 1st LO oscillator
circuit.
Supply voltage pin of phase
detector and active loop f i l ter.
Pins of active loop filter for
tuning voltage output.
The active transist ors
Output in
accordance
with phase
difference
configured with darlington pair
are built on chip. Pin 14 should
be pulled down with external
resistor. Pin 12 to 13 s houl d be
equipped with external RC in
order to adjust dumping factor
and cutoff frequency. Thi s
tuning voltage output must be
connected to varactor diode of
1st LO-OSC.
Ground pin of phase detector +
active loop filter.
4
1stLO
-OSC
5
7
V
8 9
10
11
PD
15
3
6
CC
RF-MIX or
Prescaler
input
13
12
14
Data Sheet P13860EJ3V0DS00
7
µµµµ
PB1005GS
Pin
16 V
Pin Name
CC
No.
(divider block)
out
17 LO
18 GND
(divider block)
19 REF
20 V
in
CC
(reference
block)
21 RE F
22 2ndIF
23 V
out
out
CC
(2ndIF-AMP)
24 2ndIF bypass
25 2ndIFin2
26 2ndIFin1
27 GND
(2ndIF-AMP)
Applied
Voltage
(V)
2.7 to 3.3
0
2.7 to 3.3
2.7 to 3.3
0
Pin
Voltage
Function and Application Internal E qui valent Circuit
(V)
Supply voltage pin of
prescalers.
2.08 Moni tor pin of comparison
frequency at phase detect or.
Ground pin of prescalers +
LOout amplifier
1.96 Input pin of reference frequency.
This pin should be equipped
with external 16.368 MHz
oscillator (e.g. TCXO).
Supply voltage pin of
input/output amplifiers in
reference block.
1.65 Output pin of reference
frequency. The frequency from
pin 19 can be took out as 1 V
swing.
1.56 Output pin of 2nd IF amplifier.
This pin output 4.092 MHz
clipped sinewave.
This pin should be equipped
with external inverter to adj ust
level to next stage on us er’ s
system.
Supply voltage pin of 2nd IF
amplifier.
2.30 Bypass pin of 2nd IF amplif i er
input 1. This pin should be
grounded through capacitor.
2.35 Pi n of 2nd IF amplifier input 2.
This pin should be grounded
through capacitor.
2.35 Pi n of 2nd IF amplifier input 1.
2nd IF filter can be insert ed
between pin 26 & 28.
Ground pin of 2nd IF amplifier.
P-P
16
1st
LO
OSC
18
20
19
18
23
24
26
25
27
IF
MIX
÷
25÷8
PD PD
17
÷
2
Ref.
21
PD
22
8
Data Sheet P13860EJ3V0DS00
µµµµ
PB1005GS
Pin
No.
Pin Name
28 IF-MIX
29 VGC (IF-MIX) 0 to 3.3
30 VCC (IF-MIX) 2.7 to 3. 3
1IF-MIX
2 GND (IF-MIX) 0
out
in
Applied
Voltage
(V)
Pin
Voltage
(V)
1.15 Output pin from IF mixer.
2.05 Input pin of IF mixer.
Function and Application Internal E qui valent Circuit
IF mixer output signal goes
through gain control amplifier
before this emitter fol l ower
output port.
Gain control voltage pin of I F
mixer output amplifier. This
voltage performs forward cont rol
GC
(V
up → Gain down).
Supply voltage pin of IF m i xer,
gain control amplifier and
emitter follower transistor.
Ground pin of IF mixer.
29
30
1
2nd
LO
2
Caution Ground pattern on the board must be formed as wide as possible to minimize ground
impedance.
28
Data Sheet P13860EJ3V0DS00
9
µµµµ
PB1005GS
TYPICAL CHARACTERISTICS (Unless otherwise specified, TA = +25
IC TOTAL
−−−−
(mA)
CCTOTAL
Total Circuit Current I
RF DOWN-CONVERTER BLOCK
−−−−
−−−−
TOTAL CIRCUIT CURRENT vs. SUPPLY VOLTAGE
80
No signals
70
60
50
TA = + 85°C
40
30
TA = + 25°C
TA = − 40°C
20
10
0
01234
CC
Supply Voltage V
(V)
−−−−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
12
No signals
10
C, VCC = 3.0 V)
°°°°
(mA)
8
CC
6
4
Circuit Current I
2
0
01234
Supply Voltage V
CC
(V)
1st IF OUTPUT POWER vs. RF INPUT POWER
+ 10
f
RFin
(dBm)
− 10
1stIFout
− 20
1stLOin
f
0
1stLOin
P
f
1stIFout
= 1.575420 GHz
= 1.63680 GHz
= − 10 dBm
= 61.38 MHz
VCC = 3.3 V
VCC = 3.0 V
− 30
− 40
VCC = 2.7 V
− 50
− 60
1st IF Output Power P
− 70
− 90− 80− 70− 60− 50− 40− 30− 20−
10 0+ 10 − 90 − 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10 0 + 10
1st IF OUTPUT POWER vs. RF INPUT POWER
+ 10
f
RFin
= 1.575420 GHz
1stLOin
= 1.63680 GHz
f
0
1stLOin
= − 10 dBm
− 10
− 20
− 30
− 40
P
f
1stIFout
= 61.38 MHz
TA = − 40 °C
TA = + 85 °C
(dBm)
1stIFout
− 50
− 60
1st IF Output Power P
− 70
TA = + 25 °C
10
RF Input Power P
RFin
(dBm)
Data Sheet P13860EJ3V0DS00
RF Input Power P
RFin
(dBm)
µµµµ
PB1005GS
1st IF OUTPUT POWER vs. 1st LO INPUT POWER
− 10
f
RFin
= 1.57542 MHz
P
RFin
− 15
(dBm)
− 20
1stIFout
= − 40 dBm
f
1stLOin
= 1636.8 MHz
f
1stIFout
= 61.38 MHz
VCC = 3.3 V
VCC = 3.0 V
− 25
− 30
− 35
VCC = 2.7 V
1st IF Output Power P
− 40
− 50 − 40 − 30 − 20 − 10 0 + 10
1st LO Input Power P
1stLOin
(dBm)
RF CONVERSION GAIN vs. 1st IF OUTPUT FREQUENCY
30
f
RFin
= 1.57542 GHz
P
RFin
= − 40 dBm
P
1stLOin
= − 10 dBm
f
LOin
= f
RFin
+ f
Upper Local
IFout
VCC = 3.3 V
(dB)
RF
25
20
15
10
VCC = 3.0 V
VCC = 2.7 V
5
RF Conversion Gain CG
0
10 30 100 300 1 000
RF CONVERSION GAIN vs. RF INPUT FREQUENCY
30
P
RFin
= − 40 dBm
P
1stLOin
(dB)
RF
25
f
1stIFout
f
LO
= f
= − 10 dBm
= 61.38 MHz
RFin
+ f
1stIFout
20
15
VCC = 2.7 V
VCC = 3.0 V
10
5
RF Conversion Gain CG
0
0.1 0.3 1.0 2.0
RF Input Frequency f
RFin
3rd ORDER INTERMODULATON DISTORTION,
1st IF OUTPUT POWER OF EACH TONE
vs. RF INPUT POWER OF EACH TONE
+ 20
f
RFin1
(dBm)
(dBm)
3
1stIFout (each)
+ 10
− 10
− 20
− 30
− 40
− 50
f
RFin2
f
1stLOin
0
P
1stLOin
Upper Local
= 1 600 MHz
= 1 605 MHz
= 1 660 MHz
= − 10 dBm
P
1stIFout (each)
IM
3
− 60
− 70
− 80
3rd Order Intermodulation Distortion IM
− 90
− 80− 70− 60− 50− 40− 30− 20−
1st IF Output Power of Each Tone P
VCC = 3.3 V
(GHz)
10 0+ 10
1st IF Output Frequency f
IF DOWN-CONVERTER BLOCK
−−−−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
12
No signals
10
(mA)
8
CC
6
4
Circuit Current I
2
0
01234
Supply Voltage V
1stIFout
(MHz)
RF Input Power of Each Tone P
RFin (each)
(dBm)
−−−−
CC
(V)
Data Sheet P13860EJ3V0DS00
11
µµµµ
PB1005GS
2nd IF OUTPUT POWER vs. 1st IF INPUT POWER
0
f
1stIFin
−
−
−
−
−
−
−
−
−
2nd IF Output Power P2ndIFout (dBm)
−
= 61.38 MHz
5
f
2ndLOin
= 65.472 MHz
P
2ndLOin
10
15
= − 10 dBm
f
2ndFout
= 4.092 MHz
V
GC
= GND
20
25
30
35
40
VCC = 2.7 V
45
50
− 80− 70− 60− 50− 40− 30− 20−
1st IF Input Power P
VCC = 3.3 V
VCC = 3.0 V
1stIFin (dBm)
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY
50
45
VCC = 3.3 V
VCC = 3.0 V
40
10 0
2nd IF OUTPUT POWER vs. 1st IF INPUT POWER
0
f
1stIFin
−
−
10
−
15
2ndIFout (dBm)
−
20
−
25
−
30
−
35
−
40
−
45
2nd IF Output Power P
−
50
= 61.38 MHz
5
f
2ndLOin
= 65.472 MHz
P
2ndLOin
= − 10 dBm
f
2ndFout
= 4.092 MHz
V
GC
= GND
TA = − 40°C
TA = + 85°C
TA = + 25°C
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10 0
1st IF Input Power P
1stIFin (dBm)
IF CONVERSION GAIN vs. 1st IF INPUT FREQUENCY
50
45
TA = − 40°C
IF (dB)
40
35
35
TA = + 85°C
TA = + 25°C
VCC = 2.7 V
30
P1stIFin = − 50 dBm
IF Conversion Gain CGIF (dB)
f
2ndIFout = 4.092 MHz
V
GC = GND
20
10 30 50 70 100 10 30 50 70 100
P
2ndLOin = − 10 dBm
25
1st IF Input Frequency f1stIFin (MHz)
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY
50
45
VCC = 3.0 V
VCC = 3.3 V
40
35
30
P1stIFin = − 50 dBm
IF Conversion Gain CG
f
2ndIFout = 4.092 MHz
V
GC = GND
20
P
2ndLOin = − 10 dBm
25
1st IF Input Frequency f1stIFin (dBm)
IF CONVERSION GAIN vs. 2nd IF OUTPUT FREQUENCY
50
45
TA = − 40°C
IF (dB)
TA = + 25°C
40
35
TA = + 85°C
VCC = 2.7 V
30
f1stIFin = 61.38 MHz
P
1stIFin = − 50 dBm
P
2ndLOin = − 10 dBm
25
IF Conversion Gain CGIF (dB)
f
2ndIFout = f1stIFin − f2ndLOin
VGC = GND
20
135710
30
f1stIFin = 61.38 MHz
P
1stIFin = − 50 dBm
P
2ndLOin = − 10 dBm
25
IF Conversion Gain CG
f
2ndIFout = f1stIFin − f2ndLOin
VGC = GND
20
135710
12
2nd IF Output Frequency f2ndIFout (MHz)
Data Sheet P13860EJ3V0DS00
2nd IF Output Frequency f2ndIFout (MHz)
µµµµ
PB1005GS
IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE
50
VCC = 3.3 V
40
(dB)
30
IF
20
VCC = 3.0 V
10
VCC = 2.7 V
0
f
1stIFin
− 10
IF Conversion Gain CG
− 20
− 30
= 61.38 MHz
P
1stIFin
= − 50 dBm
f
2ndLOin
= 65.472 MHz
P
2ndLOin
= − 10 dBm
f
2ndIFout
= 4.092 MHz
0 0.5 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3
Gain Control Voltage V
GC
(V)
3rd ORDER INTERMODULATION DISTORTION,
2nd IF OUTPUT POWER OF EACH TONE
vs. 2nd IF INPUT POWER OF EACH TONE
0
(dBm)
− 10
(dBm)
3
− 20
− 30
2ndIFout (each)
− 40
− 50
P
2ndIFout (each)
IM
3
− 60
f
1stIFin1
− 70
− 80
− 90
− 100
3rd Order Intermodulation Distortion IM
− 80 − 70 − 60 − 50 − 40 − 30 − 20
= 61.38 MHz
f
1stIFin2
= 61.48 MHz
f
2ndLOin
= 65.472 MHz
P
2ndLOin
V
GC
= GND
= − 10 dBm
2nd IF Output Power of Each Tone P
2nd IF Input Power of Each Tone P
1stIFin (each)
(dBm)
IF CONVERSION GAIN vs. GAIN CONTROL VOLTAGE
50
TA = − 40°C
40
(dB)
IF
30
TA = + 85°C
TA = + 25°C
20
10
0
f
1stIFin
− 10
IF Conversion Gain CG
− 20
− 30
= 61.38 MHz
P
1stIFin
= − 50 dBm
f
2ndLOin
= 65.472 MHz
P
2ndLOin
= − 10 dBm
f
2ndIFout
= 4.092 MHz
Gain Control Voltage V
GC
(V)
IF AMPLIFIER BLOCK
−−−−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
4
No signals
3
(mA)
CC
2
1
Circuit Current I
0
01234
Supply Voltage V
−−−−
CC
(V)
Data Sheet P13860EJ3V0DS00
13
µµµµ
PB1005GS
2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER
+ 10
f
2ndIFin
= 4.092 MHz
RL = 2 kΩ
(dBm)
− 10
2ndIFout
0
VCC = 3.0 V
VCC = 3.3 V
− 20
VCC = 2.7 V
− 30
− 40
2nd IF Output Power P
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10 0
2ndIFin
2nd IF Input Power P
(dBm)
VOLTAGE GAIN vs. INPUT FREQUENCY
42
P
2ndIFin
= − 60 dBm
RL = 2 kΩ
41
VCC = 3.3 V
(dB)
V
40
VCC = 3.0 V
2nd IF OUTPUT POWER vs. 2nd IF INPUT POWER
+ 10
f
2ndIFin
= 4.092 MHz
RL = 2 kΩ
0
(dBm)
− 10
2ndIFout
TA = + 25°C
TA = − 40°C
− 20
TA = + 85°C
− 30
− 40
2nd IF Output Power P
− 50
− 80 − 70 − 60 − 50 − 40 − 30 − 20 − 10 0
2ndIFin
2nd IF Input Power P
(dBm)
VOLTAGE GAIN vs. INPUT FREQUENCY
42
P
2ndIFin
= − 60 dBm
RL = 2 kΩ
TA = − 40°C
41
(dB)
V
40
TA = + 25°C
39
VCC = 2.7 V
38
Voltage Gain G
37
36
0.1 1 10 100 0.1 1 10 100
Input Frequency f
PLL SYNTHESIZER BLOCK
−−−−
CIRCUIT CURRENT vs. SUPPLY VOLTAGE
40
No signals
30
(mA)
CC
20
10
Circuit Current I
39
TA = + 85°C
38
Voltage Gain G
37
36
in
in
(MHz)
Input Frequency f
(MHz)
−−−−
14
0
01234
CC
Supply Voltage V
(V)
Data Sheet P13860EJ3V0DS00
REFERENCE BLOCK
−−−−
µµµµ
PB1005GS
−−−−
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT FREQUENCY
)
P-P
(V
REFout
2.0
1.5
1.0
P
REFin
= 1.0V
VCC = 3.0 V
P-P
VCC = 3.3 V
)
P-P
(V
REFout
2.0
1.5
1.0
VCC = 2.7 V
0.5
Reference Output Swing V
0
1 10 100 1 10 100
Reference Input Frequency f
REFin
(MHz)
0.5
Reference Output Swing V
0
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT POWER
)
P-P
(V
REFout
2.0
1.5
f
REFin
= 16.368 MHz f
VCC = 3.0 V
VCC = 3.3 V
)
P-P
(V
REFout
2.0
1.5
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT FREQUENCY
P
REFin
= 1.0V
P-P
TA = + 25°C
TA = − 40°C
TA = + 85°C
Reference Input Frequency f
REFERENCE OUTPUT SWING
vs. REFERENCE INPUT POWER
REFin
= 16.368 MHz
TA = − 40°C
TA = + 25°C
REFin
(MHz)
1.0
VCC = 2.7 V
0.5
Reference Output Swing V
0
− 50 − 40 − 30 − 20 − 10 0 + 10 − 50 − 40 − 30 − 20 − 10 0 + 10
REFin
(dBm)
Remark
Reference Input Power P
The graphs indicate nominal characteristics.
1.0
0.5
Reference Output Swing V
0
Reference Input Power P
TA = + 85°C
REFin
(dBm)
Data Sheet P13860EJ3V0DS00
15
TEST CIRCUIT
µµµµ
PB1005GS
Signal Generator
50Ω
Spectrum Analyzer
50Ω
Signal Generator
50Ω
V
CC
V
1PIN
C1
1
2
C2
3
CC
V
CC
C5
R1
V-Di
R2
C8
C9
4
C3
5
C4
6
7
8
C6
9
C7
10
11
R3
12
C10
R4
13
14
15
÷
25
÷
8
PD
÷
2
30
C22
29
C21
28
R6
27
26
C20
25
C19
24
C18
23
C17
C16
22
R5
21
C15
20
C14
19
C13
18
17
C12
16
Spectrum Analyzer: measure frequency
Oscilloscope : measure output voltage swing
C23
C11
V
CC
To get maximum gain,
apply 1.0V MAX.
Spectrum
Analyzer
50Ω
Signal Generator
Spectrum
Analyzer
or
Oscilloscope
Spectrum
Analyzer
V
CC
50Ω
Signal Generator
Spectrum
Analyzer
or
Oscilloscope
V
V
CC
CC
Component List
Form Symbol Value
Chip capacitor
Chip resistor
Varactor Diode V−Di HVU12
Chip inductor L 2.7 nH
C1 to C5, C8, C11 to C15, C17, C18, C22 1 000 pF
C6, C7 24 pF (UJ)
C9 1 800 pF
C10 33 nF
C19 10 000 pF
C23 1
C16, C20 0.1 µFCeramic capacitor
C21 0.01
R1, R2 4.7 k
R3 6.2 k
R4 1.2 k
R5, R6 1.95 k
F
µ
F
µ
Ω
Ω
Ω
Ω
16
Data Sheet P13860EJ3V0DS00
PACKAGE DIMENSIONS
30 PIN PLASTIC SHRINK SOP (300 mil) (UNIT: mm)
µµµµ
PB1005GS
30
16
115
9.85 ± 0.26
2.0 MAX.
1.7 ± 0.1
0.5 ± 0.2
0.65
0.3 ± 0.1
0.10
0.51 MAX.
0.10
M
0.15
+0.10
–0.05
detail of lead end
+7˚
3˚
–3˚
8.1 ± 0.2
6.1 ± 0.2
1.0 ± 0.2
NOTE
0.125 ± 0.075
Each lead centerline is located within 0.10 mm of its true position (T.P.) at maximum material
condition.
Data Sheet P13860EJ3V0DS00
17
µµµµ
PB1005GS
NOTE ON CORRECT USE
(1) Observe precautions for handling because of electro-static sensitive devices.
(2) Form a ground pattern as wide as possible to minimize ground impedance (to prevent abnormal oscillation).
(3) Keep the track length of the ground pins as short as possible.
(4) Connect a bypass capacitor (example: 1 000 pF) to the VCC pin.
(5) Frequency signal input/output pins must be each coupled with capacitor for DC cut.
RECOMMENDED SOLDERING CONDITIONS
This product should be soldered under the following recommended conditions. For soldering methods and
conditions other than those recommended below, contact your NEC sales representative.
Soldering Method Solderi ng Condi tions Recommended Condition Symbol
Infrared Reflow Package peak temperature: 235°C or below
Time: 30 seconds or less (at 210°C)
Count: 3, Exposure limi t: None
VPS Package peak temperature: 215° C or bel ow
Time: 40 seconds or less (at 200°C)
Count: 3, Exposure limi t: None
Wave Soldering Soldering bath temperature: 260°C or below
Time: 10 seconds or less
Count: 1, Exposure limi t: None
Partial Heating Pin temperature: 300°C
Time: 3 seconds or less (per side of device)
Exposure limit: None
After opening the dry pack, keep it in a place below 25°C and 65% RH for the allowable storage period.
Note
Note
Note
Note
Note
IR35-00-3
VP15-00-3
WS60-00-1
–
Caution Do not use different soldering methods together (except for partial heating).
For details of recommended soldering conditions for surface mounting, refer to information document
SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL (C10535E).
18
Data Sheet P13860EJ3V0DS00
[MEMO]
µµµµ
PB1005GS
Data Sheet P13860EJ3V0DS00
19
µµµµ
PB1005GS
ATTENTION
OBSERVE PRECAUTIONS
FOR HANDLING
ELECTROSTATIC
SENSITIVE
DEVICES
NESAT (NEC Silicon Advanced Technology) is a trademark of NEC Corporation.
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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