Page 1
DATA SHEET
MOS FIELD EFFECT TRANSISTOR
P-CHANNEL MOS FIELD EFFECT TRANSISTOR
FOR SWITCHING
PA1812
µµµµ
DESCRIPTION
The µPA1812 is a switching device which can be
driven directly by a 4.0-V power source.
The µPA1812 features a low on-state resistance and
excellent switching characteristics, and is suitable for
applications such as power switch of portable machine
and so on.
FEATURES
Can be driven by a 4.0-V power source
•
Low on-state resistance
•
•
DS(on)1
R
= 39 mΩ MAX. (VGS = –10 V, ID = –2.5 A)
DS(on)2
R
= 63 mΩ MAX. (VGS = –4.5 V, ID = –2.5 A)
DS(on)3
R
= 69 mΩ MAX. (VGS = –4.0 V, ID = –2.5 A)
ORDERING INFORMATION
PART NUMBER PACKAGE
PA1812GR-9JG Power TSSOP8
µ
ABSOLUTE MAXIMUM RATINGS (TA = 25°C)
Drain to Source Voltage V
Gate to Source Voltage V
Drain Current (DC) I
Drain Current (pulse)
Total Power Dissipation
Channel Temperature T
Storage Temperature T
Note1
Note2
DSS
GSS
D(DC)
D(pulse)
I
P
ch
stg
–20/+5 V
T
–55 to +150 °C
PACKAGE DRAWING (Unit : mm)
85
14
3.15 ±0.15
3.0 ±0.1
0.8 MAX.
0.65
+0.03
0.27
–0.08
–30 V
±5.0 A
±20 A
2.0 W
150 °C
1, 5, 8 :Drain
2, 3, 6, 7:Source
4 :Gate
±0.055
0.145
0.10 M
EQUIVALENT CIRCUIT
Gate
Gate
Protection
Diode
1.2 MAX.
1.0±0.05
3°
0.1±0.05
6.4 ±0.2
4.4 ±0.1
Drain
Source
0.25
+5°
–3°
Body
Diode
0.5
+0.15
0.6
–0.1
1.0 ±0.2
0.1
Notes 1.
Remark
PW ≤ 10 µs, Duty Cycle ≤ 1 %
2.
Mounted on ceramic substrate of 5000 mm2 x 1.1 mm
The diode connected between the gate and source of the transistor serves as a protector against ESD.
When this device actually used, an additional protection circuit is externally required if a voltage
exceeding the rated voltage may be applied to this device.
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for
availability and additional information.
Document No. D12967EJ1V0DS00 (1st edition)
Date Published October 1999 NS CP(K)
Printed in Japan
The mark
★★★★
shows major revised points.
©
1997, 1999
Page 2
•
ELECTRICAL CHARACTERISTICS (TA = 25 °C)
CHARACTERISTICS SYMBOL TEST CONDITIONS MIN. TYP. MAX. UNIT
µµµµ
PA1812
Zero Gate Voltage Drain Current I
Gate Leakage Current I
Gate Cut-off Voltage V
DSS
VDS = –30 V, VGS = 0 V –10
GSS
VGS = ±20 V, VDS = 0 V±10
GS(off)VDS
= –10 V, ID = –1 mA –1.0 –1.6 –2.5 V
A
µ
A
µ
Forward Transfer Admittance | yfs |VDS = –10 V, ID = –2.5 A18S
Drain to Source On-state Resi stance R
Input Capacitance C
Output Capacitance C
Reverse Transfer Capacitance C
Turn-on Delay Time t
Rise Time t
Turn-off Delay Time t
Fall Time t
Total Gate Charge Q
Gate to Source Charge Q
Gate to Drain Charge Q
Diode Forward Voltage V
DS(on)1VGS
DS(on)2VGS
R
DS(on)3VGS
R
iss
oss
rss
d(on)
r
d(off)
f
G
GS
GD
F(S-D)IF
= –10 V, ID = –2.5 A2939m
= –4.5 V, ID = –2.5 A4663m
= –4.0 V, ID = –2.5 A5269m
Ω
Ω
Ω
VDS = –10 V 1500 pF
VGS = 0 V 550 pF
f = 1 MHz 270 pF
VDD = –10 V30ns
ID = –2.5 A 160 ns
GS(on)
V
= –10 V 110 ns
RG = 10
Ω
80 ns
VDS = –24 V31nC
ID = –5.0 A4nC
VGS = –10 V 8 nC
= 5.0 A, VGS = 0 V0.76V
TEST CIRCUIT 1 SWITCHING TIME TEST CIRCUIT 2 GATE CHARGE
IG = 2 mA
50 Ω
D.U.T.
R
L
V
DD
PG.
V
GS
RG = 10 Ω
0
τ
τ = 1 s
µ
Duty Cycle ≤ 1 %
R
G
D.U.T.
V
L
R
V
Wave Form
V
DD
I
D
Wave Form
GS
GS
0
10 %
V
GS(on)
90 %
PG.
0
10 %
t
d(on)
90 %
t
on
90 %
I
D
t
r
t
d(off)
10 %
t
f
t
off
D
I
2
Data Sheet D12967EJ1V0DS00
Page 3
30
150
60
90
20
60
80
40
0
100
120
DERATING FACTOR OF FORWARD BIAS
SAFE OPERATING AREA
dT - Derating Factor - %
TA - Ambient Temperature -
˚C
GATE TO SOURCE CUT-OFF VOLTAGE vs.
CHANNEL TEMPERATURE
T
ch
- Channel Temperature - ˚C
V
GS(off)
- Gate to Source Cut-off Voltage - V
V
DS =
−10 V
I
D = −1
mA
−50
0
150
50
100
−1.0
−2.0
−1.2
−1.4
−1.6
−1.8
•
TYPICAL CHARACTERISTICS (TA = 25 °C)
FORWARD BIAS SAFE OPERATING AREA
−100
−10
ID(pulse)
V)
Limited
4.5
-
DS(on)
=
R
GS
(@V
I
D
(DC)
10
100 ms
PW
ms
µµµµ
PA1812
=
1 ms
DRAIN CURRENT vs.
DRAIN TO SOURCE VOLTAGE
−20
Pulsed
V
GS
= −10 V
−15
−10
- Drain Current - A
D
I
−5
0
−0.2
V
−4.5 V
−4.0 V
−0.4
DS
- Drain to Source Voltage - V
−0.6
−0.8 −1.0
−1
- Drain Current - A
D
I
−0.1
TA = 25˚C
Single Pulse
Mounted on Ceramic
Substrate of 5000 mm x 1.1 mm
−0.01
−0.1
FORWARD TRANSFER CHARACTERISTICS
−100
VDS = −10 V
−10
−1
TA = 125˚C
−0.1
−0.01
- Drain Current - A
D
I
−0.001
−0.0001
0 −1.0 −2.0 −3.0
DC
2
−1.0
DS
- Drain to Source Voltage - V
V
−10.0 −100.0
75˚C
GS
- Gate to Source Voltage - V
V
TA = 25˚C
−25˚C
−4.0
100
10
1
| - Forward Transfer Admittance - S
fs
| y
0.1
−0.1
Data Sheet D12967EJ1V0DS00
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
VDS = −10 V
TA = −25 ˚C
25 ˚C
75 ˚C
125 ˚C
−1 −10
ID - Drain Current - A
−100
3
Page 4
µµµµ
PA1812
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
100
VGS = −4.0 V
80
TA = 125˚C
60
75˚C
25˚C
40
- Drain to Source On-state Resistance - mΩ
20
−0.1 −10 −100
DS(on)
R
−25˚C
−1
D
- Drain Current - A
I
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
50
VGS = −10 V
TA = 125˚C
40
75˚C
30
20
25˚C
−25˚C
DRAIN TO SOURCE ON-STATE
RESISTANCE vs. DRAIN CURRENT
80
VGS = −4.5 V
60
TA = 125˚C
75˚C
25˚C
40
- Drain to Source On-state Resistance - mΩ
20
−0.1 −10 −100
DS(on)
R
−25˚C
−1
D
- Drain Current - A
I
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
CHANNEL TEMPERATURE
80
ID = −2.5 A
GS
= −4.0 V
V
60
−4.5 V
40
−10 V
20
- Drain to Source On-state Resistance - mΩ
10
−0.1 −10 −100
DS(on)
R
−1
D
- Drain Current - A
I
DRAIN TO SOURCE ON-STATE RESISTANCE vs.
GATE TO SOURCE VOLTAGE
100
ID = −2.5 A
80
60
40
20
- Drain to Source On-state Resistance - mΩ
DS (on)
0
R
−5 −
10
−
15
−
20
VGS - Gate to Source Voltage - V
−25
- Drain to Source On-state Resistance - mΩ
0
DS (on)
−50
R
10000
f = 1 MHz
V
GS
= 0 V
1000
- Capacitance - pF
rss
, C
oss
100
, C
iss
C
10
050
100
Tch - Channel Temperature - ˚C
CAPACITANCE vs. DRAIN TO
SOURCE VOLTAGE
C
iss
C
oss
C
rss
−10−1 −100
VDS - Drain to Source Voltage - V
150
4
Data Sheet D12967EJ1V0DS00
Page 5
µµµµ
PA1812
1000
VDD = −10 V
V
GS(on)
= −4 V
RG = 10 Ω
100
, tf - Switchig Time - ns
SWITCHING CHARACTERISTICS
(off)
, tr, td
(on)
td
10
−
0.1
D
I
DYNAMIC INPUT CHARACTERISTICS
−10
ID = −5 A
−8
−6
−
1
- Drain Current - A
VDD = −24 V
SOURCE TO DRAIN DIODE FORWARD VOLTAGE
100
10
tr
tf
td
(off)
1
0.1
0.01
td
(on)
−
10
- Source to Drain Current - A
F
I
0.001
0.0001
0.4
0.6
V
F(S-D)
- Source to Drain Voltage - V
0.8
1
−4
- Gate to Source Voltage - V
−2
GS
V
5
0
Qg - Gate Charge - nC
1000
Mounted on ceramic
substrate of
Single Pulse
100
10
1
- Transient Thermal Resistance - ˚C/W
th(ch-A)
r
0.1
2010 3015
25
35
TRANSIENT THERMAL RESISTANCE vs. PULSE WIDTH
2
50 cm
x 1.1 mm
0.010.001
0.1
110
62.5˚C/W
1000100
PW - Pulse Width - s
Data Sheet D12967EJ1V0DS00
5
Page 6
[MEMO]
µµµµ
PA1812
6
Data Sheet D12967EJ1V0DS00
Page 7
[MEMO]
µµµµ
PA1812
Data Sheet D12967EJ1V0DS00
7
Page 8
µµµµ
PA1812
• The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
• No part of this document may be copied or reproduced in any form or by any means without the prior written
consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in
this document.
• NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property
rights of third parties by or arising from use of a device described herein or any other liability arising from use
of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other
intellectual property rights of NEC Corporation or others.
• Descriptions of circuits, software, and other related information in this document are provided for illustrative
purposes in semiconductor product operation and application examples. The incorporation of these circuits,
software, and information in the design of the customer's equipment shall be done under the full responsibility
of the customer. NEC Corporation assumes no responsibility for any losses incurred by the customer or third
parties arising from the use of these circuits, software, and information.
• While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices,
the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or
property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety
measures in its design, such as redundancy, fire-containment, and anti-failure features.
• NEC devices are classified into the following three quality grades:
"Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a
customer designated "quality assurance program" for a specific application. The recommended applications of
a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device
before using it in a particular application.
Standard: Computers, office equipment, communications equipment, test and measurement equipment,
audio and visual equipment, home electronic appliances, machine tools, personal electronic
equipment and industrial robots
Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster
systems, anti-crime systems, safety equipment and medical equipment (not specifically designed
for life support)
Specific: Aircraft, aerospace equipment, submersible repeaters, nuclear reactor control systems, life
support systems or medical equipment for life support, etc.
The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books.
If customers intend to use NEC devices for applications other than those specified for Standard quality grade,
they should contact an NEC sales representative in advance.
M7 98. 8
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