The UMA1021M BICMOS device integrates a prescaler,
programmable dividers, and a phase comparator to
implement a phase-locked loop.
UMA1021M
The device is designed to operate from 3 NiCd cells, in
pocket phones, with low current and nominal 3 V supplies.
The synthesizer operates at RF input frequencies up to
2.2 GHz, with a fully programmable reference divider.
All divider ratios are supplied via a 3-wire serial
programming bus.
Separate power and ground pins are provided to the
analog (charge-pump) and digital circuits. The ground
leads should be externally short-circuited to prevent large
currents flowing across the die and thus causing damage.
V
and V
DD1
VCC must be equal to or greater than VDD(e.g. VDD=3V
and VCC= 5 V for wider VCO control voltage range).
The phase detector has two charge-pump outputs, CP and
CPF, the latter of which is enabled directly at pin FAST.
This permits the design of adaptive loops. The charge
pump currents (phase detector gain) are fixed by an
external resistance at pin I
Only a passive loop filter is necessary; the charge pumps
function within a wide voltage compliance range to
improve the overall system performance.
must also be at the same potential (VDD).
DD2
and via the serial interface.
SET
QUICK REFERENCE DATA
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
V
DD
V
CC
I
DD+ICC
I
CC(pd)+IDD(pd)
f
RF
f
xtal
f
PC
T
amb
digital supply voltageV
DD1=VDD2
VCC≥ V
charge-pump supply voltageVCC≥ V
DD
DD
;
2.7−5.5V
2.7−5.5V
supply current−10−mA
total supply current in power-down mode−5−µA
RF input frequency300−2200MHz
crystal reference input frequency3−35MHz
phase comparator frequency−200−kHz
operating ambient temperature−30−+85°C
ORDERING INFORMATION
TYPE
NUMBER
NAMEDESCRIPTIONVERSION
PACKAGE
UMA1021MSSOP20plastic shrink small outline package; 20 leads; body width 4.4 mmSOT266-1
1999 Jun 172
Page 3
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
BLOCK DIAGRAM
handbook, full pagewidth
CP
RFI
1
2
3
6
8
9
FAST CHARGE
CHARGE PUMP
PHASE COMPARATOR
MAIN DIVIDER
WITH
PRESCALER
FAST
CPF
POL
PON
V
V
PUMP
SERIAL INTERFACE
DD2
DD1
14418
REFERENCE
DIVIDER
V
CC
UMA1021M
BAND GAP
UMA1021M
19
I
SET
20
LOCK
16
XTALA
XTALB
15
13
E
12
DATA
11
CLK
107517
V
SS1
V
SS2
V
SS3
Fig.1 Block diagram.
GND(CP)
MBG366
1999 Jun 173
Page 4
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
PINNING
SYMBOLPINDESCRIPTION
FAST1enable input for fast charge-pump
output CPF
CPF2fast charge-pump output
CP3normal charge-pump output
V
DD2
V
SS3
RFI62 GHz main divider input
V
SS2
POL8digital input to select polarity of
PON9power-on input
V
SS1
CLK11programming bus clock input
DATA12programming bus data input
E13programming bus enable input
V
DD1
XTALB15complementary crystal frequency
XTALA16crystal frequency input from TCXO;
GND(CP)17ground for charge-pump
V
CC
I
SET
LOCK20out-of-lock detector output
4power supply 2
5ground 3
7ground 2
power-on inputs (PON and sPON):
POL = 0 for active LOW and
POL = 1 for active HIGH
10ground 1
14power supply 1
input from TCXO; if not used should
be decoupled to ground
if not used should be decoupled to
ground
18supply for charge-pump
19external resistor from this pin to
ground sets the charge-pump
currents
handbook, halfpage
FAST
1
CPF
2
CP
3
V
4
DD2
5
V
V
POL
PON
V
SS3
RFI
SS2
SS1
UMA1021M
6
7
8
9
10
MBG365
Fig.2 Pin configuration.
UMA1021M
20
LOCK
I
19
SET
V
18
CC
17
GND(CP)
XTALA
16
15
XTALB
V
14
DD1
E
13
12
DATA
CLK
11
FUNCTIONAL DESCRIPTION
Main divider
The main divider is clocked at pin RFI by the RF signal
which is AC-coupled from an external VCO. The divider
operates with signal levels from 50 to 225 mV (RMS), and
at frequencies from 300 MHz to 2.2 GHz. It consists of a
fully programmable bipolar prescaler followed by a CMOS
counter. Any divide ratios from 512 to 131071 inclusive
can be programmed.
1999 Jun 174
Reference divider
The reference divider is clocked by the differential signal
between pins XTALA and XTALB. If only one of these
inputs is used, the other should be decoupled to ground.
The applied input signal(s) should be AC-coupled.
The circuit operates with levels from
50 up to 500 mV (RMS) and at frequencies from
3 to 35 MHz. Any divide ratios from 8 to 2047 inclusive
can be programmed.
Page 5
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
Phase detector
The phase detector is driven by the output edges of the
main and reference dividers. It produces current pulses at
pins CP and CPF whose amplitudes are programmed.
The pulse duration is equal to the difference in time of
arrival of the edges from the two dividers. If the main
divider edge arrives first, CP and CPF sink current. If the
reference divider edge arrives first, CP and CPF source
current.
The currents at CP and CPF are programmed via the serial
bus as multiples of a reference current set by an external
resistor connected between pin I
(see Table 3). CP remains active except in power-down.
CPF is enabled via input pin FAST which is synchronized
with respect to the phase detector to prevent output
current pulses being interrupted. By appropriate
connection to the loop filter, dual bandwidth loops can be
designed; short time constant during frequency switching
(FAST mode) to speed-up channel changes, and low
bandwidth in the settled state to improve noise and
breakthrough levels.
SET
and V
SS
UMA1021M
During normal operation,
last 21 bits serially clocked into the device are retained
within the programming register. Additional leading bits
are ignored, and no check is made on the number of clock
pulses. The fully static CMOS design uses virtually no
current when the bus is inactive. It can always capture new
programmed data even during power-down.
When the synthesizer is powered-on, the presence of a
TCXO signal at the reference divider input and a VCO
signal at the main divider input is required for correct
programming.
Data format
The leading bits (dt16 to dt0) make up the data field, while
the trailing four bits (ad3 to ad0) are the address field.
The UMA1021M uses 4 of the 16 available addresses.
These are chosen for compatibility with other Philips
Semiconductors radio telephone ICs. The data format is
shown in Table 1. The first bit entered is dt16, the last bit
is ad0. For the divider ratios, the first bits entered (PM16
and PR10) are the most significant (MSB).
E should be kept HIGH. Only the
Additional circuitry is included to ensure that the gain of the
phase detector remains linear even for small phase errors.
Out-of-lock detector
The out-of-lock detector is enabled (disabled) via the serial
interface by setting bit OOL HIGH (LOW). An open drain
transistor drives the output pin LOCK (pin 20). It is
recommended that the pull-up resistor from this pin to V
is chosen to be of sufficient value to keep the sink current
in the LOW state to below 400 µA. When the out-of-lock
detector is enabled, LOCK is HIGH if the error at the phase
detector input is less than approximately 25 ns, otherwise
LOCK is LOW. If the out-of-lock detector is disabled,
LOCK remains HIGH.
Serial programming bus
A simple 3-line unidirectional serial bus is used to program
the circuit. The 3 lines are DATA, clock (CLK) and enable
(
E). The data sent to the device is loaded in bursts framed
byE. Programming clock edges and their appropriate data
bits are ignored untilE goes active LOW. The programmed
information is loaded into the addressed latch when E
returns HIGH.
DD
The trailing address bits are decoded on the rising edge of
E. This produces an internal load pulse to store the data in
the addressed latch. To avoid erroneous divider ratios,
the load pulse is not allowed during data reads by the
frequency dividers. This condition is guaranteed by
respecting a minimum E pulse width after data transfer.
The test register (address 0000) does not normally need to
be programmed. However if it is programmed, all bits in the
data field should be set to logic 0.
Power-down mode
The synthesizer is on when both the input signals PON
and the programmed bit sPON are active. The ‘active’ level
for these two signals is chosen at pin POL (see Table 2).
When turned on, the dividers and phase detector are
synchronized to avoid random phase errors. When turned
off, the phase detector is synchronized to avoid
interrupting charge-pump pulses. For synchronisation
functions to work correctly on power-up or power-down
(using either hardware or software programming), the
presence of TCXO and VCO signals is required to drive
the appropriate divider inputs. The UMA1021M has a very
low current consumption in the power-down mode.
Table 3 Fast and normal charge pumps current ratio (note 1)
CR1CR0I
CP
002×I
012×I
101×I
111×I
Note
1. I
V
SET
=; reference current for charge pumps.
------------- -
SET
R
SET
SET
SET
SET
SET
I
8 × I
16 × I
12 × I
16 × I
CPF
SET
SET
SET
SET
I
CPF:ICP
4:1
8:1
12:1
16:1
UMA1021M
Page 7
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
UMA1021M
for radio telephones
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOLPARAMETERMIN.MAX.UNIT
V
DD
V
CC
V
− V
CC
DD
V
n
∆V
GND
P
tot
T
stg
T
amb
T
j(max)
HANDLING
digital supply voltage−0.3+5.5V
charge-pump supply voltage−0.3+5.5V
difference in voltage between VCC and V
DD
−0.3+5.5V
voltage at pins 6, 8, 9 and 11 to 13−0.3VDD+ 0.3V
voltage at pins 1, 2, 3, 15, 16, 19 and 20−0.3V
difference in voltage between any of GND(CP), V
and V
(these pins should be connected together)
SS3
SS1
, V
SS2
,
−0.3+0.3V
+ 0.3V
CC
total power dissipation−150mW
storage temperature−55+125°C
operating ambient temperature−30+85°C
maximum junction temperature−150°C
Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices. This device meets class 2 ESD test
requirements [Human Body Model (HBM)], in accordance with
“MIL STD 883C - method 3015”
.
THERMAL CHARACTERISTICS
SYMBOLPARAMETERVALUEUNIT
R
th j-a
thermal resistance from junction to ambient in free air120K/W
1999 Jun 177
Page 8
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
UMA1021M
for radio telephones
CHARACTERISTICS
All values refer to the typical measurement circuit of Fig.5; V
DD1=VDD2
unless otherwise specified. Characteristics for which only a typical value is given are not tested.
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Supply; pins 4, 14 and 18
V
DD
V
CC
I
DD1+IDD2
I
CC
I
CC(pd)+IDD(pd)
digital supply voltageV
charge pump supply voltageVCC≥ V
Charge pump current setting resistor input; pin 19
R
SET
external resistor connected
between pin 19 and ground
V
SET
regulated voltage at pin 19R
SET
1999 Jun 178
5.6−12kΩ
= 5.6 kΩ−1.2−V
Page 9
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
UMA1021M
for radio telephones
SYMBOLPARAMETERCONDITIONSMIN.TYP.MAX.UNIT
Charge pump outputs; pins 2 and 3; R
I
ocp(err)
I
match
I
LIcp
V
CP/CPF
charge pump output current error−25−+25%
sink-to-source current matching−±5− %
charge pump off leakage currentV
charge pump voltage compliance0.4−VCC− 0.4 V
Phase noise
N
900
synthesizer’s contribution to
close-in phase noise of 900 MHz
RF signal at 1 kHz offset (GSM)
N
1800
synthesizer’s contribution to
close-in phase noise of 1.8 GHz
RF signal at 1 kHz offset
(DCS1800)
Interface logic input signal levels; pins 8, 9, 11, 12 and 13
V
V
I
C
IH
IL
bias
i
HIGH level input voltage0.7V
LOW level input voltage−0.3−0.3V
input bias currentlogic 1 or logic 0−5−+5µA
input capacitance−2−pF
Interface logic input signal levels; pin 1
V
V
I
C
IH
IL
bias
i
HIGH level input voltage0.7V
LOW level input voltage−0.3−0.3V
input bias currentlogic 1 or logic 0−5−+5µA
input capacitance−2−pF
LOW level output voltageI
phase error threshold for
out-of-lock detector
SET
= 5.6 kΩ
CP/CPF
f
= 13 MHz;
xtal
V
= 0 dBm;
xtal
=1⁄2V
CC
−5±1+5 nA
−−88−
fPC= 200 kHz
f
= 13 MHz;
xtal
V
= 0 dBm;
xtal
−−82−
fPC= 200 kHz
−VDD+ 0.3 V
DD
−VCC+ 0.3 V
CC
< 0.4 mA−−0.4V
sink
−25−ns
DD
CC
dBc/Hz
dBc/Hz
V
V
1999 Jun 179
Page 10
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
UMA1021M
for radio telephones
SERIAL BUS TIMING CHARACTERISTICS
V
DD=VCC
=3V; T
SYMBOLPARAMETERMIN.TYP.MAX.UNIT
Serial programming clock; CLK
t
r
t
f
T
cy
Enable programming;
t
START
t
END
t
W(min)
t
SU;E
Register serial input data; DATA
t
SU;DAT
t
HD;DAT
=25°C; unless otherwise specified.
amb
input rise time−1040ns
input fall time−1040ns
clock period100−−ns
E
delay to rising clock edge40−−ns
delay from last falling clock edge−20−−ns
minimum inactive pulse width4000
(1)
−−ns
enable set-up time to next clock edge20−−ns
input data to clock set-up time20−−ns
input data to clock hold time20−−ns
Note
1. The minimum pulse width (t
a) Main divider input frequency.
b) Reference divider input frequency.
handbook, full pagewidth
CLK
DATA
E
t
SU;DAT
MSBLSBADDRESS
t
START
) can be smaller than 4 µs provided all the following conditions are fulfilled:
W(min)
447
>
f
-------------------
RF
t
Wmin()
f
>
xtal
t
HD;DAT
3
------------------t
Wmin()
T
cy
t
t
f
r
MGD565
t
ENDtSU;E
t
W(min)
Fig.3 Serial bus timing diagram.
1999 Jun 1710
Page 11
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
APPLICATION INFORMATION
handbook, full pagewidth
amplifier
low noise
amplifier
power
duplex
filter
transmit
data
SPLITTERVCOLPF
transmit
mixer
TCXO
PLL
MAIN
DIVIDER
REFERENCE
DIVIDER
COMPARATOR
UMA1021M
to demodulation
UMA1021M
PHASE
MBG369
1st mixer2nd mixer
Fig.4 Typical application block diagram.
1999 Jun 1711
Page 12
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
handbook, full pagewidth
100 nF
RF VCO
12 Ω
control
out
1 nF
(1)
18 Ω
1 nF
18 Ω
to 1st mixer
positive supply
(1)
(1)(1)
(1)
18 Ω
positive supply
56 Ω
12 Ω
100 nF
1 nF
1
2
3
4
5
UMA1021M
6
7
8
9
10
UMA1021M
positive supply
20
5.6 kΩ
19
18
17
16
15
14
13
12
11
100 nF
1 nF
1 nF
1 kΩ1 kΩ 1 kΩ
12 Ω12 Ω
100 nF
f
osc
VTCXO
GNDV
V
CC
cont
12 Ω
100 nF
(1) Values depend on application.
Fig.5 Typical test and application diagram.
3-wire bus
MBG367
1999 Jun 1712
Page 13
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
PACKAGE OUTLINE
SSOP20: plastic shrink small outline package; 20 leads; body width 4.4 mm
20
D
c
y
Z
11
E
H
UMA1021M
SOT266-1
A
X
v M
E
A
pin 1 index
110
w M
b
e
DIMENSIONS (mm are the original dimensions)
mm
A
max.
1.5
0.1501.4
1.2
0.25
b
3
p
0.32
0.20
UNITA1A2A
Note
1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.
p
cD
0.20
6.6
0.13
6.4
02.55 mm
scale
(1)E(1)
eHELLpQZywv θ
4.5
0.651.00.2
4.3
6.6
6.2
Q
A
2
A
1
detail X
0.65
0.75
0.45
0.45
(A )
L
p
L
A
3
θ
0.130.1
0.48
0.18
(1)
o
10
o
0
OUTLINE
VERSION
SOT266-1
IEC JEDEC EIAJ
REFERENCES
1999 Jun 1713
EUROPEAN
PROJECTION
ISSUE DATE
90-04-05
95-02-25
Page 14
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
for radio telephones
SOLDERING
Introduction to soldering surface mount packages
This text gives a very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
“Data Handbook IC26; Integrated Circuit Packages”
our
(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface
mount IC packages. Wave soldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.
Reflow soldering
Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
to the printed-circuit board by screen printing, stencilling or
pressure-syringe dispensing before package placement.
Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling) vary
between 100 and 200 seconds depending on heating
method.
Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.
Wave soldering
Conventional single wave soldering is not recommended
for surface mount devices (SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.
To overcome these problems the double-wave soldering
method was specifically developed.
UMA1021M
If wave soldering is used the following conditions must be
observed for optimal results:
• Use a double-wave soldering method comprising a
turbulent wave with high upward pressure followed by a
smooth laminar wave.
• For packages with leads on two sides and a pitch (e):
– larger than or equal to 1.27 mm, the footprint
longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;
– smaller than 1.27 mm, the footprint longitudinal axis
must be parallel to the transport direction of the
printed-circuit board.
The footprint must incorporate solder thieves at the
downstream end.
• For packages with leads on four sides, the footprint must
be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.
During placement and before soldering, the package must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.
Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.
Manual soldering
Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.
When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.
1999 Jun 1714
Page 15
Philips SemiconductorsProduct specification
Low-voltage frequency synthesizer
UMA1021M
for radio telephones
Suitability of surface mount IC packages for wave and reflow soldering methods
1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum
2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink
3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.
4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;
5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is
, SO, SOJsuitablesuitable
temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the
(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).
The package footprint must incorporate solder thieves downstream and at the side corners.
it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.
definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.
Objective specificationThis data sheet contains target or goal specifications for product development.
Preliminary specificationThis data sheet contains preliminary data; supplementary data may be published later.
Product specificationThis data sheet contains final product specifications.
Limiting values
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or
more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation
of the device at these or at any other conditions above those given in the Characteristics sections of the specification
is not implied. Exposure to limiting values for extended periods may affect device reliability.
Application information
Where application information is given, it is advisory and does not form part of the specification.
LIFE SUPPORT APPLICATIONS
These products are not designed for use in life support appliances, devices, or systems where malfunction of these
products can reasonably be expected to result in personal injury. Philips customers using or selling these products for
use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such
improper use or sale.
1999 Jun 1715
Page 16
Philips Semiconductors – a worldwide company
Argentina: see South America
Australia: 34 Waterloo Road, NORTH RYDE, NSW 2113,
United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. +1 800 234 7381, Fax. +1 800 943 0087
Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,
Tel. +381 11 62 5344, Fax.+381 11 63 5777
For all other countries apply to: Philips Semiconductors,
International Marketing & Sales Communications, Building BE-p, P.O. Box 218,
5600 MD EINDHOVEN, The Netherlands, Fax. +31 40 27 24825
The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.
199966
Internet: http://www.semiconductors.philips.com
Printed in The Netherlands465008/04/pp16 Date of release: 1999Jun 17Document order number: 9397 750 06106
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