Page 1
Evaluation Board User Guide
UG-285
AD5544
V
OUT
A
V
OUT
D
SDINSCLKCS
SDO
LDAC
RS
MSB
I
OUT
D
USB
EVAL-SDP-CB1Z
GPIO
SPORT
V
REF
x
I
OUT
A
ADR01
REFERENCE
AD8065
I-TO-V
AD8065
I-TO-V
09900-001
One Technology Way • P. O. Box 9106 • Norwood, MA 02062-9106, U.S.A. • Tel: 781.329.4700 • Fax: 781.461.3113 • www.analog.com
Evaluating the AD5544 Current Output/Serial Input DAC
FEATURES
Full-featured evaluation board for the AD5544
Graphic user interface software for board control and data
analysis
Connector to E VAL-SDP-CB1Z system demonstration
platform board
Various power supply options
APPLICATIONS
Automatic test equipment
Instrumentation
Digitally controlled calibration
GENERAL DESCRIPTION
The AD5544 quad, 16-bit, current output, digital-to-analog
converter (DAC) is designed to operate in a 2.7 V to 5.5 V
supply range. But this voltage is limited up to 3.3 V due to
EVAL-SDP-CB1Z restrictions.
The applied external reference input voltage (V
the full-scale output current. Integrated feedback resistors
(R
x) provide temperature-tracking, full-scale voltage outputs
FB
when combined with an external I-to-V precision amplifier.
x) determines
REF
A double-buffered serial data interface offers high speed, 3-wire,
SPI- and microcontroller-compatible inputs using serial data in
(SDI), chip select (
serial data out pin (SDO) allows for daisy-chaining when
multiple packages are used. A common, level-sensitive, load
DAC strobe (
all DAC outputs from previously loaded input registers.
Additionally, an internal power-on reset forces the output
voltage to 0 at system turn on. An MSB pin allows system reset
assertion (
RS
or to half-scale code when MSB = 1.
The AD5544 is packaged in a compact 28-lead SSOP.
The E VA L -AD5544/45SDZ board is used in conjunction with
the EVA L -SDP-CB1Z system demonstration platform (SDP)
board available from Analog Devices, Inc., which is purchased
separately from the evaluation board. The USB-to-SPI
communication to the AD5544 is completed using this
Blackfin®-based demonstration board. The software offers a
waveform generator.
CS
), and clock (CLK) signals. In addition, a
LDAC
) input allows the simultaneous update of
) to force all registers to zero code when MSB = 0
PLEASE SEE THE LAST PAGE FOR AN IMPORTANT
WARNING AND LEGAL TERMS AND CONDITIONS.
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
Rev. A | Page 1 of 12
Page 2
UG-285 Evaluation Board User Guide
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Evaluation Board Software .............................................................. 3
Installing the Software ................................................................. 3
REVISION HISTORY
5/12—Rev. 0 to Rev. A
Changes to General Description Section ...................................... 1
Changes to Figure 2 .......................................................................... 3
Changes to Evaluation Board Schematics and Artwork Section ... 5
5/11—Revision 0: Initial Versi on
Running the Software ...................................................................3
Using the Evaluation Board Software .............................................4
Example ..........................................................................................4
Evaluation Board Schematics and Artwork ...................................5
Evaluation Board Layout ..............................................................8
Related Links ......................................................................................9
Rev. A | Page 2 of 12
Page 3
Evaluation Board User Guide UG-285
09900-002
09900-003
EVALUATION BOARD SOFTWARE
Figure 2. Device Manager Showing the SDP Board Connected
INSTALLING THE SOFTWARE
The EVAL-AD5544/45SDZ evaluation kit includes the software
and drivers on CD. To install the software, do the following:
1. Install the software before connecting the SDP board to the
USB port of the PC.
2. Start the Windows® operating system and insert the EVAL-
AD5544/45SDZ evaluation kit CD.
3. Download the E VA L -AD5544/45SDZ LabVIEW™ software.
The correct driver, SDPDriversNET, for the SDP board
should download automatically after LabVIEW is
downloaded, supporting both 32- and 64-bit systems.
However, if the drivers do not download automatically, the
driver executable file can also be found in the Program
Files/Analog Devices folder. Follow the on-screen prompts
to install it.
4. After installation of the software and drivers is complete, plug
the EVA L -AD5544/45SDZ into the SDP board and the SDP
board into the PC using the USB cable included in the box.
5. When the software detects the evaluation board, proceed
through any dialog boxes that appear to finalize the
installation (Found New Hardware Wizard/Install the
Software Automatically and so on).
RUNNING THE SOFTWARE
To run the evaluation board program, do the following:
1. Click Start/All Programs/Analog Devices/EVAL-
AD5544/45SDZ.
2. If the SDP board is not connected to the USB port when
the software is launched, a connectivity error displays (see
Figure 3). Simply connect the evaluation board to the USB
port of the PC, wait a few seconds, click Rescan, and follow
the instructions.
Figure 3.
Rev. A | Page 3 of 12
Page 4
UG-285 Evaluation Board User Guide
09900-004
09900-005
V
D
VV
REF
OUT
5.2
536,65
384,16
10
536,65
−=×−=×−=
V
D
VV
REF
OUT
5.7
536,65
152,49
10
536,65
−=×−=×−=
USING THE EVALUATION BOARD SOFTWARE
Once the software is launched, the main window pops up (see
Figure 4).
The desired 16-bit data loads and updates one of the four DACs
that you selected within the AD5544 part.
There are two modes for loading the data. Synchronous mode
enables you to program each channel separately and update
them simultaneously. Program
LDAC
and finally pull
low. Asynch-ronous mode enables you
to load and update each channel separately (the
LDAC
high, load the channels,
LDAC
button
is ignored in this case).
RS
The reset button,
, updates all channel outputs to zero scale
or midscale when MSB is pulled low or high.
EXAMPLE
LDAC
With
specify quarter scale (0x4000, 16384d) in the Input Data box
and click Load and Update DAC A. The expected output
obtained is
and RS tied high for asynchronous loading mode,
Figure 4. Main Window
The first step is to select the device to use that is connected
to the SDP board, in this case the AD5544, and click OK.
After selecting the device, the AD5544 evaluation software
window appears (see Figure 5) to start writing to the device.
When you change the loading synchronism mode to synchronous and write the value 0xC000 (49152d), you see no change
in the output until
LDAC
is tied low. The expected output for
this case is
Figure 5. AD5544 Evaluation Software Window
Rev. A | Page 4 of 12
Page 5
Evaluation Board User Guide UG-285
VOUT A1
VOUT B1
SCLK1 SDIN1
/CS1
3
IOUTA
4
AGNDA
1
RFBA
2
VREFA
12
DGND
15
LDAC
16
SCLK9SDIN
10
RS
11
CS
14
MSB
13
VDD
7
VREFB
8
RFBB
5
AGNDB
6
IOUTB
U2
AD5545CRUZ
/LDAC1
/RS1
MSB1
C9
5.6pF
VOUTA1
+
C10
10uF
C11
0.1uF
+
C12
10uF
C13
0.1uF
J3
C14
5.6pF
VOUTB1
+
C26
10uF
C31
0.1uF
+
C38
10uF
C39
0.1uF
J5
+
C27
10uF
C29
0.1uF
3+2
-
4
V-7V+
6
U1
AD8065
3+2
-
4
V-7V+
6
U4
AD8065
DGND
SCLK
SDIN
/CS
/LDAC
/RS
MSB
VDD
VSS
VDD
VSS
DVDD
DGND
VREFA
VREFB
09900-006
EVALUATION BOARD SCHEMATICS AND ARTWORK
SCHEMATICS
Figure 6. EVAL-AD5544/45SDZ Schematic Part A
Rev. A | Page 5 of 12
Page 6
UG-285 Evaluation Board User Guide
BMODE1: Pull up with a 10K resistor to set SDP to boot from a SPI FLASH on the daughter board
CONNECTOR
STANDARD
SDP
PARALLEL
PORT
SPORT
SPI
I2C
GENERAL
INPUT/OUTPUT
TIMERS
*
*
*
*
*
*
*
*
*
*
*
*
*
*NC on BLACKF IN SDP
120
NC
119
NC
118
GND
117
GND
116
VIO(+3.3V)
115
GND
114
PAR_D22
113
PAR_D20
112
PAR_D18
111
PAR_D16
110
PAR_D15
109
GND
108
PAR_D12
107
PAR_D10
106
PAR_D8
105
PAR_D6
104
GND
103
PAR_D4
102
PAR_D2
101
PAR_D0
100
PAR_WR
99
PAR_INT
98
GND
97
PAR_A2
96
PAR_A0
95
PAR_FS2
94
PAR_CLK
93
GND
92
SPORT_RSCLK
91
SPORT_DR0
90
SPORT_RFS
89
SPORT_TFS
88
SPORT_DT0
87
SPORT_TSCLK
86
GND
85
SPI_SEL_A
84
SPI_MOSI
83
SPI_MISO
82
SPI_CLK
81
GND
80
SDA_0
79
SCL_0
78
GPIO1
77
GPIO3
76
GPIO5
75
GND
74
GPIO7
73
TMR_B
72
TMR_D
71
NC
70
NC
69
GND
68
NC
67
NC
66
NC
65
NC
64
NC
63
GND
62
UART_TX
61
BMODE1
60
RESET_IN
59
UART_RX
58
GND
57
NC
56
NC
55
NC
54
NC
53
NC
52
GND
51
NC
50
NC
49
TMR_C
48
TMR_A
47
GPIO6
46
GND
45
GPIO4
44
GPIO2
43
GPIO0
42
SCL_1
41
SDA_1
40
GND
39
SPI_SEL1/SPI_SS
38
SPI_SEL_C
37
SPI_SEL_B
36
GND
35
SPORT_INT
34
SPORT_DT3
33
SPORT_DT2
32
SPORT_DT1
31
SPORT_DR1
30
SPORT_DR2
29
SPORT_DR3
28
GND
27
PAR_FS1
26
PAR_FS3
25
PAR_A1
24
PAR_A3
23
GND
22
PAR_CS
21
PAR_RD
20
PAR_D1
19
PAR_D3
18
PAR_D5
17
GND
16
PAR_D7
15
PAR_D9
14
PAR_D11
13
PAR_D13
12
PAR_D14
11
GND
10
PAR_D17
9
PAR_D19
8
PAR_D21
7
PAR_D23
6
GND
5
USB_VBUS
4
GND
3
GND
2
NC
1
VIN
J11
1
A0
2
A1
3
A2
4
VSS
8
VCC
7
WP
6
SCL
5
SDA
U10
24LC64
USB_VBUS
3.3V_BF
SCLK
SDIN
/CS
/RS
3.3V_BF
/LDAC
MSB
SDO
09900-007
Figure 7. EVAL-AD5544/45SDZ Schematic Part B
VIN: Use this pin to po wer the SDP requires 4- 7V 200mA
Board ID EE P ROM (24LC64) must be on I2C bus 0, add ress is at user discretion
Main I2C bus (Connected to blackfin TWI - Pull up resistors not required)
I2C bus 1 i s common across both connectors on S DP - P ull up resisto rs required
Rev. A | Page 6 of 12
(connect ed to blackfin GPIO - use I2C_0 first)
VIO: USE t o set IO voltage max draw 20mA
Page 7
Evaluation Board User Guide UG-285
VOUT A
VOUT B
VOUT C
VOUT D
+
C6
10uF
2
IOUTA
1
AGNDA
4
RFBA
3
VREFA
24
DGND
21
LDAC
9
SCLK
10
SDIN
6
RS
8
CS
5
MSB
7
VDD
12
VREFB
11
RFBB
14
AGNDB
13
IOUTB
26
VREFD17VREFC
27
IOUTD
28
AGNDD
25
RFBD
18
RFBC
15
AGNDC
16
IOUTC
23NC22
AGNDF
20
SDO
19
NC1
U5
AD5544
+
C16
10uF
C17
0.1uF
VREFA
+
C18
10uF
C19
0.1uF
C20
0.1uF
VREFB
C21
1.8pF
VOUTA
3+2
-
4V-7
V+
6
U7
AD8065
+
C22
10uF
C23
0.1uF
+
C24
10uF
C25
0.1uF
C28
1.8pF
VOUTB
3+2
-
4V-7
V+
6
U8
AD8065
+
C30
10uF
C32
0.1uF
+
C33
10uF
C34
0.1uF
C35
1.8pF
VOUTC
3+2
-
4
V-
7
V+
6
U9
AD8065
+
C36
10uF
C44
0.1uF
+
C45
10uF
C46
0.1uF
C47
1.8pF
VOUTD
3+2
-
4V-7
V+
6
U6
AD8065
+
C48
10uF
C49
0.1uF
+
C50
10uF
C51
0.1uF
VREFC
VREFD
BAC
D
LK2
J13
J14
J15
J16
/CS
/LDAC
SDO
SCLK SDIN
/RS MSB
+
C4
10uF
+
C5
10uF
3
+VIN
5
TRIM
4
VOUT
2
GND
U3
ADR01BKSZ
J4-1
J4-2
C1
0.1uF
C2
0.1uF
C3
0.1uF
J1-1
J1-2
J1-3
DVDD
DVDD
VDD
VDD
VSS
VDD
VSS
VSS
VDD
VDD
VSS
VDD
VSS
MSB
/RS
/LDAC
SDO
/CS
SDIN
SCLK
VREFA
VREFB
09900-008
Figure 8. EVAL-AD5544/45SDZ Schematic Part C
Rev. A | Page 7 of 12
Page 8
UG-285 Evaluation Board User Guide
09900-009
09900-010
EVALUATION BOARD LAYOUT
Figure 9. Silkscreen
Figure 10. Component Side
Rev. A | Page 8 of 12
Page 9
Evaluation Board User Guide UG-285
09900-011
Figure 11. Solder Side
RELATED LINKS
Resource Description
AD5545 Product Page, AD5545 Precision Dual 16-Bit DAC in Compact TSSOP Packages
AD5544 Product Page, AD5544 Quad, Current-Output, Serial-Input 16-Bit DAC
ADR01 Product Page, ADR01 Ultracompact, Precision 10.0 V Voltage Reference
AD8065
EVAL-SDP-CB1Z
Product Page, AD8065 High Performance, 145 MHz FastFET™ Op Amp
Product Page, System Demonstration Platform
Rev. A | Page 9 of 12
Page 10
UG-285 Evaluation Board User Guide
NOTES
Rev. A | Page 10 of 12
Page 11
Evaluation Board User Guide UG-285
NOTES
Rev. A | Page 11 of 12
Page 12
UG-285 Evaluation Board User Guide
Agreement is made by and between you (“Customer”) and Analog Devices, Inc.
FOR EVALUATION PURPOSES ONLY. Customer understands and agrees that the Evaluation Board is provided
NATION. ADI may terminate this Agreement at any time upon giving written notice
rued in accordance with the substantive laws of the Commonwealth of
NOTES
ESD Caution
ESD (electrostatic discharge) sensitive device. Charged devices and circuit boards can discharge without detection. Although this product features patented or proprietary protection
circuitry, damage may occur on devices subjected to high e nergy ESD. Therefore, proper ESD p recautions should be ta ken to avoid performance degra dation or loss of functionality.
Legal Terms and Conditions
By using the evaluation board discussed herein (together with any tools, components documentation or support materials, the “Evaluation Board”), you are agreeing to be bound by the terms and conditions
set forth below (“Agreement”) unless you have purchased the Evaluation Board, in which case the Analog Devices Standard Terms and Conditions of Sale shall govern. Do not use the Evaluation Board until you
have read and agreed to the Agreement. Your use of the Evaluation Board shall signify your acceptance of the Agreement. This
(“ADI”), with its principal place of business at One Technology Way, Norwood, MA 02062, USA. Subject to the terms and conditions of the Agreement, ADI hereby grants to Customer a free, limited, personal,
temporary, non-exclusive, non-sublicensable, non-transferable license to use the Evaluation Board
for the sole and exclusive purpose referenced above, and agrees not to use the Evaluation Board for any other purpose. Further more, the license granted is expressly made subject to the following additional
limitations: Customer shall not (i) rent, lease, display, sell, transfer, assign, sublicense, or distribute the Evaluation Board; and (ii) permit any Third Party to access the Evaluation Board. As used herein, the term
“Third Party” includes any entity other than ADI, Customer, their employees, affiliates and in-house consultants. The Evaluation Board is NOT sold to Customer; all rights not expressly granted herein, including
ownership of the Evaluation Board, are reser ved by ADI. CONFIDENTIA LITY. This Agree ment and the Evaluation Board shall all be consi dered the confidential and proprietary information of ADI. Customer may
not disclose or transfer any portion of the Evaluation Board to any other party for any reason. Upon discontinuation of use of the Evaluation Board or termination of this Agreement, Customer agrees to
promptly return the Evaluation Board to ADI. ADDITIONAL RESTRICTIONS. Customer may not disassemble, decompile or reverse engineer chips on the Evaluation Board. Customer shall inform ADI of any
occurred damages or any modifications or alterations it makes to the Evaluation Board, including but not limited to soldering or any other activity that affects the material content of the Evaluation Board.
Modifications to the Evaluation Board must comply with applicable law, including but not limited to the RoHS Directive. TERMI
to Customer. Customer agrees to return to ADI the Evaluation Board at that time. LIMITATION OF LIABILITY. THE EVALUATION BOARD PROVIDED HEREUNDER IS PROVIDED “AS IS” AND ADI MAKES NO
WARRANTIES OR REPRES ENTATIONS OF ANY KIND WITH RESPECT TO IT. ADI SPECIFICAL LY DISC LAIMS ANY REPRESENTATIONS, ENDORSEMENTS, GUARANTEES, OR WARRANT IES, EXPRESS OR IMPLIED, RELATED
TO THE EVALUATION BOARD INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTY OF MERCHANTABILITY, TITLE, FITNESS FOR A PARTICULAR PURPOSE OR NONINFRINGEMENT OF INTELLECTUAL
PROPERTY RIGHTS. IN NO EVENT WILL ADI AND ITS LICENSORS BE LIABLE FOR ANY INCIDENTAL, SPECIAL, INDIRECT, OR CONSEQUENTIAL DAMAGES RESULTING FROM CUSTOMER’S POSSESSION OR USE OF
THE EVALUAT ION BOARD, INCLUDING BUT NOT LIMI TED TO LOST PROFITS, DE LAY COSTS, LABOR COSTS OR LOSS OF GOODWI LL. ADI’S TOTAL LIABILIT Y FROM ANY AND AL L CAUSES SHALL BE LIMITED TO THE
AMOUNT OF ONE HUNDRED US DOLLARS ($100.00). EXPORT. Customer agrees that it will not directly or indirectly export the Evaluation Board to another country, and that it will comply with all applicable
United States federal laws and regulations relating to exports. GOVERNING LAW. This Agreement shall be governed by and const
Massachusetts (excluding conflict of law rules). Any legal action regarding this Agreement will be heard in the state or federal courts having jurisdiction in Suffolk County, Massachusetts, and Customer hereby
submits to the personal jurisdiction and venue of such courts. The United Nations Convention on Contract s for the Internation al Sale of Good s shall not appl y to this Agreement an d is expressly disclai med.
©2011–2012 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
UG09900-0-5/12(A)
Rev. A | Page 12 of 12
Loading...