Datasheet UC3846 Datasheet (Fairchild Semiconductor)

UC3846

SMPS Controller

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Features

• Automatic Feed Forward Compensation

• Programmable Pulse by Pulse Current Limiting

• Automatic Symmetry Correction in Push-Pull
Configuration

• Enhanced Load Response Characteristics

• Parallel Operation Capability for Modulator Power
Systems

• Differential Current Sense Amplifier with Common Mode
Range

• Double Pulse Suppression

• 200mA Totem-Pole Outputs

• ±2% Band gap Reference

• Under-Voltage Lockout

• Soft-Start Capability

• Shutdown Terminal

• 500KHz Operation

Description

The UC3846 control IC provides all of the necessary fea­tures to implement fixed frequency, current mode control
schemes while maintaining a minimum external parts count.
The superior performance of this technique can be measured
in improved line regulation, enhanced load response char­acteristics, and a simpler, easier-to-design control loop.
Topological advantages include inherent pulse-by-pulse cur­rent limiting capability, automatic symmetry correction for
push-pull converters, and the ability to parallel “power

,,

module
circuitry includes built-in-under-voltage lockout and pro­grammable current limit in addition to soft-start capability. A
shutdown function is also available which can initiate either
a complete shutdown with automatic restart or latch the
supply off. Other features include fully latched operation,
double pulse suppression, deadtime adjust capability, and
±2% trimmed bandgap reference. The UC3846 features low
outputs in the OFF state.

while maintaining equal current sharing. Protection

16-DIP

Internal Block Diagram

©2000 Fairchild Semiconductor International

1

10

Rev. 5.0

UC3846

Absolute Maximum Ratings

Parameter Symbol Value Unit

Supply Voltage V
Collector Supply Voltage V
Output Current, Sink of Source (Peak) I
Reference Output Current I
Soft Start Sink Current I
Sync Output Current I
Error Amplifier Output Current I
Oscillator Changing Current I
Power Dissipation (T

= 25°C) P

A

SINK(S.S)

SYNC

O(E.A)

CHG(OSC)

Operating Temperature T
Storage Temperature T
Lead Temperature (Soldering, 10sec) T

LEAD

CC

C

O

REF

D
OPR
STG

40 V
40 V

500 mA

30 mA
50 mA

5mA
5mA
5mA

1000 mW

0 ~ +70 °C

-65 ~ +150 °C
+300 °C

Electrical Characteristics

(VCC=15V, TA=0°C to +70°C, unless otherwise specified)

Parameter Symbol Conditions Min. Typ. Max. Unit

REFERENCE SECTION

Reference Output Voltage V

REF

Line Regulation ∆V
Load Regulation ∆V
Temperature Stability(Note 6) ST
Output Voltage Range (Note 6) V
Short Circuit Output Current I

REF

SC

Output Noise Voltage(Note 6) V
Long-Term Stability(Note 6) S

TJ = 25°C, I
VCC = 8 to 40V - 5 20 mV

REF
REF IREF

T

Line,Load,Temp 4.95 - 5.25 V
V

REF

NO

f = 10Hz to 10KHz, TJ = 25°C - 100 - uV
TJ = 125°C, 1KHz 2 5 8 mV

T

= 1mA 5.00 5.10 5.20 V

REF

1 to 10mA - 3 15 mV

- -0.41.0mV/°C

= 0V -10 -45 - mA

2

Electrical Characteristics

(VCC= 15V,TA=0°C to +70°C, unless otherwise specified)

Parameter Symbol Conditions Min. Typ. Max. Unit

OSCILLATOR SECTION (Note 2)

Initial Accuracy ACCUR T
Frequency Change with Voltage ∆f/∆V
Frequency Change with

Temperature (Note 6)
Sync Output High Level V
Sync Output Low Level V
Sync Input High Level V
Sync Input Low Level V
Sync Input Current I

ERROR AMPLIFIER SECTION

Input Offset Voltage V
Input Bias Current I
Input Offset Current I
Common-Mode Range V
Open Loop Voltage Gain G
Unity Gain Bandwidth(Note 6) BW T
Common Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Output Sink Current I
Output Source Current I
High Output Voltage V
Low Output Voltage V

CURRENT SENSE AMPLIFIER SECTION

Amplifier Gain (Note 1, 3) G
Maximum Differential Input

Signal (V

- V3) (Note 1)

4

V

Input Offset Voltage (Note 1) V
Common Mode Rejection Ratio CMRR V
Power Supply Rejection Ratio PSRR V
Input Bias Current (Note 1) I
Input Offset Current (Note 1) I
Delay to Outputs (Note 6) t

CC

∆f/∆T - - 1-%

OH(SYNC)

OL(SYNC)

IH(SYNC)

IL(SYNC)
I(SYNC)

IO

BIAS

IO
CM

VO

SINK

SOURCE

OH

OL

V

I(DIFF,MAX) RL

IO

BIAS

IO

D

UC3846

= 25°C394347KHz

J

VCC = 8 to 40V - 1 2 %

- 3.9 4.35 - V

- -2.32.5V

V8 = 0V 3.9 - - V
V8 = 0V - - 2.5 V
Sync Voltage = 3.9V, V8 = 0V - 1.3 1.5 mA

- -0.55mV

- --0.6-1uA

- - 40 250 uA

VCC = 8 to 40V 0 - VCC2V
VO = 1.2 to 3V, V

= 25°C0.71.0-MHz

J

= 0 to 38V, VCC = 40V 75 100 - dB

CM

= 8 to 40V 80 105 - dB

CC

V

= -15mV to 5V, V7 = 2.5V 2 6 - mA

IO

= 2V 80 105 - dB

CM

RL = 15KΩ -0.4 -0.5 - mA
RL = 15KΩ 4.3 4.6 - V

- -0.71V

V3 = 0V, Pin 1 open 2.5 2.75 3.0 V

= 15KΩ, Pin 1 open 1.1 1.2 - V

V1 = 0.5V, Pin 1 open - 5 25 mV

= 1 to 12V 60 83 - dB

CM

= 8 to 40V 60 84 - dB

CC

V1 = 0.5V, Pin 7 open - -2.5 -10 uA
V1 = 0.5V, Pin 7 open - 0.08 1 uA
TJ = 25°C - 200 500 ns

3

UC3846

Electrical Characteristics

(VCC=15V, TA=0°C to + 70°C, unless otherwise specified)

Parameter Symbol Conditions Min. Typ. Max. Unit

CURRENT LIMIT ADJUST SECTION

Current Limit Offset Voltage (Note 1) V

Input Bias Current I

SHUTDOWN TERMINAL SECTION

Threshold Voltage V
Input Voltage Range V
Minimum Latching Current (Note 4) I
Maximum Non-Latching Current (Note 5) I

UNDER-VOLTAGE LOCKOUT SECTION

Start Threshold V
Threshold Hysteresis V

OUTPUT SECTION

Collector-Emitter Voltage V
Collector Leakage Current I
Low Output Voltage 1 V
Low Output Voltage 2 V
High Output Voltage 1 V
High Output Voltage 2 V
Rise Time (Note 6) t
Fall Time (Note 6) t

TOTAL STANDBY CURRENT

Supply Current I

IO(C.L)

BIAS

(LATCH,MIN)

(NONLA TCH,MAX)

TH(ST)

LEAK

OL

OL
OH
OH

V3 = 0V
V

4

V5 = V

TH

I

HYS

CEO

VC = 40V - - 200 uA
1 I
2 I

1 I
2 I

R
F

CC

SINK
SINK
SOURCE
SOURCE

CL = 1nF, TJ = 25°C - 50 300 us

CL = 1nF, TJ = 25°C - 50 300 us

0.45 0.5 0.55 V

= 0V, Pin 7 open

, V6 = 0V - - 10 - 30 uA

REF

- 250 350 400 mV

- 0-V

CC

- 3.0 1.5 - mA

- -1.50.8mA

- 77.78.4V

- 0.45 0.75 1.05 V

- 40 - - V

= 20mA - 0.1 0.4 V
= 100mA - 0.4 2.1 V

= 20mA 13 13.5 - V
= 100mA 12 13.5 - V

- -1721mA

V

Notes :

1. Parame ter me asured at trip point at latch with V

2. R

= 10KΩ, CT = 4.7nF

T

3. Amplifier gain definde as:
∆V7

-----------

G

∆V4

4. Current into Pin 1 guaranteed to latch circuit in shutdown state.

5. Current into Pin 1 guaranteed not to latch circuit in shutdown state.

6. These parameters, although guaranteed over the recommended operating conditions, are not 100% tested in production.

∆V

0to1.0V=;=

4

5

= V

REF

, V6 = 0V

4

Td

OUTPUT DEADTIME(Td)

UC3846

Figure 1. UC3846 Oscillator Circuit

Output deadtime is determined by the external capacitor, CT, according to the formula:
For large values of R

by the formula:

: Td (us) = l45CT (uF) Oscillator frequency is approximately

T

f

KHz()

T

----------------------------------------- -=

R

T

2.2

KΩ()C

µF()

T

=

Td us()145C




12

--------------------------------- -

µF()



T




12

-------------------- -–

R

T

3.6
KΩ()

Figure 2. Error Amplifier Output Configuration

5

UC3846

Figure 3. Parallel Operation

Figure 4. Pulse By Pulse Current Limiting

Figure 5. Current Sense Amp Connections

A small PC filter may be required in some applications to reduce switch transients
Differential input allows remote, noise free sensing.

6

Mechanical Dimensions

Package

6.40

±0.20

0.252

±0.008

16-DIP

0.81

0.032

()

UC3846

#1

#8

7.62

0.300

#16

#9

MAX

19.80

0.780

0.128

3.25

±0.20

±0.008

19.40

0.764

±0.20

±0.008

0.38

0.014

±0.10

0.46

2.54

MIN

±0.004

0.018

0.100

±0.10

1.50

±0.004

0.059

0~15°

0.25

0.010

5.08

0.200

+0.10
–0.05

+0.004
–0.002

MAX

3.30

0.130

±0.30

±0.012

7

UC3846

Ordering Information

Product Number Package Operating Temperature

UC3846N 16 DIP 0 ~ + 70°C

8

UC3846

9

UC3846

LIFE SUPPORT POL I CY

FAIRCHILD’S PR ODUCTS ARE NOT AUTH ORIZED FOR USE AS C RITICAL COMPONENT S IN LIFE SUPPORT DE VICES
OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD SEMICONDUCTOR
INTERNATIONAL. As used herein:

1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, and (c) whose failure to
perform when properly used in accordance with

2. A critical component in any component of a life support
device or sy stem whose fai lure to perform can be
reasonably expec ted to cause the failur e of the life support
device or system, or to affect its safety or effec t iv ene ss .

instructions for use provided in the labeling, can be
reasonably expected to result in a significant injury of the
user.

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7/12/00 0.0m 001

 2000 Fairchild Semiconductor International

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