Datasheet UC3845BVD1, UC3845BVD, UC3845BN, UC3845BD1R2, UC3845BD1 Datasheet (Motorola)

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Order this document by UC3844B/D

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The UC3844B, UC3845B series are high performance fixed frequency
current mode controllers. They are specifically designed for Off–Line and
dc–to–dc converter applications offering the designer a cost–effective
solution with minimal external components. These integrated circuits feature
an oscillator, a temperature compensated reference, high gain error
amplifier, current sensing comparator, and a high current totem pole output
ideally suited for driving a power MOSFET.

Also included are protective features consisting of input and reference
undervoltage lockouts each with hysteresis, cycle–by–cycle current limiting,
a latch for single pulse metering, and a flip–flop which blanks the output off
every other oscillator cycle, allowing output deadtimes to be programmed
from 50% to 70%.

These devices are available in an 8–pin dual–in–line and surface mount
(SO–8) plastic package as well as the 14–pin plastic surface mount (SO–14).
The SO–14 package has separate power and ground pins for the totem pole
output stage.

The UCX844B has UVLO thresholds of 16 V (on) and 10 V (off), ideally
suited for off–line converters. The UCX845B is tailored for lower voltage
applications having UVLO thresholds of 8.5 V (on) and 7.6 V (off).

• Trimmed Oscillator for Precise Frequency Control

• Oscillator Frequency Guaranteed at 250 kHz

• Current Mode Operation to 500 kHz Output Switching Frequency

• Output Deadtime Adjustable from 50% to 70%

• Automatic Feed Forward Compensation

• Latching PWM for Cycle–By–Cycle Current Limiting

• Internally Trimmed Reference with Undervoltage Lockout

• High Current Totem Pole Output

• Undervoltage Lockout with Hysteresis

• Low Startup and Operating Current

Simplified Block Diagram

V

7(12)

CC

HIGH PERFORMANCE

CURRENT MODE

CONTROLLERS

N SUFFIX

PLASTIC PACKAGE

CASE 626

D1 SUFFIX

PLASTIC PACKAGE

CASE 751

(SO–8)

D SUFFIX

PLASTIC PACKAGE

CASE 751A

(SO–14)

PIN CONNECTIONS

RT/C

RT/C

NC

NC

NC

T

T

1
2
3
4

(Top View)

1
2
3
4
5
6
7

(T op View)

Compensation

Voltage Feedback

Current Sense

Compensation

Voltage Feedback

Current Sense

8

8

14

8
7
6
5

14
13
12
11
10

9
8

1

1

1

V

ref

V

CC

Output
Gnd

V

ref

NC
V

CC

V

C

Output
Gnd

Power Ground

5(9)

5.0V

Reference

Latching

V

ref

RT/C

T

Voltage

Feedback

Input

Output/

Compensation

8(14)

4(7)

2(3)

1(1)

R

R

Error

Amplifier

Pin numbers in parenthesis are for the D suffix SO–14 package.

V

ref

Undervoltage

Lockout

Oscillator

Gnd

MOTOROLA ANALOG IC DEVICE DATA

PWM

V

CC

Undervoltage

Lockout

V

7(11)

Output

6(10)

Power
Ground

5(8)

Current
Sense Input

3(5)

ORDERING INFORMATION

Device

C

UC384XBD
UC384XBD1
UC384XBN Plastic

UC284XBD1
UC284XBN
UC384XBVD
UC384XBVD1 SO–8
UC384XBVN Plastic

X indicates either a 4 or 5 to define specific device
part numbers.

 Motorola, Inc. 1996 Rev 1

Operating

Temperature Range

TA = 0° to + 70°C

TA = – 25° to + 85°C

TA = – 40° to +105°C

Package

SO–14

SO–8

SO–14UC284XBD

SO–8
Plastic
SO–14

1

UC3844B, 45B UC2844B, 45B

MAXIMUM RATINGS

Rating Symbol Value Unit

Total Power Supply and Zener Current (ICC + IZ) 30 mA
Output Current, Source or Sink (Note 1) I

O

Output Energy (Capacitive Load per Cycle) W 5.0 µJ
Current Sense and Voltage Feedback Inputs V
Error Amp Output Sink Current I

in

O

Power Dissipation and Thermal Characteristics
D Suffix, Plastic Package, SO–14 Case 751A

Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction–to–Air

D1 Suffix, Plastic Package, SO–8 Case 751

Maximum Power Dissipation @ TA = 25°C
Thermal Resistance, Junction–to–Air

N Suffix, Plastic Package, Case 626

Maximum Power Dissipation @ TA = 25°C

Thermal Resistance, Junction–to–Air
Operating Junction Temperature T
Operating Ambient Temperature

UC3844B, UC3845B

P

D

R

θJA

P

D

R

θJA

P

D

R

θJA

J

T

A

UC2844B, UC2845B
Storage Temperature Range T

stg

1.0 A

– 0.3 to + 5.5 V

10 mA

862
145

702
178

1.25
100

+150 °C

0 to + 70

– 25 to + 85

– 65 to +150 °C

mW

°C/W

mW

°C/W

W

°C/W

°C

ELECTRICAL CHARACTERISTICS (V

= 15 V [Note 2], RT = 10 k, CT = 3.3 nF . For typical values TA = 25°C, for min/max values TA is

CC

the operating ambient temperature range that applies [Note 3], unless otherwise noted.)

UC284XB UC384XB, XBV

Characteristic Symbol Min Typ Max Min Typ Max Unit

REFERENCE SECTION

Reference Output Voltage (IO = 1.0 mA, TJ = 25°C) V
Line Regulation (VCC = 12 V to 25 V) Reg
Load Regulation (IO = 1.0 mA to 20 mA) Reg
T emperature Stability T
Total Output V ariation over Line, Load, and Temperature V
Output Noise Voltage (f = 10 Hz to 10 kHz, TJ = 25°C) V

ref

line
load
S

ref

n

4.95 5.0 5.05 4.9 5.0 5.1 V
– 2.0 20 – 2.0 20 mV
– 3.0 25 – 3.0 25 mV
– 0.2 – – 0.2 – mV/°C

4.9 – 5.1 4.82 – 5.18 V
– 50 – – 50 – µV

Long Term Stability (TA = 125°C for 1000 Hours) S – 5.0 – – 5.0 – mV
Output Short Circuit Current I

SC

–30 –85 –180 –30 –85 –180 mA

OSCILLATOR SECTION

Frequency

TJ = 25°C
TA = T
TJ = 25°C (RT = 6.2 k, CT = 1.0 nF)

low

to T

high

Frequency Change with Voltage (VCC = 12 V to 25 V) ∆f
Frequency Change with Temperature

TA = T

low

to T

high

Oscillator Voltage Swing (Peak–to–Peak) V
Discharge Current (V

TJ = 25°C
TA = T

TA = T

NOTES: 1.Maximum package power dissipation limits must be observed.

to T

low

high

to T

low

high

2.Adjust VCC above the Startup threshold before setting to 15 V.

3.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T

=0°C for UC3844B, UC3845B T

low

=–25°C for UC2844B, UC2845B = + 85°C for UC2844B, UC2845B
=–40°C for UC3844BV, UC3845BV = +105°C for UC3844BV, UC3845BV

= 2.0 V)

OSC

(UC284XB, UC384XB)
(UC384XBV)

high

f

OSC

49
48

225

/∆V – 0.2 1.0 – 0.2 1.0 %

OSC

∆f

/∆T – 1.0 – – 0.5 – %

OSC

OSC

I

dischg

– 1.6 – – 1.6 – V

7.8

7.5
–

=+70°C for UC3844B, UC3845B

52

–

250

8.3
–
–

55
56

275

8.8

8.8
–

49
48

225

7.8

7.6

7.2

52

–

250

8.3
–
–

55
56

275

8.8

8.8

8.8

kHz

mA

2

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

ELECTRICAL CHARACTERISTICS (V

= 15 V [Note 2], RT = 10 k, CT = 3.3 nF . For typical values TA = 25°C, for min/max values TA is

CC

the operating ambient temperature range that applies [Note 3], unless otherwise noted.)

UC284XB UC384XB, XBV

Characteristic Symbol Min Typ Max Min Typ Max Unit

ERROR AMPLIFIER SECTION

Voltage Feedback Input (VO = 2.5 V) V
Input Bias Current (VFB = 5.0 V) I
Open Loop Voltage Gain (VO = 2.0 V to 4.0 V) A

FB

IB

VOL

2.45 2.5 2.55 2.42 2.5 2.58 V
– –0.1 –1.0 – – 0.1 – 2.0 µA

65 90 – 65 90 – dB
Unity Gain Bandwidth (TJ = 25°C) BW 0.7 1.0 – 0.7 1.0 – MHz
Power Supply Rejection Ratio (VCC = 12 V to 25 V) PSRR 60 70 – 60 70 – dB
Output Current

Sink (VO = 1.1 V, VFB = 2.7 V)
Source (VO = 5.0 V, VFB = 2.3 V)

I

Sink

I

Source

2.0

– 0.512–1.0

–
–

2.0

– 0.512–1.0

–
–

Output Voltage Swing

High State (RL = 15 k to ground, VFB = 2.3 V)
Low State (RL = 15 k to V

(UC284XB, UC384XB)

, VFB = 2.7 V)

ref

(UC384XBV)

V

OH

V

OL

5.0

6.2

–

0.8

–

–

1.1

–

5.0

–

6.2

–

0.8

–

0.8

–

1.1

1.2

CURRENT SENSE SECTION

Current Sense Input Voltage Gain (Notes 4 & 5)

(UC284XB, UC384XB)
(UC384XBV)

Maximum Current Sense Input Threshold (Note 4)

(UC284XB, UC384XB)
(UC384XBV)

Power Supply Rejection Ratio

A

V

V

th

2.85–3.0–3.15–2.85

2.85

0.9–1.0

1.1

–

0.9

–

0.85

3.0

3.0

1.0

1.0

3.15

3.25

1.1

1.1

PSRR – 70 – – 70 – dB

(VCC = 12 V to 25 V) (Note 4)
Input Bias Current I
Propagation Delay (Current Sense Input to Output) t

PLH(In/Out)

IB

– –2.0 –10 – – 2.0 –10 µA
– 150 300 – 150 300 ns

OUTPUT SECTION

Output Voltage

Low State (I

High State (I

Output Voltage with UVLO Activated

VCC = 6.0 V, I
Output Voltage Rise T ime (CL = 1.0 nF, TJ = 25°C) t
Output Voltage Fall T ime (CL = 1.0 nF, TJ = 25°C) t

= 20 mA)

Sink

(I

= 200 mA, UC284XB, UC384XB)

Sink

(I

= 200 mA, UC384XBV)

Sink

= 20 mA, UC284XB, UC384XB)

Source

(I
(I

= 20 mA, UC384XBV)

Source

= 200 mA)

Source

= 1.0 mA

Sink

V

OL

V

OH

V

OL(UVLO)

r
f

–

13

12

0.1

–

1.6

–

13.5

–

13.4

0.4

2.2

–

–
–

–

–
–

–
–
–

13

12.9
12

0.1

1.6

1.6

13.5
–

13.4

0.4

2.2

2.3
–
–
–

– 0.1 1.1 – 0.1 1.1 V

– 50 150 – 50 150 ns
– 50 150 – 50 150 ns

UNDERVOLTAGE LOCKOUT SECTION

Startup Threshold

UCX844B, BV
UCX845B, BV

Minimum Operating Voltage After Turn–On

UCX844B, BV
UCX845B, BV

NOTES: 2.Adjust VCC above the Startup threshold before setting to 15 V.

3.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T

=0°C for UC3844B, UC3845B T

low

T

=–25°C for UC2844B, UC2845B T

low

T

=–40°C for UC3844BV, UC3845BV T

low

4.This parameter is measured at the latch trip point with VFB = 0 V.

D

5.Comparator gain is defined as: AV =

V OutputńCompensation

D

V Current Sense Input

=+70°C for UC3844B, UC3845B

high

=+85°C for UC2844B, UC2845B

high

= +105°C for UC3844BV, UC3845BV

high

V

V

CC(min)

th

15

7.8168.4

9.0

7.0107.6

17

9.0

11

8.2

14.5

7.8

8.5

7.0

16

8.4

10

7.6

17.5

9.0

11.5

8.2

mA

V

V/V

V

V

V

V

MOTOROLA ANALOG IC DEVICE DATA

3

UC3844B, 45B UC2844B, 45B

ELECTRICAL CHARACTERISTICS

the operating ambient temperature range that applies [Note 3], unless otherwise noted.)

Characteristic Symbol Min Typ Max Min Typ Max Unit

PWM SECTION

Duty Cycle

Maximum (UC284XB, UC384XB)

Maximum (UC384XBV)

Minimum

TOTAL DEVICE

Power Supply Current

Startup (VCC = 6.5 V for UCX845B,

Start–Up (VCC 14 V for UCX844B, BV)

Operating (Note 2)

Power Supply Zener Voltage (ICC = 25 mA) V

NOTES: 2.Adjust VCC above the Startup threshold before setting to 15 V.

3.Low duty cycle pulse techniques are used during test to maintain junction temperature as close to ambient as possible.
T

=0°C for UC3844B, UC3845B T

low

=–25°C for UC2844B, UC2845B = + 85°C for UC2844B, UC2845B
=–40°C for UC3844BV, UC3845BV = +105°C for UC3844BV, UC3845BV

Figure 1. Timing Resistor

versus Oscillator Frequency

80
50

Ω

20

8.0

5.0

, TIMING RESISTOR (k )

T

R

2.0
NOTE: Output switches at
1/2 the oscillator frequency

0.8

f

, OSCILLAT OR FREQUENCY (kHz)

OSC

(V

= 15 V [Note 2], RT = 10 k, CT = 3.3 nF . For typical values TA = 25°C, for min/max values TA is

CC

UC284XB UC384XB, XBV

DC

(max)

DC

(min)

I

CC

Z

=+70°C for UC3844B, UC3845B

high

47

30 36 – 30 36 – V

48
–
–

–

–

–
–

0.3

12

Figure 2. Output Deadtime

versus Oscillator Frequency

VCC = 15 V

°

C

TA = 25

1.0 M500 k200 k100 k50 k20 k10 k

75

1. CT = 10 nF

2. CT = 5.0 nF

70

3. CT = 2.0 nF

4. CT = 1.0 nF

5. CT = 500 pF

65

6. CT = 200 pF

7. CT = 100 pF

60

55

% DT, PERCENT OUTPUT DEADTIME

50

20 k 50 k 200 k 500 k

f

OSC

50

0.5

17

, OSCILLAT OR FREQUENCY (kHz)

47

–

46

0

48
48

–

–

0.3

–

12

50
50

–

0

0.5

17

1

%

mA

3

2

4

7

5

6

1.0 M100 k10 k

2.55 V

2.5 V

2.45 V

4

Figure 3. Error Amp Small Signal

Transient Response

VCC = 15 V
AV = –1.0
TA = 25

0.5 µs/DIV

Figure 4. Error Amp Large Signal

Transient Response

VCC = 15 V

°

C

20 mV/DIV

3.0 V

2.5 V

2.0 V

1.0 µs/DIV

AV = –1.0

°

TA = 25

C

200 mV/DIV

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

Figure 5. Error Amp Open Loop Gain and

100

80

60

40

20

, OPEN LOOP VOL TAGE GAIN (dB)

0

VOL

A

–20

0

– 4.0

Phase versus Frequency

VCC = 15 V
VO = 2.0 V to 4.0 V

Gain

100 1.0 k 10 k 100 k 1.0 M

f, FREQUENCY (Hz)

RL = 100 k

°

C

TA = 25

Figure 7. Reference V oltage Change

versus Source Current

VCC = 15 V

Phase

Figure 6. Current Sense Input Threshold

versus Error Amp Output Voltage

0

30

60

90

120

150

180

10 M10

1.2
VCC = 15 V

1.0

0.8

TA = 25°C

0.6

0.4

, EXCESS PHASE (DEGREES)

0.2

φ

, CURRENT SENSE INPUT THRESHOLD (V)V

th

0

0

TA = 125°C

2.0 4.0 6.0 8.0

VO, ERROR AMP OUTPUT VOLTAGE (VO)

TA = – 55°C

Figure 8. Reference Short Circuit Current

versus T emperature

110

VCC = 15 V

≤

0.1

Ω

RL

– 8.0

–12

–16

–20

, REFERENCE VOLTAGE CHANGE (mV)

ref

V

∆

–24

0

20 40 60 80 100 120

I

ref

Figure 9. Reference Load Regulation Figure 10. Reference Line Regulation

TA = –55°C

TA = 125°C

TA = 25°C

, REFERENCE SOURCE CURRENT (mA)

VCC = 15 V
IO = 1.0 mA to 20 mA

°

C

TA = 25

90

70

, REFERENCE SHORT CIRCUIT CURRENT (mA)

50

SC

I

–55

– 25 0 25 50 75 100 125

°

TA, AMBIENT TEMPERATURE (

C)

VCC = 12 V to 25 V

°

C

TA = 25

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

∆

2.0 ms/DIV

MOTOROLA ANALOG IC DEVICE DATA

, OUTPUT VOLTAGE CHANGE (2.0 mV/DIV)

O

V

∆

2.0 ms/DIV

5

– 2.0

, OUTPUT SA TURATION VOLTAGE (V)

sat

V

–1.0

3.0

2.0

1.0

, OUTPUT VOL TAGEV

UC3844B, 45B UC2844B, 45B

Figure 11. Output Saturation Voltage

0

V

CC

TA = 25°C

TA = – 55°C

0

200 400 600

Source Saturation

(Load to Ground)

TA = – 55°C

Sink Saturation

(Load to VCC)

IO, OUTPUT LOAD CURRENT (mA)

VCC = 15 V

µ

s Pulsed Load

80
120 Hz Rate

TA = 25°C

Gnd

90%

10%

8000

Figure 13. Output Cross Conduction Figure 14. Supply Current versus Supply Voltage

versus Load Current

VCC = 30 V
CL = 15 pF

°

C

TA = 25

O

25

20

15

Figure 12. Output Waveform

50 ns/DIV

VCC = 15 V
CL = 1.0 nF

°

C

TA = 25

, SUPPLY CURRENT

CC

I

100 ns/DIV

100 mA/DIV 20 V/DIV

10

, SUPPLY CURRENT (mA)

CC

I

5

0

UCX845B

0

UCX844B

10 20 30 40

VCC, SUPPLY VOLTAGE (V)

RT = 10 k
CT = 3.3 nF
VFB = 0 V
I

= 0 V

Sense

°

C

TA = 25

PIN FUNCTION DESCRIPTION

Pin

8–Pin 14–Pin

1 1 Compensation This pin is the Error Amplifier output and is made available for loop compensation.
2 3 Voltage

3 5 Current Sense A voltage proportional to inductor current is connected to this input. The PWM uses this

4 7 RT/C

5 Gnd This pin is the combined control circuitry and power ground.
6 10 Output This output directly drives the gate of a power MOSFET. Peak currents up to 1.0 A are sourced

7 12 V
8 14 V

8 Power

11 V

9 Gnd This pin is the control circuitry ground return and is connected back to the power source ground.

2,4,6,13 NC No connection. These pins are not internally connected.

Function Description

Feedback

T

CC
ref

Ground

C

This is the inverting input of the Error Amplifier. It is normally connected to the switching power
supply output through a resistor divider.

information to terminate the output switch conduction.
The Oscillator frequency and maximum Output duty cycle are programmed by connecting

resistor RT to V

and sunk by this pin. The output switches at one–half the oscillator frequency.
This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CT through

resistor RT.
This pin is a separate power ground return that is connected back to the power source. It is used

to reduce the effects of switching transient noise on the control circuitry .
The Output high state (VOH) is set by the voltage applied to this pin. With a separate power

source connection, it can reduce the effects of switching transient noise on the control circuitry .

and capacitor CT to ground. Oscillator operation to 1.0 kHz is possible.

ref

6

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

OPERA TING DESCRIPTION

The UC3844B, UC3845B series are high performance,
fixed frequency, current mode controllers. They are
specifically designed for Off–Line and dc–to–dc converter
applications offering the designer a cost–effective solution
with minimal external components. A representative block
diagram is shown in Figure 15.

Oscillator

The oscillator frequency is programmed by the values
selected for the timing components RT and CT. Capacitor C
is charged from the 5.0 V reference through resistor RT to
approximately 2.8 V and discharged to 1.2 V by an internal
current sink. During the discharge of CT, the oscillator
generates an internal blanking pulse that holds the center
input of the NOR gate high. This causes the Output to be in a
low state, thus producing a controlled amount of output
deadtime. An internal flip–flop has been incorporated in the
UCX844/5B which blanks the output off every other clock
cycle by holding one of the inputs of the NOR gate high. This
in combination with the CT discharge period yields output
deadtimes programmable from 50% to 70%. Figure 1 shows
RT versus Oscillator Frequency and Figure 2, Output
Deadtime versus Frequency, both for given values of CT.
Note that many values of RT and CT will give the same
oscillator frequency but only one combination will yield a
specific output deadtime at a given frequency. The oscillator
thresholds are temperature compensated to within ±6% at 50
kHz. Also, because of industry trends moving the UC384X
into higher and higher frequency applications, the UC384XB
is guaranteed to within ±10% at 250 kHz.

In many noise–sensitive applications it may be desirable
to frequency–lock the converter to an external system clock.
This can be accomplished by applying a clock signal to the
circuit shown in Figure 17. For reliable locking, the
free–running oscillator frequency should be set about 10%
less than the clock frequency. A method for multi–unit
synchronization is shown in Figure 18. By tailoring the clock
waveform, accurate Output duty cycle clamping can be
achieved to realize output deadtimes of greater than 70%.

Error Amplifier

A fully compensated Error Amplifier with access to the
inverting input and output is provided. It features a typical dc
voltage gain of 90 dB, and a unity gain bandwidth of 1.0 MHz
with 57 degrees of phase margin (Figure 5). The
non–inverting input is internally biased at 2.5 V and is not
pinned out. The converter output voltage is typically divided
down and monitored by the inverting input. The maximum
input bias current is –2.0 µA which can cause an output
voltage error that is equal to the product of the input bias
current and the equivalent input divider source resistance.

The Error Amp Output (Pin 1) is provided for external loop
compensation (Figure 28). The output voltage is offset by two
diode drops (≈1.4 V) and divided by three before it connects
to the inverting input of the Current Sense Comparator. This
guarantees that no drive pulses appear at the Output (Pin 6)
when Pin 1 is at its lowest state (VOL). This occurs when the

power supply is operating and the load is removed, or at the
beginning of a soft–start interval (Figures 20, 21). The Error
Amp minimum feedback resistance is limited by the
amplifier’s source current (0.5 mA) and the required output
voltage (VOH) to reach the comparator’s 1.0 V clamp level:

R

f(min)

T

Current Sense Comparator and PWM Latch

The UC3844B, UC3845B operate as a current mode
controller, whereby output switch conduction is initiated by
the oscillator and terminated when the peak inductor current
reaches the threshold level established by the Error Amplifier
Output/Compensation (Pin 1). Thus the error signal controls
the peak inductor current on a cycle–by–cycle basis. The
Current Sense Comparator PWM Latch configuration used
ensures that only a single pulse appears at the Output during
any given oscillator cycle. The inductor current is converted
to a voltage by inserting the ground–referenced sense
resistor RS in series with the source of output switch Q1. This
voltage is monitored by the Current Sense Input (Pin 3) and
compared to a level derived from the Error Amp Output. The
peak inductor current under normal operating conditions is
controlled by the voltage at Pin 1 where:

Abnormal operating conditions occur when the power
supply output is overloaded or if output voltage sensing is
lost. Under these conditions, the Current Sense Comparator
threshold will be internally clamped to 1.0 V. Therefore the
maximum peak switch current is:

When designing a high power switching regulator it
becomes desirable to reduce the internal clamp voltage in
order to keep the power dissipation of RS to a reasonable
level. A simple method to adjust this voltage is shown in
Figure 19. The two external diodes are used to compensate
the internal diodes, yielding a constant clamp voltage over
temperature. Erratic operation due to noise pickup can result
if there is an excessive reduction of the I
voltage.

A narrow spike on the leading edge of the current
waveform can usually be observed and may cause the power
supply to exhibit an instability when the output is lightly
loaded. This spike is due to the power transformer
interwinding capacitance and output rectifier recovery time.
The addition of an RC filter on the Current Sense Input with a
time constant that approximates the spike duration will
usually eliminate the instability (refer to Figure 23).

3.0 (1.0 V) + 1.4 V

≈

Ipk =

I

pk(max)

0.5 mA

V

(Pin 1)

3 R

=

– 1.4 V

S

1.0 V
R

S

= 8800 Ω

pk(max)

clamp

MOTOROLA ANALOG IC DEVICE DATA

7

UC3844B, 45B UC2844B, 45B

Figure 15. Representative Block Diagram

V

ref

8(14)

R

T

C

T

Voltage

Feedback

Input

Output/

Compensation

Pin numbers adjacent to terminals are for the 8–pin dual–in–line package.
Pin numbers in parenthesis are for the D suffix SO–14 package.

2.5V

4(7)

2(3)

1(1)

R

R

Error

Amplifier

Internal

Bias

Oscillator

+

1.0mA
2R

Gnd

R

Reference
Regulator

3.6V

1.0V
Current Sense

Comparator

5(9)

–

+

V

ref

UVLO

V

UVLO

S

Q

R

CC

VCC

+

PWM
Latch

V

CC

7(12)

36V

(See
Text)

–

V

C

7(11)

Output
6(10)
Power Ground
5(8)

Current Sense Input
3(5)

= Sink Only Positive True Logic

V

in

Q1

R

S

Capacitor C

Latch “Set”
Input

Output/
Compensation

Current Sense
Input

Latch “Reset”
Input

Output

T

Large RT/Small C

Figure 16. Timing Diagram

T

Small RT/Large C

T

8

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

Undervoltage Lockout

Two undervoltage lockout comparators have been
incorporated to guarantee that the IC is fully functional before
the output stage is enabled. The positive power supply
terminal (VCC) and the reference output (V

) are each

ref

monitored by separate comparators. Each has built–in
hysteresis to prevent erratic output behavior as their
respective thresholds are crossed. The VCC comparator
upper and lower thresholds are 16 V/10 V for the UCX844B,
and 8.4 V/7.6 V for the UCX845B. The V

comparator upper

ref

and lower thresholds are 3.6 V/3.4 V. The large hysteresis
and low startup current of the UCX844B makes it ideally
suited in off–line converter applications where efficient
bootstrap startup techniques are required (Figure 29). The
UCX845B is intended for lower voltage dc–to–dc converter
applications. A 36 V zener is connected as a shunt regulator
from VCC to ground. Its purpose is to protect the IC from
excessive voltage that can occur during system startup. The
minimum operating voltage for the UCX844B is 11 V and 8.2
V for the UCX845B.

Output

These devices contain a single totem pole output stage
that was specifically designed for direct drive of power
MOSFET s. It is capable of up to ±1.0 A peak drive current and
has a typical rise and fall time of 50 ns with a 1.0 nF load.
Additional internal circuitry has been added to keep the
Output in a sinking mode whenever an undervoltage lockout
is active. This characteristic eliminates the need for an
external pull–down resistor.

The SO–14 surface mount package provides separate
pins for VC (output supply) and Power Ground. Proper
implementation will significantly reduce the level of switching
transient noise imposed on the control circuitry. This
becomes particularly useful when reducing the I

pk(max)

clamp

level. The separate VC supply input allows the designer

added flexibility in tailoring the drive voltage independent of
VCC. A zener clamp is typically connected to this input when
driving power MOSFETs in systems where VCC is greater
than 20 V . Figure 22 shows proper power and control ground
connections in a current–sensing power MOSFET
application.

Reference

The 5.0 V bandgap reference is trimmed to ±1.0%
tolerance at TJ = 25°C on the UC284XB, and ±2.0% on the
UC384XB. Its primary purpose is to supply charging current
to the oscillator timing capacitor. The reference has
short–circuit protection and is capable of providing in excess
of 20 mA for powering additional control system circuitry .

Design Considerations

Do not attempt to construct the converter on
wire–wrap or plug–in prototype boards. High frequency

circuit layout techniques are imperative to prevent
pulse–width jitter. This is usually caused by excessive noise
pick–up imposed on the Current Sense or Voltage Feedback
inputs. Noise immunity can be improved by lowering circuit
impedances at these points. The printed circuit layout should
contain a ground plane with low–current signal and
high–current switch and output grounds returning on
separate paths back to the input filter capacitor. Ceramic
bypass capacitors (0.1 µF) connected directly to VCC, VC,
and V

may be required depending upon circuit layout. This

ref

provides a low impedance path for filtering the high frequency
noise. All high current loops should be kept as short as
possible using heavy copper runs to minimize radiated EMI.
The Error Amp compensation circuitry and the converter
output voltage divider should be located close to the IC and
as far as possible from the power switch and other
noise–generating components.

Figure 17. External Clock Synchronization Figure 18. External Duty Cycle Clamp and

Multi–Unit Synchronization

V

ref

8(14)

4(7)

2(3)

1(1)

T o Additional
UCX84XBs

R

A

+

R

)

2R

A

B

External

Sync
Input

0.01

8(14)

R

T

4(7)

C

T

2(3)

47

1(1)

R

R

EA

Bias

Osc

+

2R

R

5(9)

The diode clamp is required if the Sync amplitude is large enough to cause
the bottom side of CT to go more than 300 mV below ground.

R

A

8 4

R

B

6

5
2

C

f

+

(R

5.0k

R

5.0k

5.0k

1

Q

S

MC1455

1.44

)

2RB)C

A

D

3

7

(max)

MOTOROLA ANALOG IC DEVICE DATA

R

R

EA

Bias

Osc

+

2R

R

5(9)

9

UC3844B, 45B UC2844B, 45B

Figure 19. Adjustable Reduction of Clamp Level Figure 20. Soft–Start Circuit

V

7(12)

CC

V

in

C

5.0V Ref

+

–

R

R1R

1

S

R

Comp/Latch

2

)

R

2

T

Q

Where: 0 ≤ V

Ǔ

V

Clamp

R

1.0V

5(9)

ǒ

–3

I

R

2

R

1

V

Clamp

8(14)

4(7)

2(3)

1(1)

R

Bias

R

Osc

+

1.0 mA

)

+ 0.33x10

Ǔ

1

2R

EA

1.67

≈

R

2

ǒ

R

1

Figure 21. Adjustable Buffered Reduction of

Clamp Level with Soft–Start

8(14)

4(7)

2(3)

R

2

1(1)

R

1

V

Clamp

t

Soft-Start

MPSA63

≈

+*

R

Bias

R

Osc

+

1.0 mA

EA

2R

1.67

R

2

ǒ

Ǔ

)

1

R

1

Inƪ1

*

3V

5.0V Ref

+
–

V

Clamp

R

1.0V

5(9)

Where: 0 ≤ V

V

C

ƫ

C

Clamp

Clamp

R1R

R

1

)

T

S

Q

R

Comp/Latch

≤ 1.0 V

2

R

2

+

–

pk(max)

I

pk(max)

5.0V Ref

+

–

T

S

Q

R

1.0V

5(9)

R

[

7(11)

6(10)

5(8)

3(5)

Clamp

V

Clamp

R

≤ 1.0 V

S

Q1

R

8(14)

4(7)

2(3)

1.0M

1(1)

S

C

t

Soft–Start

R

Bias

R

Osc

+

1.0mA

EA

≈ 3600C in µF

2R

Figure 22. Current Sensing Power MOSFET

V

V

CC

7(12)

+

–

7(11)

6(10)

5(8)

3(5)

V

Q1

R

in

5.0V Ref

+

–

T

S

Q

R

Comp/Latch

S

Control Circuitry Ground:

T o Pin (9)

CC

(12)

+

–

(11)

(10)

(8)

(5)

Virtually lossless current sensing can be achieved with the implementation
of a SENSEFET power switch. For proper operation during over–current

V

Clamp

[

R

S

Refer to Figures 19 and 21.

conditions, a reduction of the I

pk(max)

V

G

1/4 W

R

S

in

D

SENSEFET

M

RSIpkr

[

r

DM(on)

RS= 200

[

Pin 5

DS(on)

)

0.075 I

R

S

pk

V

Pin 5

If: SENSEFET = MTP10N10M

Then: V

S

K

Power Ground:
T o Input Source

Return

clamp level must be implemented.

10

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

Figure 23. Current Waveform Spike Suppression

V

CC

7(12)

5.0V Ref
+

–

+

–

T

S

Q

R

Comp/Latch

7(11)

6(10)
5(8)

3(5)

V

in

The addition of the RC filter will eliminate

Q1

R

R

C

instability caused by the leading edge spike
on the current waveform.

S

Figure 24. MOSFET Parasitic Oscillations Figure 25. Bipolar Transistor Drive

V

CC

7(12)

5.0V Ref
+

–

+
–

T

S

Q

R

Comp/Latch

7(11)

R

6(10)

5(8)

3(5)

Series gate resistor Rg will damp any high frequency
parasitic oscillations caused by the MOSFET input
capacitance and any series wiring inductance in the
gate–source circuit.

V

in

Q1

g

R

S

I

B

+

0

–

Base Charge

Removal

6(10)

5(8)

3(5)

V

in

C1

Q1

R

S

The totem pole output can furnish negative base current
for enhanced transistor turn–off, with the addition of
capacitor C1.

MOTOROLA ANALOG IC DEVICE DATA

11

UC3844B, 45B UC2844B, 45B

Figure 26. Isolated MOSFET Drive

+
–

5.0V Ref

V

CC

T

S

Q

R

Comp/Latch

7(12)

+

–

7(11)

6(10)
5(8)

3(5)

C

Isolation

Boundary

Figure 27. Latched Shutdown

8(14)

V

in

VGS Waveforms

+

Q1

0
–

50% DC 25% DC

Ipk =

R

N

R

S

S

R

R

Bias

N

P

V

(Pin 1)

+

0
–

3 R

– 1.4

S

N

S

ǒ

Ǔ

N

p

From V

R

i

R

d

Rf ≥ 8.8k

EA

+

Osc

1.0 mA
2R

R

5(9)

. The

A(min)

4(7)

2(3)

1(1)

MCR

101

2N

3905

2N

3903

The MCR101 SCR must be selected for a holding of < 0.5 mA @ T
simple two transistor circuit can be used in place of the SCR as shown. All
resistors are 10 k.

Figure 28. Error Amplifier Compensation

2(3)

R

1(1)

2.5V

f

EA

+

1.0mA

2R

R

5(9)

R

2(3)

f

1(1)

2.5V

EA

+

1.0mA

2R

R

5(9)

O

C

f

From V

R

p

C

p

O

R

i

C

f

R

d

Error Amp compensation circuit for stabilizing any current mode topology except
for boost and flyback converters operating with continuous inductor current.

12

Error Amp compensation circuit for stabilizing current mode boost
and flyback topologies operating with continuous inductor current.

MOTOROLA ANALOG IC DEVICE DATA

UC3844B, 45B UC2844B, 45B

Figure 29. 7 W Off–Line Flyback Regulator

18k

4.7k

4.7

8(14)

33k

4(7)

1.0nF

2(3)

150k

1(1)

Primary: 45 Turns #26 AWG

100

pF

0.01

T1 –

Secondary

Ω

115 Vac

±

12 V: 9 Turns #30 A WG (2 Strands) Bifiliar Wound

EA

MDA

202

R

Bias

R

Osc

+
–

+

5(9)

Secondary 5.0 V: 4 Turns (six strands) #26 Hexfiliar Wound
Secondary Feedback: 10 Turns #30 AWG (2 strands) Bifiliar W ound
Core: Ferroxcube EC35–3C8
Bobbin: Ferroxcube EC35PCB1

≈

0.10” for a primary inductance of 1.0 mH

Gap:

+

5.0V Ref

250

T

S

Q

R

Comp/Latch

MBR1635

4.7k

56k

1N4935 1N4935

100

7(11)

6(10)

5(8)

3(5)

+

1N4937

1N5819

L1

L2, L3

68

22

1.0k

470pF

– 15
– 25

7(12)

+

–

T1

3300

pF

+

47

MTP

4N50

µ

H at 5.0 A, Coilcraft Z7156

µ

H at 5.0 A, Coilcraft Z7157

680pF

0.5

2200

MUR110

1000

1000

MUR110

2.7k

L1

++

1000

L2

++

++

L3

1N4937

5.0V/4.0A

5.0V RTN
12V/0.3A

10

±

12V RTN

10

–12V/0.3A

Test Conditions Results

Line Regulation: 5.0 V

±12 V

Load Regulation: 5.0 V

±12 V

Output Ripple: 5.0 V

±12 V

Vin = 95 Vac to 130 Vac ∆ = 50 mV or ±0.5%

∆ = 24 mV or ±0.1%

Vin = 115 Vac, I
Vin = 115 Vac, I

= 1.0 A to 4.0 A

out

= 100 mA to 300 mA

out

∆ = 300 mV or ±3.0%
∆ = 60 mV or ±0.25%

Vin = 115 Vac 40 mV

80 mV

Efficiency Vin = 115 Vac 70%

All outputs are at nominal load currents unless otherwise noted.

pp
pp

MOTOROLA ANALOG IC DEVICE DATA

13

UC3844B, 45B UC2844B, 45B

Figure 30. Step–Up Charge Pump Converter

Output Load Regulation

(Open Loop Configuration)

IO (mA) VO (V)

1N5819

R2

R1

Ǔ

1.0nF

10k

8(14)

4(7)

2(3)

1(1)

2.5V

Amplifier

Error

Vin = 15V

CC

PWM
Latch

7(12)

34V

+

–

7(11)

6(10)

+

1N5819

15 10

47

+

VO = 2.5

Connect to
Pin 2 for
closed loop
operation.

R2

ǒ

)

1

R1

5(8)

3(5)

UC3845B

Reference

3.6V

Regulator

+

V

–

UVLO

R

Internal

Bias

R

Osc

+

0.5mA

2R

1.0V

R

Current Sense

Comparator

5(9)

V

UVLO

ref

T

S

Q

R

The capacitor’s equivalent series resistance must limit the Drive Output current to 1.0 A. An additional series resistor
may be required when using tantalum or other low ESR capacitors. The converter’s output can provide excellent line
and load regulation by connecting the R2/R1 resistor divider as shown.

18
36

0
2
9

29.9

28.8

28.3

27.4

24.4

VO ≈ 2 (Vin)

+

47

Figure 31. V oltage–Inverting Charge Pump Converter

Vin = 15V

V

CC

UVLO

Q

PWM
Latch

7(12)

34V

+

–

7(11)

6(10)

5(8)

3(5)

+

15 10

1.0nF

10k

8(14)

4(7)

2(3)

1(1)

2.5V

R

R

Error

Amplifier

Osc

+

Internal

Bias

0.5mA

2R

R

UC3845B

3.6V

5(9)

Reference

Regulator

+

V

ref

–

UVLO

1.0V

Current Sense

Comparator

T

S
R

The capacitor’s equivalent series resistance must limit the Drive Output current to 1.0 A.
An additional series resistor may be required when using tantalum or other low ESR capacitors.

OUTLINE DIMENSIONS

Output Load Regulation

IO (mA) VO (V)

47

0
2

9
18
32

1N5819

1N5819

–14.4
–13.2
–12.5
–11.7
–10.6

VO

≈

–V

in

+

47

14

MOTOROLA ANALOG IC DEVICE DATA

NOTE 2

–T–

SEATING
PLANE

H

UC3844B, 45B UC2844B, 45B

58

–B–

14

F

–A–

C

N

D

G

0.13 (0.005) B

K

M

T

N SUFFIX

PLASTIC PACKAGE

CASE 626–05

ISSUE K

L

J

M

M

A

M

NOTES:

1. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.

2. PACKAGE CONTOUR OPTIONAL (ROUND OR
SQUARE CORNERS).

3. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.

DIM MIN MAX MIN MAX

A 9.40 10.16 0.370 0.400
B 6.10 6.60 0.240 0.260
C 3.94 4.45 0.155 0.175
D 0.38 0.51 0.015 0.020
F 1.02 1.78 0.040 0.070
G 2.54 BSC 0.100 BSC
H 0.76 1.27 0.030 0.050

J 0.20 0.30 0.008 0.012
K 2.92 3.43 0.115 0.135
L 7.62 BSC 0.300 BSC
M ––– 10 ––– 10
N 0.76 1.01 0.030 0.040

INCHESMILLIMETERS

__

–T–

–A–

58

4X P

–B–

14

G

C

SEATING
PLANE

8X D

K

0.25 (0.010)MB

SS

A0.25 (0.010)MTB

D1 SUFFIX

PLASTIC PACKAGE

CASE 751–05

(SO–8)

ISSUE N

M

R

X 45

_

_

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE
DAMBAR PROTRUSION. ALLOWABLE
DAMBAR PROTRUSION SHALL BE 0.127
(0.005) TOTAL IN EXCESS OF THE D
DIMENSION AT MAXIMUM MATERIAL
CONDITION.

DIM MIN MAX MIN MAX

F

J

A 4.80 5.00 0.189 0.196
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.18 0.25 0.007 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7
P 5.80 6.20 0.229 0.244
R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

____

MOTOROLA ANALOG IC DEVICE DATA

15

–T–

SEATING
PLANE

–A–

14 8

G

D 14 PL

0.25 (0.010) A

UC3844B, 45B UC2844B, 45B

OUTLINE DIMENSIONS

D SUFFIX

PLASTIC PACKAGE

CASE 751A–03

(SO–14)
ISSUE F

–B–

P 7 PL

M

71

0.25 (0.010) B

C

X 45

R

K

M

S

B

T

S

M

_

M

NOTES:

1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSIONS A AND B DO NOT INCLUDE
MOLD PROTRUSION.

4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.

5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.

F

J

DIM MIN MAX MIN MAX

A 8.55 8.75 0.337 0.344
B 3.80 4.00 0.150 0.157
C 1.35 1.75 0.054 0.068
D 0.35 0.49 0.014 0.019
F 0.40 1.25 0.016 0.049
G 1.27 BSC 0.050 BSC
J 0.19 0.25 0.008 0.009
K 0.10 0.25 0.004 0.009
M 0 7 0 7

____

P 5.80 6.20 0.228 0.244
R 0.25 0.50 0.010 0.019

INCHESMILLIMETERS

Motorola reserves the right to make changes without further notice to any products herein. Motorola makes no warranty , representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Motorola assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation consequential or incidental damages. “T ypical” parameters which may be provided in Motorola
data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals”
must be validated for each customer application by customer’s technical experts. Motorola does not convey any license under its patent rights nor the rights of
others. Motorola products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other
applications intended to support or sustain life, or for any other application in which the failure of the Motorola product could create a situation where personal injury
or death may occur. Should Buyer purchase or use Motorola products for any such unintended or unauthorized application, Buyer shall indemnify and hold Motorola
and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees
arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that Motorola
was negligent regarding the design or manufacture of the part. Motorola and are registered trademarks of Motorola, Inc. Motorola, Inc. is an Equal
Opportunity/Affirmative Action Employer.

How to reach us:
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INTERNET: http://Design–NET.com 51 Ting Kok Road, T ai Po, N.T., Hong Kong. 852–26629298

16

◊

MOTOROLA ANALOG IC DEVICE DATA

UC3844B/D

*UC3844B/D*