Datasheet UC3845AN, UC3844AN, UC3843AN, UC3845AD, UC3844AD Datasheet (SGS Thomson Microelectronics)

...
Page 1
UC2842A/3A/4A/5A
UC3842A/3A/4A/5A
HIGH PERFORMANCE CURRENTMODE PWM CONTROLLER
TRIMMED OSCILLATOR DISCHARGE CUR-
.
RENT CURRENT MODEOPERATIONTO500kHz
.
AUTOMATIC FEED FORWARD COMPENSA-
.
.
CURRENT LIMITING INTERNALLY TRIMMED REFERENCE WITH
.
UNDERVOLTAGELOCKOUT HIGHCURRENTTOTEMPOLEOUTPUT
.
UNDERVOLTAGE LOCKOUT WITH HYSTER-
.
ESIS LOWSTART-UPCURRENT (< 0.5mA)
.
DOUBLEPULSESUPPRESSION
.
DESCRIPTION
TheUC384xAfamilyofcontrolICsprovidesthenec­essaryfeaturesto implement off-lineor DC to DC fixedfrequencycurrent modecontrolschemeswith a minimal external parts count. Internally imple­mentedcircuitsincludea trimmedoscillatorfor pre­cise DUTY CYCLECONTROL under voltagelock­outfeaturingstart-upcurrentlessthan0.5mA,a pre­cision reference trimmed for accuracyat the error ampinput,logictoinsurelatchedoperation,a PWM
comparatorwhichalsoprovidescurrentlimit control, and a totempole output stage designed to source orsinkhighpeakcurrent.Theoutputstage,suitable for driving N-Channel MOSFETs, is low in the off­state.
Differencesbetweenmembersof thisfamily arethe under-voltagelockoutthresholdsandmaximumduty cycle ranges. The UC3842A and UC3844A have UVLOthresholds of 16V (on) and 10V (off), ideally suitedoff-lineapplicationsThecorrespondingthresh­olds for the UC3843A and UC3845A are 8.5 V and
7.9V.The UC3842A and UC3843A can oper ateto dutycyclesapproaching100%.Arangeofthezeroto <50%is obtainedbytheUC3844AandUC3845Aby theadditionofaninternaltoggleflipflopwhichblanks theoutputoffeveryotherclockcycle.
Minidip
SO8
BLOCK DIAGRAM (toggle flip flop used only in UC3844A and UC3845A)
7
Vi
2.50V
UVLO
S/R
2R
R1V
5V
REF
VREF GOOD
LOGIC
S R
CURRENT
SENSE
COMPARATOR
INTERNAL
BIAS
T
LATCH
UC3842A
March 1999
GROUND
RT/CT
VFB
COMP
CURRENT
SENSE
34V
5
4
2
1
3
OSC
ERROR AMP.
+
- PWM
D95IN331
8
6
VREF
5V 50mA
OUTPUT
1/15
Page 2
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
ABSOLUTEMAXIMUMRATINGS
Symbol Parameter Value Unit
V V I
O
E
O
P
tot
P
tot
T
stg
T
J
T
L
*
Allvoltagesare with respect to pin 5, all currents arepositiveinto the specifiedterminal.
PIN CONNE C TI ON
SupplyVoltage (low impedance source) 30 V
i
SupplyVoltage (Ii < 30mA) Self Limiting
i
Output Current
1
±
Output Energy (capacitive load) 5 Analog Inputs(pins 2, 3) – 0.3to 5.5 V ErrorAmplifier Output SinkCurrent 10 mA Power Dissipation at T
amb
≤25°
C (Minidip)
Power Dissipation at Tamb≤25°C (SO8)
1.25 W 800 mW
Storage Temperature Range – 65 to 150 JunctionOperating Temperature – 40 to 150 °C Lead Temperature (soldering 10s) 300
(top view)
Minid i p/ SO8
A
J
µ
C
°
C
°
COMP
V
FB
I
SENSE
RT/C
T
1 2 3 4
D95IN332
8 7 6 5
V
REF
Vi OUTPUT GROUND
PIN FUNCTIONS
No Function Description
1 COMP This pin is the Error Amplifier output and is made available for loop compensation. 2V
3I
4R
SENSE
T/CT
5 GROUND This pin is the combined control circuitry and power ground. 6 OUTPUT This output directly drives the gate of a power MOSFET. Peak currents up to 1A are sourced
7V
CC
8V
This is the inverting input of the Error Amplifier. It is normally connected to the switching
FB
power supply output through a resistor divider. A voltage proportional to inductor current is connected to this input. The PWM uses this
information to terminate the output switch conduction. The oscillator frequency and maximum Output duty cycle are programmed by connecting
resistor R
to Vref and cpacitor CTto ground. Operation to 500kHz is possible.
T
and sunk by this pin. This pin is the positive supply of the control IC.
This is the reference output. It provides charging current for capacitor CTthrough resistor RT.
ref
ORDERINGNUMBERS
UC2842AD1; UC3842AD1 UC2843AD1; UC3843AD1 UC2844AD1; UC3844AD1 UC2845AD1; UC3845AD1
2/15
SO8 Minidip
UC2842AN; UC3842AN UC2843AN; UC3843AN UC2844AN; UC3844AN UC2845AN; UC3845AN
Page 3
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
THERMAL DATA
Symbol Description Mi n i dip SO 8 U n it
R
th j-amb
Thermal ResistanceJunction-ambient. max. 100 150
°
C/W
ELECTRICALCHARACTERISTICS
-25 < T
<85°C forUC284XA;0 < T
amb
( [note 1] Unless otherwise stated, these specificationsapply for
<70°CforUC384XA;Vi=15V(note 5); RT= 10K; CT= 3.3nF)
amb
Symbol Parameter Test Conditions
REFERENCE SECTION
V
VV
V
REF
Output Voltage
REF
Line Regulation
REF
Load Regulation
REF
Temperature Stability (Note 2) 0.2 0.2
/∆T
=25°CIo= 1mA
T
j
12V V 1 I
i
20mA
o
25V
Total Output Variation Line, Load, Temperature 4.9 5.1 4.82 5.18 V
e
Output Noise Voltage
N
10Hz≤f≤10KHz T (note 2)
Long Term Stability
= 125°C, 1000Hrs
T
amb
(note 2)
I
Output Short Circuit -30 -100 -180 -30 -100 -180 mA
SC
OSCILLATOR SECTION
f
f
OSC
f
OSC
V
I
dischg
OSC
Frequency Frequency Change with Volt. V
/∆V
Frequency Change with Temp. T
/∆T
Oscillator Voltage Swing (peak to peak) 1.6 1.6 V
OSC
Discharge Current (V
=2V) TJ=25°C 7.8 8.3 8.8 7.8 8.3 8.8 mA
OSC
=25°C
T
j
= 12V to 25V 0.2 1 0.2 1 %
CC
A=Tlow
to T
high
ERROR AMP SECTION
V
BW Unity Gain Bandwidth T
PSRR Power Supply Rejec. Ratio
Input Voltage V
2
I
Input Bias Current VFB= 5V -0.1 -1 -0.1 -2
b
A
VOL
I
Output Sink Current VPIN2 = 2.7V V
o
I
Output Source Current VPIN2 = 2.3V V
o
V
High V
OUT
Low V
V
OUT
= 2.5V 2.45 2.50 2.55 2.42 2.50 2.58 V
PIN1
2V Vo≤ 4V
=25°C 0.7 1 0.7 1 MHz
J
12V≤V
PIN2
= 15KΩto Ground
R
L
PIN2
= 15KΩto Pin 8
R
L
i
= 2.3V;
= 2.7V;
25V
PIN1
PIN1
CURRENT SENSE SECTION
G
V
SVR Supply Voltage Rejection
Gain (note 3 & 4) 2.85 3 3.15 2.85 3 3.15 V/V
V
Maximum Input Signal V
3
I
Input Bias Current -2 -10 -2 -10
b
= 5V (note 3) 0.9 1 1.1 0.9 1 1.1 V
PIN1
12≤V
25V (note 3)
i
Delay to Output 150 300 150 300 ns
UC284XA UC38 4XA
Min. Typ. Max. Min. Typ. Max.
Unit
4.95 5.00 5.05 4.90 5.00 5.10 V 220 220mV 325 325mV
mV/°C
=25°C
j
50 50 µ
525 525mV
47 52 57 47 52 57 KHz
–5––5–%
µA
65 90 65 90 dB
60 70 60 70 dB
= 1.1V 2 12 2 12 mA
= 5V -0.5 -1 -0.5 -1 mA
5 6.2 5 6.2 V
0.8 1.1 0.8 1.1 V
70 70 dB
µ
V
A
3/15
Page 4
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
ELECTRICAL CHARACTERISTICS
(continued)
Symbol Pa ram et er Test C o n diti o n s
OUTPUT SECTION
V
V
V
Output Low Level I
OL
Output High Level I
OH
UVLO Saturation VCC= 6V; I
OLS
t
Rise Time
r
t
Fall Time
f
= 20mA 0.1 0.4 0.1 0.4 V
SINK
I
= 200mA 1.6 2.2 1.6 2.2 V
SINK
= 20mA 13 13.5 13 13.5 V
SOURCE
I
T T
= 200mA 12 13.5 12 13.5 V
SOURCE
= 1mA 0.7 1.2 0.7 1.2 V
SINK
=25°CCL= 1nF (2)
j
=25°CCL= 1nF (2)
j
UNDER-VOLTAGE LOCKOUT SECTION
Start Threshold X842A/4A 15 16 17 14.5 16 17.5 V
X843A/5A 7.8 8.4 9.0 7.8 8.4 9.0 V
Min Operating Voltage After Turn-on
X842A/4A 9 10 11 8.5 10 11.5 V X843A/5A 7.0 7.6 8.2 7.0 7.6 8.2 V
PWM SECTION
Maximum Duty Cycle X842A/3A 94 96 100 94 96 100 %
X844A/5A 47 48 50 47 48 50 %
Minimum Duty Cycle 0 0 %
TOTAL STANDBY CURRENT
I
Start-up Current Vi= 6.5V for UCX843A/45A 0.3 0.5 0.3 0.5 mA
st
V
= 14V for UCX842A/44A 0.3 0.5 0.3 0.5 mA
i
I
V
Operating Supply Current V
i
Zener Voltage Ii= 25mA 30 36 30 36 V
iz
PIN2=VPIN3
=0V 12 17 12 17 mA
UC284X A UC384 X A
Min. Typ. Max. Min. Typ. Max.
50 150 50 150 ns 50 150 50 150 ns
Unit
Notes : 1. Max package power dissipation limitsmust be respected; low duty cycle pulse techniquesare used duringtestmaintainTjas
close to T
2. Theseparameters, although guaranteed, are not100%testedin production.
3. Parametermeasured at trippointof latchwithV
4. Gain definedas : A= ;0≤V
5. AdjustViabovethestart threshold before setting at 15 V.
VV
aspossible.
amb
PIN1 PIN3
PIN3
0.8V
PIN2
=0.
4/15
Page 5
Figure1: OpenLoop Test Circuit.
4.7K
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
V
REF
R
T
V
REF
ERROR AMP.
ADJUST
4.7K
1K
100K
I
SENSE
ADJUST
D95IN343
5K
COMP
V
I
SENSE
RT/C
FB
T
1 2
UC3842A
3
4
Highpeakcurrentsassociatedwithcapacitiveloads necessitate careful grounding techniques. Timing and bypass capacitorsshould be connectedclose
Figure 2:
Oscillator Frequency vs Timing Resis­tance
f
(Hz)
o
D96IN362
A2N2222
7
6
5
0.1µF
V
i
OUTPUT
GROUND
0.1µF
1W
1K
8
C
T
V
i
OUTPUT
GROUND
to pin 5 ina singlepointground.The transistorand 5KΩpotentiometerareusedtosampletheoscillator
waveformand applyan adjustablerampto pin 3.
Figure 3:
Maximum Duty Cycle vs Timing Resis­tor
f
o
(Hz)
D96IN363
1M
CT=470pF
1nF
100K
10K
1K
300 1K 3K 10K 30K RT()
2.2nF
4.7nF
80
60
40
20
0
300 1K 3K 10K 30K RT()
5/15
Page 6
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Figure 4: Oscillator Discharge Current vs. Tem-
perature.
I
dischg
(mA)
D95IN335
Vi=15V V
=2V
8.5
8.0
7.5
7.0
-55 -25 0 25 50 75 100 TA(°C)
OSC
Figure 6: Current Sense Input Threshold vs. Er-
ror Amp Output Voltage.
Vth (V)
1.0
0.8
0.6
Vi=15V
T
=125°C
T
A
=25°C
A
D95IN338
Figure 5: Error Amp Open-Loop Gain and
Phase vs. Frequency.
(dB)
Vi=15V
80
Gain
60
40
20
0
-20 10 100 1K 10K 100K 1M f(Hz)
VO=2V to RL=100K TA=25°C
D95IN337
4V
Phase
Figure 7: Reference Voltage Change vs.
Source Current.
60
50
40
30
T
=125°C
A
T
A
Vi=15V
=-40°C
D95IN339
φ
30
60
90
120
150
180
0.4
T
=-40°C
0.2
0.0 0246V
A
(V)
O
Figure 8: ReferenceShort Circuit Current vs.
Temperature.
I
SC
(mA)
100
90
80
70
60
50
-55 -25 0 25 50 75 100 TA(°C)
Vi=15V RL≤0.1
D95IN340
20
10
0
0 20406080100I
=25°C
A
T
ref
(mA)
6/15
Page 7
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Figure 9: Output Saturation Voltage vs. Load
Figure 10: Supply Current vs. Supply Voltage.
Current.
V
sat
(V)
V
-1
-2 Vi=15V
80µs Pulsed Load 120Hz Rate
3
2
1
0
0 200 400 600 IO(mA)
i
T
=25°C
A
TA=-40°C
Source
Saturation
(Load to Ground)
TA=-40°C
T
Saturation
Sink (Load to Vi)
=25°C
A
D95IN341
GND
I
i
(mA)
20
15
10
5
0
UCX843/45
0 102030V
UCX842/44
RT=10K CT=3.3nF VFB=0V I
Sense
TA=25°C
Figure 11: Output Waveform. Figure 12: Output Cross Conduction
Vi=15V C
= 1.0nF
90%
L
T
A
=25°C
V
O
D95IN342
=0V
V
=30V
i
C
L
T
A
(V)
i
= 15pF =25°C
20V/DIV
10%
Figure 13:
50ns/DIV
Oscillator and Output Waveforms.
V
i
7
8
PWM
R
T
4
I
C
T
5V REG
CLOCK
OSCILLATOR
D
5
GND
6
I
CC
OUTPUT
OUTPUT
OUTPUT
CT
CT
100ns/DIV
LARGE R
SMALL R
/SMALL C
T
/LARGE C
T
D95IN344
100mA/DIV
T
T
7/15
Page 8
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Figure14 : ErrorAmp Configuration.
V
Z
i
Z
f
FB
COMP
2.5V
1mA
+
2
-
1
D95IN345
Figure15 :
UnderVoltageLockout.
V
i
7
ON/OFF
TO REST OF IC
UC3842A UC3844A
V
ON
V
OFF
Figure16 : Current SenseCircuit.
I
S
COMP
R
CURRENT
CR
S
D95IN347
SENSE
COMMAND
UC3843A UC3845A
16V 8.4V
10V 7.6V
1
3
5
GND
ERROR
AMPL.
I
<17mA
<0.5mA
Fig.15-UC3842A
2R
CC
V
OFFVON
R1V
COMPARATOR
CURRENT
SENSE
V
CC
Peakcurrent (is) isdeterminedby theformula
S max
R
S
1.0 V
I
A small RC filter may be required to suppressswitchtransients.
8/15
Page 9
Figure17 : Slope CompensationTechniques.
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
I
S
R
R
R
S
Figure18 :
V
REG
8
R
T
RT/C
T
SLOPE
1
C
T
I
SENSE
UC3842A
4
3
5
I
S
R
SLOPE
R
1
R
S
GND
IsolatedMOSFETDrive and CurrentTransformerSensing.
V
CC
7
V
REG
8
R
T
RT/C
T
4
UC3842A
C
T
I
SENSE
3
5
GND
D95IN348
V
in
5.0V
+
-
-
+
ref
S
Q
R
COMP/LATCH
C
ISOLATION
BOUNDARY
R
R
S
VGSWaveforms
Q1
N
S
+ 0
50% DC 25% DC
V
(pin 1)
I
=
pk
N
P
3R
-1.4
S
+ 0
--
N
S
()
N
P
+
-
6
3
D95IN349
9/15
Page 10
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Figure19 :
LatchedShutdown.
4
2N
3905
8
2
1
2N
3903
R
R
+
­EA
SCR must be selected for a holding current of less than 0.5mA at T The simple two transistor circuit can be used in place of the SCR as shown. All resistors are 10K.
OSC
BIAS
+
1mA
2R
R
5
D95IN350
.
A(min)
Figure 20:
Error Amplifier Compensation
EA
EA
+
1mA
2R
R
+
1mA
2R
R
From V
O
R
i
R
C
d
f
2.5V
+
-
2
R
f
1
Error Amp compensation circuit for stabilizing any current-mode topology except for boost and flyback converters operating with continuous inductor current.
From V
R
P
C
P
O
R
i
R
C
d
f
2.5V
+
-
2
R
f
1
Error Amp compensation circuit for stabilizing current-mode boost and flyback topologies operating with continuous inductor current.
5
D95IN351
5
10/15
Page 11
Figure 21: External Clock Synchronization.
V
REF
R
T
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
8
R
BIAS
R
EXTERNAL
SYNC INPUT
The diode clamp is required if the Sync amplitude is large enough to the bottom side of CTto go more than 300mV below ground
Figure 22:
V
R
A
B
4
+
EA
0.01µF
C
47
T
+
2
-
1
External Duty Cycle Clamp and Multi Unit Synchronization.
REF
5K 6 5
5K
84
+
-
R
Q
3
7
8
4
OSC
2R
cause
+
R
5
D95IN352
R
BIAS
RR
OSC
f=
C
(R
1.44 +2RB)C
A
2
5K
+
-
1
D
=
max
RA+2R
R
B
S
NE555
B
+
2
­EA
1
TO ADDITIONAL
UCX84XAs
UCX84XAs
2R
R
5
D95IN353
11/15
Page 12
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Figure 23: Soft-StartCircuit
8
R
BIAS
R
4
+
OSC
1mA
2R
R
1M
+
2
­EA
1
C
5
Figure 24: Soft-Startand Error Amplifier Output Duty Cycle Clamp.
5V
1V
ref
+
-
S
+
-
D95IN354
Q
R
V
V
CC
in
C
12/15
R2
R1
8
4
2
1
BC109
7
Q
V
CLAMP
+
-
7
6
5
R
S
D95IN355
Q1
R
S
5V
ref
R
BIAS
R
R
1
R1+R
OSC
2R
R
where 0 <V
2
V
Clamp
5
CLAMP
+
1mA
+
­EA
V
= ·
CLAMP
1V
<1V I
+
-
­+
Comp/Latch
=
pk(max)
S
R
Page 13
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 1.75 0.069 a1 0.1 0.25 0.004 0.010 a2 1.65 0.065 a3 0.65 0.85 0.026 0.033
b 0.35 0.48 0.014 0.019
b1 0.19 0.25 0.007 0.010
C 0.25 0.5 0.010 0.020 c1 45°(typ.)
D (1) 4.8 5.0 0.189 0.197
E 5.8 6.2 0.228 0.244
e 1.27 0.050
e3 3.81 0.150
F (1) 3.8 4.0 0.15 0.157
L 0.4 1.27 0.016 0.050
M 0.6 0.024
S8°(max.)
(1) D and F do not include mold flash or protrusions. Mold flash or
potrusionsshall not exceed 0.15mm (.006inch).
mm inch
OUTLINE AND
MECHANICAL DATA
SO8
13/15
Page 14
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
DIM.
MIN. TYP. MAX. MIN. TYP. MAX.
A 3.32 0.131
a1 0.51 0.020
B 1.15 1.65 0.045 0.065 b 0.356 0.55 0.014 0.022
b1 0.204 0.304 0.008 0.012
D 10.92 0.430
E 7.95 9.75 0.313 0.384
e 2.54 0.100 e3 7.62 0.300 e4 7.62 0.300
F 6.6 0.260
I 5.08 0.200 L 3.18 3.81 0.125 0.150 Z 1.52 0.060
mm inch
OUTLINE AND
MECHANICAL DATA
Minidip
14/15
Page 15
UC2842A/3A/4A/5A - UC3842A/3A/4A/5A
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the conse­quences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. STMi­croelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
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15/15
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