The UC3178 ful l-bridge power amplifier, rated for continuous output current
of 0.45 Amperes, i s intended for use in demanding servo applications. This
device includes a preci sion current sense amplifier that senses load current
with a single resistor in series with the load. The UC3178 is optimized to con sume a minimum of supply current , and is designed to operate in both 5V
and 12V systems. The power output stages have a l ow saturation voltage
and are protected with current limiting and thermal shutdown. When inhibited,
the device will draw less than 1.5mA of total supply current.
Auxiliary functions on this device include a load current sensing and rectification function that can be configured with the device’s over-current comparator
to provide tight control on the maximum commanded load current. The closed
loop transconductance of the configured power amplifier can be switched between a high and l ow ran ge wi th a single logic input. The 4:1 change in gain
can be used to extend the dynamic range of the servo loop. Bandwidth variations that would otherwise result with the gain change can be controlled w ith
a compensation adjust pin.
This device is packaged a power PLCC, "QP" package which maintains a
standard 28-pin outline, but with 7 pins along one edge directly tied to the die
substrate for improved thermal performance.
查询UC3178供应商
Full Bridge Power Amplifier
UC3178
FEATURES
•Precision Current Control
•±450mA Load Current
•1.2V Typical Total Vsat at
450mA
•Programmable Over-Current
Control
•Range Control for 4:1 Gain
Change
•Compensation Adjust Pin for
Range Bandwidth Control
•Inhibit Input and UVLO
•3V to 15V Operation
•12mA Quiescent Supply
Current
BLOCK DIAGRAM
DESCRIPTION
5/93
UDG-92010
Page 2
UC3178
Unless otherwise stat ed spe cifica tion s hold for TA = 0°C to 70°C, VC(+) = VIN(+) =
12V, REF Input = VIN(+)/2, O/C Inpu t & Inhibit Input = 0V.
*Notes: Unless other wise indicat ed , voltag es are refer enc ed to
ground and curre nts are posit ive into , negat ive out of , the specified terminals, "Pu lsed" is defin ed as a less tha n 10% dut y cycle pulse with a maximum dura tion of 500
µs.
THERMAL DATA
QP package: (see pac kaging sect ion of UICC data book for more
details on therm al perfor m ance )
Thermal Resistance Junction to Ambient, θja . . . 30-40°C/W
Note: The above numbers for θjl are maximums for the limiti ng
thermal resist anc e of the packa ge in a standa rd moun ting configuration . The
thermal perfor ma nce of t he dev ice/ pc- boar d sy stem . All of the
above numbers assume no ambient airflow.
VC(+) Supply CurrentIOUT = OA1.22.0mA
Total Supply CurrentSupplies = 5V,I
Supplies = 12V,I
V
IN(+) UVLO Thresholdlow to high2.62.8V
UVLO Threshold Hysterisis300mV
Over-Cur ren t (O/C) Comp ara tor
Input Bias Curr entV input = 0.8V-1.0-.01µA
Thresholdslow to high0.971.01.03V
Threshold Hys terisis85100115mV
O/C IND Vs atI
O/C IND LeakageV
OUT = 5mA, V input low0.20.45V
OUT = 20V5.0µA
Power Amplifiers A and B
Input Off set VoltageA Amplifier, V
B Amplifier, V
Input Bias CurrentV
CMRRV
CM = 6V-500-50µΑ
CM = 0.5 to 13V, Supplies = 15V7090dB
PSRRVIN(+) = 4 to 15V, VCM = 1.5V7090dB
Large Signal Volta ge G ainSupplies = 12V, V
to V
OUT = 10.5V, IOUT = -300mA3.015.0V/mV
OUT = OA1216mA
OUT = OA1318mA
CM = 6V4.0mV
CM = 6V12.0mV
OUT = 1V, IOUT = 3 00mA
2
Page 3
UC3178
ELECTRICAL
CHARACTERISTICS (cont.):
Unless otherwise stat ed spe cifica tion s hold for TA = 0°C to 70°C , VC(+) = VIN(+) = 12V,
REF Input = V
IN(+)/2, O/C In put & Inhibit Input = 0V.
PARAMETERTEST CONDITIONSMINTYPMAX UNITS
Power Amplifiers A & B (cont.)
Gain Bandwit h Prod uctA Amplifier2.0MHz
B Amplifier1.0MHz
Slew Rate1.0V/µs
High-Side Current Limit0.450.65A
Output Saturation VoltageHigh-Side, I
High-Side, I
OUT = -100mA0.75V
OUT = -300mA0.85V
High-Side, IOUT = -450mA0.9V
High-Side Diode, VfI
Low-Side, I
Low-Side, I
Low-Side, I
Total Vsat, I
Total Vsat, I
Total Vsat, I
D = 450mA1.30V
OUT = 100mA0.2V
OUT = 300mA0.25V
OUT = 450mA0.30V
OUT = 100mA0.951.2V
OUT = 300mA1.051.4V
OUT = 450mA1.251.6V
Current Sense Amplifier
Input Offset VoltageV
CM = 6V, Low range mode2.0mV
High range mode4.0mV
Input Offset ChangeV
with Common Mode I npu tV
Voltage GainV
Saturation VoltageLow-Side, I
CM = -1V to 13V, Supplies = 12V, Low Range Mode2000µV/V
CM = -1V to 13V, Supplies = 12V, High Range Mode4000µV/V
DIFF = +1.0 to -1.0V, Vcm = 6V, High Range Mode0 .4850.500.515V/V
V
DIFF = +1.0 to -1.0V, Vcm = 6V, Low Range M ode1.952.02.05V/ V
OUT = 1mA0.10.3V
High-Side, IOUT = -1mA, Referenced to = VIN(+)0.10.3V
Input Bias Cu rrent at Ref. Input(REF Input - C/S(+))/48kohms, Tj = 25°C152127µA/V
Load Curre nt Sen se and Re ctif icati on
Sense Buff er Off set VoltageREF I nput to IDIF REF, I
Sense Buff er CMR RI
IDIF REF to IDIF Out Cur ren t IDIF =
RatioIDIF =
IDIF Out Supply Sen sitivit yIDIF Out =
IDIF Out Commo n Mode Sens itivityIOUT =
±1mA, REF Input = 2V to 10V
OUT =
± 100
µA, IDIF Out = 1V0.951.01.05A/A
±1mA, IDIF Out = 1V
± 1mA, V
IN
(+)
±1mA, REF Input = 2V to10V, IDIF Out = 1V
±
OUT =
1mA 10mV
7090 dB
0.941.01.06A/A
= 4V to 15V,REF Input = 2V
1.05.0µA/V
(delta IDIF Out/de lta REF Inpu t)1.05.0 µA/V
Auxi li ary Function s
Inhibit Input Threshold0.61.11.7V
Inhibit Input CurrentInhibit Input = 1.7V-1.0-0.5µA
O/C Force Input Threshold0.61.11.7V
O/C Force Input CurrentO/C Force Input = 1.7V50100µA
Range Input Threshold0.61.11.7V
Range Inpu t CurrentRange Input = 1.7V50100µA
COMP ADJ Pin Satura tion Range Input = 0V, Pin Current =
Voltageto A
A & B OUT: Outputs for the A & B power amplifiers,
providing differential drive to the load during normal operation. During a UVLO, Inhibit, or O/C condition both of
these outputs will be in a high, source only state. Highside diodes are i ncluded to ca tch inductive load currents
flowing into these pins, inductive kicks on the low-side are
caught by the high-side output transistors.
A
IN(+): Non-inverting input to the A amp lifier. Normally tied
to the REF In pu t wh en the cu rr ent sen se am plif ier is used.
A
IN(-): Inverting input to the A amplifier. Used as the sum-
ming node to close the loop on the overall power
amplifier.
B
IN(+): Non-inverting input to the B amplifier. This pin nor-
mally sets the reference point for the differential voltage
swing at the load.
B
IN(-): Inverting input to the B amplifier. Used to program
the gain of the B amplifier.
COMP ADJ: The compensation adjust pin allows the user
to provide an auxiliary compensation network f or t h e A am plifier that is only active when the current sense amplifier is
in the low range. With this option, the user can control the
change in bandwidth that would otherwise result from the
gain change in the feedback loop.
C/S(+): The non-inv erting input to the current sense amplifier is typically tied to the load side of the series current
sense resistor. This pin can be pulled below ground during
an abrupt load current change with an inductive load.
Proper operation of the current sense amplifier will result if
this pin does not go below ground by an amount greater
than:
C/S(-): The inverting input to the current sense amplifier is
typically tied to the connection between the B amplifier
output and the current sense resistor that is in series with
the load.
C/S Output: The output of the current sense amplifier has
a 1.5mA current source pull-up and an active NPN pulldown. The output will pu ll t o w ithin 0.3V of either rail with
a load current of less than 1mA.
GND: Reference point for the internal reference, O/C
comparator, and other low-level circuitry.
IDIF OUT: Current source output pin. The value of the output current is nominally equal to the magnitude of the
current through the IDIF REF pin.
(REF In put / 2 ) - 0. 3 V.
IDIF REF: Output of the IDIF sense buffer. Voltage on this
pin will track the applied voltage on the REF Input pin.
Current through this pin is full wave rectified and appears
as a current sourced from the IDIF OUT pin.
Inhibit : A high impe dance l ogic i nput that disabl es the A
and B power amplifiers, the IDIF sense buffer, and the
Current Sense amplifier. This input has an internal pull-up
that will inhibit the device if the input is left open.
O/C Force: Logic input that forces the O/C condition.
O/C IND: Open collector ouput that indicates, with an ac-
tive low state, an O/C condition.
O/C Sense: Input to the Over Current Comparator. When
this input is above its 1V threshold the low-side devices of
both the A & B power amplifiers will be disabled forcing a
high, source only , state at both outputs.
PWR GND: Current return for all high level circuitry, this
pin should be connected to the same potential as GND.
Range: When this pin is open or at a logic low potential,
the current sense ampli fier will be in its low range mode.
In this mode the vo ltage gain o f the amplifier will be 2. If
this pin is brough t to a logic high, the gain of the current
sense amplifier will change into its high range value of
0.5. This factor of four change in gain will vary the overall
transconductance of the power amplifier by the same ratio, with the transconductance being the highest in the
high mode. This feature al lows improved dynamic range
of load curren t control for a give n con trol input range and
resolution.
REF Input: Sets the Reference level at the C/S Output,
and is normally tied to the system reference level for inputs to the power amplifier.
V
IN(+): Provides bias supply to the device. The High-Side
drive to the power stages on both the A and B amplifiers
is referenced to this pin. The High-side saturation voltages, and UVLO are specified and measured with respect
to this supply pin.
V
C(+): Thi s supply pin is the high current supply to the
collectors o f the high-side NPN output devices on the A
and B ampl ifiers. This supply should be powered whenever the A or B amplifiers are to be activated. This pin can
operate approximately 400mV below the V
IN(+) supply
without affecting the voltage available to the load.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
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Copyright 1999, Texas Instruments Incorporated
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