Datasheet U6081B Datasheet (TEMIC)

Page 1
U6081B
PWM Power Control with Low Duty Cycle Switch Off
Description
U6081B is a PWM IC in bipolar technology for the control of an N-channel power MOSFET used as a high side switch. The IC is ideal for the use in the brightness
Features
D
Pulse width modulation up to 2 kHz clock frequency
D
Protection against short circuit, load dump overvol­tage and reverse V
D
Duty cycle 0 to 100%
D
Output stage for power MOSFET
S
Ordering Information
Extended Type Number Package Remarks
U6081B DIP8
control (dimming) of lamps e.g., in dashboard applications.
D
Interference and damage protection according to VDE 0839 and ISO/TR 7637/1.
D
Ground wire breakage protection
D
Charge pump noise suppressed
Block Diagram
C
1
47 k
C
2
V
C
V
S
1
Current monitoring
+ short circuit detection
RC oscillator
4
W
Control input
3
Duty cycle
range
0/13 to 100 %
2
150
R
W
PWM Logic
Voltage
monitoring
3
5
5
6
Charge
pump
Output
7
8
95 9752
R
Batt
sh
C
3
47 nF
Ground
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
Figure 1. Block diagram with external circuit
1 (8)
Page 2
U6081B
Pin Description
Batt
8
7
6
5
Output
2 V
Sense
Delay
Batt
Batt
S
< 18.5 V
< 23 V.
V
1
S
GND
V
Osc
2
I
3
4
95 9944
Functional Description
Pin 1, Supply Voltage, Vs or V
Overvoltage Detection
Stage 1: If V switched off and switched on again at V (hysteresis).
Stage 2: If V (load-dump protection). At the same time the voltage li­mitation of the IC is reduced from V This leads to a hysteresis characteristic so that the load­dump detection is switched off again only at V In this case the short–circuit protection is not in operation.
Undervoltage Detection
> 20 V occurs the external transistor will be
Batt
> 28 V, the external transistor is switched on again
Batt
26 V to VS 20 V.
S
Pin Symbol Function
1 V
Supply voltage V
S
S
2 GND IC ground 3 V
Control input (duty cycle)
I
4 Osc Oscillator 5 Delay Short circuit protection delay 6 Sense Current sensing 7 2 V
Voltage doubler
S
8 Output Output
(see figure 2). Pin 3 is protected against short-circuit
R
2
to V
and ground GND (V
Batt
Batt
x
16.5 V).
Output Slope Control
The rise and fall time (t
, tf) of the lamp voltage can be
r
limited to reduce radio interference. This is done with an integrator which controls a power MOSFET as source follower. The slope time is controlled by an external capacitor C4 and the oscillator current (see figure 2).
Calculation:
C
+
t
f
With V
tr+
V
Batt
= 12 V, C4 = 470 pF and I
Batt
4
I
osc
= 40 mA, we thus
osc
obtain a controlled slope of
+
tr+
t
f
12 V
470 pF
40mA
+
141ms
In the event of voltages of approximately V
Batt
< 5.0 V, the external FET is switched off and the latch for short­circuit detection is reset.
A hysteresis ensures that the FET is switched on again at approximately V
5.4 V.
Batt
Pin 2, GND
Ground-Wire Breakage
To protect the FET in the case of ground-wire breakage, a 820-kW resistor between gate and source is recom­mended to provide proper switch-off conditions.
Pin 3, Control Input
The pulse width is controlled by means of an external potentiometer (47 kW). The characteristic (angle of rotation/duty cycle) is linear. The duty cycle can be varied from 0 to 100%. To avoid inadmissibly high filament cold currents, the dimmer is switched off at duty cycles of approximately < 10% or is switched on only at duty cycles of approximately > 13% (hysteresis). It is possible to further restrict the duty cycle with the resistors R
2 (8)
and
1
A 100-W resistor in series to C4 is recomended to damp device oscillations (see figure 2).
Pin 4, Oscillator
The oscillator determines the frequency of the output
. It is
2
a
1
a
2
a
3
voltage. This is defined by an external capacitor, C charged with a constant current, I, until the upper switching threshold is reached. A second current source is then activated which taps a double current, 2 I, from the charging current. The capacitor, C
, is thus discharged
2
by the current, I, until the lower switching threshold is reached. The second source is then switched off again and the procedure starts again.
Example for oscillator frequency calculation:
IS
)
R
3
)
R
3
)
R
3
V
T100
V
T¦100
VTL+
+
+
VS
VS
VS
a1+(V
a2+(V
a3+(V
Batt
Batt
Batt
*
*
IS
*
IS
where
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
Page 3
+
V
V
VTL+
a1,
High switching threshold (100% duty cycle)
T100
+
Tt100
High switching threshold(t100% duty cycle)
Low switching threshold
a2 and
a3 are fixed constant.
The above mentioned threshold voltages are calculated for the following values given in the data sheet.
= 12 V, IS = 4 mA, R3 = 150 W ,
V
Batt
= 0.7,
a
1
V
V
VTL+
a2 = 0.67 and
+(12 V*4mA 150
T100
+
Tt100
11.4 V 0.67+7.6 V
11.4 V 0.28+3.2 V
a3 = 0.28.
W)
0.7[8V
For a duty cycle of 100%, an oscillator frequency, f, is as follows:
U6081B
Pins 5 and 6, Short-Circuit Protection and Current Sensing
1. Short-Circuit Detection and Time Delay, t
The lamp current is monitored by means of an external shunt resistor. If the lamp current exceeds the threshold for the short-circuit detection circuit (V
T2
duty cycle is switched over to 100% and the capacitor C is charged by a current source of 20 m A (Ich – I external FET is switched off after the cut-off threshold
) is reached. Renewed switching on the FET is
(V
T5
possible only after a power-on reset. The current source,
ensures that the capacitor C5 is not charged by
I
dis,
parasitic currents. The capacitor C
is discharged by I
5
to typ. 0.7 V. Time delay, t t
+
C5@(VT5*
d
, is as follows:
d
0.7 V)ń(Ich*
)
I
dis
With C5 = 330 nF and VT5 = 9.8 V, (Ich – I we have
t
+
d
+
150 ms.
330 nF
@(9.8 V*0.7 V)ń20m
A
d
90 mV), the
). The
dis
dis
) = 20 mA,
dis
5
I
f
+
2
(V
T100
*
osc
)
V
TL
,whereasC2+
C
2
and I
+40m
osc
22 nF
A
Therefore:
f
+
2
(8V*3.2 V)
40mA
22 nF
+
189 Hz
For a duty cycle of less than 100%, the oscillator frequency , f, is as follows:
I
f
+
2
(V
Tt100
*
osc
)
V
C
TL
)4
2
V
C
Batt
4
whereas C4 = 470 pF
40
m
f
+
2
(7.6 V*3.2 V)
+
185 Hz
A
22 nF)4 12 V 470 pF
A selection of different values of C2 and C4, provides a range of oscillator frequency, f, from 10 to 2000 Hz.
2. Current Limitation
The lamp current is limited by a control amplifier to pro­tect the external power transistor. The voltage drop across an external shunt resistor acts as the measured variable. Current limitation takes place for a voltage drop of
[100 mV. Owing to the difference
V
T1
V
T1–VT2
10 mV it is ensured that current limitation
[
occurs only when the short circuit detection circuit has responded.
After a power-on reset, the output is inactive for an half oscillator cycle. During this time, the supply voltage capacitor can be charged so that the current limitation is guaranteed in the event of a short circuit when the IC is switched on for the first time.
Pins 7 and 8, Charge Pump and Output
Output, Pin 8, is suitable for controlling a power MOSFET . During the active integration phase, the supply current of the operational amplifier is mainly supplied by the capacitor C charge is generated by an integrated oscillator
400 kHz) and a voltage doubler circuit. This
(f
7
permits a gate voltage supply at a duty cycle of 100%.
(bootstrapping). Additionally, a trickle
3
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
3 (8)
Page 4
U6081B
T2 S 6
g
Absolute Maximum Ratings
Parameters Symbol Value Unit Junction temperature T Ambient temperature range T Storage temperature range T
j
amb
stg
Thermal Resistance
Parameters Symbol Maximum Unit Junction ambient R
thJA
Electrical Characteristics
T
= –40 to +110°C, V
amb
ground, unless otherwise specified (see figure 1). All other values refer to Pin GND (Pin 2).
Parameters Test Conditions / Pins Symbol Min Typ Max Unit Current consumption Pin 1 I Supply voltage Overvoltage detection,
Stabilized voltage IS = 10 mA Pin 1 V Battery undervoltage
detection Battery overvoltage detection Pin 2 Stage 1: – on
Stage 2: – on
Stabilized voltage IS = 30 mA Pin 1 V Short-circuit protection Pin 6 Short-circuit current
limitation Short-circuit detection VT2 = VS – V
Delay timer short-circuit detection, V Switched off threshold VT5 = VS – V Charge current I Discharge current I Capacitance current I5 = Ich – I
Voltage doubler Pin 7
Voltage Duty cycle 100% V Oscillator frequency f Internal voltage limitation I7 = 5 mA V
= 9 to 16.5 V, (basic function is guaranteed between 6.0 V to 9.0 V) reference point is
Batt
S
V
Batt
stage 1
24.5 27.0 V
4.4
4.8
18.3
16.7
25.5
19.5
18.5 20.0 21.5 V
85 100 120 mV
75 90 105 mV
T2
3 10 30 mV
9.5 9.8 10.1 V
13 20 27 mA
2 V
S
280 400 520 kHz
26 27.5 30.0 V
V
S+14
ON
V
OFF
V
– off
V
– off
VT1 = VS – V
6
6
V
V
VT1 – V
= 12 V Pin 5
Batt
5
dis
V
(whichever is lower) V
Batt
Batt
Batt
T1
T2
T5
ch
dis
I
5
7
Z
Z
7
7 7
150 °C –40 to +110 °C –55 to +125 °C
120 K/W
5.0
5.4
20.0
18.5
28.5
23.0
23
3
V
S+15
6.8 mA 25 V
5.6
6.0
21.7
20.3
32.5
26.5
V
S+16
V
V
V
m
A
m
A
V
4 (8)
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
Page 5
U6081B
g
8
8
Upper
Parameters Test Conditions / Pins Symbol Min Typ Max Unit
Switch-off at small duty cycles V Output disabled V3/V Output active V3/V Hysteresis switch-on Gate output Pin 8 Voltage Low level V
V T
High level, duty cycle 100%
Current V8 = Low level I
V8 = High level, I7 > | I8 |
Oscillator
Frequency Pin4 f 10 2000 Hz Threshold cycle
V8+
V8+
Lower
a3+
Oscillator current V Frequency tolerance C4 open, C2 = 470 nF,
duty cycle = 50%
= 12 V Pin 3
Batt
= 16.5 V,
Batt
= 110°C, R3 = 150
amb
High,
a1+
Low,
a2+
V
TL
V
S
= 12 V
Batt
V
V
T100
V
S
Tt100
V
S
0.3 0.32 0.34
0.32 0.34 0.36
0.004 0.032
0.35 0.70 0.95 V
D
V3/V
8
S S
S
1.5 *)
W
V
8
8
1.0 mA
V
7
–1.0
a
1
a
2
a
3
I
osc
0.68 0.7 0.72
0.65 0.67 0.69
0.26 0.28 0.3
34 45 54
m
f 6.0 9.9 13.5 Hz
A
*) Reference point is battery ground
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
5 (8)
Page 6
U6081B
Package Information
Package DIP8
Dimensions in mm
9.8
9.5
1.64
1.44
4.8 max
0.5 min
0.58
0.48
85
14
2.54
7.62
3.3
technical drawings according to DIN specifications
7.77
7.47
6.4 max
0.36 max
9.8
8.2
13021
6 (8)
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
Page 7
Application
U6081B
Batt
V
330 nF
47 nF
sh
R
4
C
470 pF
6
90 mV
S
V
S
V
1
S
V
5
+
ch
I
10 mV
Current limiting
V
+
S
doubler
Voltage
dis
I
3
C
W
820 k
7
Overvoltage
8
stage 2
monitoring
+
2
Load
L
R
3
R
W
150
Ground
5
C
W
100
S
V
S
V
S
V
+
Reset
+
+
I
Oscillator
4
1
C
+
R
m
47 F
1
Reset
2
C
delay
Switch – on
2 I
W
47 k
22 nF
Reset
Duty factor = 10%
+
W
30 k
3
stage 1
monitoring
Overvoltage
S
V
2
R
monitoring
Low voltage
S
V
95 9759
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
Figure 2.
7 (8)
Page 8
U6081B
Ozone Depleting Substances Policy Statement
It is the policy of TEMIC TELEFUNKEN microelectronic GmbH to
1. Meet all present and future national and international statutory requirements.
2. Regularly and continuously improve the performance of our products, processes, distribution and operating systems with respect to their impact on the health and safety of our employees and the public, as well as their impact on the environment.
It is particular concern to control or eliminate releases of those substances into the atmosphere which are known as ozone depleting substances (ODSs).
The Montreal Protocol ( 1987) and its London Amendments (1990 ) intend to severely restrict the use of ODSs and forbid their use within the next ten years. Various national and international initiatives are pressing for an earlier ban on these substances.
TEMIC TELEFUNKEN microelectronic GmbH semiconductor division has been able to use its policy of continuous improvements to eliminate the use of ODSs listed in the following documents.
1. Annex A, B and list of transitional substances of the Montreal Protocol and the London Amendments respectively
2. Class I and II ozone depleting substances in the Clean Air Act Amendments of 1990 by the Environmental Protection Agency (EPA) in the USA
3. Council Decision 88/540/EEC and 91/690/EEC Annex A, B and C (transitional substances) respectively.
TEMIC can certify that our semiconductors are not manufactured with ozone depleting substances and do not contain such substances.
We reserve the right to make changes to improve technical design and may do so without further notice.
Parameters can vary in different applications. All operating parameters must be validated for each customer
application by the customer. Should the buyer use TEMIC products for any unintended or unauthorized
application, the buyer shall indemnify TEMIC against all claims, costs, damages, and expenses, arising out of,
directly or indirectly, any claim of personal damage, injury or death associated with such unintended or
unauthorized use.
8 (8)
TEMIC TELEFUNKEN microelectronic GmbH, P.O.B. 3535, D-74025 Heilbronn, Germany
Telephone: 49 (0)7131 67 2831, Fax number: 49 (0)7131 67 2423
TELEFUNKEN Semiconductors
Rev . A1, 14-Feb-97
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