U5545NL-0.5 to -4.5-501.5-505
SST/U5546NL-0.5 to -4.5-501.5-5010
SST/U5547NL-0.5 to -4.5-501.5-5015
FEATURESBENEFITSAPPLICATIONS
D Anti Latchup Capability
D Monolithic Design
D High Slew Rate
D Low Offset/Drift Voltage
D Low Gate Leakage: 3 pA
D Low Noise
D High CMRR: 100 dB
GS(off)
(V)V
(BR)GSS
Min (V)gfs Min (mS)IG Max (pA)jV
D External Substrate Bias—Avoids Latchup
D Tight Differential Match vs. Current
D Improved Op Amp Speed, Settling Time
Accuracy
D Minimum Input Error/Trimming Requirement
D Insignificant Signal Loss/Error Voltage
D High System Sensitivity
D Minimum Error with Large Input Signal
GS1
- V
j Max (mV)
GS2
D Wideband Differential Amps
D High-Speed, Temp-Compensated,
Single-Ended Input Amps
D High-Speed Comparators
D Impedance Converters
DESCRIPTION
The SST/U5545NL Series are monolithic dual n-channel
JFETs designed to provide high input impedance (I
for general purpose differential amplifiers. The U5545NL
features minimum system error and calibration (5-mV offset
maximum).
Pins 4 and 8 on the SST series and pin 4 on the U series part
numbers enable the substrate to be connected to a positive,
external bias (VDD) to avoid latchup.
Narrow Body SOIC
S
1
1
D
2
1
G
3
1
SUBSTRATES
4
Top View
Marking Codes:
SST5546NL - (5546NL)
SST5547NL - (5547NL)
8
7
6
5
SUBSTRATE
G
2
D
2
2
< 50 pA)
G
The SST5546NL/47NL in the SO-8 package provide ease of
manufacturing. The symmetrical pinout prevents improper
orientation. These part number are available with
tape-and-reel options for compatibility with automatic
assembly methods.
The hermetically sealed TO-78 package is available with full
military processing.
Gate-Source Voltage
Differential Change
with Temperature
Saturation Drain
Current Ratio
Transconductance Ratio
c
c
V
V
V
GS1
|
D
V
GS1–VGS2
(BR)GSS
GS(off)
I
DSS
GSS
G
V
GS(F)
g
fs
g
os
C
iss
C
rss
e
n
* V
DT
I
DSS1
I
DSS2
g
fs1
g
fs2
GS2
IG = -1 mA, VDS = 0 V
VDS = 15 V, ID = 0.5 nA-2-0.5-4.5-0.5-4.5-0.5-4.5
VDS = 15 V, VGS = 0 V30.580.580.58mA
VGS = -30 V, VDS = 0 V-10-100-100-100pA
TA = 150_C
VDG = 15 V, ID = 200 mA
IG = 1 mA , VDS = 0 V0.7V
VDS = 15 V, VGS = 0 V
f = 1 kHz
VDS = 15 V, VGS = 0 V
f = 1 MHz
VDS = 15 V, ID = 200 mA
f = 10 Hz
RG = 1 MW
VDG = 15 V, ID = 50 mA
VDG = 15 V, ID = 200 mA
|
VDG = 15 V, ID = 200 mA
T
= -55 to 125_C
A
VDS = 15 V, VGS = 0 V0.98c0.9510.910.91
VDS = 15 V, ID = 200 mA
f = 1 kHz
-57-50-50-50
-20-150-150-150nA
-3-50-50-50pA
2.51.56.01.56.01.56.0mS
2252525
3.5666
1.3222
20180
0.13.5dB
0.99c0.9710.9510.91
Limits
U5545NLSST/U5546NL SST/U5547NL
51015
51015
102040
V
mS
pF
nV⁄
√Hz
mV
mV/
_C
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.NQP
b. Pulse test: PW v300 ms duty cycle v3%.
c. Assumes smaller value in the numerator.