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TSL202R
Datasheet (TAOS)
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Datasheet TSL202R Datasheet (TAOS)

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Page 1
TSL202R
128 1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
128 × 1 Sensor-Element Organization
(TOP VIEW)
200 Dots-Per-Inch (DPI) Sensor Pitch High Linearity and Uniformity Wide Dynamic Range...2000:1 (66 dB) Output Referenced to Ground Low Image Lag . . . 0.5% Typ Operation to 5 MHz
VDD 1
SI1 2
CLK 3
AO1 4
GND 5
14 NC 13 SO1 12 GND 11 NC 10 SI2
Single 5-V Supply Replacement for TSL202
SO2 6
NC 7
NC – No internal connection
Description
The TSL202R linear sensor array consists of two sections of 64 photodiodes and associated charge amplifier circuitry arranged to form a contiguous 128 ×1 array. The pixels measure 120 µm (H) by 70 µm (W) with 125-µm center-to-center spacing and 55-µm spacing between pixels. Operation is simplified by internal control logic that requires only a serial-input (SI) signal and a clock.
The TSL202R is intended for use in a wide variety of applications including mark detection and code reading, optical character recognition (OCR) and contact imaging, edge detection and positioning as well as optical linear and rotary encoding.
9 NC 8 AO2
Functional Block Diagram (each section — pin numbers apply to section 1)
Pixel 1
Integrator
Reset
_ +
Sample/
Output
Switch Control Logic
3
CLK 64-Bit Shift Register
2
SI
Pixel
2
Pixel
3
Q3Q2Q1
Pixel
64
Q64
Analog
Bus
Output Amplifier
Gain Trim
1
V
AO
GND
DD
4
5
R
L
(External 330 Load)
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Texas Advanced Optoelectronic Solutions Inc.
800 Jupiter Road, Suite 205 Plano, TX 75074 (972) 673-0759
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TSL202R 128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
Terminal Functions
TERMINAL
NAME NO. DESCRIPTION
AO1 4 Analog output of section 1 AO2 8 Analog output of section 2 CLK 3 Clock. Clk controls charge transfer, pixel output, and reset. GND 5,12 Ground (substrate). All voltages are referenced to GND. NC 7, 9, 11, 14 No internal connection SI1 2 Serial input (section 1). SI1 defines the start of the data-out sequence. SI2 10 Serial input (section 2). SI2 defines the start of the data-out sequence. SO1 13 Serial output (section 1). SO1 provides a signal to drive the SI2 input.
SO2 6 V
DD
1 Supply voltage. Supply voltage for both analog and digital circuitry.
Detailed Description
Serial output (section 2). SO2 provides a signal to drive the SI input of another device for cascading or as an end-of-data indication.
The sensor consists of 128 photodiodes arranged in a linear array. Light energy impinging on a photodiode generates photocurrent, which is integrated by the active integration circuitry associated with that pixel. During the integration period, a sampling capacitor connects to the output of the integrator through an analog switch. The amount of charge accumulated at each pixel is directly proportional to the light intensity and the integration time. The integration time is the interval between two consecutive output periods.
The output and reset of the integrators is controlled by a 128-bit shift register and reset logic. An output cycle is initiated by clocking in a logic 1 on SI for one positive going clock edge (see Figures1 and 2)†. As the SI pulse is clocked through the 128-bit shift register, the charge on the sampling capacitor of each pixel is sequentially connected to a charge-coupled output amplifier that generates a voltage output, AO. When the bit position goes low, the pixel integrator is reset. On the 129th clock rising edge, the SI pulse is clocked out of the shift register and the output assumes a high-impedance state. Note that this 129th clock pulse is required to terminate the output of the 128th pixel and return the internal logic to a known state. A subsequent SI pulse can be presented as early as the 130th clock pulse, thereby initiating another pixel output cycle.
The voltage developed at analog output (AO) is given by:
V
= V
where:
out
V
out
V
drk
R E
e
t
int
is the analog output voltage for white condition is the analog output voltage for dark condition is the device responsivity for a given wavelength of light given in V/(µJ/cm2)
e
is the incident irradiance in µW/cm is integration time in seconds
+ (Re) (Ee) (t
drk
2
)
int
AO is driven by a source follower that requires an external pulldown resistor (330-Ω typical). The output is nominally 0 V for no light input, 2 V for normal white-level, and 3.4 V for saturation light level. When the device is not in the output phase, AO is in a high impedance state.
A 0.1 µF bypass capacitor should be connected between VDD and ground as close as possible to the device.
†
For proper operation, after meeting the minimum hold time condition, SI must go low before the next rising edge of the clock.
2
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TSL202R
128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
Absolute Maximum Ratings
†
Supply voltage range, VDD –0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI –0.3 V to VDD + 0.3V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, IIK (VI < 0 or VI > VDD) –20 mA to 20 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0 or VO > VDD) –25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high impedance or
power-off state, VO –0.3 V to VDD + 0.3V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous output current, I
(V
= 0 to VDD) –25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
O
Continuous current through VDD or GND –40 mA to 40 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Analog output current range, IO –25 mA to 25 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, TA –25°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
–25°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
ESD tolerance, human body model 2000 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
†
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions (see Figure 1 and Figure 2)
MIN NOM MAX UNIT
Supply voltage, V Input voltage, V High-level input voltage, V Low-level input voltage, V Wavelength of light source, λ 400 1000 nm Clock frequency, f Sensor integration time, serial, t Sensor integration time, parallel, t Operating free-air temperature, T
Load resistance, R Load capacitance, C
DD
I
IH
IL
clock
int
int
A
L
L
4.5 5 5.5 V 0 V 2 V 0 0.8 V
5 5000 kHz
0.026 100 ms
0.013 100 ms 0 70 °C
300 4700 Ω
DD DD
420 pF
V V
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TSL202R 128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
Electrical Characteristics at f
= 330 Ω, Ee = 16.5 µW/cm2 (unless otherwise noted)
R
L
= 1 MHz, VDD = 5 V, TA = 25°C, λp = 640 nm, t
clock
= 5 ms,
int
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V V
Analog output voltage (white, average over 128 pixels) See Note 1 1.6 2 2.4 V
out
Analog output voltage (dark, average over 128 pixels) 0 50 150 mV
drk
PRNU Pixel response nonuniformity See Notes 2 & 3 ±4% ±10%
Nonlinearity of analog output voltage See Note 3 ±0.4% FS Output noise voltage See Note 4 1 mVrms
R
Responsivity 18 23 30
e
(µJ/cm2) SE Saturation exposure See Note 5 142 nJ/cm V
Analog output saturation voltage 2.5 3.4 V
sat
DSNU Dark signal nonuniformity All pixels See Note 6 25 120 mV IL Image lag See Note 7 0.5% I
DD
I
IH
I
IL
V
V
C C
Supply current, output idle 5 8 mA High-level input current VI = V
DD
Low-level input current VI = 0 10 µA
High-level output voltage, SO1 and SO2
OH
Low-level output voltage, SO1 and SO2
OL
Input capacitance, SI 5 pF
i(SI)
Input capacitance, CLK 10 pF
i(CLK)
p
p
IO = 50 µA 4.5 4.95 IO = 4 mA 4.6 IO = 50 µA 0.01 0.1 IO = 4 mA 0.4
10 µA
NOTES: 1. The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm.
2. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the device under test when the array is uniformly illuminated at the white irradiance level. PRNU includes DSNU.
3. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent of analog output voltage (white).
4. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
5. Minimum saturation exposure is calculated using the minimum V
, the maximum V
sat
, and the maximum Re.
drk
6. DSNU is the difference between the maximum and minimum output voltage in the absence of illumination.
7. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after a pixel is exposed to a white condition followed by a dark condition:
IL
V
V
out (white)
out (IL)
V
V
drk
100
drk
V/
2
V
V
Timing Requirements (see Figure 1 and Figure 2)
t
su(SI)
t
h(SI)
t
w
tr, t
NOTES: 8. Input pulses have the following characteristics: tr = 6 ns, tf = 6 ns.
4
Setup time, serial input (see Note 8) 20 ns Hold time, serial input (see Note 8 and Note 9) 0 ns Pulse duration, clock high or low 50 ns Input transition (rise and fall) time 0 500 ns
f
9. SI must go low before the rising edge of the next clock pulse.
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MIN NOM MAX UNIT
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TSL202R
128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
Dynamic Characteristics over recommended ranges of supply voltage and operating free-air temperature (see Figure 2)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
s
t
pd(SO)
Analog output settling time to ±1% RL = 330 Ω, CL = 10 pF 185 ns Propagation delay time, SO1, SO2 50 ns
TYPICAL CHARACTERISTICS
CLK
SI
129 Clock Cycles
AO
CLK
t
su(SI)
SI1 (SI2)
SO1 (SO2)
Hi-Z
t
1 (65) 2 (66) 64 (128) 65 (129)
w
2.5 V
2.5 V 2.5 V
2.5 V
t
h(SI)
t
s
Figure 1. Timing Waveforms
t
pd(SO)
t
s
t
pd(SO)
Hi-Z
5 V
2.5 V 0 V
5 V
0 V
AO1 (A02)
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Pixel 1 (65)
Company
Pixel 64 (128)
Figure 2. Operational Waveforms (each section)
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TSL202R 128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
PHOTODIODE SPECTRAL RESPONSIVITY
1
TA = 25°C
0.8
0.6
TYPICAL CHARACTERISTICS
ANALOG OUTPUT SETTLING TIME
LOAD CAPACITANCE AND RESISTANCE
600
VDD = 5 V V
= 1 V
out
500
400
300
vs
470 pF
220 pF
100 pF
0.4
Normalized Responsivity
0.2
0
300 500 700 900
λ – Wavelength – nm
Figure 3
200
— Settling Time to 1% — ns
s
t
100
1100400 600 800 1000
0
0 400 800 1200
200 600 1000
RL – Load Resistance – Ω
10 pF
Figure 4
6
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128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
APPLICATION INFORMATION
Power Supply Considerations
For optimum device performance, power-supply lines should be decoupled by a 0.01-µF to 0.1-µF capacitor with short leads mounted close to the device package (see Figure 5 and Figure 6).
Connection Diagrams
V
DD
TSL202R
Si
CLK
AO1 (Pixels 1–64)
0.1 µF
0.1 µF
R
CLK
L
TSL202R
1
V
SI
2 3 4 5 6 7
DD
SI1 CLK AO1 GND SO2 V
DD
Figure 5. Serial Connection
V
DD
TSL202R
1
V
DD
2
SI1
3
CLK
4
AO1
5
GND
6
SO2
7
V
DD
NC
SO1
GND
NC SI2 NC
AO2
NC
SO1
GND
NC
SI2
NC
AO2
14 13 12 11 10 9 8
14 13 12 11 10 9 8
AO
R
L
AO2 (Pixels 65–128)
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Figure 6. Parallel Connection
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R
L
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TSL202R 128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
MECHANICAL INFORMATION
This assembly consists of 2 sensor chips mounted on a printed-circuit board in a clear molded plastic package.
TOP VIEW
Sensors
C
L
Sensors to Pin 1
Pixel 1 to Pin 1
SIDE VIEW
14 4.60 MIN
3.62
3.92
0.53
0.28
Pin 1 Indicator
14
19.30
18.29
0.508
0.406
10.67
9.65
Top of Die to
Top of Package
0.89
1.29
14
END VIEW
3.18
2.79
0.50
0.00
BOTTOM VIEW
1.90
0.76
1234567
7.87
7.37 14 13 12 11 10 9 8
2.16
2
1.42
12 2.54 Nonaccumulative See Note B
NOTES: A. All linear dimensions are in millimeters.
B. The true-position spacing is 2.54 mm between lead centerlines. Each pin centerline is located within 0.25 mm of its true
longitudinal positions. C. Index of refraction of clear plastic is 1.52. D. This drawing is subject to change without notice.
Figure 7. Packaging Configuration
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TSL202R
128  1 LINEAR SENSOR ARRAY
TAOS032B – AUGUST 2002
PRODUCTION DATA — information in this document is current at publication date. Products conform to specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard warranty. Production processing does not necessarily include testing of all parameters.
NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.
TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any and all liability, including without limitation consequential or incidental damages.
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY RESUL T I N PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.
LUMENOLOGY is a registered trademark, and TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are trademarks of Texas Advanced Optoelectronic Solutions Incorporated.
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