Datasheet TSA5059ATS, TSA5059AT Datasheet (Philips)

INTEGRATED CIRCUITS

DATA SH EET

TSA5059A

2.7 GHz I

2

C-bus controlled low

phase noise frequency synthesizer

Product specification
Supersedes data of 2000 Sep 19
File under Integrated Circuits, IC02

2000 Oct 24

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

FEATURES

• Complete 2.7 GHz single chip system

• Optimized for low phase noise

• Selectable divide-by-two prescaler

• Operationupto2.3 GHzwithoutdivide-by-twoprescaler

(satellite zero-IF applications) and up to 2.7 GHz with
divide-by-two prescaler

• Selectable reference divider ratio

• Selectable crystal or comparison frequency output

• Four selectable charge pump currents

• Four selectable I2C-bus addresses

• Standard and fast mode I2C-bus

• I2C-bus compatible with 3.3 and 5 V microcontrollers

• 5-level Analog-to-Digital Converter (ADC)

• Low power consumption

• Three I/O ports and one output port.

APPLICATIONS

• Satellite zero-IF and non-zero-IF tuning systems

• Digital set-top boxes.

GENERAL DESCRIPTION

The TSA5059A is a single chipPLL frequency synthesizer
designed for satellite tuning systems up to 2.7 GHz.

TheRF preamplifierdrivesthe17-bitmaindividerenabling
astep size equal tothe comparison frequency, foran input
frequency up to 2.3 GHz covering the complete satellite
zero-IF frequency range. A fixed divide-by-two additional
prescaler can be inserted between the preamplifier and
themaindividerforafrequency between 2.3 and 2.7 GHz.
In this case, the step size is twice the comparison
frequency.

TSA5059A

The comparison frequency is obtained from an on-chip
crystal oscillator that can also be driven from an external
source. Either the crystal frequency or the comparison
frequency can be switched to the XT/COMP output pin to
drive the reference input of another synthesizer or the
clock input of a digital demodulation IC.

Bothdividedandcomparisonfrequencyare compared into
the fast phase detector which drives the charge pump.
The loop amplifier is also on-chip, excepted an external
NPN transistor to drive directly the 33 V tuning voltage.

Controldataisenteredvia the I2C-bus;fiveserialbytesare
required to address the device, select the main divider
ratio, the reference divider ratio, program the four output
ports,set the charge pump current,select the prescaler by
two, select the signal to switch to the XT/COMP output pin
and select a specific test mode. Three of the four output
ports can also be used as input ports and a 5-level ADC is
provided. Digital information concerning the input ports
andtheADC can be read out oftheTSA5059Aon the SDA
line (one status byte) during a READ operation. A flag is
set when the loop is ‘in-lock’ and is read during a READ
operation, as well as the Power-on reset flag. The device
has four programmable addresses, programmed by
applying a specific voltage at pin AS, enabling the use of
multiple synthesizers in the same system.

ORDERING INFORMATION

TYPE

NUMBER

TSA5059AT SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
TSA5059ATS SSOP16 plastic shrink small outline package; 16 leads; body width 4.4 mm SOT369-1

2000 Oct 24 2

NAME DESCRIPTION VERSION

PACKAGE

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

QUICK REFERENCE DATA

VCC= 4.75 to 5.25 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

V

CC

I

CC

f

i(RF)

V

i(RF)(rms)

f

xtal

T

amb

T

stg

supply voltage 4.75 5.0 5.25 V
supply current T
RF input frequency note 1 900 − 2700 MHz
RF input voltage (RMS value) f

crystal frequency 4 − 16 MHz
ambient temperature −20 − +85 °C
storage temperature −40 − +150 °C

Notes

1. Bit PE needs to be set to logic 1 for a frequency higher than 2.3 GHz.

2. Asymmetrical drive on pin RFA or RFB; see Fig.3.

= −20 to +85 °C; unless otherwise specified.

amb

=25°C 303745mA

amb

from 900 to 2200 MHz;

i(RF)

note 2

from 2.2 to 2.7 GHz;

f

i(RF)

note 2

7.1 − 300 mV

−30 − +2.5 dBm

22.4 − 300 mV

−20 − +2.5 dBm

2000 Oct 24 3

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

BLOCK DIAGRAM

handbook, full pagewidth

XTAL

RFA

RFB

2

13
14

OSCILLATOR

PRE
AMP

XTAL

DIVIDER

1/2

REFERENCE

DIVIDER

4-BIT LATCH

DIVIDER

17-BIT

LOCK

DETECT

DIGITAL PHASE

COMPARATOR

CHARGE PUMP

TSA5059A

3

XT/COMP

AS

SCL

SDA

ADC

4
6
5

11

TRANSCEIVER

3-BIT

ADC

POWER-ON

RESET

LATCH

I2C-BUS

1-BIT

3-BIT

INPUT

PORTS

17-BIT LATCH
DIVIDE RATIO

4-BIT LATCH

AND

OUTPUT PORTS

P3 P2 P1 P0

1

2-BIT

LATCH

AMP

MODE

CONTROL

LOGIC

CP

16

DRIVE

12

V

CC

15

GND

TSA5059A

10987

FCE711

Fig.1 Block diagram.

2000 Oct 24 4

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

PINNING

SYMBOL PIN DESCRIPTION

CP 1 charge pump output
XTAL 2 crystal oscillator input
XT/COMP 3 f
AS 4 I
SDA 5 I
SCL 6 I
P3 7 general purpose output Port 3
P2 8 general purpose input/output Port 2
P1 9 general purpose input/output Port 1
P0 10 general purpose input/output Port 0
ADC 11 analog-to-digital converter input
V

CC

12 supply voltage
RFA 13 RF signal input A
RFB 14 RF signal input B
GND 15 ground supply
DRIVE 16 external NPN drive output

or f

xtal
2

C-bus address selection input

2

C-bus serial data input/output

2

C-bus serial clock input

signal output

comp

handbook, halfpage

XT/COMP

CP

1

XTAL

2
3

AS

4

P3
P2

TSA5059A

5
6
7
8

FCE713

SDA

SCL

Fig.2 Pin configuration.

TSA5059A

16

DRIVE

15

GND

14

RFB

13

RFA
V

12

CC

ADC

11
10

P0
P1

9

FUNCTIONAL DESCRIPTION

The TSA5059A contains all the necessary elements but a
reference source, a loop filter and an external NPN
transistor to control avaricap tuned localoscillator forming
aphaselockedloopfrequencysynthesizedsource.The IC
is designed in a high speed process with a fast phase
detector to allow a high comparison frequency to reach a
low phase noise level on the oscillator.

The block diagram is shown in Fig.1. The RF signal is
applied at pins RFA and RFB. Thanks to the input
preamplifier a good sensitivity is provided. The output of
the preamplifier is fed to the 17-bit programmable divider
either through a divide-by-two prescaler or directly.
Becauseoftheinternal high speed process, the RF divider
is working for a frequency up to 2.3 GHz, without the need
for the divide-by-two prescaler to be used. This prescaler
is needed for frequencies above 2.3 GHz.

The output of the 17-bit programmable divider f

DIV

is fed
into the phase comparator, where it is compared in both
phaseandfrequency with the comparison frequency f

comp

This frequency is derived from the signal present at
pin XTAL, f

, divided down in the reference divider. It is

xtal

possible either to connecta quartz crystalto pin XTAL and
then using the on-chip crystal oscillator, or to feed this pin
with a reference signal from an external source.
The reference divider can have a dividing ratio selected
from 16 different values between 2 and 320 (see Table 8).

The output of the phase comparator drives the
charge pump and the loop amplifier section. This amplifier
requires the use of an external NPN transistor. Pin CP is
the output of thecharge pump, and pin DRIVEis the pin to
connect the base of the external transistor. This transistor
hasits emitter grounded and thecollectordrives the tuning
voltage to the varicap diode of the Voltage Controlled
Oscillator (VCO). The loop filter has to be connected
between pin CP and the collector of the external NPN
transistor.

In addition, it is possible to drive another PLL synthesizer,
or the clock input of a digital demodulation IC, from
pin XT/COMP. It is possible to select by software either
f

, the crystal oscillator frequency or f

xtal

, the frequency

comp

present after the reference divider at this pin. It is also
possible to switch off this output, in case it is not used.

For test and alignment purposes, it is possible to release
the drive output to be able to apply an external voltage on
it, to select one of the three charge pump test modes, and
to monitor half the f

.

possible modes.

at Port P0. See Table 10 for all

DIV

Four open-collector output portsare provided on the IC for
general purpose; three of these can also be used as input
ports. A 3-bit ADC is also available.

The TSA5059A is controlled via the two-wire I2C-bus.
For programming, there is one 7-bit module address and
bit R/W for selecting READ or WRITE mode.

2000 Oct 24 5

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

To be able to have more than one synthesizer in an
I2C-bussystem,oneoffourpossible addresses is selected
depending on the voltage applied at pin AS (see Table 3).

The TSA5059A fulfils the fast mode I2C-bus, according to
the Philips I2C-bus specification. The I2C-bus interface is
designed in such a way that pins SCL and SDA can be
connected either to 5 or 3.3 V pulled-up I2C-bus lines,
allowing the PLL synthesizer to be connected directly to
the bus lines of a 3.3 V microcontroller.

WRITE mode: R/W=0

After the address transmission (first byte), data bytes can
be sent to the device (see Table 1). Four data bytes are
needed to fully program the TSA5059A. The bus
transceiver has an auto-increment facility that permits
programming of the TSA5059A within one single
transmission (address + 4 data bytes).

The TSA5059A can also be partly programmed on the
condition that the first data byte following the address is
byte 2 or 4. The meaning of the bits in the data bytes is
given in Table 1. The first bit of the first data byte
transmitted indicates whether byte 2 (first bit is logic 0) or
byte 4 (first bit is logic 1)will follow. Until an I2C-bus STOP
condition is sent by the controller, additional data bytes
can be entered without the need to re-address the device.

TSA5059A

To allow a smooth frequency sweep for fine tuning, and
while the data of the dividing ratio of the main divider is in
data bytes 2, 3 and 4, it is necessary for changing the
frequency to send the data bytes 2 to 5 in a repeated
sending, or to finish an incomplete transmission by a
STOP condition. Repeated sending of data bytes 2 and 3
without ending the transmission does not change the
dividing ratio. To illustrate, the following data sequences
will change the dividing ratio:

• Bytes 2, 3, 4 and 5

• Bytes 4, 5, 2 and 3

• Bytes 2, 3, 4 and STOP

• Bytes 4, 5, 2 and STOP

• Bytes 2, 3 and STOP

• Bytes 2 and STOP

• Bytes 4 and STOP.

Table 1 Write data format

BYTE DESCRIPTION MSB LSB CONTROL BIT

1 address 11000MA1MA00 A
2 programmable divider 0 N14 N13 N12 N11 N10 N9 N8 A
3 programmable divider N7 N6 N5 N4 N3 N2 N1 N0 A
4 control data 1 N16 N15 PE R3 R2 R1 R0 A
5 control data C1 C0 XCE XCS P3 P2/T2 P1/T1 P0/T0 A

2000 Oct 24 6

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

Table 2 Explanation of Table 1

BIT DESCRIPTION

MA1 and MA0 programmable address bits; see Table 3
A acknowledge bit
N16 to N0 programmable main divider ratio control bits; N = N16 × 216+ N15 × 215+...+N1×21+N0
PE prescaler enable (prescaler by 2 is active when bit PE = 1)
R3 to R0 programmable reference divider ratio control bits; see Table 8
C1 and C0 charge pump current select bits; see Table 9
XCE XT/COMP enable; XT/COMP output active when bit XCE = 1; see Table 10
XCS XT/COMP select; signal select when bit XCE = 1; test mode enable when bit XCE = 0; see Table 10
T2, T1 and T0 test mode select when bit XCE = 0 and bit XCS = 1; see Table 10
P3, P2 and P1 Port P3, P2 and P1 output states
P0 Port P0 output state, except in test mode; see Table 10

Address selection

The module address contains programmable address bits (MA1 and MA0), which offer the possibility of having
up to 4 synthesizers in one system. The relationship between MA1 and MA0 and the input voltage at pin AS is given in
Table 3.

Table 3 Address selection

MA1 MA0 VOLTAGE APPLIED TO PIN AS

0 0 0 to 0.1V

CC

0 1 open-circuit
1 0 0.4V
1 1 0.9V

to 0.6VCC; note 1

CC

to V

CC

CC

Note

1. This address is selected by connecting a 15 kΩ resistor between pin AS and pin V

CC

.

Status at Power-On Reset (POR)

At power-on or whenthe supply voltage drops below approximately 2.75 V internalregisters are set according to Table 4.

Table 4 Status at Power-on reset; note 1

BYTE DESCRIPTION MSB LSB

CONTROL

BIT

1 address 11000MA1MA00 A
2 programmable divider 0 XXXXXXX A
3 programmable divider XXXXXXXX A
4 control data 1 XXXXXXX A
5 control data 0001X

(2)

(2)

1

(2)

X

(2)

X

A

Notes

1. X = don’t care.

2. At Power-on reset, all output ports are in high-impedance state.

2000 Oct 24 7

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

READ mode: R/W=1

Data can be read out of the TSA5059A by setting bit R/W
to logic 1 (see Table 5). After the slave address has been
recognized, the TSA5059A generates an acknowledge
and the first data byte (status word) is transferred on the
SDA line. Data is valid on the SDA line during a
HIGH-level of the SCL clock signal.

Asecond data byte canbe read out of theTSA5059A if the
controller generates an acknowledge on the SDA line.
End of transmission will occur if no acknowledge from the
controller occurs. The TSA5059A will then release the
data line to allow the controller to generate a STOP
condition. When ports P0 to P2 are used as inputs, they
must be programmed in their high-impedance state.

The POR flag is set to logic 1 when VCC drops below
approximately 2.75 V and at power-on.

Table 5 Read data format

BYTE DESCRIPTION MSB

(1)

1 address 1 1 0 0 0 MA1 MA0 1 A
2 status byte POR FL I2 I1 I0 A2 A1 A0 −

It is reset to logic 0 when an end of data is detected by the
TSA5059A (end of a READ sequence).

Control of the loop is made possible with the in-lock flag
which indicates when the loop is phase-locked(bit FL = 1).

The bits I2, I1 and I0 represent the status of the I/O ports
P2, P1 and P0 respectively. A logic 0 indicates a
LOW-level and a logic 1 indicates a HIGH-level.

A built-in 5-level ADC is available at pin ADC. This
converter can be used to feed AFC information to the
microcontroller through the I2C-bus. The relationship
between bits A2, A1, A0 and the input voltage at pin ADC
is given in Table 7.

LSB CONTROL BIT

TSA5059A

Note

1. MSB is transmitted first.

Table 6 Explanation of Table 5

BIT DESCRIPTION

A acknowledge bit
MA1 and MA0 programmable address bits; see Table 3
POR Power-on reset flag (bit POR = 1 at power-on)
FL in-lock flag (bit FL = 1 when the loop is phase-locked)
I2, I1 and I0 digital information for I/O ports P2, P1 and P0 respectively
A2, A1 and A0 digital outputs of the 5-level ADC; see Table 7

Table 7 ADC levels

A2 A1 A0 VOLTAGE APPLIED TO PIN ADC

1 0 0 0.6VCCto V
0 1 1 0.45VCCto 0.6V
0 1 0 0.3VCCto 0.45V
0 0 1 0.15VCCto 0.3V
0 0 0 0 to 0.15V

CC

CC
CC
CC

CC

Note

1. Accuracy is ±0.03V

CC

.

(1)

2000 Oct 24 8

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

Reference divider ratio

The reference divider ratio is set by 4 bits in the WRITE
mode, giving 16 different ratios which allow to adjust the
comparison frequency to different values, depending on
the compromise which has to be found between step size
and phase noise.

Table 8 Reference dividing ratios

R3 R2 R1 R0 RATIO

000022MHz 2MHz 4MHz
000141MHz 1MHz 2MHz
00108500kHz 500kHz 1MHz
001116250kHz 250kHz 500kHz
010032125kHz 125kHz 250kHz

01016462.5 kHz 62.5 kHz 125 kHz

011012831.25 kHz 31.25 kHz 62.5 kHz

011125615.625 kHz 15.625 kHz 31.25 kHz

100024166.67 kHz 166.67 kHz 333.33 kHz
10015800kHz 800kHz 1.6MHz
101010400kHz 400kHz 800kHz
101120200kHz 200kHz 400kHz
110040100kHz 100kHz 200kHz
11018050kHz 50kHz 100kHz
111016025kHz 25kHz 50kHz

111132012.5 kHz 12.5 kHz 25 kHz

COMPARISON

FREQUENCY

Table 8 shows the different dividing ratios and the
corresponding comparison frequencies and step size,
assuming the device is provided with a 4 MHz signal at
pin XTAL.

STEP

(1)

BIT PE = 0

(1)

BIT PE = 1

(1)

Note

1. Only valid when the IC is used with a 4 MHz crystal.

Charge pump current

The charge pump current can be chosen from 4 different values depending onthe value of bits C1 and C0 inthe I2C-bus
byte 4 according to Table 9.

Table 9 Charge pump current

I

(µA) (absolute value)

C1 C0

MIN. TYP. MAX.

0 0 100 135 170
0 1 210 280 350
1 0 450 600 750
1 1 920 1230 1540

2000 Oct 24 9

cp

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

XT/COMP frequency output

It is possible to output either the crystal or the comparison
frequency at pin XT/COMP to be used in the application.
For example, to drive a second PLL synthesizer saving a
quartz crystal. To output f
to logic 1 and bit XCS to logic 0 or bit XCE to logic 0 and
bit XCS to logic 1 during a test mode, while to output f
it is necessary to set both bits XCE and XCS to logic 1.

Iftheoutputsignal at this pin is not used it isrecommended
to disable it by setting both bits XCE and XCS to logic 0.
Table 10 shows how this pin is programmed. At power-on
the XT/COMP output is set with the f

Prescaler enable

The TSA5059A is able to work with the relation
f

= step size for an input frequency up to 2.3 GHz,

comp

covering the complete satellite zero-IF frequency range.

Table 10 XT/COMP and test mode selection; note 1

it is necessary to set bit XCE

xtal

signal selected.

xtal

comp

TSA5059A

For applications with an input frequency higher than

2.3 GHz it is necessary to use the prescaler by 2.
The prescaler is selected by setting bit PE to logic 1 and

it is not in use if bit PE is set to logic 0.
For satellite zero-IF applications (frequency between

950 and 2150 MHz), and especially if it is important to
reach a low phase noise on the controlled VCO, it is
recommended to set bit PE to logic 0 and not to use the
prescaler allowing the comparison frequency to be equal
to the step size.

Test modes

It is possible to access the test modes by setting bit XCE
to logic 0 and bit XCS to logic 1. One specific test mode is
then selected using bits T2, T1 and T0 as described in
Table 10.

XCE XCS T2 T1 T0 XT/COMP OUTPUT TEST MODE

0 0 X X X disabled normal operation
10XXXf
11XXXf
01000f

xtal
comp
xtal

normal operation
normal operation
test operation: charge pump sink;

status byte bit FL = 1

01001f

xtal

test operation: charge pump source;
status byte bit FL = 0

01010f

xtal

test operation: charge pump disabled;

status byte bit FL = 0
01011f
011XXf

xtal
xtal

test operation:1⁄2f

DIV

test operation: drive output (pin DRIVE)

is off (low-voltage) to allow the tuning

voltage to reach the maximum value;

note 2

Notes

1. X = don’t care.

2. Status at Power-on reset.

switched to Port P0

2000 Oct 24 10

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 60134); note 1.

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT

V

CC

V

n

I

O(drive)

I

O(SDA)

I

O(Px)

I

O(ΣPx)

T

amb

T

stg

T

j(max)

Note

1. Maximum ratings cannot be exceeded, not even momentarily without causing irreversible IC damage. Maximum
ratings cannot be accumulated.

supply voltage −0.3 +6.0 V
voltage on pins

CP, XTAL, XT/COMP, AS, P0, P1, P2,

−0.3 V

+ 0.3 V

CC

P3, ADC, RFA and RFB

SCL and SDA −0.3 +6.0 V
output current on pin DRIVE −1+1mA
serial data output current −1.0 +10.0 mA
P0, P1, P2 and P3 output current port switched on −1.0 +20.0 mA
sum of currents in P0, P1, P2 and P3 − 50.0 mA
ambient temperature −20 +85 °C
storage temperature −40 +150 °C
maximum junction temperature − 150 °C

HANDLING

Inputs and outputsare protected against electrostatic dischargein normal handling. However, tobe completely safe, it is
desirable to take normal precautions appropriate to handling integrated circuits.

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

thermal resistance from junction to ambient in free air

TSA5059AT 115 K/W

TSA5059ATS 144 K/W

2000 Oct 24 11

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

CHARACTERISTICS

VCC= 4.75 to 5.25 V; T

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
Supply (pin V

V

CC

I

CC

V

CC(POR)

)

CC

supply voltage 4.75 5.0 5.25 V
supply current T
supply voltage below which POR is active T

RF inputs (pins RFA and RFB)

f

i(RF)

V

i(RF)(rms)

Z

i(RF)

C

i(RF)

RF input frequency 900 − 2700 MHz
RF input voltage (RMS value) f

RF input impedance see Fig.6 −−−Ω
RF input capacitance see Fig.6 −−−pF

MDR main divider ratio prescaler disabled 64 − 131071

Crystal oscillator (pin XTAL)

f

xtal

Z

XTAL

Z

XTAL

P

XTAL

f

i(ext)

V

i(ext)(p-p)

crystal frequency 4 − 16 MHz

 crystal oscillator negative impedance 4 MHz crystal 400 680 −Ω

recommended crystal series resistance 4 MHz crystal −−200 Ω
crystal drive level 4 MHz crystal; note 3 − 40 −µW
external reference input frequency note 4 2 − 20 MHz
external reference input voltage

(peak-to-peak value)

Phase comparator and charge pump

f

comp

N

comp

comparison frequency −−2 MHz
equivalent phase noise at the phase

detector input

I

 charge pump current C1 = 0; C0 = 0 100 135 170 µA

cp

I

LO(cp)

charge pump output leakage current −10 0 +10 nA

DRIVE output (pin DRIVE)

V

O(drive)

output voltage when the charge pump is
sinking current

I

O(drive)

output current when the charge pump is
sourcing current

= −20 to +85 °C; f

amb

= 4 MHz; measured according to Fig.4; unless otherwise specified.

xtal

=25°C 303745mA

amb

=25°C − 2.75 − V

amb

between 900 and

i(RF)

2200 MHz; note 1
f

between 2.2 and

i(RF)

2.7 GHz; notes 1 and 2

7.1 − 300 mV

−30 − +2.5 dBm

22.4 − 300 mV

−20 − +2.5 dBm

prescaler enabled 128 − 262142

note 4 200 − 500 mV

f

comp

= 250 kHz;

−−157 − dBc/Hz
C1=C0=1;
in the loop bandwidth

C1 = 0; C0 = 1 210 280 350 µA
C1 = 1; C0 = 0 450 600 750 µA
C1 = 1; C0 = 1 920 1230 1540 µA

XCE = 0; XCS = 1;

− 140 250 mV
T2 = 0; T1 = 0; T0 = 0

XCE = 0; XCS = 1;

100 250 −µA

T2 = 0; T1 = 0; T0 = 1

2000 Oct 24 12

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
XT/COMP output (pin XT/COMP)

V

o(p-p)

Input/output and output ports (pins P0, P1, P2 and P3)

I

lO

V

O(sat)

V

IL

V

IH

ADC input (pin ADC)

I

LIH

I

LIL

Address selection (pin AS)

I

LIH

I

LIL

SCL and SDA inputs (pins SCL and SDA)

V

IL

V

IH

I

LIH

I

LIL

f

SCL

SDA output (pin SDA)

V

O(ack)

Notes

1. Asymmetrical drive on pin RFA or RFB; see Fig.3.

2. Bit PE needs to be set to logic 1 for a frequency higher than 2.3 GHz.

3. The drive level is expected with the crystal at series resonance with a series resistance of 50 Ω. The value will be
different with another crystal.

4. To drive pin XTAL from the pin XT/COMP of another TSA5059A, couple the signal using a capacitor of 1 nF
(to remove the DC level) in series with an 1.2 kΩ resistor (see Fig.5).

AC output voltage (peak-to-peak value) XCE = 1 − 400 − mV

port leakage current port off; VO=V
output port saturation voltage port on; I

=10mA − 0.2 0.4 V

sink

CC

−−10 µA

LOW-level input voltage −−1.5 V
HIGH-level input voltage 3.0 −−V

HIGH-level input leakage current V
LOW-level input leakage current V

ADC=VCC

=0V −10 −−µA

ADC

HIGH-level input leakage current VAS=V

CC

−−10 µA

−−1mA

LOW-level input leakage current VAS=0V −0.5 −−mA

LOW-level input voltage −−1.5 V
HIGH-level input voltage 2.3 −−V
HIGH-level input leakage current VIH= 5.5 V

V

= 5.5 V −−10 µA

CC

V

=0V −−10 µA

CC

LOW-level input leakage current VIL=0V; VCC= 5.5 V −10 −−µA
SCL clock frequency −−400 kHz

output voltage during acknowledge I

=3mA −−0.4 V

sink

2000 Oct 24 13

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

handbook, full pagewidth

V

i(RF)

(dBm)

+6

0

−6

−12

−18

−24

−30

−36

−42

−48

TSA5059A

FCE416

Guaranteed area

−54

−60

500 1000 1500 2000 2500 3000

f (MHz)

Fig.3 Sensitivity curve.

2000 Oct 24 14

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

APPLICATION INFORMATION

An example of a typical application is given in Fig.4. In this application the VCO centre frequency is 1.5 GHz with a slope
of 100 MHz/V. The expected loop bandwidth is 10 kHz with acharge pump current of 555 µA and f
componentsneed to be adapted to eachapplicationdepending on the VCO characteristics andtherequiredperformance
of the loop.

3.9 kΩ

2.2 nF

33 V

5 V

16
15
14
13
12
11
10

9

27 kΩ

DRIVE
GND

RFB
RFA

V

CC
ADC
P0
P1

BC847

2.7 kΩ

1 nF

1 nF
1 nF
10 nF

VCO

output

tuning

voltage

VCO

FCE714

handbook, full pagewidth

4 MHz

18 pF

MICRO-

CONTROLLER

47 nF

CP

XTAL

XT/COMP

AS

SDA

SCL

P3
P2

1
2
3
4

TSA5059A

5
6
7
8

of 250 kHz. Filter

comp

Fig.4 Typical application.

Loop bandwidth

Most of the applications the TSA5059A are dedicated for
require a large loopbandwidth, in theorder of afew kHz to
a few tens of kHz. The calculation of the loop filter
elements has to be done for each application, while it
depends on the VCO slope and phasenoise as wellas the
reference frequency and charge pump current.
A simulation of the loop can easily be done by using the
SIMPATA software from Philips.

Reference source

The TSA5059A is well suited to be used with a 4 MHz
crystal connected to pin XTAL. Philips crystal ordering
code 4322 143 04093 is recommended in this case.

2000 Oct 24 15

It is however possible to use a crystal with an higher
frequency (up to 16 MHz) to improve the noise
performance. When choosing a crystal, one should take
notice to select a crystal able to withstandthe drive level of
the TSA5059A without suffering from accelerated ageing.

It is also possible to feed pin XTAL with an external signal
between2 and 20 MHz,coming from an external oscillator
or from the pin XT/COMP of another TSA5059A, when
more than one synthesizer is present in the same
application. Then the application given in Fig.5 should be
used.

If the signal at pin XT/COMP is not used in an application
the output should be switched off (XCE = 0 and XCS = 0).
This pin should then be left open.

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

handbook, full pagewidth

4 MHz

18 pF

1
2

3
4

TSA5059A

5
6
7
8

16
15

14
13
12
11
10

TSA5059A

1.0 nF

1.2 kΩ

9

1
2

3
4

TSA5059A

5
6
7
8

16
15

14
13
12
11
10

9

FCE715

Fig.5 Application for using one crystal with two TSA5059As.

I2C-bus crosstalk

The TSA5059A includes a loop amplifier that requires an
externalNPNtransistor.Careshouldbe taken in the layout
of the application to ground the emitter of the NPN
transistor as close as possible to the ground of the VCO.

The best way to avoid any I

2

C-bus crosstalk in the
application (i.e. parasitic coupling between the I2C-bus
lines and the VCO coil) is to avoid the I2C-bus signal to
come in the RF part by using an I2C-bus gate that allows
only the messages for the PLL to go to the PLL and to
avoid unnecessary repeated sending. Such a gate is
integrated in most of the Philips digital demodulators.

2000 Oct 24 16

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

RF input impedance

handbook, full pagewidth

0.5

0.2

+ j

0

− j

0.2

0.5 10.2 1052

TSA5059A

1

2

5

10

900 MHz

2.7GHz

10

5

0.5

1

Fig.6 RF input impedance.

2

FCE418

2000 Oct 24 17

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

PACKAGE OUTLINES

SO16: plastic small outline package; 16 leads; body width 3.9 mm

D

c

y

Z

16

9

TSA5059A

SOT109-1

E

H

E

A

X

v M

A

pin 1 index

1

e

0 2.5 5 mm

DIMENSIONS (inch dimensions are derived from the original mm dimensions)

mm

A

max.

1.75

0.069

A

1

0.25

0.10

0.010

0.004

A2A

1.45

1.25

0.057

0.049

0.25

0.01

b

3

p

0.49

0.25

0.36

0.19

0.0100

0.019

0.0075

0.014

UNIT

inches

Note

1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.

(1)E(1) (1)

cD

10.0

9.8

0.39

0.38

8

b

p

scale

eHELLpQZywv θ

4.0

1.27

3.8

0.16

0.050

0.15

w M

6.2

5.8

0.244

0.228

A

2

1.05

0.041

Q

A

1

detail X

1.0

0.7

0.4

0.6

0.028

0.039

0.020

0.016

(A )

L

p

L

0.25 0.1

0.25

0.01

0.01 0.004

A

3

θ

0.7

0.3

0.028

0.012

o

8

o

0

OUTLINE
VERSION

SOT109-1

IEC JEDEC EIAJ

076E07 MS-012

REFERENCES

2000 Oct 24 18

EUROPEAN

PROJECTION

ISSUE DATE

97-05-22
99-12-27

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

SSOP16: plastic shrink small outline package; 16 leads; body width 4.4 mm

16

D

c

y

Z

9

E

H

E

TSA5059A

SOT369-1

A

X

v M

A

pin 1 index

18

w M

b

b

0.32

0.20

p

p

cD

0.25

5.30

0.13

5.10

0 2.5 5 mm

scale

(1)E(1)

eHELLpQZywv θ

4.5

0.65

4.3

e

DIMENSIONS (mm are the original dimensions)

mm

A

max.

1.5

0.15

0.00

1.4

1.2

3

0.25

UNIT A1A2A

Note

1. Plastic or metal protrusions of 0.20 mm maximum per side are not included.

Q

A

2

6.6

6.2

L

0.65

0.45

(A )

L

p

A

1

detail X

0.75

1.0

0.45

3

A

θ

0.130.2 0.1

0.48

0.18

(1)

o

10

o

0

OUTLINE
VERSION

SOT369-1 MO-152

IEC JEDEC EIAJ

REFERENCES

2000 Oct 24 19

EUROPEAN

PROJECTION

ISSUE DATE

95-02-04
99-12-27

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

SOLDERING
Introduction to soldering surface mount packages

Thistextgivesa very brief insight to a complex technology.
A more in-depth account of soldering ICs can be found in
our

“Data Handbook IC26; Integrated Circuit Packages”

(document order number 9398 652 90011).
There is no soldering method that is ideal for all surface

mount IC packages. Wavesoldering is not always suitable
for surface mount ICs, or for printed-circuit boards with
high population densities. In these situations reflow
soldering is often used.

Reflow soldering

Reflow soldering requires solder paste (a suspension of
fine solder particles, flux and binding agent) to be applied
tothe printed-circuit board by screen printing,stencilling or
pressure-syringe dispensing before package placement.

Several methods exist for reflowing; for example,
infrared/convection heating in a conveyor type oven.
Throughput times (preheating, soldering and cooling)vary
between 100 and 200 seconds depending on heating
method.

Typical reflow peak temperatures range from
215 to 250 °C. The top-surface temperature of the
packages should preferable be kept below 230 °C.

Wave soldering

Conventional single wave soldering is not recommended
forsurfacemountdevices(SMDs) or printed-circuit boards
with a high component density, as solder bridging and
non-wetting can present major problems.

To overcome these problems the double-wave soldering
method was specifically developed.

TSA5059A

If wave soldering is used the following conditions must be
observed for optimal results:

• Use a double-wave soldering method comprising a

turbulent wave with high upward pressure followed by a
smooth laminar wave.

• For packages with leads on two sides and a pitch (e):

– larger than or equal to 1.27mm, the footprint

longitudinal axis is preferred to be parallel to the
transport direction of the printed-circuit board;

– smaller than 1.27mm, the footprint longitudinal axis

must be parallel to the transport direction of the
printed-circuit board.

The footprint must incorporate solder thieves at the
downstream end.

• Forpackageswithleadson four sides, the footprint must

be placed at a 45° angle to the transport direction of the
printed-circuit board. The footprint must incorporate
solder thieves downstream and at the side corners.

During placement and before soldering, thepackage must
be fixed with a droplet of adhesive. The adhesive can be
applied by screen printing, pin transfer or syringe
dispensing. The package can be soldered after the
adhesive is cured.

Typical dwell time is 4 seconds at 250 °C.
A mildly-activated flux will eliminate the need for removal
of corrosive residues in most applications.

Manual soldering

Fix the component by first soldering two
diagonally-opposite end leads. Use a low voltage (24 V or
less) soldering iron applied to the flat part of the lead.
Contact time must be limited to 10 seconds at up to
300 °C.

When using a dedicated tool, all other leads can be
soldered in one operation within 2 to 5 seconds between
270 and 320 °C.

2000 Oct 24 20

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

Suitability of surface mount IC packages for wave and reflow soldering methods

PACKAGE

BGA, LFBGA, SQFP, TFBGA not suitable suitable
HBCC, HLQFP, HSQFP, HSOP, HTQFP, HTSSOP, SMS not suitable

(3)

PLCC
LQFP, QFP, TQFP not recommended
SSOP, TSSOP, VSO not recommended

Notes

1. All surface mount (SMD) packages are moisture sensitive. Depending upon the moisture content, the maximum

2. These packages are not suitable for wave soldering as a solder joint between the printed-circuit board and heatsink

3. If wave soldering is considered, then the package must be placed at a 45° angle to the solder wave direction.

4. Wave soldering is only suitable for LQFP, TQFP and QFP packages with a pitch (e) equal to or larger than 0.8 mm;

5. Wave soldering is only suitable for SSOP and TSSOP packages with a pitch (e) equal to or larger than 0.65 mm; it is

, SO, SOJ suitable suitable

temperature (with respect to time) and body size of the package, there is a risk that internal or external package
cracks may occur due to vaporization of the moisture in them (the so called popcorn effect). For details, refer to the
Drypack information in the

(at bottom version) can not be achieved, and as solder may stick to the heatsink (on top version).

The package footprint must incorporate solder thieves downstream and at the side corners.

it is definitely not suitable for packages with a pitch (e) equal to or smaller than 0.65 mm.

definitely not suitable for packages with a pitch (e) equal to or smaller than 0.5 mm.

“Data Handbook IC26; Integrated Circuit Packages; Section: Packing Methods”

SOLDERING METHOD

WAVE REFLOW

(2)

(3)(4)
(5)

suitable

suitable
suitable

(1)

.

2000 Oct 24 21

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase

TSA5059A

noise frequency synthesizer

DATA SHEET STATUS

DATA SHEET STATUS

Objective specification Development This data sheet contains the design target or goal specifications for

Preliminary specification Qualification Thisdata sheet contains preliminary data, and supplementary data will be

Product specification Production This data sheet contains final specifications. Philips Semiconductors

Note

1. Please consult the most recently issued data sheet before initiating or completing a design.

DEFINITIONS
Short-form specification  The data in a short-form

specification is extracted from a full data sheet with the
same type number and title. For detailed information see
the relevant data sheet or data handbook.

Limiting values definition  Limiting values given are in
accordance with the Absolute Maximum Rating System
(IEC 60134). Stress above one or more of the limiting
values may cause permanent damage to the device.
These are stress ratings only and operation of the device
attheseor at any other conditions above thosegiveninthe
Characteristics sections of the specification is not implied.
Exposure to limiting values for extended periods may
affect device reliability.

Application information  Applications that are
described herein for any of these products are for
illustrative purposes only. Philips Semiconductors make
norepresentationorwarrantythatsuchapplicationswillbe
suitable for the specified use without further testing or
modification.

PRODUCT

STATUS

DEFINITIONS

product development. Specification may change in any manner without
notice.

published at a later date. Philips Semiconductors reserves the right to
make changes at any time without notice in order to improve design and
supply the best possible product.

reserves the right to make changes at any time without notice in order to
improve design and supply the best possible product.

DISCLAIMERS
Life support applications  These products are not

designed for use in life support appliances, devices, or
systems where malfunction of these products can
reasonably be expected toresult in personal injury. Philips
Semiconductorscustomersusingorsellingtheseproducts
for use in such applications do so at their own risk and
agree to fully indemnify Philips Semiconductors for any
damages resulting from such application.

Right to make changes  Philips Semiconductors
reserves the right to make changes, without notice, in the
products, including circuits, standard cells, and/or
software, described or contained herein in order to
improve design and/or performance. Philips
Semiconductors assumes no responsibility or liability for
theuseofanyof these products, conveys no licence or title
under any patent, copyright, or mask work right to these
products,and makes no representations or warranties that
these products are free from patent, copyright, or mask
work right infringement, unless otherwise specified.

(1)

2

PURCHASE OF PHILIPS I

2000 Oct 24 22

C COMPONENTS

Purchase of Philips I
components in the I2C system provided the system conforms to the I2C specification defined by
Philips. This specification can be ordered using the code 9398 393 40011.

2

C components conveys a license under the Philips’ I2C patent to use the

Philips Semiconductors Product specification

2.7 GHz I2C-bus controlled low phase
noise frequency synthesizer

NOTES

TSA5059A

2000 Oct 24 23

Philips Semiconductors – a w orldwide compan y

Argentina: see South America
Australia: 3 Figtree Drive, HOMEBUSH, NSW 2140,

Tel. [phone], Fax. [phone]
Austria: Computerstr. 6, A-1101 WIEN, P.O. Box 213,

Tel. [phone], Fax. [phone]
Belarus: Hotel Minsk Business Center, Bld. 3, r. 1211, Volodarski Str. 6,

220050 MINSK, Tel. [phone], Fax. [phone]

Belgium: see The Netherlands
Brazil: see South America
Bulgaria: Philips Bulgaria Ltd., Energoproject, 15th floor,

51 James Bourchier Blvd., 1407 SOFIA,
Tel. [phone], Fax. [phone]

Canada: PHILIPS SEMICONDUCTORS/COMPONENTS,
Tel. [phone], Fax. [phone]

China/Hong Kong: 501 Hong Kong Industrial Technology Centre,
72 Tat Chee Avenue, Kowloon Tong, HONG KONG,
Tel. [phone], Fax. [phone]

Colombia: see South America
Czech Republic: see Austria
Denmark: Sydhavnsgade 23, 1780 COPENHAGEN V,

Tel. [phone], Fax. [phone]
Finland: Sinikalliontie 3, FIN-02630 ESPOO,

Tel. [phone], Fax. [phone]
France: 51 Rue Carnot, BP317, 92156 SURESNES Cedex,

Tel. [phone], Fax. [phone]
Germany: Hammerbrookstraße 69, D-20097 HAMBURG,

Tel. [phone], Fax. [phone]

Hungary: see Austria
India: Philips INDIA Ltd, Band Box Building, 2nd floor,

254-D, Dr. Annie Besant Road, Worli, MUMBAI 400 025,
Tel. [phone], Fax. [phone]

Indonesia: PT Philips DevelopmentCorporation, Semiconductors Division,
Gedung Philips, Jl. Buncit Raya Kav.99-100, JAKARTA 12510,
Tel. [phone] ext. 2501, Fax. [phone]

Ireland: Newstead, Clonskeagh, DUBLIN 14,
Tel. [phone], Fax. [phone]

Israel: RAPAC Electronics, 7 Kehilat Saloniki St, PO Box 18053,
TEL AVIV 61180, Tel. [phone], Fax. [phone]

Italy: PHILIPS SEMICONDUCTORS, Via Casati,23 - 20052 MONZA (MI),
Tel. [phone], Fax [phone]

Japan: Philips Bldg 13-37, Kohnan 2-chome, Minato-ku,
TOKYO 108-8507, Tel. [phone], Fax. [phone]

Korea: Philips House, 260-199 Itaewon-dong, Yongsan-ku, SEOUL,
Tel. [phone], Fax. [phone]

Malaysia: No. 76 Jalan Universiti, 46200 PETALING JAYA, SELANGOR,
Tel. [phone], Fax. [phone]

Mexico: 5900 Gateway East, Suite 200, EL PASO, TEXAS 79905,
Tel. [phone], Fax [phone]

Middle East: see Italy

Netherlands: Postbus 90050, 5600 PB EINDHOVEN, Bldg. VB,

Tel. [phone], Fax. [phone]
New Zealand: 2 Wagener Place, C.P.O. Box 1041, AUCKLAND,

Tel. [phone], Fax. [phone]
Norway: Box 1, Manglerud 0612, OSLO,

Tel. [phone], Fax. [phone]

Pakistan: see Singapore
Philippines: Philips Semiconductors Philippines Inc.,

106 Valero St. Salcedo Village, P.O. Box 2108 MCC, MAKATI,
Metro MANILA, Tel. [phone], Fax. [phone]

Poland: Al.Jerozolimskie 195 B, 02-222 WARSAW,
Tel. [phone], Fax. [phone]

Portugal: see Spain
Romania: see Italy
Russia: Philips Russia, Ul. Usatcheva 35A, 119048 MOSCOW,

Tel. [phone], Fax. [phone]
Singapore: Lorong 1, Toa Payoh, SINGAPORE 319762,

Tel. [phone], Fax. [phone]

Slovakia: see Austria
Slovenia: see Italy
South Africa: S.A. PHILIPS Pty Ltd., 195-215 Main Road Martindale,

2092 JOHANNESBURG, P.O. Box 58088 Newville 2114,
Tel. [phone], Fax. [phone]

South America: Al. Vicente Pinzon, 173, 6th floor,
04547-130 SÃO PAULO, SP, Brazil,
Tel. [phone], Fax. [phone]

Spain: Balmes 22, 08007 BARCELONA,
Tel. [phone], Fax. [phone]

Sweden: Kottbygatan 7, Akalla, S-16485 STOCKHOLM,
Tel. [phone], Fax. [phone]

Switzerland: Allmendstrasse 140, CH-8027 ZÜRICH,
Tel. [phone] Fax. [phone]

Taiwan: Philips Semiconductors, 5F, No. 96, Chien Kuo N. Rd., Sec. 1,
TAIPEI, Taiwan Tel. [phone], Fax. [phone]

Thailand: PHILIPS ELECTRONICS (THAILAND) Ltd.,
60/14 MOO 11, Bangna Trad Road KM. 3, Bagna, BANGKOK 10260,
Tel. [phone], Fax. [phone]

Turkey: Yukari Dudullu, Org. San. Blg., 2.Cad. Nr. 28 81260 Umraniye,
ISTANBUL, Tel. [phone], Fax. [phone]

Ukraine: PHILIPS UKRAINE, 4 Patrice Lumumba str., Building B, Floor 7,
252042 KIEV, Tel. [phone], Fax. [phone]

United Kingdom: Philips Semiconductors Ltd., 276 Bath Road, Hayes,
MIDDLESEX UB3 5BX, Tel. [phone], Fax. [phone]

United States: 811 East Arques Avenue, SUNNYVALE, CA 94088-3409,
Tel. [phone], Fax. [phone]

Uruguay: see South America
Vietnam: see Singapore
Yugoslavia: PHILIPS, Trg N. Pasica 5/v, 11000 BEOGRAD,

Tel. [phone], Fax.[phone]

For all other countries apply to: Philips Semiconductors,
Marketing Communications, Building BE-p, P.O. Box 218, 5600 MD EINDHOVEN,
The Netherlands, Fax. [phone]

© Philips Electronics N.V. SCA
All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner.

The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed
without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license
under patent- or other industrial or intellectual property rights.

2000

Internet: http://www.semiconductors.philips.com

70

Printed in The Netherlands 753504/04/pp24 Date of release: 2000 Oct 24 Document order number: 9397 750 07653