Datasheet TQ5131 Datasheet (TriQuint Semiconductor)

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Page 1

WIRELESS COMMUNICATIONS DIVISION

TQ5131

CDMA

IF Out

GND

GIC

Out

VDD

Out

Mode Select/

LO Input

IFA Gain

Select

AMP's IF Out

Product Description

The TQ5131 is a 3V, RFA/Mixer IC designed specifically for Cellular band CDMA/AMPS applications. It’s RF performance meets the requirements of products designed to the IS-95 and AMPS standards. The TQ5131 is designed to be used with the TQ3131 (CDMA/AMPS LNA) which provides a complete CDMA receiver for 800MHz dual-mode phones.

DATA SHEET

3V Cellular Band CDMA/AMPS RFA/Mixer IC

Features

 Small size: SOT23-8  Single 3V operation  Low-current operation  Gain Select  Mode Select  High IP3 performance  Few external components

The RFA/Mixer incorporates on-chip switches which determine CDMA, AMPS and bypass mode select. When used with the TQ3131 (CDMA/AMPS LNA), four gain steps are available. The RF input port is internally matched to 50 Ω, greatly simplifying the design and keeping the number of external components to a minimum. The TQ5131 achieves good RF performance with low current consumption, supporting long standby times in portable applications. Coupled with the very small SOT23-8 package, the part is ideally suited for Cellular band mobile phones.

Electrical Specifications

Parameter Min Typ Max Units Frequency 881 MHz Gain 15.0 dB Noise Figure 4.5 dB Input 3rd Order Intercept 2.5 dBm DC supply Current 15.0 mA

Note 1: Test Conditions: Vdd=2.8V, RF=881MHz, LO=966MHz, IF=85MHz, Ta=25C, CDMA High Gain

state.

Applications

 IS-95 CDMA Mobile Phones  AMPS Mobile Phones  Dual Mode CDMA Cellular application

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TQ5131

Data Sheet

Electrical Characteristics

Parameter Conditions Min. Typ/Nom Max. Units RF Frequency Cellular band 869 881 894 MHz IF Frequency Range High side LO 85 130 MHz

CDMA Mode-Hi gh Gain

Gain 13.0 15.0 dB Noise Figure 4.5 5.5 dB Input IP3 0 2.5 dBm Supply Current 15.0 18.0 mA

CDMA Mode-Hi gh Gain Low Linearity

Gain 14.0 17.0 dB Noise Figure 4.5 5.5 dB Input IP3 -1.0 dBm Supply Current 15.0 mA

CDMA Mode-Mid Gain

Gain 1.0 3.5 dB Noise Figure 11.0 dB Input IP3 13.5 dBm Supply Current 10.5 mA

CDMA Mode-Low Gain

Gain 5.0 7.0 dB Noise Figure 10.0 dB Input IP3 10.0 dBm Supply Current 10.5 mA

AMPS Mode

Gain 9.5 12.0 dB Noise Figure 5.0 6.0 dB Input IP3 -5.0 -3.0 dBm Supply Current 9.0 12.5 mA Supply Voltage 2.8 V

Note 1: Test Conditions: Vdd=2.8V, RF=881MHz, LO=966MHz, IF=85MHz, TC = 25° C, Min/Max limits are at + 25°C case tem perature, unless otherwise specifi ed.

Absolute Maximum Ratings

Parameter Value Units DC Power Supply 5.0 V Power Dissipation 500 mW Operating Temperature -40 to 85 C Storage Temperature -60 to 150 C Signal level on inputs/outputs +20 dBm Voltage to any non supply pin +0.3 V

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Typical Performance, Note: HG Mode=CDMA High Gain, LG Mode=CDMA Low Gain

Test Conditions, unless otherwise specified: Vdd=2.8V, Ta=25C , RF=881MHz, LO=966MHz , IF=85MHz, LO input=-4dBm

Gain vs. Frequency 18 16 14 12 10

Gain (dB)

8 6 4

HG Mode LG Mode AMPS Mode

869 875 882 888 894

Frequency (MHz)

16 15 14 13 12 11

Idd (mA)

9 8 7 6

869 875 882 888 894

Idd vs. Frequency

TQ5131 Data Sheet

HG Mode LG Mode AMPS Mode

Frequency (MHz)

Input IP3 vs. Frequency

12 10

8 6

HG Mode LG Mode AMPS Mode

4 2

Input IP3 (dBm)

-2

-4 869 875 882 888 894

Frequency (MHz)

Noise Figure vs. Frequency

11 10

9 8 7

HG Mode LG Mode AMPS Mode

6 5

Noise Figure (dB)

4 3 2

869 875 882 888 894

Frequency (MHz)

Gain vs. Temperature

18 16 14 12 10

Gain (dB)

HG Mode LG Mode AMPS Mode

6 4

-30 0 25 55 85 Temperature (Celsius)

Input IP3 vs. Temperature

HG Mode LG Mode AMPS Mode

Input IP3 (dBm)

-3

-6

-30 0 25 55 85 Temperature (Celsius)

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TQ5131

Data Sheet

Noise Figure vs. Temperature

12 10

8 6

Noise Figure (dB)

4 2

HG Mode LG Mode AMPS Mode

-30 0 25 55 85 Temperature (Celsius)

Idd vs. Temperature

18 16 14 12 10

Idd (mA)

8 6

HG Mode LG Mode AMPS Mode

-30 0 25 55 85 Temperature (Celsius)

Input IP3 vs. LO Power

12 10

8 6 4

HG Mode LG Mode AMPS Mode

2 0

Input IP3 (dBm)

-2

-4

-6

-8 -6 -4 -2 0 LO Power (dBm)

Noise Figure vs. LO Power

11 10

9 8 7 6

HG Mode LG Mode AMPS Mode

Noise Figure (dB)

4 3 2

-8 -6 -4 -2 0

LO Power (dBm)

Gain vs. LO Power

18 16 14 12

Gain (dB)

8 6 4

HG Mode LG Mode AMPS Mode

-8 -6 -4 -2 0

Gain (dB)

8 6 4

2.6 2.8 3 3.2

LO Power (dBm)

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Gain vs. Vdd

HG Mode LG Mode AMPS Mode

Vdd (volts)

Page 5

Input IP3 vs. Vdd

12 10

8 6 4 2

Input IP3 (dBm)

-2

-4

-6

2.62.833.2 Vdd (volts)

Noise Figure vs. Vdd 11 10

9 8 7 6 5

Noise Figure (dB)

4 3 2

2.62.833.2 Vdd (volts)

HG Mode LG Mode AMPS Mode

TQ5131 Data Sheet

Idd vs. Vdd

18 16 14 12

Idd (mA)

8 6 4

2.62.833.2 Vdd (volts)

HG Mode LG Mode AMPS Mode

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TQ5131

Data Sheet

RF AMP

Gain

Select

C22

GND

GIC

Out

VDD

Out

VDD

Control 3

VDD

Control 1

Mode Select

C12

IF AMP

Gain

Select

Mixer

INPUT

AMP's IF Out

C10

Control 2

RF input

CDMA

IF Out

Application/Test Circuit Bill of Material for TQ5131 RF AMP/Mixer

Component Reference Designator Part Number Value Size Manufacturer Receiver IC U1 TQ5131 SOT23-8 TriQuint Semiconductor Capacitor C4

.022µF Capacitor C10 18pF 0402 Capacitor C5,C8 1200pF 0402 Capacitor C6,C7 27pF 0402 Capacitor C9 12pF 0402 Capacitor C12 100pF 0402 Capacitor C22 2.7pF 0402 Resistor R1, R4 Resistor R2 Resistor R3

5.1K Ω

8.2 Ω 82Ω

Inductor L2 180nH 0805 Inductor L3 270nH 0805 Inductor L4 18nH 0402

0402

0402 0402 0402

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TQ5131

Data Sheet

TQ5131 Product Description

The TQ5131 is a miniature low noise mixer (downconverter) in a small SOT-23-8 package (2.9X2.8X1.14 mm) with operation at

2.8v. It is designed for cellular CDMA applications and dualmode CDMA/AMPS mobile phones. The IC features excellent linearity with an input intercept point of +2.5dBm in its high gain mode and +10.0dBm in its low gain mode. It has a typical noise figure of 4.5 dB for CDMA and 5.0 for AMPS mode. For optimum performance the TQ5131 RF frequency of operation should be from 869 to 894 MHz. The IF range is from 85 to 130

MHz and its injection mode for the local oscillator is high side

Operation

The TQ5131 is a single-ended mixer with switching capabilities for the various signal levels found in CDMA applications. It consists of a RF amplifier, followed by a single-ended mixer driven by a grounded gate LO buffer amplifier. The mixer output can be directed either to the CDMA IF amplifier or the AMPS IF amplifier via a switch. Pin 1 and 7 are used to control the RF amplifier gain select and the mixer mode select respectively.

TQ5131

RF /

GND

GIC

CDMA

4 5

Mx Vdd

LO /

IFA GS/

AMPS

Figure 1. TQ5131 Block Diagram

Detailed Circuit Description: RF Amplifier

The TQ5131 has an integrated pre-amplifier stage in a cascode configuration. The output is internally matched to 50 ohms at 881MHz. Pin 1 requires an external match that is set to deliver a 2:1 VSWR in both the low and high gain modes (i.e. RFA is on or off). Figure 2 shows an approximated impedance at pin 1 (RFA input) to implement any desired match. The TQ5131 performance in TriQuint’s demo board was achieved using the

following source impedance z = 1.86 + j2.41 ΩΩΩΩ(normalized to 50 Ω).

0.5

-0.5

0.5

1.0

2.0

-2.0

-1.0

Source

Impedance

0.68 @ 30.2 z = 1.86 + j 2.41 y = 0.20 - j 0.26

Input Impedance (High Gain)

0.75 @ -63.1 z = 0.5 - j 1.51 y = 0.20 + j 0.60

Figure 2. RFA Input and Source Impedance LO Buffer Amplifier

The on-chip LO buffer amplifier is a grounded gate FET. The capacitor also serves as a DC block to the control voltage. The TQ5131 has internal LO tuning. This eases the work of the RF system designer and eliminates the need for the external tank circuit (inductor and capacitor) that would otherwise be needed to tune the frequency response of the LO buffer. The LO is limited to high-side injection mode and it operates from 950MHz to 1030MHz. The input to the LO buffer is through pin 7 which also feeds the control line (C1) that selects the mixer mode of operation, either CDMA or AMPS. Due to this logic control, the only external component required at the LO port is a series capacitor to prevent DC from traveling to other parts of the system. The LO drive level of operation should be between -7 and 0 dBm. Best performance is obtained between –6 and –2 dbm.

LO/filter/Mixer interaction

The physical position of the image reject filter is likely to have an effect on the performance of the mixer especially in the Low Gain mode where the RF amplifier is switched out. This is primarily due to self-mixing of the LO energy bouncing from the filter back into the mixer either out-of-phase or in-phase creating an offset in magnitude. To minimize this effect, TriQuint

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TQ5131

Data Sheet

recommends placing the image-reject filter as close to the IC as possible. In TriQuint’s demo board its position is 42 mils from the pad of the matching inductor and 126 mils from the IC pad. This location for the image-reject filter works well.

CDMA IF Amplifier

The CDMA IF amplifier is an open drain stage with a gain step to adjust the output power levels according to the system requirement. The source of the CDMA IF amplifier is connected directly to pin 3. This allows the system designer to adjust gain, output intercept and current (GIC) by adding an external selfbias circuit at this pin (see figure 4a and b). Recommended capacitor value in the self-bias circuit is 0.022 uF or greater. In addition to the 0.5 to 1 dB more of input intercept obtained by using a large value capacitor, the effects of low frequency components present at this pin are also reduced.

Figure 4a. GIC Pin Self-Bias Circuit

TQ5131

Performance Vs. Bias Resistance ( R3) for CDMA

High Gain: (RF_Freq=882MHz, IF_Freq=85MHz,

LO_Freq=967MHz, PLO=-4dBm, Vdd=2.8)

-3 82 100 130 160 180 200 220 240 270 300

Bias Resistance R3 (ohms): (R2 const ant at 8.2 ohms)

Gain (dB) Idd (mA) IIP3 (dBm)

Figure 4b. Performance Vs. GIC Pin Bias Resistance, R3

AC degeneration of the CDMA IFA source has minimum or no effect on AMPS performance. Maximum gain is obtained when the total DC resistance (R2 + R3) at pin 3 is bypassed (see figure 4c).

Performance Vs. Bias Resistance ( R2) for CDMA

High Gain: (RF_Freq=882MHz, IF_Freq=85MHz,

LO_Freeq=967MHz, PLO=-4dBm, Vdd=2.8)

C4 = 0.022uF

R2 = 8.2 R3 = 82

Note: These values were optimized for TriQuint's 5131 Demo board. The discrepancy between these values and those of the customer's application may differ due to board and componen parasitics.

4 5

Ω

18 16 14 12 10

8 6 4 2 0

Gain (dB) IIP3 (dBm) Idd (mA)

0 102030395162

Bias Resistance R2 (ohms): (R3 constant at 82 ohms)

Figure 4c. Performance Vs. GIC Pin Bias Resistance, R2

Once the operating point is chosen, the designer still has flexibility to adjust gain and intercept by varying the ratio of the total bias resistance, R2 + R3. In figure 4d one can observe how gain and intercept change while the current remains approximately constant at 16mA.

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TQ5131 Data Sheet

Performance Vs. RBias Ratio ( R2/R3) for CDMA

High Gain: (RF_Freq=882MHz, IF_Freq=85MHz,

LO_Freeq=967MHz, PLO=-4dBm, Vdd=2.8)

Gain (dB) Idd (mA) IIP3 (dBm)

8.2/82 18/68 27/62 39/51 R2/R3 (ohms): (Total Rbi as ~ 90 ohms)

Figure 4d. Performance Vs. R2/R3 Ratio, Idd = 16mA

Similarly, figure 4e shows gain and input intercept variation while the current is fixed at 12mA.

Performance Vs. RBias Ratio ( R2/R3) for CDMA

High Gain: (RF_Freq=882MHz, IF_Freq=85MHz,

LO_Freq=967MHz, PLO=-4dBm, Vdd=2.8)

16 14 12 10

8 6 4 2 0

-2

Gain (dB) Idd (mA) IIP3 (dBm)

0/188.2 8.2/180 27/160 56/130

R2/R3 (ohms) GIC pin: (Totol Rbias ~ 190 ohms)

Figure 4e. Performance Vs. R2/R3 Ratio, Idd = 12.4mA

The normalized impedance at the CDMA IF output is z = 5.0 – j

2.24 ΩΩΩΩ. There are several methods of measuring the port

impedance of a device, this particular measurement was taken on the 5131 demo board by lifting pin 4 of the PCB pad and soldering the tip of a semirigid probe next to it. Care must be exercised when grounding the outer conductor of the semirigid probe. For the measurement to be valid the probe must be grounded very close to the pin. Before soldering the probe, its electrical length must be calculated and dialed in the network analyzer's port extension in order to move the calibration reference plane right at the tip of the probe. Keep in mind that the total DC bias resistance at the IF amplifier source must be

selected before implementing the output match. Significant changes on this bias resistance might require a new match at the IF output. When designing the PCB, it is recommended to place the self bias circuit of the amplifier as close to the pin as possible to minimize possible loading effects that might cause an oscillation. Also the shunt capacitor of the IF match should be grounded close to the IC (see figure 4c).

After designing the IF match in simulation using the given Sparameters, some adjustment might be needed when implementing the match on the bench. At this point remember that the mixer FET must be turned on since the IFA is directly coupled to it. Also make sure that the LO buffer amplifier is providing the proper drive level and that any unused ports are properly terminated. Figure 4 shows the circuit topology and component values designed for TriQuint's demo board. Verify that the match has a 2:1 VSWR in all modes. Figure 5 shows a typical CDMA IF output impedance.

Figure 4c. CDMA IF Output Match (IF = 85MHz)

TQ5131

1 2

3 4 5

L2=180nH

Vdd

C6=27pF

=27pF

CDMA

Note: These values were optimized for TriQuint's 5131 Demo board. The discrepancy between these values and those of the customer's application may differ due to board and component parasitics.

8 7

Figure 5. CDMA Output Impedance at Pin 4

0.5

1.0

2.0

CDIF output

Impedance

0.72 @ -8.8 z = 5.0 - j 2.24 y = 0.17 + j 0.07

-0.5

-1.0

-2.0

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TQ5131

Data Sheet

AMPS IF Amplifier

This amplifier also uses an open drain stage with a self-bias circuit. No Quiescent current adjustments are possible in this mode since the bias circuit is on-chip. While the IF output can be tuned for frequencies as high as 500 MHz, the downconverter performance is limited by the internal tuned circuit of the LO buffer amplifier. The highest IF that can be used without significant deviation from typical performance is 130 MHz. This output is a high impedance open drain FET z = 5.42 – j 9.04 Ω (normalized). The match requires a RF choke to Vdd for proper biasing (see figure 6). Typical AMPS IF output impedance is shown in figure 7.

Figure 6. AMPS IF Output Match (IF = 85 MHz)

TQ5131

1 2

4 5

L3=270nH

8 7

C9=12pF

C10=18pF

AMPS

Vdd Decoupling

External spurious signals at high and low frequencies can appear on the Vdd lines. Proper decoupling of these lines is required to eliminate unwanted noise. The recommended decoupling network has a PI configuration. On the main Vdd node, a large capacitor of 0.022 uF is use, followed by a 3.3 or 10 ohm resistor in series with the supply line, then another bypass cap that presents a low impedance to ground at the RF frequency of interest. The Vdd, pin 8, is bypassed on chip. Therefore, all that is needed is a series 3.3 to 10Ω resistor to the large capacitor, 0.022µFd.

Board Layout Recommendations

All ground pins should be kept close to the IC and have its own via to the ground plane to minimize inductance.

Most PC boards for portable applications have thin dielectric layers and very narrow line width which increase the board parasitic capacitance and inductance. To minimize these effects when implementing a matching network, it is recommended to relieve the ground underneath pads carrying RF signals whenever possible.

Vdd

Note: These values were optimized for TriQuint's 5131 Demo board. The discrepancy between these values and those of the customer's application may differ due to board and component parasitics.

0.5

-0.5

0.5

1.0

2.0

-2.0

-1.0

AMIF output

Impedance

0.91 @ - 9.3 z = 5.42 - j 9.04 y = 0.05 + j 0.08

Figure 7. AMPS Output Impedance at Pin 5

Control Line Description

The control lines can be toggled between high and low levels using CMOS logic circuitry. Control line C1 is used to switch between CDMA and AMPS IF output. The other two control lines C2 and C3, which are also tied to the LNA gain select and LNA mode respectively, set the various CDMA output levels required by the system.

Receiver State C1 C2 C3

AMPS Mode 0 0 1 CDMA High Gain 1 0 0 CDMA HG, low lin 1 0 1 CDMA Mid Gain 1 1 0 CDMA Low Gain 1 1 1

Table 1. Downconverter Control Bits

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Page 11

C1 = Mixer Mode, C2 = RFA gain select and LNA gain select , C3 = IFA gain select and LNA mode select.

TQ5131 Data Sheet

Receiver State

AMPS Mode HG, AMPS Idd HG, AMPS Output CDMA High Gain HG, CDMA Idd LG, CDMA Output CDMA HG, low lin HG, CDMA Idd HG, CDMA Output CDMA Mid Gain Bypass LG, CDMA Output CDMA Low Gain Bypass HG, CDMA Output

Table 2. Electrical States of RFA and IFA

Rx SYSTEM PERFOR MANCE

When measuring the mixer alone you will find that the low gain mode has a higher gain than the mid gain mode. These two modes describe the whole system (LNA + Mixer) spec rather than just the mixer. The difference between CDMA High-Gain (HG) and CDMA High-Gain-Low-Linearity (HGLL) is the input intercept of the LNA. In HG the LNA input intercept is +8dBm and so can withstand crossmodulation while transmitting. The HGLL mode is intended for standby phone operation where no transmission is taking place.

RF AMP IF AMP

MODE IDD GAIN NF IIP3

(mA) (dB) (dB) (dBm) AMPS 14 21.5 2.3 -13 High Gain 27.8 26 1.74 -8.9 HGLL 20.9 27.2 2.08 -10.6 Mid Gain 23 14.9 3.54 2 Low Gain 12.7 3.4 14.12 17.2

Table 3. TQ3131_5131 System Performance

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Package Pinout

TQ5131

Data Sheet

GND

GIC

CDMA

IF Out

Out

Pin Descriptions

Pin Name Pin # Description and Usage

RF IN 1 RF Input, RF amplifier gain select, Logic Control 2

GND 2 Ground, paddl e

GIC 3 Off chip tuning for gain/IP3/current IF OUT 4 CDMA IF Output IF OUT 5 AMPS IF Output

IFA Gain 6 IF amplifier gain select, Logic Control 3

LO IN 7 LO Input, mode select (CDMA/AMPS), Logic Control 1

Vdd 8 LNA Vdd, typical 2.8V

VDD

LO IN

Out

Mode Select/

LO Input

IFA Gain

Select

AMP's IF Out

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Page 13

Package Type: SOT23-8 Plastic Package

Note 1

TQ5131 Data Sheet

PIN 1

FUSED LEAD

DESIGNATION DESCRIPTION METRIC ENGLISH NOTE

A OVERALL HEIGHT 1.20 +/-.25 mm 0.05 +/-.250 in 3

A1 STANDOFF .100 +/-.05 mm .004 +/-.002 in 3

b LEAD WIDTH .365 mm TYP .014 in 3

c LEAD THICKNESS .127 mm TYP .005 in 3 D PACKAGE LENGTH 2.90 +/-.10 mm .114 +/-.004 in 1,3 e LEAD PITCH .65 mm TYP .026 in 3 E LEAD TIP SPAN 2.80 +/-.20 mm .110 +/-.008 in 3

E1 PACKAGE WIDTH 1.60 +/-.10 mm .063 +/-.004 in 2,3

L FOOT LENGTH .45 +/-.10 mm .018 +/-.004 in 3

Theta FOOT ANGLE 1.5 +/-1.5 DEG 1.5 +/-1.5 DEG

Notes

1. The package length dimension includes allowance for mold mismatch and flashing.

2. The package width dimension includes allowance for mold mismatch and flashing.

3. Primary dimensions are in metric millimeters. The English equivalents are calculated and subject to rounding error.

Note 2

DIE

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TQ5131

Data Sheet

Additional Information

For latest specifications, additional product information, worldwide sales and distribution locations, and information about TriQuint:

Web: www.triquint.com Tel: (503) 615-9000 Email: info_wireless@tqs.com Fax: (503) 615-8900

For technical questions and additional information on specific applications:

Email: info_wireless@tqs.com

The information provided herein is believed to be reliable; TriQuint assumes no liability for inaccuracies or omissions. TriQuint assumes no responsibility for the use of this information, and all such inform ation shall be entirely at t he user's own ri sk. Prices and specifications are subject to change without notice. No patent rights or licenses to a ny of the circuits described herein are implied or granted to any third party. TriQuint does not authorize or warrant any TriQuint product for use in life-support devices and/or systems.

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Datasheet TQ5131 Datasheet (TriQuint Semiconductor)

Specifications and Main Features

Frequently Asked Questions

User Manual

Figure 4b. Performance Vs. GIC Pin Bias Resistance, R3

AC degeneration of the CDMA IFA source has minimum or no effect on AMPS performance. Maximum gain is obtained when the total DC resistance (R2 + R3) at pin 3 is bypassed (see figure 4c).