Datasheet TPS60123PWPR, TPS60123PWP, TPS60122PWPR, TPS60121PWPR, TPS60122PWP Datasheet (Texas Instruments)

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Page 1

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

features

High Average Efficiency Over Input Voltage Range Because of Special Switching Topology

Up to 200-mA Output Current (TPS60120 and TPS60121) From an Input Voltage Range of 1.8-V to 3.6-V

No Inductors Required, Low EMI

Regulated 3.3-V ± 4% Output

Only Four External Components Required

55-µA Quiescent Supply Current

0.05-µA Shutdown Current

Load Disconnected in Shutdown

Space-saving, Thermally-Enhanced PowerPADt Package

Evaluation Module Available (TPS60120EVM-142)

applications

Battery-Powered Applications

Two Battery Cells to 3.3-V Conversion

Portable Instruments

Battery-Powered Microprocessor Systems

Miniature Equipment

Backup-Battery Boost Converters

PDA’s, Organizers, Laptops

MP-3 Portable Audio Players

Handheld Instrumentation

Medical Instruments (e.g., Glucose Meters)

Cordless Phones

description

The TPS6012x step-up, regulated charge pumps generate a 3.3-V ±4% output voltage from a 1.8-V to 3.6-V input voltage (two alkaline, NiCd, or NiMH batteries). The output current is 200 mA for the TPS60120/TPS60121 and 100 mA for the TPS60122/TPS60123, all from a 2-V input. Four external capacitors are needed to build a complete high efficiency dc/dc charge pump converter. To achieve the high efficiency over a wide input voltage range, the charge pump automatically selects between a 1.5x or doubler conversion mode. From a 2-V input, all ICs can start with full load current.

The devices feature the power-saving pulse-skip mode to extend battery life at light loads. TPS60120 and TPS60122 include a low battery comparator. TPS60121 and TPS60123 feature a power-good output. The logic shutdown function reduces the supply current to a maximum of 1 µA and disconnects the load from the input. Special current-control circuitry prevents excessive current from being drawn from the battery during start-up. This dc/dc converter requires no inductors, therefore EMI is of low concern. It is available in the small, thermally enhanced 20-pin PowerP ADt package (PWP).

IO = 66 mA

100

1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VI – Input Voltage – V

Efficiency – %

IO = 164 mA

IO = 216 mA

IO = 116 mA

VO = 3.3 V TC = 25°C

IN IN

LBI

C1+ C1– ENABLE

PGND GND

OUT

LBO

C2+ C2–

22 µF

10 µF

Output

3.3 V , 200 mA

2.2 µF

Input

1.8 V to 3.6 V

OFF/ON

efficiency (TPS60120, TPS60121)

typical operating circuit

TPS60120

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

PowerPAD is a trademark of Texas Instruments Incorporated.

Page 2

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

GND GND

ENABLE

OUT

C1+

C1– PGND PGND

GND GND LBI LBO OUT C2+ IN C2– PGND PGND

PWP PACKAGE

(TPS60120/TPS60122)

(TOP VIEW)

Thermal Pad

1 2 3 4 5 6 7 8 9 10

20 19 18 17 16 15 14 13 12 11

GND GND

ENABLE

OUT

C1+

C1– PGND PGND

GND GND NC PG OUT C2+ IN C2– PGND PGND

PWP PACKAGE

(TPS60121/TPS60123)

(TOP VIEW)

AVAILABLE OPTIONS

PART NUMBER

†

PACKAGE DEVICE FEATURES

TPS60120PWP

Low battery detector

TPS60121PWP

20-Pin thermally

2-Cell to 3.3 V, 200 mA

Power good detector

–

40°C to 85°C

TPS60122PWP

PWP

enhanced TSSOP

Low battery detector

TPS60123PWP

2-Cell to 3.3 V, 100 mA

Power good detector

†

The PWP package is available taped and reeled. Add R suffix to device type (e.g. TPS60120PWPR) to order quantities of 2000 devices per reel.

Page 3

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

functional block diagram

_ +

Charge Pump Power Stages

IN C1+

C1– OUT PGND IN

C2+

C2– OUT PGND

Oscillator

Control

Circuit

_ +

+ –

REF

_ +

+ –

Shutdown/

Start-Up

Control

0.8 V

+ –

REF

LBI

GND LBO

ENABLE

C1F

C2F

TPS60120/TPS60122

_ +

Charge Pump Power Stages

IN C1+

C1– OUT PGND

IN C2+

C2– OUT PGND

Oscillator

Control

Circuit

_ +

+ –

REF

_ +

+ –

Shutdown/

Start-Up Control

0.8 V

+ –

REF

GND PG

ENABLE

C1F

C2F

TPS60121/TPS60123

Page 4

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Terminal Functions

TERMINAL

NAME NO.

I/O

DESCRIPTION

C1+ 6 Positive terminal of the flying capacitor C1 C1– 8 Negative terminal of the flying capacitor C1 C2+ 15 Positive terminal of the flying capacitor C2 C2– 13 Negative terminal of the flying capacitor C2

ENABLE 3 I

ENABLE input. Connect ENABLE to IN for normal operation. When ENABLE is a logic low, the device turns off and the supply current decreases to 0.05 µA. The output is disconnected from the input when the device is placed in shutdown.

FB 4 I

Feedback input. Connect FB to OUT as close to the load as possible to achieve best regulation. Resistive divider is on the chip to match the internal reference voltage of 1.21 V .

GND

1, 2,

19, 20

Ground. Analog ground for internal reference and control circuitry. Connect to PGND through a short trace.

IN 7,14 I

Supply input. Connect to an input supply in the 1.8-V to 3.6-V range. Bypass IN to PGND with a (CO/2) µF capacitor. Connect both IN through a short trace.

LBO/PG 17 O

Low battery detector output or power good output. Open drain output of the low battery or power-good comparator. It can sink 1 mA. A 100-kΩ to 1-MΩ pullup is recommended. Leave terminal unconnected if not used.

LBI/NC 18 I

Low battery detector input (TPS60120/TPS60122 only). The input is compared to the internal 1.21-V reference voltage. Connect terminal to ground if the low-battery detector function is not used. On the TPS60121 and TPS60123, this terminal is not connected.

OUT 5, 16 O

Regulated 3.3-V power output. Connect both OUT terminals through a short trace and bypass OUT to GND with the output filter capacitor C

PGND 9–12 Power ground. Charge-pump current flows through this pin. Connect all PGND pins together.

detailed description

operating principle

The TPS6012x charge pumps provide a regulated 3.3-V output from a 1.8-V to 3.6-V input. They deliver a maximum load current of 200 mA or 100 mA, respectively. Designed specifically for space-critical, batterypowered applications, the complete charge pump circuit requires only four external capacitors. The circuit is optimized for efficiency over a wide input voltage range.

The TPS6012x charge pumps consist of an oscillator, a 1.21-V bandgap reference, an internal resistive feedback circuit, an error amplifier, high current MOSFET switches, a shutdown/start-up circuit, a low-battery or power-good comparator, and a control circuit (see the functional block diagram).

The device consists of two single-ended charge pumps. The power stages of the charge pump are automatically configured to amplify the input voltage with a conversion factor of 1.5 or 2. The conversion ratio depends on input voltage and output current. With input voltages lower than approximately 2.4 V, the convertor will run in a voltage doubler mode with a gain of two. With a higher input voltage, the converter operates with a gain of

1.5 V. This assures high efficiency over the wide input voltage range of a two-cell battery stack and is further described in the

adaptive mode switching

section.

adaptive mode switching

The ON-resistance of the MOSFETs that are in the charge path of the flying capacitors is regulated when the charge pump operates in voltage doubler-mode. It is changed depending on the output voltage that is fed back into the control loop. This way, the time-constant during the charging phase can be modified and increased versus a time-constant for fully switched-on MOSFETs. The ON-resistance of both switches and the capacitance of the flying capacitor define the time constant. The MOSFET switches in the discharge path of the charge pump are always fully switched on to their minimum r

DS(on)

. With the time-constant during charge phase being larger than the time constant in discharge phase, the voltage on the flying capacitors stabilizes to the lowest possible value necessary to get a stable VO.

Page 5

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

adaptive mode switching (continued)

The voltage on the flying capacitors is measured and compared with the supply voltage V

. If the voltage across the flying capacitors is smaller than half of the supply voltage, then the charge pump switches into the 1.5x conversion-mode. The charge pump switches back from a 1.5x conversion-mode to a voltage doubler mode if the load current in 1.5x conversion-mode can no more be delivered.

With this control mode the device runs in doubler-mode at low V

and in 1.5x conversion-mode at high VI to optimize the efficiency. The most desirable doubler mode is automatically selected depending on both VI and IL. This means that at light loads the device selects the 1.5x conversion-mode already at smaller supply voltages than at heavy loads.

The TPS60120 output voltage is regulated using the

ACTIVE-CYCLE

regulation. An active cycle controlled Charge pump utilizes two methods to control the output voltage. At high load currents it varies the on resistances of the internal switches and keeps the ratio ON/OFF time (=frequency) constant. That means the charge pump runs at a fixed frequency. It also keeps the output voltage ripple as low as in linear-mode. At light loads the internal resistance and also the amount of energy transferred per pulse is fixed and the charge pump regulates the voltage by means of a variable ratio of ON-to-OFF time. In this operating point, it runs like a skip mode controlled charge pump with a very high internal resistance, which also enables a low ripple in this operation mode. Since the charge pump does effectively switch at lower frequencies at light loads, it achieves a low quiescent current.

pulse-skip mode

In pulse-skip mode the error amplifier disables switching of the power stages when it detects an output higher than 3.3 V. The oscillator halts and the IC then skips switching cycles until the output voltage drops below 3.3 V . Then the error amplifier reactivates the oscillator and starts switching the power stages again. The pulse-skip regulation mode minimizes operating current because it does not switch continuously and deactivates all functions except bandgap reference, error amplifier, and low-battery/power-good comparator when the output is higher than 3.3 V . When switching is disabled from the error amplifier , the load is also isolated from the input. In pulse-skip mode, a special current control circuitry limits the peak current. This assures moderate output voltage ripple and also prevents the device from drawing excessive current spikes out of the battery.

start-up procedure

During start-up, i.e., when ENABLE is set from logic low to logic high, the output capacitor is charged up with a limited current until the output voltage V

reaches 0.8 × VI. When the start-up comparator detects this voltage limit, the IC begins switching. This start-up charging of the output capacitor ensures a short start-up time and eliminates the need of a Schottky diode between IN and OUT. The IC starts with a maximum load, which is defined by a 16-Ω resistor or 33-Ω resistor, respectively.

shutdown

Driving ENABLE low places the device in shutdown mode. This disables all switches, the oscillator, and control logic. The device typically draws 0.05 µA (1 µA max) of supply current in this mode. Leakage current drawn from the output is as low as 1 µA max. The device exits shutdown once ENABLE is set to a high level. The typical no-load shutdown exit time is 10 µs. When the device is in shutdown, the load is isolated from the input.

undervoltage lockout

The TPS6012x devices have an undervoltage lockout feature that deactivates the device and places it in shutdown mode when the input voltage falls below 1.6 V.

low-battery detector (TPS60120 and TPS60122)

The internal low-battery comparator trips at 1.21 V ± 5% when the voltage on LBI ramps down. The battery voltage at which the comparator initiates a low battery warning at the LBO output can easily be programmed with a resistive divider as shown in Figure 1. The sum of resistors R1 and R2 is recommended to be in the 100 kΩ to 1 MΩ range.

Page 6

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

low-battery detector (TPS60120 and TPS60122) (continued)

LBO is an open drain output. An external pullup resistor to OUT , in the 100 kΩ to 1 MΩ range, is recommended. During start-up, the LBO output signal is invalid for the first 500 µs. LBO is high impedance when the device is disabled.

If the low-battery comparator function is not used, connect LBI to ground and leave LBO unconnected.

(TRIP)

1.21 Vǒ1

)

R1 R2

_ +

+ –

REF

BAT

LBI

LBO

Figure 1. Programming of the Low-Battery Comparator Trip Voltage

Formulas to calculate the resistive divider for low battery detection, with V

LBI

= 1.15 V – 1.27 V:

R2+1MW

LBI

Bat

R1+1MW*

Formulas to calculate the minimum and maximum battery voltage that triggers the low battery detector:

Bat(min)

LBI(min)

(min)

)

(max)

Bat(max)

LBI(max)

(max)

)

(min)

Table 1. Recommended Values for the Resistive Divider From the E96 Series (±1%),

LBI

= 1.15 V – 1.27 V

BAT

/V R1/kΩ R2/kΩ V

BAT (MIN)

/V V

BAT(MAX)

1.8 357 732 1.700 –5.66% 1.902 5.67%

1.9 365 634 1.799 –5.32% 2.016 6.11%

2.0 412 634 1.883 –5.86% 2.112 5.6%

2.1 432 590 1.975 –5.95% 2.219 5.67%

2.2 442 536 2.080 –5.45% 2.338 6.27%

Using ±1% accurate resistors, the total accuracy of the trip voltage is about ±6%, considering the ±4% accuracy the integrated voltage reference adds and considering that not every calculated resistor value is available.

A 100 nF bypass capacitor should be connected in parallel to R2 if large line transients are expected. These voltage drops can inadvertently trigger the low-battery comparator and produce a wrong low-battery warning signal at the LBO terminal.

Page 7

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

power-good detector (TPS60121 and TPS60123)

The PG terminal is an open-drain output that is pulled low when the output is out of regulation. When the output voltage rises to about 90% of its nominal voltage, the power-good output is released. PG is high impedance when the device is disabled. A pullup resistor must be connected between PG and OUT. The pullup resistor should be in the 100 kΩ to 1 MΩ range. If the power-good function is not used, then PG should remain unconnected.

22 µF

Output

3.3 V, 200 mA

Input

1.8 V to 3.6 V

IN IN

C1+ C1– ENABLE

PGND GND

OUT OUT

PG C2+ C2–

2.2 µF

Off/On

10 µF

R1 1 MΩ

TPS60121

Power-Good Output

Figure 2. Typical Operating Circuit Using Power-Good Comparator

absolute maximum ratings (see Note 1)

†

Input voltage range, VI (IN, OUT, ENABLE, FB, LBI, LBO/PG) –0.3 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . .

Differential input voltage, V

(C1+, C2+ to GND) –0.3 V to (VO + 0.3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Differential input voltage, VID (C1–, C2– to GND) –0.3 V to (VI + 0.3 V). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous total power dissipation See dissipation rating table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current TPS60120, TPS60121 300 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Continuous output current TPS60122, TPS60123 150 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

stg

–55°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Lead temperature 1,6 mm (1/16 inch) from case for 10s 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Maximum junction temperature, T

150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: V

(ENABLE)

, V

(LBI)

and V

(LBO/PG)

can exceed VI up to the maximum rated voltage without increasing the leakage current drawn by these

inputs.

DISSIPATION RATING TABLE 1 FREE-AIR TEMPERATURE (see Figure 3)

PACKAGE

TA ≤ 25_C

POWER RATING

DERATING FACTOR

ABOVE TA = 25_C

TA = 70_C

POWER RATING

TA = 85_C

POWER RATING

PWP 700 mW 5.6 mW/_C 448 mW 364 mW

DISSIPATION RATING TABLE 2 FREE-AIR TEMPERATURE (see Figure 4)

PACKAGE

TC ≤ 62.5_C

POWER RATING

DERATING FACTOR

ABOVE TC = 62.5_C

TC = 70_C

POWER RATING

TC = 85_C

POWER RATING

PWP 25 mW 285.7 mW/_C 22.9 mW 18.5 mW

Page 8

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

Figure 3

800

600

400

25 50 75 100

– Maximum Continuous Dissipation – mW

1000

1200

DISSIPATION DERATING CURVE

†

FREE-AIR TEMPERATURE

1400

125 150

200

TA – Free-Air Temperature – °C

PWP Package R

θJA

= 178°C/W

Figure 4

25 50 75 100

MAXIMUM CONTINUOUS DISSIPATION

†

CASE TEMPERATURE

125 150

Measured with the exposed thermal pad coupled to an infinite heat sink with a thermally conductive compound (the thermal conductivity of the compound is 0.815 W/m°C) The R

θJC

is 3.5°C/W

PWP package

TC – Case Temperature – °C

– Maximum Continuous Dissipation – WP

†

Dissipation rating tables and figures are provided for maintenance of junction temperature at or below absolute maximum temperature of 150°C. It is recommended not to exceed a junction temperature of 125°C.

recommended operating conditions

MIN MAX UNIT

Input voltage, V

1.8 3.6 V

TPS60120 and TPS60121 200

Output current, I

TPS60122 and TPS60123 100

Operating junction temperature, T

125 °C

Page 9

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

electrical characteristics at C

= 10 µF, C1F = C2F = 2.2 µF, CO = 22 µF, TC = –40°C to 85°C, VI = 2 V,

= VO and V

(ENABLE)

= VI (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Input voltage 1.8 3.6 V

(UVLO)

Input undervoltage lockout threshold TC = 25°C 1.6 1.8 V

TPS60120/TPS60121 200 mA

O(MAX)

Maximum output current

TPS60122/TPS60123 100 mA

1.8 V < VI < 2 V, 0 < IO < I

O(MAX)

TC = 0°C to 70°C

3.17 3.43

Output voltage

2 V < VI < 3.3 V, 0 < IO < I

O(MAX)

3.17 3.43

3.3 V < VI < 3.6 V, 0 < IO < I

O(MAX)

3.17 3.47

lkg(OUT)

Output leakage current VI = 2.4 V, V

(ENABLE)

= 0 V 1 µA

Quiescent current (no-load input current) VI = 2.4 V 55 90 µA

Q(SDN)

Shutdown supply current VI = 2.4 V, V

(ENABLE)

= 0 V 0.05 1 µA

OSC(INT)

Internal switching frequency VI = 2.4 V 210 320 450 kHz

Enable input voltage low VI = 1.8 V 0.3 x V

Enable input voltage high VI = 3.6 V 0.7 x V

lkg(ENABLE)

Enable input leakage current V

(ENABLE)

= V

GND

or V

0.01 0.1 µA

Output load regulation

VI = 2.4 V, 1 mA < IO < I

O(MAX)

TC = 25°C

0.003% /mA

Output line regulation

2 V < VI < 3.3 V, IO = 100 mA, TC = 25°C

0.3% /V

Short circuit current limit

VI < 2.4 V, VO = 0 V, TC = 25°C

115 mA

(LBITRIP)

Low battery trip voltage TPS60120/TPS60122

VI = 1.8 V to 2.2 V, Hysteresis 0.8% for rising LBI, TC = 0°C to 70°C

1.15 1.21 1.27 V

I(LBI)

LBI input current TPS60120/TPS60122 V

(LBI)

= 1.3 V 100 nA

O(LBO)

LBO output voltage low (see Note 2)

TPS60120/TPS60122

(LBI)

= 0 V,

(LBO,SINK)

= 1 mA

0.4 V

lkg(LBO)

LBO leakage current TPS60120/TPS60122

(LBI)

= 1.3 V,

(LBO)

= 3.3 V

0.01 0.1 µA

(PGTRIP)

Power-good trip voltage TPS60121/TPS60123 TC = 0°C to 70°C

0.86 × V

0.90 × V

0.94 × V

hys(PG)

Power-good trip voltage hysteresis

TPS60121/TPS60123

VO ramping negative, TCA = 0°C to 70°C

0.8%

O(PG)

Power-good output voltage low (see Note 2)

TPS60121/TPS60123 VO = 0 V, I

(PG,SINK)

= 1 mA 0.4 V

lkg(PG)

Power-good leakage current

TPS60121/TPS60123 VO = 3.3 V, V

(PG)

= 3.3 V 0.01 0.1 µA

NOTE 2: During start-up the LBO and PG output signal is invalid for the first 500 µs.

Page 10

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

PARAMETER MEASUREMENT INFORMATION

IN IN

LBI

C1+ C1– ENABLE

PGND GND

OUT OUT

LBO

C2+ C2–

10 µF

2.2 µF

Off/On

TPS6012x

2 x 10 µF

Used capacitor types: Ci: Ceramic, X7R Co: Ceramic, X7R C1, C2: Ceramic, X7R

Figure 5. Circuit Used For Typical Characteristics Measurements

TYPICAL CHARACTERISTICS

Table of Graphs

FIGURE

vs Output Current (TPS60120 and TPS60122) 6, 7

Efficienc

vs Input Voltage (TPS60120 and TPS60122)

8, 9 I Supply Current vs Input Voltage 10 V

Output Voltage vs Output Current (TPS60120 and TPS60122) 11, 12

Output Voltage vs Input Voltage (TPS60120 and TPS60122) 13, 14

Output Voltage Ripple vs Time 15 – 17

Output Voltage Ripple Amplitude vs Input Voltage 18

(OSC)

Oscillator Frequency vs Input Voltage 19 Load Transient Response 20 Line Transient Response 21

Output Voltage vs Time (Start-Up Timing) 22

Page 11

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 6

Efficiency – %

100

IO – Output Current – mA

TPS60120

EFFICIENCY

OUTPUT CURRENT

100.1 1 10 100 1000

VI = 2.0 V

VI = 2.4 V

VI = 2.7 V

Figure 7

Efficiency – %

100

IO – Output Current – mA

TPS60122

EFFICIENCY

OUTPUT CURRENT

100.1 1 10 100 1000

VI = 2.0 V

VI = 2.4 V

VI = 2.7 V

Figure 8

IO = 66 mA

100

1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VI – Input Voltage – V

Efficiency – %

IO = 164 mA

IO = 216 mA

IO = 116 mA

VO = 3.3 V TC = 25°C

TPS60120

EFFICIENCY

INPUT VOLTAGE

Figure 9

IO = 66 mA

100

1.8 2 2.2 2.4 2.6 2.8 3 3.2 3.4 3.6 VI – Input Voltage – V

Efficiency – %

IO = 116 mA

VO = 3.3 V TC = 25°C

TPS60122

EFFICIENCY

INPUT VOLTAGE

Page 12

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 10

VI – Input Voltage – V

SUPPLY CURRENT

INPUT VOLTAGE

Supply Current –

0.00

10.00

20.00

30.00

40.00

50.00

60.00

1.60 2.00 2.40 2.80 3.20 3.60

IO = 0 mA

100.1 1 10 100 1000

3.30

3.31

3.32

3.33

3.34

3.35

3.36

3.37

3.38

3.39

3.40

VI = 1.8 V

VI = 2.4 V

VI = 2.7 V

VI = 3.6 V

Figure 11

IO – Output Current – mA

TPS60120

OUTPUT VOLTAGE

OUTPUT CURRENT

– Output Voltage – V

Figure 12

IO – Output Current – mA

TPS60122

OUTPUT VOLTAGE

OUTPUT CURRENT

– Output Voltage – V

3.30

3.31

3.32

3.33

3.34

3.35

3.36

3.37

3.38

3.39

3.40

100.1 1 10 100

VI = 1.8 V

VI = 2.4 V

VI = 2.7 V

VI = 3.6 V

Figure 13

3.05

3.10

3.15

3.20

3.25

3.30

3.35

3.40

1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VI – Input Voltage – V

1 mA

TPS60120

OUTPUT VOLTAGE

INPUT VOLTAGE

50 mA

200 mA

100 mA

– Output Voltage – V

Page 13

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 14

VI – Input Voltage – V

TPS60122

OUTPUT VOLTAGE

INPUT VOLTAGE

–

Voltage

–

3.30

3.32

3.34

3.36

3.38

3.40

1.80 2.00 2.20 2.40 2.60 2.80 3.00 3.20 3.40 3.60

1 mA

50 mA

100 mA

Figure 15

3.3

3.32

3.34

3.36

3.38

3.40

0 200 400 600 800 10001200140016001800 2000

t – TIME – µs

OUTPUT VOLTAGE RIPPLE

TIME

VI = 2.4 V IO = 1 mA

– Output Voltage – V

Figure 16

3.3

3.32

3.34

3.36

3.38

3.40

0 20 40 60 80 100 120 140 160 180 200

t – TIME – µs

OUTPUT VOLTAGE RIPPLE

TIME

VI = 2.4 V IO = 10 mA

– Output Voltage – V

Figure 17

3.3

3.32

3.34

3.36

3.38

3.40

02468101214161820

t – TIME – µs

OUTPUT VOLTAGE RIPPLE

TIME

VI = 2.4 V IO = 100 mA

– Output Voltage – V

Page 14

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

Figure 18

100

1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6 VI – Input Voltage – V

OUTPUT VOLTAGE RIPPLE AMPLITUDE

INPUT VOLTAGE

IO = 100 mA

IO = 10 mA

IO = 1 mA

– Output Voltage Ripple – V

– mV

295

300

305

310

315

320

1.8 2.0 2.2 2.4 2.6 2.8 3.0 3.2 3.4 3.6

Figure 19

VI – Input Voltage – V

OSCILLATOR FREQUENCY

INPUT VOLTAGE

T = –40°C

T = 85 °C

T = 25°C

f – Frequency – kHz

t – Time – ms

LOAD TRANSIENT RESPONSE

VI = 2.4 V

020

200

3.38

3.40

3.36

3.34

21816141210 46 8

Figure 20

– Output Voltage – V

– Output Current – mA

010198765 23 4

t – Time – ms

LINE TRANSIENT RESPONSE

2.7

3.35

3.36

3.34

3.33

2.2

Figure 21

– Output Voltage – V

– Input Voltage – V

IO = 50 mA

Page 15

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

TYPICAL CHARACTERISTICS

–0.5

0.0

0.5

1.0

1.5

2.0

2.5

3.0

3.5

–0.2 –0.1 0.0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8

t – Time – ms

OUTPUT VOLTAGE

TIME

(START-UP TIMING)

VO – V

VI = 2.4 V R

LOAD

= 16.5 Ω

ENABLE – V

– Output Voltage and Enable Signal – V

Figure 22

APPLICATION INFORMATION

capacitor selection

The TPS6012x charge pumps require only four external capacitors as shown in the basic application circuit. Their values and types are closely linked to the output current and output noise/ripple requirements. For lowest noise and ripple, low ESR (<0.1 Ω) capacitors should be used for input and output capacitors.

The input capacitor improves system efficiency by reducing the input impedance. It also stabilizes the input current of the power source. The input capacitor should be chosen according to the power supply used and the distance from the power source to the converter IC. The input capacitor also has an impact on the output ripple requirements. The lower the ESR of the input capacitor Ci, the lower is the output ripple. Ci is recommended to be about two to four times as large as C

(xF)

The output capacitor Co can be selected from 5-times to 50-times larger than C

(xF)

, depending on the ripple tolerance. The larger Co and the lower its ESR, the lower will be the output voltage ripple. Ci and Co can be either ceramic or low-ESR tantalum; aluminum capacitors are not recommended.

Page 16

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

capacitor selection (continued)

Generally , the flying capacitors C

(xF)

will be the smallest. Only ceramic capacitors are recommended because they are low ESR and because they retain their capacitance at the switching frequency. Because the device regulates the output voltage with the pulse-skip technique, a larger flying capacitor will lead to a higher output voltage ripple if the size of the output capacitor is not increased. Be aware that, depending on the material used to manufacture them, ceramic capacitors might lose their capacitance over temperature and voltage. Ceramic capacitors of type X7R or X5R material will keep their capacitance over temperature and voltage, whereas Z5U or Y5V-type capacitors will decrease in capacitance. Table 2 lists recommended capacitor values.

Table 2. Recommended Capacitor Values

(µF)

(xF)

(µF)

TYP

PART

(V)

(mA)

TANTALUM

CERAMIC

(X7R)

CERAMIC

(X7R)

TANTALUM

CERAMIC

(X7R)

(mV)

4.7

22 4.7 65

TPS60120

150

4.7

2.2

22 40

TPS60121

2.4

10 4.7

22 4.7 80

200102.2

22 35

TPS60122

50 2.2

TPS60123

2.4

100 4.7

The TPS6012x devices are charge pumps that regulate the output voltage using the pulse-skip operating mode. The output voltage ripple is therefore dependent on the values and the ESR of the input, output and flying capacitors. The only possibility to reduce the output voltage ripple is to choose the appropriate capacitors. The lowest output voltage ripple can be achieved with ceramic capacitors due to their low ESR and their frequency characteristic.

Ceramic capacitors typically have an ESR that is more than 10 times lower than tantalum capacitors and they retain their capacitance at frequencies more than 10 times higher than tantalum capacitors. Many different tantalum capacitors act as an inductance for frequencies higher than 200 kHz. This behavior increases the output voltage ripple. Therefore the best choice for a minimized ripple is the ceramic capacitor. For applications that do not need higher performance in output voltage ripple, tantalum capacitors with a low ESR are a possibility for input and output capacitor, but a ceramic capacitor should be connected in parallel. Be aware that the ESR of tantalum capacitors is indirectly proportional to the physical size of the capacitor.

Table 2 is a good starting point for choosing the capacitors. If the output voltage ripple is too high for the application, it can be improved by selecting the appropriate capacitors. The first step is to increase the capacitance at the output. If the ripple is still too high, the second step would be to increase the capacitance at the input.

For the TPS60120 and TPS60121, the smallest board space can be achieved using Sprague’s 595D-series tantalum capacitors for input and output. However, with the trend towards high capacitance ceramic capacitors in smaller size packages, these types of capacitors may become more competitive in size. The smallest size for the TPS60122 and TPS60123 can be achieved using the recommended ceramic capacitors.

Tables 3 and 4 lists the manufacturers of recommended capacitors. In most applications surface-mount tantalum capacitors will be the right choice. However, ceramic capacitors provide the lowest output voltage ripple due to their typically lower ESR.

Page 17

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

capacitor selection (continued)

Table 3. Recommended Capacitors

MANUFACTURER PART NUMBER CAPACITANCE CASE SIZE TYPE

Taiyo Yuden

LMK212BJ105KG–T 1 µF 0805 Ceramic LMK212BJ225MG–T 2.2 µF 0805 Ceramic

LMK316BJ475KL–T 4.7 µF 1206 Ceramic LMK325BJ106MN–T 10 µF 1210 Ceramic LMK432BJ226MM–T 22 µF 1812 Ceramic

AVX

0805ZC105KAT2A 1 µF 0805 Ceramic

1206ZC225KAT2A 2.2 µF 1206 Ceramic TPSC475035R0600 4.7 µF Case C Tantalum TPSC106025R0500 10 µF Case C Tantalum TPSC226016R0375 22 µF Case C Tantalum

Sprague

595D106X0016B2T 10 µF Case B T antalum 595D226X06R3B2T 22 µF Case B Tantalum 595D226X0020C2T 22 µF Case B Tantalum

Kemet

T494C156K010AS 10 µF Case C Tantalum

T494C226M010AS 22 µF Case C Tantalum

NOTE: Case code compatibility with EIA 535BAAC and CECC30801 molded chips.

Table 4. Recommended Capacitor Manufacturers

MANUFACTURER CAPACITOR TYPE INTERNET SITE

Taiyo Yuden X7R/X5R ceramic http://www.t–yuden.com/

AVX X7R/X5R ceramic

TPS-series tantalum

http://www.avxcorp.com/

Sprague 595D-series tantalum

593D-series tantalum

http://www.vishay.com/

Kemet T494-series tantalum http://www.kemet.com/

power dissipation

The power dissipated in the TPS6012x depends on output current and mode of operation (1.5x or doubler voltage conversion mode). It is described by the following:

DISS

–

× IO (Efficiency η mainly depends on VI and also on IO. See efficiency graphs.)

DISS

must be less than that allowed by the package rating. See the absolute maximum ratings for 20-pin PWP

package power-dissipation limits and deratings.

Page 18

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

board layout

Careful board layout is necessary due to the high transient currents and switching frequency of the converter. All capacitors should be soldered in close proximity to the IC. Connect ground and power ground pins through a short, low-impedance trace. A PCB layout proposal for a two-layer board is given in Figure 23. The bottom layer of the board carries only ground potential for best performance. The layout also provides improved performance as the exposed frame is soldered to the PCB.

An evaluation module for the TPS60120 is available and can be ordered under product code TPS60120EVM–142. The EVM uses the layout shown in Figure 23. The layout also provides improved thermal performance as the exposed leadframe of the PowerPAD package can be soldered to the PCB.

Figure 23. Recommended PCB Layout for

TPS6012X

Figure 24. Component Placement

Table 5. Component Identification

IC1 TPS6012x C1, C2 Flying capacitors C3, C6 Input capacitors C4, C5 Onput capacitors

C7 Stabilization capacitor for LBI

R1, R2 Resistive divider for LBI

R3 Pullup resistor for LBO

The best performance of the converter is achieved with the additional bypass capacitors C5 and C6 at input and output. Capacitor C7 should be included if the large line transients are expected. The capacitors are not required. They can be omitted in most applications.

Page 19

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

application proposals

paralleling of two TPS6012x to deliver 400 mA total output current

Two TPS6012x devices can be connected in parallel to yield higher load currents. The circuit of Figure 25 can deliver up to 400 mA at an output voltage of 3.3 V . The devices can share the output capacitors, but each one requires its own transfer capacitors and input capacitor. If both a TPS60120 and a TPS60121 are used, it is possible to monitor the battery voltage with the TPS60120 using the low-battery comparator function and to supervise the output voltage with the TPS60121 using the power-good comparator. Make the layout of the charge pumps as similar as possible, and position the output capacitor the same distance from both devices.

IN IN

LBI

C1+ C1– ENABLE

PGND GND

OUT OUT

LBO

C2+ C2–

47 µF

10 µF

Output

3.3 V, 400 mA

2.2 µF

R1 357 kΩ

R2 732 kΩ

Input

1.8 V to 3.6 V

Off/On

IN IN

C1+ C1– ENABLE

PGND GND

OUT OUT

C2+ C2–

2.2 µF

10 µF

R3 1 MΩ

Low Battery Warning

Power-Good Signal

R4 1 MΩ

TPS60120 TPS60121

Figure 25. Paralleling of Two TPS6012x Charge Pumps

Page 20

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

TPS6012x operated with ultra-low quiescent current

Because the output of the TPS6012x is isolated from the input when the devices are disabled, and because the internal resistive divider is disconnected in shutdown, an ultra-low quiescent current mode can be implemented. In this mode, the output voltage is sustained because the converter is periodically enabled to refresh the output capacitor. The necessary external control signal that is applied to the ENABLE pin is generated from a microcontroller like the ultra-low power microcontroller MSP430. For a necessary supply current for the system of 1 mA and a minimum supply voltage of 3 V with a 22-µF output capacitor, the refresh has to be done after a maximum of 3.5 ms. Longer refresh periods can be achieved with a larger output capacitor.

IN IN

LBI

C1+ C1– ENABLE

PGND GND

OUT

LBO

C2+ C2–

C2 22 µF

10 µF

Output

3.3 V , 100 mA

2.2 µF

Input

1.8 V to 3.6 V

OFF

C3 1 µF

1 MΩ

R3 1 MΩ

MCU

e.g.

MSP430

TPS60122

Figure 26. TPS60122 in Ultra-Low Quiescent Current Mode

regulated discharge of the output capacitors after disabling of the TPS6012x

During shutdown of the charge pump TPS6012x, the output is isolated from the input. Therefore, the discharging of the output capacitor depends on the load and on the leakage current of the capacitor. In certain applications it is necessary to completely remove the supply voltage from the load in shutdown mode. That means the output capacitor of the charge pump has to be actively discharged when the charge pump is disabled. Figure 27 shows one solution to this problem.

TPS601xx

OUT

GND

ENABLE

SN74AHC1G04

VCC

GND

ENABLE

GND

OUT

BSS138

Figure 27. Block Diagram of the Regulated Discharge of the Output Capacitor

Page 21

TPS60120, TPS60121, TPS60122, TPS60123

REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP

DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

APPLICATION INFORMATION

related information

application reports

For more application information see:

PowerPAD Application Report, Literature Number SLMA002

TPS6010x/TPS6011x Charge Pump Application Report

, Literature Number SLVA070

Designer Note Page: Powering the TMS320C5420 Using the TPS60100, TPS76918, and the TPS3305-18, Literature Number SLVA082.

device family products

Other devices in this family are:

PART NUMBER

DATASHEET LITERATURE

CODE

DESCRIPTION

TPS60100 SLVS213B Regulated 3.3-V, 200-mA low-noise charge pump dc-dc converter TPS60101 SL VS214A Regulated 3.3-V, 100-mA low-noise charge pump dc-dc converter

TPS60110 SLVS215A Regulated 5-V, 300-mA low-noise charge pump dc-dc converter

TPS60111 SLVS216A Regulated 5-V, 150-mA low-noise charge pump dc-dc converter TPS60130 SLVS258 Regulated 5-V, 300-mA high efficiency charge pump dc-dc converter with low-battery comparator TPS60131 SLVS258 Regulated 5-V, 300-mA high efficiency charge pump dc-dc converter with power-good comparator TPS60132 SLVS258 Regulated 5-V, 150-mA high efficiency charge pump dc-dc converter with low-battery comparator TPS60133 SLVS258 Regulated 5-V, 150-mA high efficiency charge pump dc-dc converter with power-good comparator

Page 22

TPS60120, TPS60121, TPS60122, TPS60123 REGULATED 3.3 V, 200-mA HIGH EFFICIENCY CHARGE PUMP DC/DC CONVERTERS

SLVS257A – NOVEMBER 1999 – REVISED DECEMBER 1999

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

PWP (R-PDSO-G**) PowerPAD PLASTIC SMALL-OUTLINE

4073225/F 10/98

0,50

0,75

0,25

0,15 NOM

Thermal Pad (See Note D)

Gage Plane

2824

7,70

7,90

6,40

6,60

9,60

9,80

6,60 6,20

0,19

4,50 4,30

0,15

0,30

1,20 MAX

1614

5,10

4,90

PINS **

4,90

5,10

DIM

A MIN

A MAX

0,05

Seating Plane

0,65

0,10

0°–8°

20 PINS SHOWN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusions. D. The package thermal performance may be enhanced by bonding the thermal pad to an external thermal plane.

This pad is electrically and thermally connected to the backside of the die and possibly selected leads.

E. Falls within JEDEC MO-153

PowerPAD is a trademark of Texas Instruments Incorporated.

Page 23

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TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.

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