Page 1
P-Channel Enhancement-Mode
TO-243AA
(SOT-89)
Vertical DMOS FETs
Ordering Information
BV
/R
DSS
BV
DGS
-240V 8.0Ω -2.4V -800mA TP2424N8 TP2424ND
*
Same as SOT-89. Product supplied on 2000 piece carrier tape reels.
DS(ON)
(max) (max) (min) TO-243AA* Die
V
GS(th)
I
D(ON)
Features
❏ Low threshold
❏ High input impedance
❏ Low input capacitance
❏ Fast switching speeds
❏ Free from secondary breakdown
❏ Low input and output leakage
❏ Complementary N- and P-channel devices
Applications
❏ Logic level interfaces – ideal for TTL and CMOS
❏ Solid state relays
❏ Linear Amplifiers
❏ Power Management
❏ Analog switches
❏ Telecom switches
Order Number / Package
Product marking for TO-243AA:
TP4C❋
where ❋ = 2-week alpha date code
Low Threshold DMOS Technology
These low threshold enhancement-mode (normally-off) power
transistors utilize a vertical DMOS structure and Supertex's wellproven silicon-gate manufacturing process. This combination
produces devices with the power handling capabilities of bipolar
transistors and with the high input impedance and positive
temperature coefficient inherent in MOS devices. Characteristic
of all MOS structures, these devices are free from thermal
runaway and thermally induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where very low threshold
voltage, high breakdown voltage, high input impedance, low input
capacitance, and fast switching speeds are desired.
Package Option
TP2424
Low Threshold
Absolute Maximum Ratings
Drain-to-Source Voltage BV
Drain-to-Gate Voltage BV
Gate-to-Source Voltage ± 20V
Operating and Storage Temperature -55°C to +150°C
Soldering Temperature* 300°C
*
11/12/01
Supertex Inc. does not recommend the use of its products in life support applications and will not knowingly sell its products for use in such applications unless it receives an adequate "products liability
indemnification insurance agreement." Supertex does not assume responsibility for use of devices described and limits its liability to the replacement of devices determined to be defective due to
workmanship. No responsibility is assumed for possible omissions or inaccuracies. Circuitry and specifications are subject to change without notice. For the latest product specifications, refer to the
Supertex website: http://www.supertex.com. For complete liability information on all Supertex products, refer to the most current databook or to the Legal/Disclaimer page on the Supertex website.
Distance of 1.6 mm from case for 10 seconds.
DSS
DGS
G
D
S
Note: See Package Outline section for dimensions.
1
D
Page 2
Thermal Characteristics
Package ID (continuous)* ID (pulsed) Power Dissipation
@ TA = 25°C °C/W °C/W
TO-243AA -316mA -1.9A 1.6W
* I
(continuous) is limited by max rated Tj.
D
†
Mounted on FR5 board, 25mm x 25mm x 1.57mm. Significant PD increase possible on ceramic substrate.
†
θ
jc
θ
15 78
ja
†
IDR*I
-316mA -1.9A
Electrical Characteristics (@ 25°C unless otherwise specified)
Symbol Parameter Min Typ Max Unit Conditions
BV
DSS
Drain-to-Source
Breakdown Voltage
-240 V VGS = 0V, ID = -250µA
TP2424
DRM
V
∆V
I
GSS
I
DSS
GS(th)
GS(th)
Gate Threshold Voltage -1.0 -2.4 V VGS = VDS, ID= -1.0mA
Change in V
with Temperature 4.5 mV/°CVGS = VDS, ID= -1.0mA
GS(th)
Gate Body Leakage -100 nA VGS = ± 20V, VDS = 0V
Zero Gate Voltage Drain Current -10.0 µAV
-1.0 mA V
I
D(ON)
ON-State Drain Current -0.3 VGS = -4.5V, VDS = -25V
-0.8 VGS = -10V, VDS = -25V
R
DS(ON)
∆R
DS(ON)
G
FS
C
ISS
C
OSS
C
RSS
t
d(ON)
t
r
t
d(OFF)
t
f
V
SD
t
rr
Notes:
1.All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2.All A.C. parameters sample tested.
Static Drain-to-Source
ON-State Resistance
Change in R
with Temperature 0.75 %/°CVGS = -10V, ID = -500mA
DS(ON)
10.0 Ω VGS = -4.5V, ID = -150mA
8.0 V
Forward Transconductance 150 m VDS = -25V, ID = -200mA
Input Capacitance 200
Common Source Output Capacitance 100 pF
Reverse Transfer Capacitance 40
Turn-ON Delay Time 20
Rise Time 30
Turn-OFF Delay Time 35
Fall Time 25
Diode Forward Voltage Drop -1.5 V VGS = 0V, ISD = -500mA
Reverse Recovery Time 300 ns VGS = 0V, ISD = -500mA
ns
= 0V, VDS = Max Rating
GS
= 0V, VDS = 0.8 Max Rating
GS
= 125°C
T
A
A
= -10V, ID = -500mA
GS
Ω
VGS = 0V, VDS = -25V
f = 1.0 MHz
VDD = -25V,
ID = -250mA,
= 25Ω
R
GEN
Switching Waveforms and Test Circuit
0V
INPUT
-10V
0V
OUTPUT
V
DD
©2001 Supertex Inc. All rights reserved. Unauthorized use or reproduction prohibited.
10%
t
d(ON)
90%
t
(ON)
t
r
90%
10%
t
d(OFF)
t
(OFF)
90%
10%
t
F
2
PULSE
GENERATOR
R
gen
INPUT
D.U.T.
OUTPUT
R
L
V
DD
11/12/01
1235 Bordeaux Drive, Sunnyvale, CA 94089
TEL: (408) 744-0100 • FAX: (408) 222-4895
www.supertex.com
Loading...